1 // SPDX-License-Identifier: GPL-2.0-or-later O 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /* 2 /*
3 * Copyright 2014-2022 Toradex 3 * Copyright 2014-2022 Toradex
4 * Copyright 2012 Freescale Semiconductor, Inc 4 * Copyright 2012 Freescale Semiconductor, Inc.
5 * Copyright 2011 Linaro Ltd. 5 * Copyright 2011 Linaro Ltd.
6 */ 6 */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 9
10 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/irq 11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include "imx6dl.dtsi" 12 #include "imx6dl.dtsi"
13 #include "imx6qdl-colibri.dtsi" 13 #include "imx6qdl-colibri.dtsi"
14 14
15 / { 15 / {
16 model = "Toradex Colibri iMX6DL/S on C 16 model = "Toradex Colibri iMX6DL/S on Colibri Evaluation Board V3";
17 compatible = "toradex,colibri_imx6dl-e 17 compatible = "toradex,colibri_imx6dl-eval-v3", "toradex,colibri_imx6dl",
18 "fsl,imx6dl"; 18 "fsl,imx6dl";
19 19
20 aliases { 20 aliases {
21 i2c0 = &i2c2; 21 i2c0 = &i2c2;
22 i2c1 = &i2c3; 22 i2c1 = &i2c3;
23 }; 23 };
24 24
25 aliases { 25 aliases {
26 rtc0 = &rtc_i2c; 26 rtc0 = &rtc_i2c;
27 rtc1 = &snvs_rtc; 27 rtc1 = &snvs_rtc;
28 }; 28 };
29 29
30 chosen { 30 chosen {
31 stdout-path = "serial0:115200n 31 stdout-path = "serial0:115200n8";
32 }; 32 };
33 33
34 /* Fixed crystal dedicated to mcp251x 34 /* Fixed crystal dedicated to mcp251x */
35 clk16m: clock-16m { 35 clk16m: clock-16m {
36 compatible = "fixed-clock"; 36 compatible = "fixed-clock";
37 #clock-cells = <0>; 37 #clock-cells = <0>;
38 clock-frequency = <16000000>; 38 clock-frequency = <16000000>;
39 clock-output-names = "clk16m"; 39 clock-output-names = "clk16m";
40 }; 40 };
41 }; 41 };
42 42
43 /* Colibri SSP */ 43 /* Colibri SSP */
44 &ecspi4 { 44 &ecspi4 {
45 status = "okay"; 45 status = "okay";
46 46
47 mcp251x0: mcp251x@0 { 47 mcp251x0: mcp251x@0 {
48 compatible = "microchip,mcp251 48 compatible = "microchip,mcp2515";
49 clocks = <&clk16m>; 49 clocks = <&clk16m>;
50 interrupt-parent = <&gpio3>; 50 interrupt-parent = <&gpio3>;
51 interrupts = <27 0x2>; 51 interrupts = <27 0x2>;
52 reg = <0>; 52 reg = <0>;
53 spi-max-frequency = <10000000> 53 spi-max-frequency = <10000000>;
54 status = "okay"; 54 status = "okay";
55 }; 55 };
56 }; 56 };
57 57
58 /* 58 /*
59 * Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 59 * Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
60 */ 60 */
61 &i2c3 { 61 &i2c3 {
62 status = "okay"; 62 status = "okay";
63 63
64 /* M41T0M6 real time clock on carrier 64 /* M41T0M6 real time clock on carrier board */
65 rtc_i2c: rtc@68 { 65 rtc_i2c: rtc@68 {
66 compatible = "st,m41t0"; 66 compatible = "st,m41t0";
67 reg = <0x68>; 67 reg = <0x68>;
68 }; 68 };
69 }; 69 };
70 70
71 &iomuxc { 71 &iomuxc {
72 pinctrl-names = "default"; 72 pinctrl-names = "default";
73 pinctrl-0 = < 73 pinctrl-0 = <
74 &pinctrl_weim_gpio_1 &pinctrl_ 74 &pinctrl_weim_gpio_1 &pinctrl_weim_gpio_2
75 &pinctrl_weim_gpio_3 &pinctrl_ 75 &pinctrl_weim_gpio_3 &pinctrl_weim_gpio_4
76 &pinctrl_weim_gpio_5 &pinctrl_ 76 &pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6
77 &pinctrl_usbh_oc_1 &pinctrl_us 77 &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1
78 >; 78 >;
79 }; 79 };
80 80
81 &pwm1 { 81 &pwm1 {
82 status = "okay"; 82 status = "okay";
83 }; 83 };
84 84
85 &pwm2 { 85 &pwm2 {
86 status = "okay"; 86 status = "okay";
87 }; 87 };
88 88
89 &pwm3 { 89 &pwm3 {
90 status = "okay"; 90 status = "okay";
91 }; 91 };
92 92
93 &pwm4 { 93 &pwm4 {
94 status = "okay"; 94 status = "okay";
95 }; 95 };
96 96
97 ®_usb_host_vbus { 97 ®_usb_host_vbus {
98 status = "okay"; 98 status = "okay";
99 }; 99 };
100 100
101 &uart1 { 101 &uart1 {
102 status = "okay"; 102 status = "okay";
103 }; 103 };
104 104
105 &uart2 { 105 &uart2 {
106 status = "okay"; 106 status = "okay";
107 }; 107 };
108 108
109 &uart3 { 109 &uart3 {
110 status = "okay"; 110 status = "okay";
111 }; 111 };
112 112
113 &usbh1 { 113 &usbh1 {
114 disable-over-current; 114 disable-over-current;
115 status = "okay"; 115 status = "okay";
116 }; 116 };
117 117
118 &usbotg { 118 &usbotg {
119 disable-over-current; 119 disable-over-current;
120 status = "okay"; 120 status = "okay";
121 }; 121 };
122 122
123 /* Colibri MMC */ 123 /* Colibri MMC */
124 &usdhc1 { 124 &usdhc1 {
125 status = "okay"; 125 status = "okay";
126 }; 126 };
127 127
128 &weim { 128 &weim {
129 status = "okay"; 129 status = "okay";
130 130
131 /* weim memory map: 32MB on CS0, CS1, 131 /* weim memory map: 32MB on CS0, CS1, CS2 and CS3 */
132 ranges = <0 0 0x08000000 0x02000000 132 ranges = <0 0 0x08000000 0x02000000
133 1 0 0x0a000000 0x02000000 133 1 0 0x0a000000 0x02000000
134 2 0 0x0c000000 0x02000000 134 2 0 0x0c000000 0x02000000
135 3 0 0x0e000000 0x02000000>; 135 3 0 0x0e000000 0x02000000>;
136 136
137 /* SRAM on Colibri nEXT_CS0 */ 137 /* SRAM on Colibri nEXT_CS0 */
138 sram@0,0 { 138 sram@0,0 {
139 compatible = "cypress,cy7c1019 139 compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram";
140 reg = <0 0 0x00010000>; 140 reg = <0 0 0x00010000>;
141 #address-cells = <1>; 141 #address-cells = <1>;
142 #size-cells = <1>; 142 #size-cells = <1>;
143 bank-width = <2>; 143 bank-width = <2>;
144 fsl,weim-cs-timing = <0x000100 144 fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000
145 0x000000 145 0x00000000 0x04000040 0x00000000>;
146 }; 146 };
147 147
148 /* SRAM on Colibri nEXT_CS1 */ 148 /* SRAM on Colibri nEXT_CS1 */
149 sram@1,0 { 149 sram@1,0 {
150 compatible = "cypress,cy7c1019 150 compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram";
151 reg = <1 0 0x00010000>; 151 reg = <1 0 0x00010000>;
152 #address-cells = <1>; 152 #address-cells = <1>;
153 #size-cells = <1>; 153 #size-cells = <1>;
154 bank-width = <2>; 154 bank-width = <2>;
155 fsl,weim-cs-timing = <0x000100 155 fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000
156 0x000000 156 0x00000000 0x04000040 0x00000000>;
157 }; 157 };
158 }; 158 };
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