1 // SPDX-License-Identifier: GPL-2.0-or-later O 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /* 2 /*
3 * Copyright (c) 2014 Protonic Holland 3 * Copyright (c) 2014 Protonic Holland
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 #include "imx6dl.dtsi" 7 #include "imx6dl.dtsi"
8 #include "imx6qdl-prti6q.dtsi" 8 #include "imx6qdl-prti6q.dtsi"
9 #include <dt-bindings/leds/common.h> 9 #include <dt-bindings/leds/common.h>
10 10
11 / { 11 / {
12 model = "Protonic RVT board"; 12 model = "Protonic RVT board";
13 compatible = "prt,prtrvt", "fsl,imx6dl 13 compatible = "prt,prtrvt", "fsl,imx6dl";
14 14
15 memory@10000000 { 15 memory@10000000 {
16 device_type = "memory"; 16 device_type = "memory";
17 reg = <0x10000000 0x10000000>; 17 reg = <0x10000000 0x10000000>;
18 }; 18 };
19 19
20 leds { 20 leds {
21 compatible = "gpio-leds"; 21 compatible = "gpio-leds";
22 pinctrl-names = "default"; 22 pinctrl-names = "default";
23 pinctrl-0 = <&pinctrl_leds>; 23 pinctrl-0 = <&pinctrl_leds>;
24 24
25 led-debug0 { 25 led-debug0 {
26 function = LED_FUNCTIO 26 function = LED_FUNCTION_STATUS;
27 gpios = <&gpio1 8 GPIO 27 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
28 linux,default-trigger 28 linux,default-trigger = "heartbeat";
29 }; 29 };
30 }; 30 };
31 }; 31 };
32 32
33 &can1 { 33 &can1 {
34 pinctrl-names = "default"; 34 pinctrl-names = "default";
35 pinctrl-0 = <&pinctrl_can1 &pinctrl_ca 35 pinctrl-0 = <&pinctrl_can1 &pinctrl_can1phy>;
36 status = "okay"; 36 status = "okay";
37 }; 37 };
38 38
39 &ecspi1 { 39 &ecspi1 {
40 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW> 40 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
41 pinctrl-names = "default"; 41 pinctrl-names = "default";
42 pinctrl-0 = <&pinctrl_ecspi1>; 42 pinctrl-0 = <&pinctrl_ecspi1>;
43 status = "okay"; 43 status = "okay";
44 44
45 flash@0 { 45 flash@0 {
46 compatible = "jedec,spi-nor"; 46 compatible = "jedec,spi-nor";
47 reg = <0>; 47 reg = <0>;
48 spi-max-frequency = <20000000> 48 spi-max-frequency = <20000000>;
49 #address-cells = <1>; 49 #address-cells = <1>;
50 #size-cells = <1>; 50 #size-cells = <1>;
51 }; 51 };
52 }; 52 };
53 53
54 &ecspi3 { 54 &ecspi3 {
55 cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW> 55 cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
56 pinctrl-names = "default"; 56 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_ecspi3>; 57 pinctrl-0 = <&pinctrl_ecspi3>;
58 status = "okay"; 58 status = "okay";
59 59
60 nfc@0 { 60 nfc@0 {
61 compatible = "ti,trf7970a"; 61 compatible = "ti,trf7970a";
62 reg = <0>; 62 reg = <0>;
63 pinctrl-names = "default"; 63 pinctrl-names = "default";
64 pinctrl-0 = <&pinctrl_nfc>; 64 pinctrl-0 = <&pinctrl_nfc>;
65 spi-max-frequency = <2000000>; 65 spi-max-frequency = <2000000>;
66 interrupts-extended = <&gpio5 66 interrupts-extended = <&gpio5 14 IRQ_TYPE_LEVEL_LOW>;
67 ti,enable-gpios = <&gpio5 12 G 67 ti,enable-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>,
68 <&gpio5 11 G 68 <&gpio5 11 GPIO_ACTIVE_LOW>;
69 vin-supply = <®_3v3>; 69 vin-supply = <®_3v3>;
70 autosuspend-delay = <30000>; 70 autosuspend-delay = <30000>;
71 irq-status-read-quirk; 71 irq-status-read-quirk;
72 en2-rf-quirk; 72 en2-rf-quirk;
73 status = "okay"; 73 status = "okay";
74 }; 74 };
75 }; 75 };
76 76
77 &i2c3 { 77 &i2c3 {
78 adc@49 { 78 adc@49 {
79 compatible = "ti,ads1015"; 79 compatible = "ti,ads1015";
80 reg = <0x49>; 80 reg = <0x49>;
81 #address-cells = <1>; 81 #address-cells = <1>;
82 #size-cells = <0>; 82 #size-cells = <0>;
83 83
84 /* nc */ 84 /* nc */
85 channel@4 { 85 channel@4 {
86 reg = <4>; 86 reg = <4>;
87 ti,gain = <3>; 87 ti,gain = <3>;
88 ti,datarate = <3>; 88 ti,datarate = <3>;
89 }; 89 };
90 90
91 /* nc */ 91 /* nc */
92 channel@5 { 92 channel@5 {
93 reg = <5>; 93 reg = <5>;
94 ti,gain = <3>; 94 ti,gain = <3>;
95 ti,datarate = <3>; 95 ti,datarate = <3>;
96 }; 96 };
97 97
98 /* can1_l */ 98 /* can1_l */
99 channel@6 { 99 channel@6 {
100 reg = <6>; 100 reg = <6>;
101 ti,gain = <3>; 101 ti,gain = <3>;
102 ti,datarate = <3>; 102 ti,datarate = <3>;
103 }; 103 };
104 104
105 /* can1_h */ 105 /* can1_h */
106 channel@7 { 106 channel@7 {
107 reg = <7>; 107 reg = <7>;
108 ti,gain = <3>; 108 ti,gain = <3>;
109 ti,datarate = <3>; 109 ti,datarate = <3>;
110 }; 110 };
111 }; 111 };
112 112
113 rtc@51 { 113 rtc@51 {
114 compatible = "nxp,pcf8563"; 114 compatible = "nxp,pcf8563";
115 reg = <0x51>; 115 reg = <0x51>;
116 }; 116 };
117 }; 117 };
118 118
119 &pcie { 119 &pcie {
120 status = "okay"; 120 status = "okay";
121 }; 121 };
122 122
123 &usbh1 { 123 &usbh1 {
124 status = "disabled"; 124 status = "disabled";
125 }; 125 };
126 126
127 &usbotg { 127 &usbotg {
128 disable-over-current; 128 disable-over-current;
129 }; 129 };
130 130
131 &vpu { 131 &vpu {
132 status = "disabled"; 132 status = "disabled";
133 }; 133 };
134 134
135 &iomuxc { 135 &iomuxc {
136 pinctrl_can1phy: can1phy { 136 pinctrl_can1phy: can1phy {
137 fsl,pins = < 137 fsl,pins = <
138 /* CAN1_SR */ 138 /* CAN1_SR */
139 MX6QDL_PAD_KEY_COL3__G 139 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13070
140 /* CAN1_TERM */ 140 /* CAN1_TERM */
141 MX6QDL_PAD_GPIO_0__GPI 141 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
142 >; 142 >;
143 }; 143 };
144 144
145 pinctrl_ecspi1: ecspi1grp { 145 pinctrl_ecspi1: ecspi1grp {
146 fsl,pins = < 146 fsl,pins = <
147 MX6QDL_PAD_EIM_D17__EC 147 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
148 MX6QDL_PAD_EIM_D18__EC 148 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
149 MX6QDL_PAD_EIM_D16__EC 149 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
150 /* CS */ 150 /* CS */
151 MX6QDL_PAD_EIM_D19__GP 151 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1
152 >; 152 >;
153 }; 153 };
154 154
155 pinctrl_ecspi3: ecspi3grp { 155 pinctrl_ecspi3: ecspi3grp {
156 fsl,pins = < 156 fsl,pins = <
157 MX6QDL_PAD_DISP0_DAT0_ 157 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
158 MX6QDL_PAD_DISP0_DAT1_ 158 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
159 MX6QDL_PAD_DISP0_DAT2_ 159 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
160 MX6QDL_PAD_DISP0_DAT3_ 160 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x000b1
161 >; 161 >;
162 }; 162 };
163 163
164 pinctrl_leds: ledsgrp { 164 pinctrl_leds: ledsgrp {
165 fsl,pins = < 165 fsl,pins = <
166 MX6QDL_PAD_GPIO_8__GPI 166 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
167 >; 167 >;
168 }; 168 };
169 169
170 pinctrl_nfc: nfcgrp { 170 pinctrl_nfc: nfcgrp {
171 fsl,pins = < 171 fsl,pins = <
172 /* NFC_ASK_OOK */ 172 /* NFC_ASK_OOK */
173 MX6QDL_PAD_DISP0_DAT15 173 MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x100b1
174 /* NFC_PWR_EN */ 174 /* NFC_PWR_EN */
175 MX6QDL_PAD_DISP0_DAT16 175 MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x100b1
176 /* NFC_EN2 */ 176 /* NFC_EN2 */
177 MX6QDL_PAD_DISP0_DAT17 177 MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x100b1
178 /* NFC_EN */ 178 /* NFC_EN */
179 MX6QDL_PAD_DISP0_DAT18 179 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x100b1
180 /* NFC_MOD */ 180 /* NFC_MOD */
181 MX6QDL_PAD_DISP0_DAT19 181 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x100b1
182 /* NFC_IRQ */ 182 /* NFC_IRQ */
183 MX6QDL_PAD_DISP0_DAT20 183 MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x100b1
184 >; 184 >;
185 }; 185 };
186 }; 186 };
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