1 /* 1 /*
2 * Support for imx6 based Advantech DMS-BA16 Q 2 * Support for imx6 based Advantech DMS-BA16 Qseven module
3 * 3 *
4 * Copyright 2015 Timesys Corporation. 4 * Copyright 2015 Timesys Corporation.
5 * Copyright 2015 General Electric Company 5 * Copyright 2015 General Electric Company
6 * 6 *
7 * This file is dual-licensed: you can use it 7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your opti 8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and no 9 * licensing only applies to this file, and not this project as a
10 * whole. 10 * whole.
11 * 11 *
12 * a) This file is free software; you can red 12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU Ge 13 * modify it under the terms of the GNU General Public License
14 * version 2 as published by the Free Soft 14 * version 2 as published by the Free Software Foundation.
15 * 15 *
16 * This file is distributed in the hope th 16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTIC 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more det 19 * GNU General Public License for more details.
20 * 20 *
21 * Or, alternatively, 21 * Or, alternatively,
22 * 22 *
23 * b) Permission is hereby granted, free of c 23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and a 24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the 25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitati 26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribut 27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to per 28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject 29 * Software is furnished to do so, subject to the following
30 * conditions: 30 * conditions:
31 * 31 *
32 * The above copyright notice and this per 32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial p 33 * included in all copies or substantial portions of the Software.
34 * 34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHO 35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT L 36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTI 37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE 38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGE 39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT 40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE 41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE. 42 * OTHER DEALINGS IN THE SOFTWARE.
43 */ 43 */
44 44
45 #include "imx6q.dtsi" 45 #include "imx6q.dtsi"
46 #include <dt-bindings/gpio/gpio.h> 46 #include <dt-bindings/gpio/gpio.h>
47 47
48 / { 48 / {
49 memory@10000000 { 49 memory@10000000 {
50 device_type = "memory"; 50 device_type = "memory";
51 reg = <0x10000000 0x40000000>; 51 reg = <0x10000000 0x40000000>;
52 }; 52 };
53 53
54 backlight_lvds: backlight { 54 backlight_lvds: backlight {
55 compatible = "pwm-backlight"; 55 compatible = "pwm-backlight";
56 pinctrl-names = "default"; 56 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_display> 57 pinctrl-0 = <&pinctrl_display>;
58 pwms = <&pwm1 0 5000000 0>; 58 pwms = <&pwm1 0 5000000 0>;
59 brightness-levels = < 0 1 59 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
60 10 11 60 10 11 12 13 14 15 16 17 18 19
61 20 21 61 20 21 22 23 24 25 26 27 28 29
62 30 31 62 30 31 32 33 34 35 36 37 38 39
63 40 41 63 40 41 42 43 44 45 46 47 48 49
64 50 51 64 50 51 52 53 54 55 56 57 58 59
65 60 61 65 60 61 62 63 64 65 66 67 68 69
66 70 71 66 70 71 72 73 74 75 76 77 78 79
67 80 81 67 80 81 82 83 84 85 86 87 88 89
68 90 91 68 90 91 92 93 94 95 96 97 98 99
69 100 101 1 69 100 101 102 103 104 105 106 107 108 109
70 110 111 1 70 110 111 112 113 114 115 116 117 118 119
71 120 121 1 71 120 121 122 123 124 125 126 127 128 129
72 130 131 1 72 130 131 132 133 134 135 136 137 138 139
73 140 141 1 73 140 141 142 143 144 145 146 147 148 149
74 150 151 1 74 150 151 152 153 154 155 156 157 158 159
75 160 161 1 75 160 161 162 163 164 165 166 167 168 169
76 170 171 1 76 170 171 172 173 174 175 176 177 178 179
77 180 181 1 77 180 181 182 183 184 185 186 187 188 189
78 190 191 1 78 190 191 192 193 194 195 196 197 198 199
79 200 201 2 79 200 201 202 203 204 205 206 207 208 209
80 210 211 2 80 210 211 212 213 214 215 216 217 218 219
81 220 221 2 81 220 221 222 223 224 225 226 227 228 229
82 230 231 2 82 230 231 232 233 234 235 236 237 238 239
83 240 241 2 83 240 241 242 243 244 245 246 247 248 249
84 250 251 2 84 250 251 252 253 254 255>;
85 default-brightness-level = <25 85 default-brightness-level = <255>;
86 enable-gpios = <&gpio1 0 GPIO_ 86 enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
87 }; 87 };
88 88
89 reg_1p8v: regulator-1p8v { 89 reg_1p8v: regulator-1p8v {
90 compatible = "regulator-fixed" 90 compatible = "regulator-fixed";
91 regulator-name = "1P8V"; 91 regulator-name = "1P8V";
92 regulator-min-microvolt = <180 92 regulator-min-microvolt = <1800000>;
93 regulator-max-microvolt = <180 93 regulator-max-microvolt = <1800000>;
94 regulator-always-on; 94 regulator-always-on;
95 }; 95 };
96 96
97 reg_3p3v: regulator-3p3v { 97 reg_3p3v: regulator-3p3v {
98 compatible = "regulator-fixed" 98 compatible = "regulator-fixed";
99 regulator-name = "3P3V"; 99 regulator-name = "3P3V";
100 regulator-min-microvolt = <330 100 regulator-min-microvolt = <3300000>;
101 regulator-max-microvolt = <330 101 regulator-max-microvolt = <3300000>;
102 regulator-always-on; 102 regulator-always-on;
103 }; 103 };
104 104
105 reg_lvds: regulator-lvds { 105 reg_lvds: regulator-lvds {
106 compatible = "regulator-fixed" 106 compatible = "regulator-fixed";
107 regulator-name = "lvds_ppen"; 107 regulator-name = "lvds_ppen";
108 regulator-min-microvolt = <330 108 regulator-min-microvolt = <3300000>;
109 regulator-max-microvolt = <330 109 regulator-max-microvolt = <3300000>;
110 regulator-boot-on; 110 regulator-boot-on;
111 gpio = <&gpio3 22 GPIO_ACTIVE_ 111 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
112 enable-active-high; 112 enable-active-high;
113 }; 113 };
114 114
115 reg_usb_h1_vbus: regulator-usbh1vbus { 115 reg_usb_h1_vbus: regulator-usbh1vbus {
116 compatible = "regulator-fixed" 116 compatible = "regulator-fixed";
117 regulator-name = "usb_h1_vbus" 117 regulator-name = "usb_h1_vbus";
118 regulator-min-microvolt = <500 118 regulator-min-microvolt = <5000000>;
119 regulator-max-microvolt = <500 119 regulator-max-microvolt = <5000000>;
120 }; 120 };
121 121
122 reg_usb_otg_vbus: regulator-usbotgvbus 122 reg_usb_otg_vbus: regulator-usbotgvbus {
123 compatible = "regulator-fixed" 123 compatible = "regulator-fixed";
124 regulator-name = "usb_otg_vbus 124 regulator-name = "usb_otg_vbus";
125 regulator-min-microvolt = <500 125 regulator-min-microvolt = <5000000>;
126 regulator-max-microvolt = <500 126 regulator-max-microvolt = <5000000>;
127 pinctrl-0 = <&pinctrl_usbotg_v 127 pinctrl-0 = <&pinctrl_usbotg_vbus>;
128 gpio = <&gpio4 15 GPIO_ACTIVE_ 128 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
129 enable-active-high; 129 enable-active-high;
130 }; 130 };
131 }; 131 };
132 132
133 &audmux { 133 &audmux {
134 pinctrl-names = "default"; 134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_audmux>; 135 pinctrl-0 = <&pinctrl_audmux>;
136 status = "okay"; 136 status = "okay";
137 }; 137 };
138 138
139 &ecspi1 { 139 &ecspi1 {
140 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW> 140 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
141 pinctrl-names = "default"; 141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_ecspi1>; 142 pinctrl-0 = <&pinctrl_ecspi1>;
143 status = "okay"; 143 status = "okay";
144 144
145 flash: flash@0 { 145 flash: flash@0 {
146 compatible = "jedec,spi-nor"; 146 compatible = "jedec,spi-nor";
147 #address-cells = <1>; 147 #address-cells = <1>;
148 #size-cells = <1>; 148 #size-cells = <1>;
149 spi-max-frequency = <20000000> 149 spi-max-frequency = <20000000>;
150 reg = <0>; 150 reg = <0>;
151 151
152 partition@0 { 152 partition@0 {
153 label = "U-Boot"; 153 label = "U-Boot";
154 reg = <0x0 0xc0000>; 154 reg = <0x0 0xc0000>;
155 }; 155 };
156 156
157 partition@c0000 { 157 partition@c0000 {
158 label = "env"; 158 label = "env";
159 reg = <0xc0000 0x10000 159 reg = <0xc0000 0x10000>;
160 }; 160 };
161 161
162 partition@d0000 { 162 partition@d0000 {
163 label = "spare"; 163 label = "spare";
164 reg = <0xd0000 0x32000 164 reg = <0xd0000 0x320000>;
165 }; 165 };
166 166
167 partition@3f0000 { 167 partition@3f0000 {
168 label = "mfg"; 168 label = "mfg";
169 reg = <0x3f0000 0x1000 169 reg = <0x3f0000 0x10000>;
170 }; 170 };
171 }; 171 };
172 }; 172 };
173 173
174 &fec { 174 &fec {
175 pinctrl-names = "default"; 175 pinctrl-names = "default";
176 pinctrl-0 = <&pinctrl_enet>; 176 pinctrl-0 = <&pinctrl_enet>;
177 phy-mode = "rgmii-id"; 177 phy-mode = "rgmii-id";
178 phy-supply = <®_3p3v>; 178 phy-supply = <®_3p3v>;
179 phy-handle = <&phy0>; 179 phy-handle = <&phy0>;
180 status = "okay"; 180 status = "okay";
181 181
182 mdio { 182 mdio {
183 #address-cells = <1>; 183 #address-cells = <1>;
184 #size-cells = <0>; 184 #size-cells = <0>;
185 185
186 phy0: ethernet-phy@4 { 186 phy0: ethernet-phy@4 {
187 reg = <4>; 187 reg = <4>;
188 qca,clk-out-frequency 188 qca,clk-out-frequency = <125000000>;
189 }; 189 };
190 }; 190 };
191 }; 191 };
192 192
193 &hdmi { 193 &hdmi {
194 ddc-i2c-bus = <&i2c2>; 194 ddc-i2c-bus = <&i2c2>;
195 status = "okay"; 195 status = "okay";
196 }; 196 };
197 197
198 &i2c1 { 198 &i2c1 {
199 clock-frequency = <100000>; 199 clock-frequency = <100000>;
200 pinctrl-names = "default"; 200 pinctrl-names = "default";
201 pinctrl-0 = <&pinctrl_i2c1>; 201 pinctrl-0 = <&pinctrl_i2c1>;
202 status = "okay"; 202 status = "okay";
203 }; 203 };
204 204
205 &i2c2 { 205 &i2c2 {
206 clock-frequency = <100000>; 206 clock-frequency = <100000>;
207 pinctrl-names = "default"; 207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_i2c2>; 208 pinctrl-0 = <&pinctrl_i2c2>;
209 status = "okay"; 209 status = "okay";
210 }; 210 };
211 211
212 &i2c3 { 212 &i2c3 {
213 clock-frequency = <100000>; 213 clock-frequency = <100000>;
214 pinctrl-names = "default"; 214 pinctrl-names = "default";
215 pinctrl-0 = <&pinctrl_i2c3>; 215 pinctrl-0 = <&pinctrl_i2c3>;
216 status = "okay"; 216 status = "okay";
217 217
218 pmic@58 { 218 pmic@58 {
219 compatible = "dlg,da9063"; 219 compatible = "dlg,da9063";
220 reg = <0x58>; 220 reg = <0x58>;
221 pinctrl-names = "default"; 221 pinctrl-names = "default";
222 pinctrl-0 = <&pinctrl_pmic>; 222 pinctrl-0 = <&pinctrl_pmic>;
223 interrupt-parent = <&gpio7>; 223 interrupt-parent = <&gpio7>;
224 interrupts = <13 IRQ_TYPE_LEVE 224 interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
225 225
226 onkey { 226 onkey {
227 compatible = "dlg,da90 227 compatible = "dlg,da9063-onkey";
228 }; 228 };
229 229
230 regulators { 230 regulators {
231 vdd_bcore1: bcore1 { 231 vdd_bcore1: bcore1 {
232 regulator-min- 232 regulator-min-microvolt = <1420000>;
233 regulator-max- 233 regulator-max-microvolt = <1420000>;
234 regulator-alwa 234 regulator-always-on;
235 regulator-boot 235 regulator-boot-on;
236 }; 236 };
237 237
238 vdd_bcore2: bcore2 { 238 vdd_bcore2: bcore2 {
239 regulator-min- 239 regulator-min-microvolt = <1420000>;
240 regulator-max- 240 regulator-max-microvolt = <1420000>;
241 regulator-alwa 241 regulator-always-on;
242 regulator-boot 242 regulator-boot-on;
243 }; 243 };
244 244
245 vdd_bpro: bpro { 245 vdd_bpro: bpro {
246 regulator-min- 246 regulator-min-microvolt = <1500000>;
247 regulator-max- 247 regulator-max-microvolt = <1500000>;
248 regulator-alwa 248 regulator-always-on;
249 regulator-boot 249 regulator-boot-on;
250 }; 250 };
251 251
252 vdd_bmem: bmem { 252 vdd_bmem: bmem {
253 regulator-min- 253 regulator-min-microvolt = <1800000>;
254 regulator-max- 254 regulator-max-microvolt = <1800000>;
255 regulator-alwa 255 regulator-always-on;
256 regulator-boot 256 regulator-boot-on;
257 }; 257 };
258 258
259 vdd_bio: bio { 259 vdd_bio: bio {
260 regulator-min- 260 regulator-min-microvolt = <1800000>;
261 regulator-max- 261 regulator-max-microvolt = <1800000>;
262 regulator-alwa 262 regulator-always-on;
263 regulator-boot 263 regulator-boot-on;
264 }; 264 };
265 265
266 vdd_bperi: bperi { 266 vdd_bperi: bperi {
267 regulator-min- 267 regulator-min-microvolt = <3300000>;
268 regulator-max- 268 regulator-max-microvolt = <3300000>;
269 regulator-alwa 269 regulator-always-on;
270 regulator-boot 270 regulator-boot-on;
271 }; 271 };
272 272
273 vdd_ldo1: ldo1 { 273 vdd_ldo1: ldo1 {
274 regulator-min- 274 regulator-min-microvolt = <600000>;
275 regulator-max- 275 regulator-max-microvolt = <1860000>;
276 }; 276 };
277 277
278 vdd_ldo2: ldo2 { 278 vdd_ldo2: ldo2 {
279 regulator-min- 279 regulator-min-microvolt = <600000>;
280 regulator-max- 280 regulator-max-microvolt = <1860000>;
281 }; 281 };
282 282
283 vdd_ldo3: ldo3 { 283 vdd_ldo3: ldo3 {
284 regulator-min- 284 regulator-min-microvolt = <900000>;
285 regulator-max- 285 regulator-max-microvolt = <3440000>;
286 }; 286 };
287 287
288 vdd_ldo4: ldo4 { 288 vdd_ldo4: ldo4 {
289 regulator-min- 289 regulator-min-microvolt = <900000>;
290 regulator-max- 290 regulator-max-microvolt = <3440000>;
291 }; 291 };
292 292
293 vdd_ldo5: ldo5 { 293 vdd_ldo5: ldo5 {
294 regulator-min- 294 regulator-min-microvolt = <900000>;
295 regulator-max- 295 regulator-max-microvolt = <3600000>;
296 }; 296 };
297 297
298 vdd_ldo6: ldo6 { 298 vdd_ldo6: ldo6 {
299 regulator-min- 299 regulator-min-microvolt = <900000>;
300 regulator-max- 300 regulator-max-microvolt = <3600000>;
301 }; 301 };
302 302
303 vdd_ldo7: ldo7 { 303 vdd_ldo7: ldo7 {
304 regulator-min- 304 regulator-min-microvolt = <900000>;
305 regulator-max- 305 regulator-max-microvolt = <3600000>;
306 }; 306 };
307 307
308 vdd_ldo8: ldo8 { 308 vdd_ldo8: ldo8 {
309 regulator-min- 309 regulator-min-microvolt = <900000>;
310 regulator-max- 310 regulator-max-microvolt = <3600000>;
311 }; 311 };
312 312
313 vdd_ldo9: ldo9 { 313 vdd_ldo9: ldo9 {
314 regulator-min- 314 regulator-min-microvolt = <950000>;
315 regulator-max- 315 regulator-max-microvolt = <3600000>;
316 }; 316 };
317 317
318 vdd_ldo10: ldo10 { 318 vdd_ldo10: ldo10 {
319 regulator-min- 319 regulator-min-microvolt = <900000>;
320 regulator-max- 320 regulator-max-microvolt = <3600000>;
321 }; 321 };
322 322
323 vdd_ldo11: ldo11 { 323 vdd_ldo11: ldo11 {
324 regulator-min- 324 regulator-min-microvolt = <900000>;
325 regulator-max- 325 regulator-max-microvolt = <3600000>;
326 regulator-alwa 326 regulator-always-on;
327 regulator-boot 327 regulator-boot-on;
328 }; 328 };
329 }; 329 };
330 }; 330 };
331 331
332 rtc@32 { 332 rtc@32 {
333 compatible = "epson,rx8010"; 333 compatible = "epson,rx8010";
334 pinctrl-names = "default"; 334 pinctrl-names = "default";
335 pinctrl-0 = <&pinctrl_rtc>; 335 pinctrl-0 = <&pinctrl_rtc>;
336 reg = <0x32>; 336 reg = <0x32>;
337 interrupt-parent = <&gpio4>; 337 interrupt-parent = <&gpio4>;
338 interrupts = <10 IRQ_TYPE_LEVE 338 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
339 }; 339 };
340 }; 340 };
341 341
342 &pcie { 342 &pcie {
343 pinctrl-names = "default"; 343 pinctrl-names = "default";
344 pinctrl-0 = <&pinctrl_pcie>; 344 pinctrl-0 = <&pinctrl_pcie>;
345 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LO 345 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
346 fsl,tx-swing-full = <103>; 346 fsl,tx-swing-full = <103>;
347 fsl,tx-swing-low = <103>; 347 fsl,tx-swing-low = <103>;
348 status = "okay"; 348 status = "okay";
349 }; 349 };
350 350
351 &pwm1 { 351 &pwm1 {
352 pinctrl-names = "default"; 352 pinctrl-names = "default";
353 pinctrl-0 = <&pinctrl_pwm1>; 353 pinctrl-0 = <&pinctrl_pwm1>;
354 status = "okay"; 354 status = "okay";
355 }; 355 };
356 356
357 &pwm2 { 357 &pwm2 {
358 pinctrl-names = "default"; 358 pinctrl-names = "default";
359 pinctrl-0 = <&pinctrl_pwm2>; 359 pinctrl-0 = <&pinctrl_pwm2>;
360 status = "disabled"; 360 status = "disabled";
361 }; 361 };
362 362
363 &sata { 363 &sata {
364 status = "okay"; 364 status = "okay";
365 }; 365 };
366 366
367 &ssi1 { 367 &ssi1 {
368 status = "okay"; 368 status = "okay";
369 }; 369 };
370 370
371 &uart3 { 371 &uart3 {
372 pinctrl-names = "default"; 372 pinctrl-names = "default";
373 pinctrl-0 = <&pinctrl_uart3>; 373 pinctrl-0 = <&pinctrl_uart3>;
374 uart-has-rtscts; 374 uart-has-rtscts;
375 status = "okay"; 375 status = "okay";
376 }; 376 };
377 377
378 &uart4 { 378 &uart4 {
379 pinctrl-names = "default"; 379 pinctrl-names = "default";
380 pinctrl-0 = <&pinctrl_uart4>; 380 pinctrl-0 = <&pinctrl_uart4>;
381 status = "okay"; 381 status = "okay";
382 }; 382 };
383 383
384 &usbh1 { 384 &usbh1 {
385 pinctrl-names = "default"; 385 pinctrl-names = "default";
386 pinctrl-0 = <&pinctrl_usbhub>; 386 pinctrl-0 = <&pinctrl_usbhub>;
387 vbus-supply = <®_usb_h1_vbus>; 387 vbus-supply = <®_usb_h1_vbus>;
388 reset-gpios = <&gpio7 11 GPIO_ACTIVE_H 388 reset-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
389 status = "okay"; 389 status = "okay";
390 }; 390 };
391 391
392 &usbotg { 392 &usbotg {
393 vbus-supply = <®_usb_otg_vbus>; 393 vbus-supply = <®_usb_otg_vbus>;
394 pinctrl-names = "default"; 394 pinctrl-names = "default";
395 pinctrl-0 = <&pinctrl_usbotg>; 395 pinctrl-0 = <&pinctrl_usbotg>;
396 disable-over-current; 396 disable-over-current;
397 status = "okay"; 397 status = "okay";
398 }; 398 };
399 399
400 &usdhc2 { 400 &usdhc2 {
401 pinctrl-names = "default"; 401 pinctrl-names = "default";
402 pinctrl-0 = <&pinctrl_usdhc2>; 402 pinctrl-0 = <&pinctrl_usdhc2>;
403 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 403 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
404 no-1-8-v; 404 no-1-8-v;
405 keep-power-in-suspend; 405 keep-power-in-suspend;
406 wakeup-source; 406 wakeup-source;
407 status = "okay"; 407 status = "okay";
408 }; 408 };
409 409
410 &usdhc3 { 410 &usdhc3 {
411 pinctrl-names = "default"; 411 pinctrl-names = "default";
412 pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_ 412 pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
413 bus-width = <8>; 413 bus-width = <8>;
414 vmmc-supply = <&vdd_bperi>; 414 vmmc-supply = <&vdd_bperi>;
415 non-removable; 415 non-removable;
416 keep-power-in-suspend; 416 keep-power-in-suspend;
417 status = "okay"; 417 status = "okay";
418 }; 418 };
419 419
420 &wdog1 { 420 &wdog1 {
421 pinctrl-names = "default"; 421 pinctrl-names = "default";
422 pinctrl-0 = <&pinctrl_wdog>; 422 pinctrl-0 = <&pinctrl_wdog>;
423 fsl,ext-reset-output; 423 fsl,ext-reset-output;
424 }; 424 };
425 425
426 &iomuxc { 426 &iomuxc {
427 pinctrl-names = "default"; 427 pinctrl-names = "default";
428 pinctrl-0 = <&pinctrl_hog>; 428 pinctrl-0 = <&pinctrl_hog>;
429 429
430 pinctrl_audmux: audmuxgrp { 430 pinctrl_audmux: audmuxgrp {
431 fsl,pins = < 431 fsl,pins = <
432 MX6QDL_PAD_DISP0_DAT20 432 MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
433 MX6QDL_PAD_DISP0_DAT21 433 MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0
434 MX6QDL_PAD_DISP0_DAT22 434 MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
435 MX6QDL_PAD_DISP0_DAT23 435 MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
436 >; 436 >;
437 }; 437 };
438 438
439 pinctrl_display: dispgrp { 439 pinctrl_display: dispgrp {
440 fsl,pins = < 440 fsl,pins = <
441 /* BLEN_OUT */ 441 /* BLEN_OUT */
442 MX6QDL_PAD_GPIO_0__GPI 442 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
443 /* LVDS_PPEN_OUT */ 443 /* LVDS_PPEN_OUT */
444 MX6QDL_PAD_EIM_D22__GP 444 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
445 >; 445 >;
446 }; 446 };
447 447
448 pinctrl_ecspi1: ecspi1grp { 448 pinctrl_ecspi1: ecspi1grp {
449 fsl,pins = < 449 fsl,pins = <
450 MX6QDL_PAD_EIM_D17__EC 450 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
451 MX6QDL_PAD_EIM_D18__EC 451 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
452 MX6QDL_PAD_EIM_D16__EC 452 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
453 /* SPI1 CS */ 453 /* SPI1 CS */
454 MX6QDL_PAD_EIM_EB2__GP 454 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
455 >; 455 >;
456 }; 456 };
457 457
458 pinctrl_ecspi5: ecspi5grp { 458 pinctrl_ecspi5: ecspi5grp {
459 fsl,pins = < 459 fsl,pins = <
460 MX6QDL_PAD_SD1_DAT0__E 460 MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x1b0b0
461 MX6QDL_PAD_SD1_CMD__EC 461 MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x1b0b0
462 MX6QDL_PAD_SD1_CLK__EC 462 MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x1b0b0
463 MX6QDL_PAD_SD1_DAT1__G 463 MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
464 >; 464 >;
465 }; 465 };
466 466
467 pinctrl_enet: enetgrp { 467 pinctrl_enet: enetgrp {
468 fsl,pins = < 468 fsl,pins = <
469 MX6QDL_PAD_ENET_MDIO__ 469 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
470 MX6QDL_PAD_ENET_MDC__E 470 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
471 MX6QDL_PAD_RGMII_TXC__ 471 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
472 MX6QDL_PAD_RGMII_TD0__ 472 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
473 MX6QDL_PAD_RGMII_TD1__ 473 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
474 MX6QDL_PAD_RGMII_TD2__ 474 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
475 MX6QDL_PAD_RGMII_TD3__ 475 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
476 MX6QDL_PAD_RGMII_TX_CT 476 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
477 MX6QDL_PAD_ENET_REF_CL 477 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
478 MX6QDL_PAD_RGMII_RXC__ 478 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
479 MX6QDL_PAD_RGMII_RD0__ 479 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
480 MX6QDL_PAD_RGMII_RD1__ 480 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
481 MX6QDL_PAD_RGMII_RD2__ 481 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
482 MX6QDL_PAD_RGMII_RD3__ 482 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
483 MX6QDL_PAD_RGMII_RX_CT 483 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
484 /* FEC Reset */ 484 /* FEC Reset */
485 MX6QDL_PAD_ENET_TX_EN_ 485 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
486 /* AR8033 Interrupt */ 486 /* AR8033 Interrupt */
487 MX6QDL_PAD_GPIO_19__GP 487 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
488 >; 488 >;
489 }; 489 };
490 490
491 pinctrl_hog: hoggrp { 491 pinctrl_hog: hoggrp {
492 fsl,pins = < 492 fsl,pins = <
493 /* GPIO 0-7 */ 493 /* GPIO 0-7 */
494 MX6QDL_PAD_NANDF_D0__G 494 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
495 MX6QDL_PAD_NANDF_D1__G 495 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
496 MX6QDL_PAD_NANDF_D2__G 496 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
497 MX6QDL_PAD_NANDF_D3__G 497 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
498 MX6QDL_PAD_NANDF_D4__G 498 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
499 MX6QDL_PAD_NANDF_D5__G 499 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b0
500 MX6QDL_PAD_NANDF_D6__G 500 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0
501 MX6QDL_PAD_NANDF_D7__G 501 MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x1b0b0
502 /* SUS_S3_OUT to CPLD 502 /* SUS_S3_OUT to CPLD */
503 MX6QDL_PAD_KEY_ROW2__G 503 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
504 >; 504 >;
505 }; 505 };
506 506
507 pinctrl_i2c1: i2c1grp { 507 pinctrl_i2c1: i2c1grp {
508 fsl,pins = < 508 fsl,pins = <
509 MX6QDL_PAD_CSI0_DAT8__ 509 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
510 MX6QDL_PAD_CSI0_DAT9__ 510 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
511 >; 511 >;
512 }; 512 };
513 513
514 pinctrl_i2c2: i2c2grp { 514 pinctrl_i2c2: i2c2grp {
515 fsl,pins = < 515 fsl,pins = <
516 MX6QDL_PAD_KEY_COL3__I 516 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
517 MX6QDL_PAD_KEY_ROW3__I 517 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
518 >; 518 >;
519 }; 519 };
520 520
521 pinctrl_i2c3: i2c3grp { 521 pinctrl_i2c3: i2c3grp {
522 fsl,pins = < 522 fsl,pins = <
523 MX6QDL_PAD_GPIO_3__I2C 523 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
524 MX6QDL_PAD_GPIO_6__I2C 524 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
525 >; 525 >;
526 }; 526 };
527 527
528 pinctrl_pcie: pciegrp { 528 pinctrl_pcie: pciegrp {
529 fsl,pins = < 529 fsl,pins = <
530 /* PCIe Reset */ 530 /* PCIe Reset */
531 MX6QDL_PAD_GPIO_17__GP 531 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
532 /* PCIe Wake */ 532 /* PCIe Wake */
533 MX6QDL_PAD_GPIO_5__GPI 533 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
534 >; 534 >;
535 }; 535 };
536 536
537 pinctrl_pmic: pmicgrp { 537 pinctrl_pmic: pmicgrp {
538 fsl,pins = < 538 fsl,pins = <
539 /* PMIC Interrupt */ 539 /* PMIC Interrupt */
540 MX6QDL_PAD_GPIO_18__GP 540 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
541 >; 541 >;
542 }; 542 };
543 543
544 pinctrl_pwm1: pwm1grp { 544 pinctrl_pwm1: pwm1grp {
545 fsl,pins = < 545 fsl,pins = <
546 MX6QDL_PAD_SD1_DAT3__P 546 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
547 >; 547 >;
548 }; 548 };
549 549
550 pinctrl_pwm2: pwm2grp { 550 pinctrl_pwm2: pwm2grp {
551 fsl,pins = < 551 fsl,pins = <
552 MX6QDL_PAD_GPIO_1__PWM 552 MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
553 >; 553 >;
554 }; 554 };
555 555
556 pinctrl_rtc: rtcgrp { 556 pinctrl_rtc: rtcgrp {
557 fsl,pins = < 557 fsl,pins = <
558 /* RTC_INT */ 558 /* RTC_INT */
559 MX6QDL_PAD_KEY_COL2__G 559 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
560 >; 560 >;
561 }; 561 };
562 562
563 pinctrl_uart3: uart3grp { 563 pinctrl_uart3: uart3grp {
564 fsl,pins = < 564 fsl,pins = <
565 MX6QDL_PAD_EIM_D25__UA 565 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
566 MX6QDL_PAD_EIM_D24__UA 566 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
567 MX6QDL_PAD_EIM_D23__UA 567 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
568 MX6QDL_PAD_EIM_D31__UA 568 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
569 >; 569 >;
570 }; 570 };
571 571
572 pinctrl_uart4: uart4grp { 572 pinctrl_uart4: uart4grp {
573 fsl,pins = < 573 fsl,pins = <
574 MX6QDL_PAD_KEY_COL0__U 574 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
575 MX6QDL_PAD_KEY_ROW0__U 575 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
576 >; 576 >;
577 }; 577 };
578 578
579 pinctrl_usbhub: usbhubgrp { 579 pinctrl_usbhub: usbhubgrp {
580 fsl,pins = < 580 fsl,pins = <
581 /* HUB_RESET */ 581 /* HUB_RESET */
582 MX6QDL_PAD_GPIO_16__GP 582 MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b0
583 >; 583 >;
584 }; 584 };
585 585
586 pinctrl_usbotg: usbotggrp { 586 pinctrl_usbotg: usbotggrp {
587 fsl,pins = < 587 fsl,pins = <
588 MX6QDL_PAD_ENET_RX_ER_ 588 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
589 >; 589 >;
590 }; 590 };
591 591
592 pinctrl_usbotg_vbus: usbotgvbusgrp { 592 pinctrl_usbotg_vbus: usbotgvbusgrp {
593 fsl,pins = < 593 fsl,pins = <
594 MX6QDL_PAD_KEY_ROW4__G 594 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b0
595 >; 595 >;
596 }; 596 };
597 597
598 pinctrl_usdhc2: usdhc2grp { 598 pinctrl_usdhc2: usdhc2grp {
599 fsl,pins = < 599 fsl,pins = <
600 MX6QDL_PAD_SD2_CMD__SD 600 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
601 MX6QDL_PAD_SD2_CLK__SD 601 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
602 MX6QDL_PAD_SD2_DAT0__S 602 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
603 MX6QDL_PAD_SD2_DAT1__S 603 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
604 MX6QDL_PAD_SD2_DAT2__S 604 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
605 MX6QDL_PAD_SD2_DAT3__S 605 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
606 /* uSDHC2 CD */ 606 /* uSDHC2 CD */
607 MX6QDL_PAD_GPIO_4__GPI 607 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
608 >; 608 >;
609 }; 609 };
610 610
611 pinctrl_usdhc3: usdhc3grp { 611 pinctrl_usdhc3: usdhc3grp {
612 fsl,pins = < 612 fsl,pins = <
613 MX6QDL_PAD_SD3_CMD__SD 613 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
614 MX6QDL_PAD_SD3_CLK__SD 614 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
615 MX6QDL_PAD_SD3_DAT0__S 615 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
616 MX6QDL_PAD_SD3_DAT1__S 616 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
617 MX6QDL_PAD_SD3_DAT2__S 617 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
618 MX6QDL_PAD_SD3_DAT3__S 618 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
619 MX6QDL_PAD_SD3_DAT4__S 619 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
620 MX6QDL_PAD_SD3_DAT5__S 620 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
621 MX6QDL_PAD_SD3_DAT6__S 621 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
622 MX6QDL_PAD_SD3_DAT7__S 622 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
623 >; 623 >;
624 }; 624 };
625 625
626 pinctrl_usdhc3_reset: usdhc3grp-reset 626 pinctrl_usdhc3_reset: usdhc3grp-reset {
627 fsl,pins = < 627 fsl,pins = <
628 MX6QDL_PAD_SD3_RST__SD 628 MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9
629 >; 629 >;
630 }; 630 };
631 631
632 pinctrl_usdhc4: usdhc4grp { 632 pinctrl_usdhc4: usdhc4grp {
633 fsl,pins = < 633 fsl,pins = <
634 MX6QDL_PAD_SD4_CMD__SD 634 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
635 MX6QDL_PAD_SD4_CLK__SD 635 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x17059
636 MX6QDL_PAD_SD4_DAT0__S 636 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
637 MX6QDL_PAD_SD4_DAT1__S 637 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
638 MX6QDL_PAD_SD4_DAT2__S 638 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
639 MX6QDL_PAD_SD4_DAT3__S 639 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
640 MX6QDL_PAD_SD4_DAT4__S 640 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
641 MX6QDL_PAD_SD4_DAT5__S 641 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
642 MX6QDL_PAD_SD4_DAT6__S 642 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
643 MX6QDL_PAD_SD4_DAT7__S 643 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
644 /* uSDHC4 CD */ 644 /* uSDHC4 CD */
645 MX6QDL_PAD_NANDF_CS0__ 645 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0
646 /* uSDHC4 SDIO PWR */ 646 /* uSDHC4 SDIO PWR */
647 MX6QDL_PAD_NANDF_CS1__ 647 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
648 /* uSDHC4 SDIO WP */ 648 /* uSDHC4 SDIO WP */
649 MX6QDL_PAD_NANDF_CS2__ 649 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
650 /* uSDHC4 SDIO LED */ 650 /* uSDHC4 SDIO LED */
651 MX6QDL_PAD_NANDF_CS3__ 651 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
652 >; 652 >;
653 }; 653 };
654 654
655 pinctrl_wdog: wdoggrp { 655 pinctrl_wdog: wdoggrp {
656 fsl,pins = < 656 fsl,pins = <
657 MX6QDL_PAD_GPIO_9__WDO 657 MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0
658 >; 658 >;
659 }; 659 };
660 }; 660 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.