1 /* 1 /*
2 * Copyright (C) 2016 Sergio Prado (sergio.pra 2 * Copyright (C) 2016 Sergio Prado (sergio.prado@e-labworks.com)
3 * 3 *
4 * This file is dual-licensed: you can use it 4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your opti 5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and no 6 * licensing only applies to this file, and not this project as a
7 * whole. 7 * whole.
8 * 8 *
9 * a) This file is free software; you can red 9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Ge 10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Soft 11 * version 2 as published by the Free Software Foundation.
12 * 12 *
13 * This file is distributed in the hope th 13 * This file is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTIC 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more det 16 * GNU General Public License for more details.
17 * 17 *
18 * Or, alternatively, 18 * Or, alternatively,
19 * 19 *
20 * b) Permission is hereby granted, free of c 20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and a 21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the 22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitati 23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribut 24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to per 25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject 26 * Software is furnished to do so, subject to the following
27 * conditions: 27 * conditions:
28 * 28 *
29 * The above copyright notice and this per 29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial p 30 * included in all copies or substantial portions of the Software.
31 * 31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHO 32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT L 33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTI 34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE 35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGE 36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 * WHETHER IN AN ACTION OF CONTRACT, TORT 37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE 38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE. 39 * OTHER DEALINGS IN THE SOFTWARE.
40 */ 40 */
41 41
42 /dts-v1/; 42 /dts-v1/;
43 #include "imx6q.dtsi" 43 #include "imx6q.dtsi"
44 #include <dt-bindings/gpio/gpio.h> 44 #include <dt-bindings/gpio/gpio.h>
45 45
46 / { 46 / {
47 model = "Embest MarS Board i.MX6Dual"; 47 model = "Embest MarS Board i.MX6Dual";
48 compatible = "embest,imx6q-marsboard", 48 compatible = "embest,imx6q-marsboard", "fsl,imx6q";
49 49
50 memory@10000000 { 50 memory@10000000 {
51 device_type = "memory"; 51 device_type = "memory";
52 reg = <0x10000000 0x40000000>; 52 reg = <0x10000000 0x40000000>;
53 }; 53 };
54 54
55 reg_3p3v: regulator-3p3v { 55 reg_3p3v: regulator-3p3v {
56 compatible = "regulator-fixed" 56 compatible = "regulator-fixed";
57 regulator-name = "3P3V"; 57 regulator-name = "3P3V";
58 regulator-min-microvolt = <330 58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <330 59 regulator-max-microvolt = <3300000>;
60 }; 60 };
61 61
62 reg_usb_otg_vbus: regulator-usb-otg-vb 62 reg_usb_otg_vbus: regulator-usb-otg-vbus {
63 compatible = "regulator-fixed" 63 compatible = "regulator-fixed";
64 regulator-name = "usb_otg_vbus 64 regulator-name = "usb_otg_vbus";
65 regulator-min-microvolt = <500 65 regulator-min-microvolt = <5000000>;
66 regulator-max-microvolt = <500 66 regulator-max-microvolt = <5000000>;
67 gpio = <&gpio3 22 GPIO_ACTIVE_ 67 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
68 enable-active-high; 68 enable-active-high;
69 }; 69 };
70 70
71 leds { 71 leds {
72 compatible = "gpio-leds"; 72 compatible = "gpio-leds";
73 pinctrl-names = "default"; 73 pinctrl-names = "default";
74 pinctrl-0 = <&pinctrl_led>; 74 pinctrl-0 = <&pinctrl_led>;
75 75
76 led-user1 { 76 led-user1 {
77 label = "imx6:green:us 77 label = "imx6:green:user1";
78 gpios = <&gpio5 2 GPIO 78 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
79 default-state = "off"; 79 default-state = "off";
80 linux,default-trigger 80 linux,default-trigger = "heartbeat";
81 }; 81 };
82 82
83 led-user2 { 83 led-user2 {
84 label = "imx6:green:us 84 label = "imx6:green:user2";
85 gpios = <&gpio3 28 GPI 85 gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
86 default-state = "off"; 86 default-state = "off";
87 }; 87 };
88 }; 88 };
89 }; 89 };
90 90
91 &audmux { 91 &audmux {
92 pinctrl-names = "default"; 92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_audmux>; 93 pinctrl-0 = <&pinctrl_audmux>;
94 status = "okay"; 94 status = "okay";
95 }; 95 };
96 96
97 &ecspi1 { 97 &ecspi1 {
98 pinctrl-names = "default"; 98 pinctrl-names = "default";
99 pinctrl-0 = <&pinctrl_ecspi1>; 99 pinctrl-0 = <&pinctrl_ecspi1>;
100 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW> 100 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
101 status = "okay"; 101 status = "okay";
102 102
103 flash@0 { 103 flash@0 {
104 compatible = "microchip,sst25v 104 compatible = "microchip,sst25vf016b";
105 spi-max-frequency = <20000000> 105 spi-max-frequency = <20000000>;
106 reg = <0>; 106 reg = <0>;
107 }; 107 };
108 }; 108 };
109 109
110 &fec { 110 &fec {
111 pinctrl-names = "default"; 111 pinctrl-names = "default";
112 pinctrl-0 = <&pinctrl_enet>; 112 pinctrl-0 = <&pinctrl_enet>;
113 phy-mode = "rgmii-id"; 113 phy-mode = "rgmii-id";
114 phy-handle = <&rgmii_phy>; 114 phy-handle = <&rgmii_phy>;
115 status = "okay"; 115 status = "okay";
116 116
117 mdio { 117 mdio {
118 #address-cells = <1>; 118 #address-cells = <1>;
119 #size-cells = <0>; 119 #size-cells = <0>;
120 120
121 /* Atheros AR8035 PHY */ 121 /* Atheros AR8035 PHY */
122 rgmii_phy: ethernet-phy@4 { 122 rgmii_phy: ethernet-phy@4 {
123 reg = <4>; 123 reg = <4>;
124 interrupts-extended = 124 interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>;
125 reset-gpios = <&gpio3 125 reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
126 reset-assert-us = <100 126 reset-assert-us = <10000>;
127 reset-deassert-us = <1 127 reset-deassert-us = <1000>;
128 }; 128 };
129 }; 129 };
130 }; 130 };
131 131
132 &hdmi { 132 &hdmi {
133 ddc-i2c-bus = <&i2c2>; 133 ddc-i2c-bus = <&i2c2>;
134 status = "okay"; 134 status = "okay";
135 }; 135 };
136 136
137 &i2c1 { 137 &i2c1 {
138 clock-frequency = <100000>; 138 clock-frequency = <100000>;
139 pinctrl-names = "default"; 139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_i2c1>; 140 pinctrl-0 = <&pinctrl_i2c1>;
141 status = "okay"; 141 status = "okay";
142 }; 142 };
143 143
144 &i2c2 { 144 &i2c2 {
145 clock-frequency = <100000>; 145 clock-frequency = <100000>;
146 pinctrl-names = "default"; 146 pinctrl-names = "default";
147 pinctrl-0 = <&pinctrl_i2c2>; 147 pinctrl-0 = <&pinctrl_i2c2>;
148 status = "okay"; 148 status = "okay";
149 }; 149 };
150 150
151 &i2c3 { 151 &i2c3 {
152 clock-frequency = <100000>; 152 clock-frequency = <100000>;
153 pinctrl-names = "default"; 153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_i2c3>; 154 pinctrl-0 = <&pinctrl_i2c3>;
155 status = "okay"; 155 status = "okay";
156 }; 156 };
157 157
158 &pwm1 { 158 &pwm1 {
159 pinctrl-names = "default"; 159 pinctrl-names = "default";
160 pinctrl-0 = <&pinctrl_pwm1>; 160 pinctrl-0 = <&pinctrl_pwm1>;
161 status = "okay"; 161 status = "okay";
162 }; 162 };
163 163
164 &pwm2 { 164 &pwm2 {
165 pinctrl-names = "default"; 165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_pwm2>; 166 pinctrl-0 = <&pinctrl_pwm2>;
167 status = "okay"; 167 status = "okay";
168 }; 168 };
169 169
170 &pwm3 { 170 &pwm3 {
171 pinctrl-names = "default"; 171 pinctrl-names = "default";
172 pinctrl-0 = <&pinctrl_pwm3>; 172 pinctrl-0 = <&pinctrl_pwm3>;
173 status = "okay"; 173 status = "okay";
174 }; 174 };
175 175
176 &pwm4 { 176 &pwm4 {
177 pinctrl-names = "default"; 177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_pwm4>; 178 pinctrl-0 = <&pinctrl_pwm4>;
179 status = "okay"; 179 status = "okay";
180 }; 180 };
181 181
182 &uart1 { 182 &uart1 {
183 pinctrl-names = "default"; 183 pinctrl-names = "default";
184 pinctrl-0 = <&pinctrl_uart1>; 184 pinctrl-0 = <&pinctrl_uart1>;
185 status = "okay"; 185 status = "okay";
186 }; 186 };
187 187
188 &uart2 { 188 &uart2 {
189 pinctrl-names = "default"; 189 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_uart2>; 190 pinctrl-0 = <&pinctrl_uart2>;
191 status = "okay"; 191 status = "okay";
192 }; 192 };
193 193
194 &uart3 { 194 &uart3 {
195 pinctrl-names = "default"; 195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_uart3>; 196 pinctrl-0 = <&pinctrl_uart3>;
197 status = "okay"; 197 status = "okay";
198 }; 198 };
199 199
200 &uart4 { 200 &uart4 {
201 pinctrl-names = "default"; 201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_uart4>; 202 pinctrl-0 = <&pinctrl_uart4>;
203 status = "okay"; 203 status = "okay";
204 }; 204 };
205 205
206 &uart5 { 206 &uart5 {
207 pinctrl-names = "default"; 207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_uart5>; 208 pinctrl-0 = <&pinctrl_uart5>;
209 status = "okay"; 209 status = "okay";
210 }; 210 };
211 211
212 &usbh1 { 212 &usbh1 {
213 dr_mode = "host"; 213 dr_mode = "host";
214 disable-over-current; 214 disable-over-current;
215 status = "okay"; 215 status = "okay";
216 }; 216 };
217 217
218 &usbotg { 218 &usbotg {
219 vbus-supply = <®_usb_otg_vbus>; 219 vbus-supply = <®_usb_otg_vbus>;
220 pinctrl-names = "default"; 220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_usbotg>; 221 pinctrl-0 = <&pinctrl_usbotg>;
222 dr_mode = "otg"; 222 dr_mode = "otg";
223 disable-over-current; 223 disable-over-current;
224 status = "okay"; 224 status = "okay";
225 }; 225 };
226 226
227 &usdhc2 { 227 &usdhc2 {
228 pinctrl-names = "default"; 228 pinctrl-names = "default";
229 pinctrl-0 = <&pinctrl_usdhc2>; 229 pinctrl-0 = <&pinctrl_usdhc2>;
230 vmmc-supply = <®_3p3v>; 230 vmmc-supply = <®_3p3v>;
231 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 231 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
232 wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH> 232 wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
233 status = "okay"; 233 status = "okay";
234 }; 234 };
235 235
236 &usdhc3 { 236 &usdhc3 {
237 pinctrl-names = "default"; 237 pinctrl-names = "default";
238 pinctrl-0 = <&pinctrl_usdhc3>; 238 pinctrl-0 = <&pinctrl_usdhc3>;
239 vmmc-supply = <®_3p3v>; 239 vmmc-supply = <®_3p3v>;
240 non-removable; 240 non-removable;
241 status = "okay"; 241 status = "okay";
242 }; 242 };
243 243
244 &iomuxc { 244 &iomuxc {
245 245
246 pinctrl_audmux: audmuxgrp { 246 pinctrl_audmux: audmuxgrp {
247 fsl,pins = < 247 fsl,pins = <
248 MX6QDL_PAD_CSI0_DAT7__ 248 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
249 MX6QDL_PAD_CSI0_DAT4__ 249 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
250 MX6QDL_PAD_CSI0_DAT5__ 250 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
251 MX6QDL_PAD_CSI0_DAT6__ 251 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
252 MX6QDL_PAD_GPIO_0__CCM 252 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* CAM_MCLK */
253 >; 253 >;
254 }; 254 };
255 255
256 pinctrl_ecspi1: ecspi1grp { 256 pinctrl_ecspi1: ecspi1grp {
257 fsl,pins = < 257 fsl,pins = <
258 MX6QDL_PAD_EIM_D16__EC 258 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
259 MX6QDL_PAD_EIM_D17__EC 259 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
260 MX6QDL_PAD_EIM_D18__EC 260 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
261 MX6QDL_PAD_EIM_EB2__GP 261 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x000b1 /* CS0 */
262 >; 262 >;
263 }; 263 };
264 264
265 pinctrl_enet: enetgrp { 265 pinctrl_enet: enetgrp {
266 fsl,pins = < 266 fsl,pins = <
267 MX6QDL_PAD_ENET_MDIO__ 267 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
268 MX6QDL_PAD_ENET_MDC__E 268 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
269 MX6QDL_PAD_RGMII_TXC__ 269 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
270 MX6QDL_PAD_RGMII_TD0__ 270 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
271 MX6QDL_PAD_RGMII_TD1__ 271 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
272 MX6QDL_PAD_RGMII_TD2__ 272 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
273 MX6QDL_PAD_RGMII_TD3__ 273 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
274 MX6QDL_PAD_RGMII_TX_CT 274 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
275 /* AR8035 CLK_25M --> 275 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
276 MX6QDL_PAD_ENET_REF_CL 276 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
277 /* AR8035 pin strappin 277 /* AR8035 pin strapping: IO voltage: pull up */
278 MX6QDL_PAD_RGMII_RXC__ 278 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
279 /* AR8035 pin strappin 279 /* AR8035 pin strapping: PHYADDR#0: pull down */
280 MX6QDL_PAD_RGMII_RD0__ 280 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030
281 /* AR8035 pin strappin 281 /* AR8035 pin strapping: PHYADDR#1: pull down */
282 MX6QDL_PAD_RGMII_RD1__ 282 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030
283 /* AR8035 pin strappin 283 /* AR8035 pin strapping: MODE#1: pull up */
284 MX6QDL_PAD_RGMII_RD2__ 284 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
285 /* AR8035 pin strappin 285 /* AR8035 pin strapping: MODE#3: pull up */
286 MX6QDL_PAD_RGMII_RD3__ 286 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
287 /* AR8035 pin strappin 287 /* AR8035 pin strapping: MODE#0: pull down */
288 MX6QDL_PAD_RGMII_RX_CT 288 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030
289 /* GPIO16 -> AR8035 25 289 /* GPIO16 -> AR8035 25MHz */
290 MX6QDL_PAD_GPIO_16__EN 290 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
291 /* RGMII_nRST */ 291 /* RGMII_nRST */
292 MX6QDL_PAD_EIM_D31__GP 292 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0
293 /* AR8035 interrupt */ 293 /* AR8035 interrupt */
294 MX6QDL_PAD_ENET_TX_EN_ 294 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x180b0
295 >; 295 >;
296 }; 296 };
297 297
298 pinctrl_i2c1: i2c1grp { 298 pinctrl_i2c1: i2c1grp {
299 fsl,pins = < 299 fsl,pins = <
300 MX6QDL_PAD_CSI0_DAT8__ 300 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
301 MX6QDL_PAD_CSI0_DAT9__ 301 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
302 >; 302 >;
303 }; 303 };
304 304
305 pinctrl_i2c2: i2c2grp { 305 pinctrl_i2c2: i2c2grp {
306 fsl,pins = < 306 fsl,pins = <
307 MX6QDL_PAD_KEY_COL3__I 307 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
308 MX6QDL_PAD_KEY_ROW3__I 308 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
309 >; 309 >;
310 }; 310 };
311 311
312 pinctrl_i2c3: i2c3grp { 312 pinctrl_i2c3: i2c3grp {
313 fsl,pins = < 313 fsl,pins = <
314 MX6QDL_PAD_GPIO_5__I2C 314 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
315 MX6QDL_PAD_GPIO_6__I2C 315 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
316 >; 316 >;
317 }; 317 };
318 318
319 pinctrl_led: ledgrp { 319 pinctrl_led: ledgrp {
320 fsl,pins = < 320 fsl,pins = <
321 MX6QDL_PAD_EIM_A25__GP 321 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* LED1 */
322 MX6QDL_PAD_EIM_D28__GP 322 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x1b0b1 /* LED2 */
323 >; 323 >;
324 }; 324 };
325 325
326 pinctrl_pwm1: pwm1grp { 326 pinctrl_pwm1: pwm1grp {
327 fsl,pins = < 327 fsl,pins = <
328 MX6QDL_PAD_DISP0_DAT8_ 328 MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1
329 >; 329 >;
330 }; 330 };
331 331
332 pinctrl_pwm2: pwm2grp { 332 pinctrl_pwm2: pwm2grp {
333 fsl,pins = < 333 fsl,pins = <
334 MX6QDL_PAD_DISP0_DAT9_ 334 MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1
335 >; 335 >;
336 }; 336 };
337 337
338 pinctrl_pwm3: pwm3grp { 338 pinctrl_pwm3: pwm3grp {
339 fsl,pins = < 339 fsl,pins = <
340 MX6QDL_PAD_SD1_DAT1__P 340 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
341 >; 341 >;
342 }; 342 };
343 343
344 pinctrl_pwm4: pwm4grp { 344 pinctrl_pwm4: pwm4grp {
345 fsl,pins = < 345 fsl,pins = <
346 MX6QDL_PAD_SD1_CMD__PW 346 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
347 >; 347 >;
348 }; 348 };
349 349
350 pinctrl_uart1: uart1grp { 350 pinctrl_uart1: uart1grp {
351 fsl,pins = < 351 fsl,pins = <
352 MX6QDL_PAD_CSI0_DAT10_ 352 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
353 MX6QDL_PAD_CSI0_DAT11_ 353 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
354 >; 354 >;
355 }; 355 };
356 356
357 pinctrl_uart2: uart2grp { 357 pinctrl_uart2: uart2grp {
358 fsl,pins = < 358 fsl,pins = <
359 MX6QDL_PAD_EIM_D26__UA 359 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
360 MX6QDL_PAD_EIM_D27__UA 360 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
361 >; 361 >;
362 }; 362 };
363 363
364 pinctrl_uart3: uart3grp { 364 pinctrl_uart3: uart3grp {
365 fsl,pins = < 365 fsl,pins = <
366 MX6QDL_PAD_EIM_D24__UA 366 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
367 MX6QDL_PAD_EIM_D25__UA 367 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
368 >; 368 >;
369 }; 369 };
370 370
371 pinctrl_uart4: uart4grp { 371 pinctrl_uart4: uart4grp {
372 fsl,pins = < 372 fsl,pins = <
373 MX6QDL_PAD_KEY_COL0__U 373 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
374 MX6QDL_PAD_KEY_ROW0__U 374 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
375 >; 375 >;
376 }; 376 };
377 377
378 pinctrl_uart5: uart5grp { 378 pinctrl_uart5: uart5grp {
379 fsl,pins = < 379 fsl,pins = <
380 MX6QDL_PAD_KEY_COL1__U 380 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
381 MX6QDL_PAD_KEY_ROW1__U 381 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
382 >; 382 >;
383 }; 383 };
384 384
385 pinctrl_usbotg: usbotggrp { 385 pinctrl_usbotg: usbotggrp {
386 fsl,pins = < 386 fsl,pins = <
387 MX6QDL_PAD_ENET_RX_ER_ 387 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
388 MX6QDL_PAD_EIM_D21__US 388 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
389 MX6QDL_PAD_EIM_D22__GP 389 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 /* USB OTG POWER ENABLE */
390 >; 390 >;
391 }; 391 };
392 392
393 pinctrl_usdhc2: usdhc2grp { 393 pinctrl_usdhc2: usdhc2grp {
394 fsl,pins = < 394 fsl,pins = <
395 MX6QDL_PAD_SD2_CMD__SD 395 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
396 MX6QDL_PAD_SD2_CLK__SD 396 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
397 MX6QDL_PAD_SD2_DAT0__S 397 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
398 MX6QDL_PAD_SD2_DAT1__S 398 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
399 MX6QDL_PAD_SD2_DAT2__S 399 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
400 MX6QDL_PAD_SD2_DAT3__S 400 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
401 MX6QDL_PAD_GPIO_4__GPI 401 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */
402 MX6QDL_PAD_GPIO_2__GPI 402 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1f0b0 /* WP */
403 >; 403 >;
404 }; 404 };
405 405
406 pinctrl_usdhc3: usdhc3grp { 406 pinctrl_usdhc3: usdhc3grp {
407 fsl,pins = < 407 fsl,pins = <
408 MX6QDL_PAD_SD3_CMD__SD 408 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17009
409 MX6QDL_PAD_SD3_CLK__SD 409 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10009
410 MX6QDL_PAD_SD3_DAT0__S 410 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17009
411 MX6QDL_PAD_SD3_DAT1__S 411 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17009
412 MX6QDL_PAD_SD3_DAT2__S 412 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17009
413 MX6QDL_PAD_SD3_DAT3__S 413 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17009
414 MX6QDL_PAD_SD3_RST__SD 414 MX6QDL_PAD_SD3_RST__SD3_RESET 0x17009
415 >; 415 >;
416 }; 416 };
417 }; 417 };
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