1 /* 1 /*
2 * Copyright 2017 Gateworks Corporation 2 * Copyright 2017 Gateworks Corporation
3 * 3 *
4 * This file is dual-licensed: you can use it 4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your opti 5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and no 6 * licensing only applies to this file, and not this project as a
7 * whole. 7 * whole.
8 * 8 *
9 * a) This file is free software; you can red 9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Ge 10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundati 11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any la 12 * the License, or (at your option) any later version.
13 * 13 *
14 * This file is distributed in the hope th 14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTIC 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more det 17 * GNU General Public License for more details.
18 * 18 *
19 * You should have received a copy of the 19 * You should have received a copy of the GNU General Public
20 * License along with this file; if not, w 20 * License along with this file; if not, write to the Free
21 * Software Foundation, Inc., 51 Franklin 21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA 22 * MA 02110-1301 USA
23 * 23 *
24 * Or, alternatively, 24 * Or, alternatively,
25 * 25 *
26 * b) Permission is hereby granted, free of c 26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and a 27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the 28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitati 29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribut 30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to per 31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject 32 * Software is furnished to do so, subject to the following
33 * conditions: 33 * conditions:
34 * 34 *
35 * The above copyright notice and this per 35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial p 36 * included in all copies or substantial portions of the Software.
37 * 37 *
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHO 38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT L 39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 * OF MERCHANTABILITY, FITNESS FOR A PARTI 40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 * NONINFRINGEMENT. IN NO EVENT SHALL THE 41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGE 42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43 * WHETHER IN AN ACTION OF CONTRACT, TORT 43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 * FROM, OUT OF OR IN CONNECTION WITH THE 44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 * OTHER DEALINGS IN THE SOFTWARE. 45 * OTHER DEALINGS IN THE SOFTWARE.
46 */ 46 */
47 47
48 #include <dt-bindings/gpio/gpio.h> 48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/input/input.h> 49 #include <dt-bindings/input/input.h>
50 #include <dt-bindings/interrupt-controller/irq 50 #include <dt-bindings/interrupt-controller/irq.h>
51 51
52 / { 52 / {
53 /* these are used by bootloader for di 53 /* these are used by bootloader for disabling nodes */
54 aliases { 54 aliases {
55 led0 = &led0; 55 led0 = &led0;
56 led1 = &led1; 56 led1 = &led1;
57 led2 = &led2; 57 led2 = &led2;
58 ssi0 = &ssi1; 58 ssi0 = &ssi1;
59 usb0 = &usbh1; 59 usb0 = &usbh1;
60 usb1 = &usbotg; 60 usb1 = &usbotg;
61 }; 61 };
62 62
63 chosen { 63 chosen {
64 stdout-path = &uart2; 64 stdout-path = &uart2;
65 }; 65 };
66 66
67 backlight-display { 67 backlight-display {
68 compatible = "pwm-backlight"; 68 compatible = "pwm-backlight";
69 pwms = <&pwm4 0 5000000 0>; 69 pwms = <&pwm4 0 5000000 0>;
70 brightness-levels = < 70 brightness-levels = <
71 0 1 2 3 4 5 6 7 71 0 1 2 3 4 5 6 7 8 9
72 10 11 12 13 14 15 16 1 72 10 11 12 13 14 15 16 17 18 19
73 20 21 22 23 24 25 26 2 73 20 21 22 23 24 25 26 27 28 29
74 30 31 32 33 34 35 36 3 74 30 31 32 33 34 35 36 37 38 39
75 40 41 42 43 44 45 46 4 75 40 41 42 43 44 45 46 47 48 49
76 50 51 52 53 54 55 56 5 76 50 51 52 53 54 55 56 57 58 59
77 60 61 62 63 64 65 66 6 77 60 61 62 63 64 65 66 67 68 69
78 70 71 72 73 74 75 76 7 78 70 71 72 73 74 75 76 77 78 79
79 80 81 82 83 84 85 86 8 79 80 81 82 83 84 85 86 87 88 89
80 90 91 92 93 94 95 96 9 80 90 91 92 93 94 95 96 97 98 99
81 100 81 100
82 >; 82 >;
83 default-brightness-level = <10 83 default-brightness-level = <100>;
84 }; 84 };
85 85
86 backlight-keypad { 86 backlight-keypad {
87 compatible = "gpio-backlight"; 87 compatible = "gpio-backlight";
88 gpios = <&gpio4 30 GPIO_ACTIVE 88 gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
89 default-on; 89 default-on;
90 }; 90 };
91 91
92 gpio-keys { 92 gpio-keys {
93 compatible = "gpio-keys"; 93 compatible = "gpio-keys";
94 94
95 user-pb { 95 user-pb {
96 label = "user_pb"; 96 label = "user_pb";
97 gpios = <&gsc_gpio 0 G 97 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
98 linux,code = <BTN_0>; 98 linux,code = <BTN_0>;
99 }; 99 };
100 100
101 user-pb1x { 101 user-pb1x {
102 label = "user_pb1x"; 102 label = "user_pb1x";
103 linux,code = <BTN_1>; 103 linux,code = <BTN_1>;
104 interrupt-parent = <&g 104 interrupt-parent = <&gsc>;
105 interrupts = <0>; 105 interrupts = <0>;
106 }; 106 };
107 107
108 key-erased { 108 key-erased {
109 label = "key-erased"; 109 label = "key-erased";
110 linux,code = <BTN_2>; 110 linux,code = <BTN_2>;
111 interrupt-parent = <&g 111 interrupt-parent = <&gsc>;
112 interrupts = <1>; 112 interrupts = <1>;
113 }; 113 };
114 114
115 eeprom-wp { 115 eeprom-wp {
116 label = "eeprom_wp"; 116 label = "eeprom_wp";
117 linux,code = <BTN_3>; 117 linux,code = <BTN_3>;
118 interrupt-parent = <&g 118 interrupt-parent = <&gsc>;
119 interrupts = <2>; 119 interrupts = <2>;
120 }; 120 };
121 121
122 tamper { 122 tamper {
123 label = "tamper"; 123 label = "tamper";
124 linux,code = <BTN_4>; 124 linux,code = <BTN_4>;
125 interrupt-parent = <&g 125 interrupt-parent = <&gsc>;
126 interrupts = <5>; 126 interrupts = <5>;
127 }; 127 };
128 128
129 switch-hold { 129 switch-hold {
130 label = "switch_hold"; 130 label = "switch_hold";
131 linux,code = <BTN_5>; 131 linux,code = <BTN_5>;
132 interrupt-parent = <&g 132 interrupt-parent = <&gsc>;
133 interrupts = <7>; 133 interrupts = <7>;
134 }; 134 };
135 }; 135 };
136 136
137 leds { 137 leds {
138 compatible = "gpio-leds"; 138 compatible = "gpio-leds";
139 pinctrl-names = "default"; 139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_gpio_led 140 pinctrl-0 = <&pinctrl_gpio_leds>;
141 141
142 led0: led-user1 { 142 led0: led-user1 {
143 label = "user1"; 143 label = "user1";
144 gpios = <&gpio4 6 GPIO 144 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
145 default-state = "on"; 145 default-state = "on";
146 linux,default-trigger 146 linux,default-trigger = "heartbeat";
147 }; 147 };
148 148
149 led1: led-user2 { 149 led1: led-user2 {
150 label = "user2"; 150 label = "user2";
151 gpios = <&gpio4 7 GPIO 151 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
152 default-state = "off"; 152 default-state = "off";
153 }; 153 };
154 154
155 led2: led-user3 { 155 led2: led-user3 {
156 label = "user3"; 156 label = "user3";
157 gpios = <&gpio4 15 GPI 157 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
158 default-state = "off"; 158 default-state = "off";
159 }; 159 };
160 }; 160 };
161 161
162 memory@10000000 { 162 memory@10000000 {
163 device_type = "memory"; 163 device_type = "memory";
164 reg = <0x10000000 0x40000000>; 164 reg = <0x10000000 0x40000000>;
165 }; 165 };
166 166
167 pps { 167 pps {
168 compatible = "pps-gpio"; 168 compatible = "pps-gpio";
169 pinctrl-names = "default"; 169 pinctrl-names = "default";
170 pinctrl-0 = <&pinctrl_pps>; 170 pinctrl-0 = <&pinctrl_pps>;
171 gpios = <&gpio1 26 GPIO_ACTIVE 171 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
172 }; 172 };
173 173
174 reg_2p5v: regulator-2p5v { 174 reg_2p5v: regulator-2p5v {
175 compatible = "regulator-fixed" 175 compatible = "regulator-fixed";
176 regulator-name = "2P5V"; 176 regulator-name = "2P5V";
177 regulator-min-microvolt = <250 177 regulator-min-microvolt = <2500000>;
178 regulator-max-microvolt = <250 178 regulator-max-microvolt = <2500000>;
179 regulator-always-on; 179 regulator-always-on;
180 }; 180 };
181 181
182 reg_3p3v: regulator-3p3v { 182 reg_3p3v: regulator-3p3v {
183 compatible = "regulator-fixed" 183 compatible = "regulator-fixed";
184 regulator-name = "3P3V"; 184 regulator-name = "3P3V";
185 regulator-min-microvolt = <330 185 regulator-min-microvolt = <3300000>;
186 regulator-max-microvolt = <330 186 regulator-max-microvolt = <3300000>;
187 regulator-always-on; 187 regulator-always-on;
188 }; 188 };
189 189
190 reg_5p0v: regulator-5p0v { 190 reg_5p0v: regulator-5p0v {
191 compatible = "regulator-fixed" 191 compatible = "regulator-fixed";
192 regulator-name = "5P0V"; 192 regulator-name = "5P0V";
193 regulator-min-microvolt = <500 193 regulator-min-microvolt = <5000000>;
194 regulator-max-microvolt = <500 194 regulator-max-microvolt = <5000000>;
195 regulator-always-on; 195 regulator-always-on;
196 }; 196 };
197 197
198 reg_12p0v: regulator-12p0v { 198 reg_12p0v: regulator-12p0v {
199 compatible = "regulator-fixed" 199 compatible = "regulator-fixed";
200 regulator-name = "12P0V"; 200 regulator-name = "12P0V";
201 regulator-min-microvolt = <120 201 regulator-min-microvolt = <12000000>;
202 regulator-max-microvolt = <120 202 regulator-max-microvolt = <12000000>;
203 gpio = <&gpio4 25 GPIO_ACTIVE_ 203 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
204 enable-active-high; 204 enable-active-high;
205 }; 205 };
206 206
207 reg_1p4v: regulator-vddsoc { 207 reg_1p4v: regulator-vddsoc {
208 compatible = "regulator-fixed" 208 compatible = "regulator-fixed";
209 regulator-name = "vdd_soc"; 209 regulator-name = "vdd_soc";
210 regulator-min-microvolt = <140 210 regulator-min-microvolt = <1400000>;
211 regulator-max-microvolt = <140 211 regulator-max-microvolt = <1400000>;
212 regulator-always-on; 212 regulator-always-on;
213 }; 213 };
214 214
215 reg_usb_h1_vbus: regulator-usb-h1-vbus 215 reg_usb_h1_vbus: regulator-usb-h1-vbus {
216 compatible = "regulator-fixed" 216 compatible = "regulator-fixed";
217 regulator-name = "usb_h1_vbus" 217 regulator-name = "usb_h1_vbus";
218 regulator-min-microvolt = <500 218 regulator-min-microvolt = <5000000>;
219 regulator-max-microvolt = <500 219 regulator-max-microvolt = <5000000>;
220 regulator-always-on; 220 regulator-always-on;
221 }; 221 };
222 222
223 reg_usb_otg_vbus: regulator-usb-otg-vb 223 reg_usb_otg_vbus: regulator-usb-otg-vbus {
224 compatible = "regulator-fixed" 224 compatible = "regulator-fixed";
225 regulator-name = "usb_otg_vbus 225 regulator-name = "usb_otg_vbus";
226 regulator-min-microvolt = <500 226 regulator-min-microvolt = <5000000>;
227 regulator-max-microvolt = <500 227 regulator-max-microvolt = <5000000>;
228 gpio = <&gpio3 22 GPIO_ACTIVE_ 228 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
229 enable-active-high; 229 enable-active-high;
230 }; 230 };
231 231
232 sound { 232 sound {
233 compatible = "fsl,imx6q-ventan 233 compatible = "fsl,imx6q-ventana-sgtl5000",
234 "fsl,imx-audio-sg 234 "fsl,imx-audio-sgtl5000";
235 model = "sgtl5000-audio"; 235 model = "sgtl5000-audio";
236 ssi-controller = <&ssi1>; 236 ssi-controller = <&ssi1>;
237 audio-codec = <&sgtl5000>; 237 audio-codec = <&sgtl5000>;
238 audio-routing = 238 audio-routing =
239 "MIC_IN", "Mic Jack", 239 "MIC_IN", "Mic Jack",
240 "Mic Jack", "Mic Bias" 240 "Mic Jack", "Mic Bias",
241 "Headphone Jack", "HP_ 241 "Headphone Jack", "HP_OUT";
242 mux-int-port = <1>; 242 mux-int-port = <1>;
243 mux-ext-port = <4>; 243 mux-ext-port = <4>;
244 }; 244 };
245 }; 245 };
246 246
247 &audmux { 247 &audmux {
248 pinctrl-names = "default"; 248 pinctrl-names = "default";
249 pinctrl-0 = <&pinctrl_audmux>; 249 pinctrl-0 = <&pinctrl_audmux>;
250 status = "okay"; 250 status = "okay";
251 }; 251 };
252 252
253 &ecspi3 { 253 &ecspi3 {
254 cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW> 254 cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
255 pinctrl-names = "default"; 255 pinctrl-names = "default";
256 pinctrl-0 = <&pinctrl_ecspi3>; 256 pinctrl-0 = <&pinctrl_ecspi3>;
257 status = "okay"; 257 status = "okay";
258 }; 258 };
259 259
260 &can1 { 260 &can1 {
261 pinctrl-names = "default"; 261 pinctrl-names = "default";
262 pinctrl-0 = <&pinctrl_flexcan>; 262 pinctrl-0 = <&pinctrl_flexcan>;
263 status = "okay"; 263 status = "okay";
264 }; 264 };
265 265
266 &clks { 266 &clks {
267 assigned-clocks = <&clks IMX6QDL_CLK_L 267 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
268 <&clks IMX6QDL_CLK_L 268 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
269 assigned-clock-parents = <&clks IMX6QD 269 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
270 <&clks IMX6QD 270 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
271 }; 271 };
272 272
273 &fec { 273 &fec {
274 pinctrl-names = "default"; 274 pinctrl-names = "default";
275 pinctrl-0 = <&pinctrl_enet>; 275 pinctrl-0 = <&pinctrl_enet>;
276 phy-mode = "rgmii-id"; 276 phy-mode = "rgmii-id";
277 phy-reset-gpios = <&gpio1 30 GPIO_ACTI 277 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
278 status = "okay"; 278 status = "okay";
279 }; 279 };
280 280
281 &hdmi { 281 &hdmi {
282 ddc-i2c-bus = <&i2c3>; 282 ddc-i2c-bus = <&i2c3>;
283 status = "okay"; 283 status = "okay";
284 }; 284 };
285 285
286 &i2c1 { 286 &i2c1 {
287 clock-frequency = <100000>; 287 clock-frequency = <100000>;
288 pinctrl-names = "default"; 288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_i2c1>; 289 pinctrl-0 = <&pinctrl_i2c1>;
290 status = "okay"; 290 status = "okay";
291 291
292 gsc: gsc@20 { 292 gsc: gsc@20 {
293 compatible = "gw,gsc"; 293 compatible = "gw,gsc";
294 reg = <0x20>; 294 reg = <0x20>;
295 interrupt-parent = <&gpio1>; 295 interrupt-parent = <&gpio1>;
296 interrupts = <4 IRQ_TYPE_LEVEL 296 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
297 interrupt-controller; 297 interrupt-controller;
298 #interrupt-cells = <1>; 298 #interrupt-cells = <1>;
299 #size-cells = <0>; 299 #size-cells = <0>;
300 300
301 adc { 301 adc {
302 compatible = "gw,gsc-a 302 compatible = "gw,gsc-adc";
303 #address-cells = <1>; 303 #address-cells = <1>;
304 #size-cells = <0>; 304 #size-cells = <0>;
305 305
306 channel@0 { 306 channel@0 {
307 gw,mode = <0>; 307 gw,mode = <0>;
308 reg = <0x00>; 308 reg = <0x00>;
309 label = "temp" 309 label = "temp";
310 }; 310 };
311 311
312 channel@2 { 312 channel@2 {
313 gw,mode = <1>; 313 gw,mode = <1>;
314 reg = <0x02>; 314 reg = <0x02>;
315 label = "vdd_v 315 label = "vdd_vin";
316 }; 316 };
317 317
318 channel@5 { 318 channel@5 {
319 gw,mode = <1>; 319 gw,mode = <1>;
320 reg = <0x05>; 320 reg = <0x05>;
321 label = "vdd_3 321 label = "vdd_3p3";
322 }; 322 };
323 323
324 channel@8 { 324 channel@8 {
325 gw,mode = <1>; 325 gw,mode = <1>;
326 reg = <0x08>; 326 reg = <0x08>;
327 label = "vdd_b 327 label = "vdd_bat";
328 }; 328 };
329 329
330 channel@b { 330 channel@b {
331 gw,mode = <1>; 331 gw,mode = <1>;
332 reg = <0x0b>; 332 reg = <0x0b>;
333 label = "vdd_5 333 label = "vdd_5p0";
334 }; 334 };
335 335
336 channel@e { 336 channel@e {
337 gw,mode = <1>; 337 gw,mode = <1>;
338 reg = <0xe>; 338 reg = <0xe>;
339 label = "vdd_a 339 label = "vdd_arm";
340 }; 340 };
341 341
342 channel@11 { 342 channel@11 {
343 gw,mode = <1>; 343 gw,mode = <1>;
344 reg = <0x11>; 344 reg = <0x11>;
345 label = "vdd_s 345 label = "vdd_soc";
346 }; 346 };
347 347
348 channel@14 { 348 channel@14 {
349 gw,mode = <1>; 349 gw,mode = <1>;
350 reg = <0x14>; 350 reg = <0x14>;
351 label = "vdd_3 351 label = "vdd_3p0";
352 }; 352 };
353 353
354 channel@17 { 354 channel@17 {
355 gw,mode = <1>; 355 gw,mode = <1>;
356 reg = <0x17>; 356 reg = <0x17>;
357 label = "vdd_1 357 label = "vdd_1p5";
358 }; 358 };
359 359
360 channel@1d { 360 channel@1d {
361 gw,mode = <1>; 361 gw,mode = <1>;
362 reg = <0x1d>; 362 reg = <0x1d>;
363 label = "vdd_1 363 label = "vdd_1p8";
364 }; 364 };
365 365
366 channel@20 { 366 channel@20 {
367 gw,mode = <1>; 367 gw,mode = <1>;
368 reg = <0x20>; 368 reg = <0x20>;
369 label = "vdd_a 369 label = "vdd_an1";
370 }; 370 };
371 371
372 channel@23 { 372 channel@23 {
373 gw,mode = <1>; 373 gw,mode = <1>;
374 reg = <0x23>; 374 reg = <0x23>;
375 label = "vdd_2 375 label = "vdd_2p5";
376 }; 376 };
377 377
378 channel@26 { 378 channel@26 {
379 gw,mode = <1>; 379 gw,mode = <1>;
380 reg = <0x26>; 380 reg = <0x26>;
381 label = "vdd_g 381 label = "vdd_gps";
382 }; 382 };
383 383
384 channel@29 { 384 channel@29 {
385 gw,mode = <1>; 385 gw,mode = <1>;
386 reg = <0x29>; 386 reg = <0x29>;
387 label = "vdd_a 387 label = "vdd_an2";
388 }; 388 };
389 }; 389 };
390 }; 390 };
391 391
392 gsc_gpio: gpio@23 { 392 gsc_gpio: gpio@23 {
393 compatible = "nxp,pca9555"; 393 compatible = "nxp,pca9555";
394 reg = <0x23>; 394 reg = <0x23>;
395 gpio-controller; 395 gpio-controller;
396 #gpio-cells = <2>; 396 #gpio-cells = <2>;
397 interrupt-parent = <&gsc>; 397 interrupt-parent = <&gsc>;
398 interrupts = <4>; 398 interrupts = <4>;
399 }; 399 };
400 400
401 eeprom1: eeprom@50 { 401 eeprom1: eeprom@50 {
402 compatible = "atmel,24c02"; 402 compatible = "atmel,24c02";
403 reg = <0x50>; 403 reg = <0x50>;
404 pagesize = <16>; 404 pagesize = <16>;
405 }; 405 };
406 406
407 eeprom2: eeprom@51 { 407 eeprom2: eeprom@51 {
408 compatible = "atmel,24c02"; 408 compatible = "atmel,24c02";
409 reg = <0x51>; 409 reg = <0x51>;
410 pagesize = <16>; 410 pagesize = <16>;
411 }; 411 };
412 412
413 eeprom3: eeprom@52 { 413 eeprom3: eeprom@52 {
414 compatible = "atmel,24c02"; 414 compatible = "atmel,24c02";
415 reg = <0x52>; 415 reg = <0x52>;
416 pagesize = <16>; 416 pagesize = <16>;
417 }; 417 };
418 418
419 eeprom4: eeprom@53 { 419 eeprom4: eeprom@53 {
420 compatible = "atmel,24c02"; 420 compatible = "atmel,24c02";
421 reg = <0x53>; 421 reg = <0x53>;
422 pagesize = <16>; 422 pagesize = <16>;
423 }; 423 };
424 424
425 ds1672: rtc@68 { 425 ds1672: rtc@68 {
426 compatible = "dallas,ds1672"; 426 compatible = "dallas,ds1672";
427 reg = <0x68>; 427 reg = <0x68>;
428 }; 428 };
429 }; 429 };
430 430
431 &i2c2 { 431 &i2c2 {
432 clock-frequency = <100000>; 432 clock-frequency = <100000>;
433 pinctrl-names = "default"; 433 pinctrl-names = "default";
434 pinctrl-0 = <&pinctrl_i2c2>; 434 pinctrl-0 = <&pinctrl_i2c2>;
435 status = "okay"; 435 status = "okay";
436 436
437 sgtl5000: codec@a { 437 sgtl5000: codec@a {
438 compatible = "fsl,sgtl5000"; 438 compatible = "fsl,sgtl5000";
439 reg = <0x0a>; 439 reg = <0x0a>;
440 #sound-dai-cells = <0>; 440 #sound-dai-cells = <0>;
441 clocks = <&clks IMX6QDL_CLK_CK 441 clocks = <&clks IMX6QDL_CLK_CKO>;
442 VDDA-supply = <®_1p8v>; 442 VDDA-supply = <®_1p8v>;
443 VDDIO-supply = <®_3p3v>; 443 VDDIO-supply = <®_3p3v>;
444 }; 444 };
445 445
446 magn@1c { 446 magn@1c {
447 compatible = "st,lsm9ds1-magn" 447 compatible = "st,lsm9ds1-magn";
448 reg = <0x1c>; 448 reg = <0x1c>;
449 pinctrl-names = "default"; 449 pinctrl-names = "default";
450 pinctrl-0 = <&pinctrl_mag>; 450 pinctrl-0 = <&pinctrl_mag>;
451 interrupt-parent = <&gpio5>; 451 interrupt-parent = <&gpio5>;
452 interrupts = <9 IRQ_TYPE_EDGE_ 452 interrupts = <9 IRQ_TYPE_EDGE_RISING>;
453 }; 453 };
454 454
455 tca8418: keypad@34 { 455 tca8418: keypad@34 {
456 compatible = "ti,tca8418"; 456 compatible = "ti,tca8418";
457 pinctrl-names = "default"; 457 pinctrl-names = "default";
458 pinctrl-0 = <&pinctrl_keypad>; 458 pinctrl-0 = <&pinctrl_keypad>;
459 reg = <0x34>; 459 reg = <0x34>;
460 interrupt-parent = <&gpio5>; 460 interrupt-parent = <&gpio5>;
461 interrupts = <11 IRQ_TYPE_EDGE 461 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
462 linux,keymap = < MATRIX_KEY(0x 462 linux,keymap = < MATRIX_KEY(0x00, 0x01, BTN_0)
463 MATRIX_KEY(0x 463 MATRIX_KEY(0x00, 0x00, BTN_1)
464 MATRIX_KEY(0x 464 MATRIX_KEY(0x01, 0x01, BTN_2)
465 MATRIX_KEY(0x 465 MATRIX_KEY(0x01, 0x00, BTN_3)
466 MATRIX_KEY(0x 466 MATRIX_KEY(0x02, 0x00, BTN_4)
467 MATRIX_KEY(0x 467 MATRIX_KEY(0x00, 0x03, BTN_5)
468 MATRIX_KEY(0x 468 MATRIX_KEY(0x00, 0x02, BTN_6)
469 MATRIX_KEY(0x 469 MATRIX_KEY(0x01, 0x03, BTN_7)
470 MATRIX_KEY(0x 470 MATRIX_KEY(0x01, 0x02, BTN_8)
471 MATRIX_KEY(0x 471 MATRIX_KEY(0x02, 0x02, BTN_9)
472 >; 472 >;
473 keypad,num-rows = <4>; 473 keypad,num-rows = <4>;
474 keypad,num-columns = <4>; 474 keypad,num-columns = <4>;
475 }; 475 };
476 476
477 ltc3676: pmic@3c { 477 ltc3676: pmic@3c {
478 compatible = "lltc,ltc3676"; 478 compatible = "lltc,ltc3676";
479 pinctrl-names = "default"; 479 pinctrl-names = "default";
480 pinctrl-0 = <&pinctrl_pmic>; 480 pinctrl-0 = <&pinctrl_pmic>;
481 reg = <0x3c>; 481 reg = <0x3c>;
482 interrupt-parent = <&gpio1>; 482 interrupt-parent = <&gpio1>;
483 interrupts = <8 IRQ_TYPE_EDGE_ 483 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
484 484
485 regulators { 485 regulators {
486 /* VDD_DDR (1+R1/R2 = 486 /* VDD_DDR (1+R1/R2 = 2.105) */
487 reg_vdd_ddr: sw2 { 487 reg_vdd_ddr: sw2 {
488 regulator-name 488 regulator-name = "vddddr";
489 regulator-min- 489 regulator-min-microvolt = <868310>;
490 regulator-max- 490 regulator-max-microvolt = <1684000>;
491 lltc,fb-voltag 491 lltc,fb-voltage-divider = <221000 200000>;
492 regulator-ramp 492 regulator-ramp-delay = <7000>;
493 regulator-boot 493 regulator-boot-on;
494 regulator-alwa 494 regulator-always-on;
495 }; 495 };
496 496
497 /* VDD_ARM (1+R1/R2 = 497 /* VDD_ARM (1+R1/R2 = 1.931) */
498 reg_vdd_arm: sw3 { 498 reg_vdd_arm: sw3 {
499 regulator-name 499 regulator-name = "vddarm";
500 regulator-min- 500 regulator-min-microvolt = <796551>;
501 regulator-max- 501 regulator-max-microvolt = <1544827>;
502 lltc,fb-voltag 502 lltc,fb-voltage-divider = <243000 261000>;
503 regulator-ramp 503 regulator-ramp-delay = <7000>;
504 regulator-boot 504 regulator-boot-on;
505 regulator-alwa 505 regulator-always-on;
506 linux,phandle 506 linux,phandle = <®_vdd_arm>;
507 }; 507 };
508 508
509 /* VDD_1P8 (1+R1/R2 = 509 /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
510 reg_1p8v: sw4 { 510 reg_1p8v: sw4 {
511 regulator-name 511 regulator-name = "vdd1p8";
512 regulator-min- 512 regulator-min-microvolt = <1033310>;
513 regulator-max- 513 regulator-max-microvolt = <2004000>;
514 lltc,fb-voltag 514 lltc,fb-voltage-divider = <301000 200000>;
515 regulator-ramp 515 regulator-ramp-delay = <7000>;
516 regulator-boot 516 regulator-boot-on;
517 regulator-alwa 517 regulator-always-on;
518 }; 518 };
519 519
520 /* VDD_1P0 (1+R1/R2 = 520 /* VDD_1P0 (1+R1/R2 = 1.39): PCIe/ENET-PHY */
521 reg_1p0v: ldo2 { 521 reg_1p0v: ldo2 {
522 regulator-name 522 regulator-name = "vdd1p0";
523 regulator-min- 523 regulator-min-microvolt = <950000>;
524 regulator-max- 524 regulator-max-microvolt = <1050000>;
525 lltc,fb-voltag 525 lltc,fb-voltage-divider = <78700 200000>;
526 regulator-boot 526 regulator-boot-on;
527 regulator-alwa 527 regulator-always-on;
528 }; 528 };
529 529
530 /* VDD_AUD_1P8: Audio 530 /* VDD_AUD_1P8: Audio codec */
531 reg_aud_1p8v: ldo3 { 531 reg_aud_1p8v: ldo3 {
532 regulator-name 532 regulator-name = "vdd1p8a";
533 regulator-min- 533 regulator-min-microvolt = <1800000>;
534 regulator-max- 534 regulator-max-microvolt = <1800000>;
535 regulator-boot 535 regulator-boot-on;
536 }; 536 };
537 537
538 /* VDD_HIGH (1+R1/R2 = 538 /* VDD_HIGH (1+R1/R2 = 4.17) */
539 reg_3p0v: ldo4 { 539 reg_3p0v: ldo4 {
540 regulator-name 540 regulator-name = "vdd3p0";
541 regulator-min- 541 regulator-min-microvolt = <3023250>;
542 regulator-max- 542 regulator-max-microvolt = <3023250>;
543 lltc,fb-voltag 543 lltc,fb-voltage-divider = <634000 200000>;
544 regulator-boot 544 regulator-boot-on;
545 regulator-alwa 545 regulator-always-on;
546 }; 546 };
547 }; 547 };
548 }; 548 };
549 549
550 imu@6a { 550 imu@6a {
551 compatible = "st,lsm9ds1-imu"; 551 compatible = "st,lsm9ds1-imu";
552 reg = <0x6a>; 552 reg = <0x6a>;
553 st,drdy-int-pin = <1>; 553 st,drdy-int-pin = <1>;
554 pinctrl-names = "default"; 554 pinctrl-names = "default";
555 pinctrl-0 = <&pinctrl_imu>; 555 pinctrl-0 = <&pinctrl_imu>;
556 interrupt-parent = <&gpio5>; 556 interrupt-parent = <&gpio5>;
557 interrupts = <6 IRQ_TYPE_LEVEL 557 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
558 }; 558 };
559 }; 559 };
560 560
561 &i2c3 { 561 &i2c3 {
562 clock-frequency = <100000>; 562 clock-frequency = <100000>;
563 pinctrl-names = "default"; 563 pinctrl-names = "default";
564 pinctrl-0 = <&pinctrl_i2c3>; 564 pinctrl-0 = <&pinctrl_i2c3>;
565 status = "okay"; 565 status = "okay";
566 566
567 egalax_ts: touchscreen@4 { 567 egalax_ts: touchscreen@4 {
568 compatible = "eeti,egalax_ts"; 568 compatible = "eeti,egalax_ts";
569 reg = <0x04>; 569 reg = <0x04>;
570 interrupt-parent = <&gpio5>; 570 interrupt-parent = <&gpio5>;
571 interrupts = <12 IRQ_TYPE_EDGE 571 interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
572 wakeup-gpios = <&gpio5 13 GPIO 572 wakeup-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
573 }; 573 };
574 }; 574 };
575 575
576 &ldb { 576 &ldb {
577 fsl,dual-channel; 577 fsl,dual-channel;
578 status = "okay"; 578 status = "okay";
579 579
580 lvds-channel@0 { 580 lvds-channel@0 {
581 fsl,data-mapping = "spwg"; 581 fsl,data-mapping = "spwg";
582 fsl,data-width = <18>; 582 fsl,data-width = <18>;
583 status = "okay"; 583 status = "okay";
584 584
585 display-timings { 585 display-timings {
586 native-mode = <&timing 586 native-mode = <&timing0>;
587 timing0: timing-hsd100 587 timing0: timing-hsd100pxn1 {
588 clock-frequenc 588 clock-frequency = <65000000>;
589 hactive = <102 589 hactive = <1024>;
590 vactive = <768 590 vactive = <768>;
591 hback-porch = 591 hback-porch = <220>;
592 hfront-porch = 592 hfront-porch = <40>;
593 vback-porch = 593 vback-porch = <21>;
594 vfront-porch = 594 vfront-porch = <7>;
595 hsync-len = <6 595 hsync-len = <60>;
596 vsync-len = <1 596 vsync-len = <10>;
597 }; 597 };
598 }; 598 };
599 }; 599 };
600 }; 600 };
601 601
602 &pcie { 602 &pcie {
603 pinctrl-names = "default"; 603 pinctrl-names = "default";
604 pinctrl-0 = <&pinctrl_pcie>; 604 pinctrl-0 = <&pinctrl_pcie>;
605 reset-gpio = <&gpio4 31 GPIO_ACTIVE_LO 605 reset-gpio = <&gpio4 31 GPIO_ACTIVE_LOW>;
606 status = "okay"; 606 status = "okay";
607 }; 607 };
608 608
609 &pwm2 { 609 &pwm2 {
610 pinctrl-names = "default"; 610 pinctrl-names = "default";
611 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DI 611 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
612 status = "disabled"; 612 status = "disabled";
613 }; 613 };
614 614
615 &pwm3 { 615 &pwm3 {
616 pinctrl-names = "default"; 616 pinctrl-names = "default";
617 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DI 617 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
618 status = "disabled"; 618 status = "disabled";
619 }; 619 };
620 620
621 &pwm4 { 621 &pwm4 {
622 pinctrl-names = "default"; 622 pinctrl-names = "default";
623 pinctrl-0 = <&pinctrl_pwm4>; 623 pinctrl-0 = <&pinctrl_pwm4>;
624 status = "okay"; 624 status = "okay";
625 }; 625 };
626 626
627 &ssi1 { 627 &ssi1 {
628 status = "okay"; 628 status = "okay";
629 }; 629 };
630 630
631 &uart1 { 631 &uart1 {
632 pinctrl-names = "default"; 632 pinctrl-names = "default";
633 pinctrl-0 = <&pinctrl_uart1>; 633 pinctrl-0 = <&pinctrl_uart1>;
634 rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH 634 rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
635 status = "okay"; 635 status = "okay";
636 }; 636 };
637 637
638 &uart2 { 638 &uart2 {
639 pinctrl-names = "default"; 639 pinctrl-names = "default";
640 pinctrl-0 = <&pinctrl_uart2>; 640 pinctrl-0 = <&pinctrl_uart2>;
641 status = "okay"; 641 status = "okay";
642 }; 642 };
643 643
644 &uart5 { 644 &uart5 {
645 pinctrl-names = "default"; 645 pinctrl-names = "default";
646 pinctrl-0 = <&pinctrl_uart5>; 646 pinctrl-0 = <&pinctrl_uart5>;
647 status = "okay"; 647 status = "okay";
648 }; 648 };
649 649
650 &usbotg { 650 &usbotg {
651 vbus-supply = <®_usb_otg_vbus>; 651 vbus-supply = <®_usb_otg_vbus>;
652 pinctrl-names = "default"; 652 pinctrl-names = "default";
653 pinctrl-0 = <&pinctrl_usbotg>; 653 pinctrl-0 = <&pinctrl_usbotg>;
654 disable-over-current; 654 disable-over-current;
655 status = "okay"; 655 status = "okay";
656 }; 656 };
657 657
658 &usbh1 { 658 &usbh1 {
659 vbus-supply = <®_usb_h1_vbus>; 659 vbus-supply = <®_usb_h1_vbus>;
660 pinctrl-names = "default"; 660 pinctrl-names = "default";
661 pinctrl-0 = <&pinctrl_usbh1>; 661 pinctrl-0 = <&pinctrl_usbh1>;
662 status = "okay"; 662 status = "okay";
663 }; 663 };
664 664
665 &usdhc2 { 665 &usdhc2 {
666 pinctrl-names = "default"; 666 pinctrl-names = "default";
667 pinctrl-0 = <&pinctrl_usdhc2>; 667 pinctrl-0 = <&pinctrl_usdhc2>;
668 bus-width = <8>; 668 bus-width = <8>;
669 vmmc-supply = <®_3p3v>; 669 vmmc-supply = <®_3p3v>;
670 non-removable; 670 non-removable;
671 status = "okay"; 671 status = "okay";
672 }; 672 };
673 673
674 &usdhc3 { 674 &usdhc3 {
675 pinctrl-names = "default", "state_100m 675 pinctrl-names = "default", "state_100mhz", "state_200mhz";
676 pinctrl-0 = <&pinctrl_usdhc3>; 676 pinctrl-0 = <&pinctrl_usdhc3>;
677 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 677 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
678 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 678 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
679 cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH> 679 cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
680 vmmc-supply = <®_3p3v>; 680 vmmc-supply = <®_3p3v>;
681 status = "okay"; 681 status = "okay";
682 }; 682 };
683 683
684 &wdog1 { 684 &wdog1 {
685 pinctrl-names = "default"; 685 pinctrl-names = "default";
686 pinctrl-0 = <&pinctrl_wdog>; 686 pinctrl-0 = <&pinctrl_wdog>;
687 fsl,ext-reset-output; 687 fsl,ext-reset-output;
688 }; 688 };
689 689
690 &iomuxc { 690 &iomuxc {
691 pinctrl_audmux: audmuxgrp { 691 pinctrl_audmux: audmuxgrp {
692 fsl,pins = < 692 fsl,pins = <
693 /* AUD4 */ 693 /* AUD4 */
694 MX6QDL_PAD_DISP0_DAT20 694 MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
695 MX6QDL_PAD_DISP0_DAT21 695 MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
696 MX6QDL_PAD_DISP0_DAT22 696 MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
697 MX6QDL_PAD_DISP0_DAT23 697 MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
698 MX6QDL_PAD_GPIO_0__CCM 698 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
699 /* AUD6 */ 699 /* AUD6 */
700 MX6QDL_PAD_DI0_PIN2__A 700 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x130b0
701 MX6QDL_PAD_DI0_PIN3__A 701 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x130b0
702 MX6QDL_PAD_DI0_PIN4__A 702 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x130b0
703 MX6QDL_PAD_DI0_PIN15__ 703 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x130b0
704 >; 704 >;
705 }; 705 };
706 706
707 pinctrl_ecspi3: escpi3grp { 707 pinctrl_ecspi3: escpi3grp {
708 fsl,pins = < 708 fsl,pins = <
709 MX6QDL_PAD_DISP0_DAT0_ 709 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
710 MX6QDL_PAD_DISP0_DAT1_ 710 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
711 MX6QDL_PAD_DISP0_DAT2_ 711 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
712 MX6QDL_PAD_DISP0_DAT3_ 712 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1
713 >; 713 >;
714 }; 714 };
715 715
716 pinctrl_enet: enetgrp { 716 pinctrl_enet: enetgrp {
717 fsl,pins = < 717 fsl,pins = <
718 MX6QDL_PAD_RGMII_RXC__ 718 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
719 MX6QDL_PAD_RGMII_RD0__ 719 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
720 MX6QDL_PAD_RGMII_RD1__ 720 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
721 MX6QDL_PAD_RGMII_RD2__ 721 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
722 MX6QDL_PAD_RGMII_RD3__ 722 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
723 MX6QDL_PAD_RGMII_RX_CT 723 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
724 MX6QDL_PAD_RGMII_TXC__ 724 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
725 MX6QDL_PAD_RGMII_TD0__ 725 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
726 MX6QDL_PAD_RGMII_TD1__ 726 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
727 MX6QDL_PAD_RGMII_TD2__ 727 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
728 MX6QDL_PAD_RGMII_TD3__ 728 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
729 MX6QDL_PAD_RGMII_TX_CT 729 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
730 MX6QDL_PAD_ENET_REF_CL 730 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
731 MX6QDL_PAD_ENET_MDIO__ 731 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
732 MX6QDL_PAD_ENET_MDC__E 732 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
733 MX6QDL_PAD_GPIO_16__EN 733 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
734 MX6QDL_PAD_ENET_TXD0__ 734 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */
735 >; 735 >;
736 }; 736 };
737 737
738 pinctrl_flexcan: flexcangrp { 738 pinctrl_flexcan: flexcangrp {
739 fsl,pins = < 739 fsl,pins = <
740 MX6QDL_PAD_KEY_ROW2__F 740 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
741 MX6QDL_PAD_KEY_COL2__F 741 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
742 MX6QDL_PAD_GPIO_2__GPI 742 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
743 >; 743 >;
744 }; 744 };
745 745
746 pinctrl_gpio_leds: gpioledsgrp { 746 pinctrl_gpio_leds: gpioledsgrp {
747 fsl,pins = < 747 fsl,pins = <
748 MX6QDL_PAD_KEY_COL0__G 748 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
749 MX6QDL_PAD_KEY_ROW0__G 749 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
750 MX6QDL_PAD_KEY_ROW4__G 750 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
751 >; 751 >;
752 }; 752 };
753 753
754 pinctrl_i2c1: i2c1grp { 754 pinctrl_i2c1: i2c1grp {
755 fsl,pins = < 755 fsl,pins = <
756 MX6QDL_PAD_EIM_D21__I2 756 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
757 MX6QDL_PAD_EIM_D28__I2 757 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
758 MX6QDL_PAD_GPIO_4__GPI 758 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
759 >; 759 >;
760 }; 760 };
761 761
762 pinctrl_i2c2: i2c2grp { 762 pinctrl_i2c2: i2c2grp {
763 fsl,pins = < 763 fsl,pins = <
764 MX6QDL_PAD_KEY_COL3__I 764 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
765 MX6QDL_PAD_KEY_ROW3__I 765 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
766 >; 766 >;
767 }; 767 };
768 768
769 pinctrl_i2c3: i2c3grp { 769 pinctrl_i2c3: i2c3grp {
770 fsl,pins = < 770 fsl,pins = <
771 MX6QDL_PAD_GPIO_3__I2C 771 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
772 MX6QDL_PAD_GPIO_6__I2C 772 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
773 MX6QDL_PAD_GPIO_19__GP 773 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x4001b0b0 /* DIOI2C_DIS# */
774 MX6QDL_PAD_DISP0_DAT18 774 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x0001b0b0 /* LVDS_TOUCH_IRQ# */
775 MX6QDL_PAD_DISP0_DAT19 775 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x0001b0b0 /* LVDS_BACKEN */
776 >; 776 >;
777 }; 777 };
778 778
779 pinctrl_imu: imugrp { 779 pinctrl_imu: imugrp {
780 fsl,pins = < 780 fsl,pins = <
781 MX6QDL_PAD_DISP0_DAT12 781 MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x1b0b0
782 >; 782 >;
783 }; 783 };
784 784
785 pinctrl_keypad: keypadgrp { 785 pinctrl_keypad: keypadgrp {
786 fsl,pins = < 786 fsl,pins = <
787 MX6QDL_PAD_DISP0_DAT17 787 MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x0001b0b0 /* KEYPAD_IRQ# */
788 MX6QDL_PAD_DISP0_DAT9_ 788 MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x0001b0b0 /* KEYPAD_LED_EN */
789 >; 789 >;
790 }; 790 };
791 791
792 pinctrl_mag: maggrp { 792 pinctrl_mag: maggrp {
793 fsl,pins = < 793 fsl,pins = <
794 MX6QDL_PAD_DISP0_DAT15 794 MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b0
795 >; 795 >;
796 }; 796 };
797 797
798 pinctrl_pcie: pciegrp { 798 pinctrl_pcie: pciegrp {
799 fsl,pins = < 799 fsl,pins = <
800 MX6QDL_PAD_DISP0_DAT10 800 MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b0b0 /* PCI_RST# */
801 MX6QDL_PAD_GPIO_17__GP 801 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */
802 >; 802 >;
803 }; 803 };
804 804
805 pinctrl_pmic: pmicgrp { 805 pinctrl_pmic: pmicgrp {
806 fsl,pins = < 806 fsl,pins = <
807 MX6QDL_PAD_GPIO_8__GPI 807 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
808 >; 808 >;
809 }; 809 };
810 810
811 pinctrl_pps: ppsgrp { 811 pinctrl_pps: ppsgrp {
812 fsl,pins = < 812 fsl,pins = <
813 MX6QDL_PAD_ENET_RXD1__ 813 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
814 >; 814 >;
815 }; 815 };
816 816
817 pinctrl_pwm2: pwm2grp { 817 pinctrl_pwm2: pwm2grp {
818 fsl,pins = < 818 fsl,pins = <
819 MX6QDL_PAD_SD1_DAT2__P 819 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
820 >; 820 >;
821 }; 821 };
822 822
823 pinctrl_pwm3: pwm3grp { 823 pinctrl_pwm3: pwm3grp {
824 fsl,pins = < 824 fsl,pins = <
825 MX6QDL_PAD_SD1_DAT1__P 825 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
826 >; 826 >;
827 }; 827 };
828 828
829 pinctrl_pwm4: pwm4grp { 829 pinctrl_pwm4: pwm4grp {
830 fsl,pins = < 830 fsl,pins = <
831 MX6QDL_PAD_SD1_CMD__PW 831 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
832 >; 832 >;
833 }; 833 };
834 834
835 pinctrl_uart1: uart1grp { 835 pinctrl_uart1: uart1grp {
836 fsl,pins = < 836 fsl,pins = <
837 MX6QDL_PAD_SD3_DAT7__U 837 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
838 MX6QDL_PAD_SD3_DAT6__U 838 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
839 MX6QDL_PAD_SD3_DAT4__G 839 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
840 >; 840 >;
841 }; 841 };
842 842
843 pinctrl_uart2: uart2grp { 843 pinctrl_uart2: uart2grp {
844 fsl,pins = < 844 fsl,pins = <
845 MX6QDL_PAD_SD4_DAT7__U 845 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
846 MX6QDL_PAD_SD4_DAT4__U 846 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
847 >; 847 >;
848 }; 848 };
849 849
850 pinctrl_uart5: uart5grp { 850 pinctrl_uart5: uart5grp {
851 fsl,pins = < 851 fsl,pins = <
852 MX6QDL_PAD_KEY_COL1__U 852 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
853 MX6QDL_PAD_KEY_ROW1__U 853 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
854 >; 854 >;
855 }; 855 };
856 856
857 pinctrl_usbh1: usbh1grp { 857 pinctrl_usbh1: usbh1grp {
858 fsl,pins = < 858 fsl,pins = <
859 MX6QDL_PAD_GPIO_9__GPI 859 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* USBHUB_RST# */
860 >; 860 >;
861 }; 861 };
862 862
863 pinctrl_usbotg: usbotggrp { 863 pinctrl_usbotg: usbotggrp {
864 fsl,pins = < 864 fsl,pins = <
865 MX6QDL_PAD_GPIO_1__USB 865 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
866 MX6QDL_PAD_EIM_D22__GP 866 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
867 MX6QDL_PAD_KEY_COL4__G 867 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
868 >; 868 >;
869 }; 869 };
870 870
871 pinctrl_usdhc2: usdhc2grp { 871 pinctrl_usdhc2: usdhc2grp {
872 fsl,pins = < 872 fsl,pins = <
873 MX6QDL_PAD_SD2_CMD__SD 873 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
874 MX6QDL_PAD_SD2_CLK__SD 874 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
875 MX6QDL_PAD_SD2_DAT0__S 875 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
876 MX6QDL_PAD_SD2_DAT1__S 876 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
877 MX6QDL_PAD_SD2_DAT2__S 877 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
878 MX6QDL_PAD_SD2_DAT3__S 878 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
879 MX6QDL_PAD_NANDF_D4__S 879 MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x170f9
880 MX6QDL_PAD_NANDF_D5__S 880 MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x170f9
881 MX6QDL_PAD_NANDF_D6__S 881 MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x170f9
882 MX6QDL_PAD_NANDF_D7__S 882 MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x170f9
883 >; 883 >;
884 }; 884 };
885 885
886 pinctrl_usdhc3: usdhc3grp { 886 pinctrl_usdhc3: usdhc3grp {
887 fsl,pins = < 887 fsl,pins = <
888 MX6QDL_PAD_SD3_CMD__SD 888 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
889 MX6QDL_PAD_SD3_CLK__SD 889 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
890 MX6QDL_PAD_SD3_DAT0__S 890 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
891 MX6QDL_PAD_SD3_DAT1__S 891 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
892 MX6QDL_PAD_SD3_DAT2__S 892 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
893 MX6QDL_PAD_SD3_DAT3__S 893 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
894 MX6QDL_PAD_SD3_DAT5__G 894 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
895 MX6QDL_PAD_NANDF_CS1__ 895 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
896 >; 896 >;
897 }; 897 };
898 898
899 pinctrl_usdhc3_100mhz: usdhc3-100mhz-g 899 pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
900 fsl,pins = < 900 fsl,pins = <
901 MX6QDL_PAD_SD3_CMD__SD 901 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
902 MX6QDL_PAD_SD3_CLK__SD 902 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
903 MX6QDL_PAD_SD3_DAT0__S 903 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
904 MX6QDL_PAD_SD3_DAT1__S 904 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
905 MX6QDL_PAD_SD3_DAT2__S 905 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
906 MX6QDL_PAD_SD3_DAT3__S 906 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
907 MX6QDL_PAD_SD3_DAT5__G 907 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
908 MX6QDL_PAD_NANDF_CS1__ 908 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
909 >; 909 >;
910 }; 910 };
911 911
912 pinctrl_usdhc3_200mhz: usdhc3-200mhz-g 912 pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
913 fsl,pins = < 913 fsl,pins = <
914 MX6QDL_PAD_SD3_CMD__SD 914 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
915 MX6QDL_PAD_SD3_CLK__SD 915 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
916 MX6QDL_PAD_SD3_DAT0__S 916 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
917 MX6QDL_PAD_SD3_DAT1__S 917 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
918 MX6QDL_PAD_SD3_DAT2__S 918 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
919 MX6QDL_PAD_SD3_DAT3__S 919 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
920 MX6QDL_PAD_SD3_DAT5__G 920 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
921 MX6QDL_PAD_NANDF_CS1__ 921 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
922 >; 922 >;
923 }; 923 };
924 924
925 pinctrl_wdog: wdoggrp { 925 pinctrl_wdog: wdoggrp {
926 fsl,pins = < 926 fsl,pins = <
927 MX6QDL_PAD_DISP0_DAT8_ 927 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
928 >; 928 >;
929 }; 929 };
930 }; 930 };
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