1 /* 1 /*
2 * Copyright 2017 Gateworks Corporation 2 * Copyright 2017 Gateworks Corporation
3 * 3 *
4 * This file is dual-licensed: you can use it 4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your opti 5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and no 6 * licensing only applies to this file, and not this project as a
7 * whole. 7 * whole.
8 * 8 *
9 * a) This file is free software; you can red 9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Ge 10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundati 11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any la 12 * the License, or (at your option) any later version.
13 * 13 *
14 * This file is distributed in the hope th 14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTIC 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more det 17 * GNU General Public License for more details.
18 * 18 *
19 * You should have received a copy of the 19 * You should have received a copy of the GNU General Public
20 * License along with this file; if not, w 20 * License along with this file; if not, write to the Free
21 * Software Foundation, Inc., 51 Franklin 21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA 22 * MA 02110-1301 USA
23 * 23 *
24 * Or, alternatively, 24 * Or, alternatively,
25 * 25 *
26 * b) Permission is hereby granted, free of c 26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and a 27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the 28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitati 29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribut 30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to per 31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject 32 * Software is furnished to do so, subject to the following
33 * conditions: 33 * conditions:
34 * 34 *
35 * The above copyright notice and this per 35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial p 36 * included in all copies or substantial portions of the Software.
37 * 37 *
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHO 38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT L 39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 * OF MERCHANTABILITY, FITNESS FOR A PARTI 40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 * NONINFRINGEMENT. IN NO EVENT SHALL THE 41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGE 42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43 * WHETHER IN AN ACTION OF CONTRACT, TORT 43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 * FROM, OUT OF OR IN CONNECTION WITH THE 44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 * OTHER DEALINGS IN THE SOFTWARE. 45 * OTHER DEALINGS IN THE SOFTWARE.
46 */ 46 */
47 47
48 #include <dt-bindings/gpio/gpio.h> 48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/input/linux-event-codes. 49 #include <dt-bindings/input/linux-event-codes.h>
50 #include <dt-bindings/interrupt-controller/irq 50 #include <dt-bindings/interrupt-controller/irq.h>
51 51
52 / { 52 / {
53 chosen { 53 chosen {
54 stdout-path = &uart2; 54 stdout-path = &uart2;
55 }; 55 };
56 56
57 backlight { 57 backlight {
58 compatible = "pwm-backlight"; 58 compatible = "pwm-backlight";
59 pwms = <&pwm1 0 5000000 0>; 59 pwms = <&pwm1 0 5000000 0>;
60 brightness-levels = < 60 brightness-levels = <
61 0 1 2 3 4 5 6 7 61 0 1 2 3 4 5 6 7 8 9
62 10 11 12 13 14 15 16 1 62 10 11 12 13 14 15 16 17 18 19
63 20 21 22 23 24 25 26 2 63 20 21 22 23 24 25 26 27 28 29
64 30 31 32 33 34 35 36 3 64 30 31 32 33 34 35 36 37 38 39
65 40 41 42 43 44 45 46 4 65 40 41 42 43 44 45 46 47 48 49
66 50 51 52 53 54 55 56 5 66 50 51 52 53 54 55 56 57 58 59
67 60 61 62 63 64 65 66 6 67 60 61 62 63 64 65 66 67 68 69
68 70 71 72 73 74 75 76 7 68 70 71 72 73 74 75 76 77 78 79
69 80 81 82 83 84 85 86 8 69 80 81 82 83 84 85 86 87 88 89
70 90 91 92 93 94 95 96 9 70 90 91 92 93 94 95 96 97 98 99
71 100 71 100
72 >; 72 >;
73 default-brightness-level = <10 73 default-brightness-level = <100>;
74 }; 74 };
75 75
76 gpio-keys { 76 gpio-keys {
77 compatible = "gpio-keys"; 77 compatible = "gpio-keys";
78 78
79 user-pb { 79 user-pb {
80 label = "user_pb"; 80 label = "user_pb";
81 gpios = <&gsc_gpio 0 G 81 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
82 linux,code = <BTN_0>; 82 linux,code = <BTN_0>;
83 }; 83 };
84 84
85 user-pb1x { 85 user-pb1x {
86 label = "user_pb1x"; 86 label = "user_pb1x";
87 linux,code = <BTN_1>; 87 linux,code = <BTN_1>;
88 interrupt-parent = <&g 88 interrupt-parent = <&gsc>;
89 interrupts = <0>; 89 interrupts = <0>;
90 }; 90 };
91 91
92 key-erased { 92 key-erased {
93 label = "key-erased"; 93 label = "key-erased";
94 linux,code = <BTN_2>; 94 linux,code = <BTN_2>;
95 interrupt-parent = <&g 95 interrupt-parent = <&gsc>;
96 interrupts = <1>; 96 interrupts = <1>;
97 }; 97 };
98 98
99 eeprom-wp { 99 eeprom-wp {
100 label = "eeprom_wp"; 100 label = "eeprom_wp";
101 linux,code = <BTN_3>; 101 linux,code = <BTN_3>;
102 interrupt-parent = <&g 102 interrupt-parent = <&gsc>;
103 interrupts = <2>; 103 interrupts = <2>;
104 }; 104 };
105 105
106 tamper { 106 tamper {
107 label = "tamper"; 107 label = "tamper";
108 linux,code = <BTN_4>; 108 linux,code = <BTN_4>;
109 interrupt-parent = <&g 109 interrupt-parent = <&gsc>;
110 interrupts = <5>; 110 interrupts = <5>;
111 }; 111 };
112 112
113 switch-hold { 113 switch-hold {
114 label = "switch_hold"; 114 label = "switch_hold";
115 linux,code = <BTN_5>; 115 linux,code = <BTN_5>;
116 interrupt-parent = <&g 116 interrupt-parent = <&gsc>;
117 interrupts = <7>; 117 interrupts = <7>;
118 }; 118 };
119 }; 119 };
120 120
121 leds { 121 leds {
122 compatible = "gpio-leds"; 122 compatible = "gpio-leds";
123 pinctrl-names = "default"; 123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_gpio_led 124 pinctrl-0 = <&pinctrl_gpio_leds>;
125 125
126 led0: led-user1 { 126 led0: led-user1 {
127 label = "user1"; 127 label = "user1";
128 gpios = <&gpio6 14 GPI 128 gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
129 default-state = "off"; 129 default-state = "off";
130 }; 130 };
131 }; 131 };
132 132
133 memory@10000000 { 133 memory@10000000 {
134 device_type = "memory"; 134 device_type = "memory";
135 reg = <0x10000000 0x40000000>; 135 reg = <0x10000000 0x40000000>;
136 }; 136 };
137 137
138 reg_5p0v: regulator-5p0v { 138 reg_5p0v: regulator-5p0v {
139 compatible = "regulator-fixed" 139 compatible = "regulator-fixed";
140 regulator-name = "5P0V"; 140 regulator-name = "5P0V";
141 regulator-min-microvolt = <500 141 regulator-min-microvolt = <5000000>;
142 regulator-max-microvolt = <500 142 regulator-max-microvolt = <5000000>;
143 regulator-always-on; 143 regulator-always-on;
144 }; 144 };
145 145
146 reg_3p3v: regulator-3p3v { 146 reg_3p3v: regulator-3p3v {
147 compatible = "regulator-fixed" 147 compatible = "regulator-fixed";
148 regulator-name = "3P3V"; 148 regulator-name = "3P3V";
149 regulator-min-microvolt = <330 149 regulator-min-microvolt = <3300000>;
150 regulator-max-microvolt = <330 150 regulator-max-microvolt = <3300000>;
151 regulator-always-on; 151 regulator-always-on;
152 }; 152 };
153 153
154 reg_2p5v: regulator-2p5v { 154 reg_2p5v: regulator-2p5v {
155 compatible = "regulator-fixed" 155 compatible = "regulator-fixed";
156 regulator-name = "2P5V"; 156 regulator-name = "2P5V";
157 regulator-min-microvolt = <250 157 regulator-min-microvolt = <2500000>;
158 regulator-max-microvolt = <250 158 regulator-max-microvolt = <2500000>;
159 regulator-always-on; 159 regulator-always-on;
160 }; 160 };
161 161
162 reg_usb_h1_vbus: regulator-usb-h1-vbus 162 reg_usb_h1_vbus: regulator-usb-h1-vbus {
163 compatible = "regulator-fixed" 163 compatible = "regulator-fixed";
164 regulator-name = "usb_h1_vbus" 164 regulator-name = "usb_h1_vbus";
165 regulator-min-microvolt = <500 165 regulator-min-microvolt = <5000000>;
166 regulator-max-microvolt = <500 166 regulator-max-microvolt = <5000000>;
167 gpio = <&gpio3 30 0>; 167 gpio = <&gpio3 30 0>;
168 enable-active-high; 168 enable-active-high;
169 }; 169 };
170 170
171 reg_usb_otg_vbus: regulator-usb-otg-vb 171 reg_usb_otg_vbus: regulator-usb-otg-vbus {
172 compatible = "regulator-fixed" 172 compatible = "regulator-fixed";
173 regulator-name = "usb_otg_vbus 173 regulator-name = "usb_otg_vbus";
174 regulator-min-microvolt = <500 174 regulator-min-microvolt = <5000000>;
175 regulator-max-microvolt = <500 175 regulator-max-microvolt = <5000000>;
176 gpio = <&gpio4 15 GPIO_ACTIVE_ 176 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
177 enable-active-high; 177 enable-active-high;
178 }; 178 };
179 179
180 reg_12p0: regulator-12p0v { 180 reg_12p0: regulator-12p0v {
181 compatible = "regulator-fixed" 181 compatible = "regulator-fixed";
182 regulator-name = "12P0V"; 182 regulator-name = "12P0V";
183 regulator-min-microvolt = <120 183 regulator-min-microvolt = <12000000>;
184 regulator-max-microvolt = <120 184 regulator-max-microvolt = <12000000>;
185 gpio = <&gpio1 7 GPIO_ACTIVE_H 185 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
186 enable-active-high; 186 enable-active-high;
187 }; 187 };
188 188
189 sound { 189 sound {
190 compatible = "fsl,imx-audio-tl 190 compatible = "fsl,imx-audio-tlv320";
191 model = "imx-tlv320"; 191 model = "imx-tlv320";
192 ssi-controller = <&ssi1>; 192 ssi-controller = <&ssi1>;
193 audio-codec = <&tlv320aic3105> 193 audio-codec = <&tlv320aic3105>;
194 /* routing of sink, source */ 194 /* routing of sink, source */
195 audio-routing = 195 audio-routing =
196 /* TLV320 LINE1L pin < 196 /* TLV320 LINE1L pin <-> Mic Jack connector */
197 "LINE1L", "Mic Jack", 197 "LINE1L", "Mic Jack",
198 /* board Headphone Jac 198 /* board Headphone Jack <-> HPOUT */
199 "Headphone Jack", "HPL 199 "Headphone Jack", "HPLOUT",
200 "Headphone Jack", "HPR 200 "Headphone Jack", "HPROUT",
201 "Mic Jack", "Mic Bias" 201 "Mic Jack", "Mic Bias";
202 mux-int-port = <1>; 202 mux-int-port = <1>;
203 mux-ext-port = <6>; 203 mux-ext-port = <6>;
204 }; 204 };
205 }; 205 };
206 206
207 &audmux { 207 &audmux {
208 pinctrl-names = "default"; 208 pinctrl-names = "default";
209 pinctrl-0 = <&pinctrl_audmux>; 209 pinctrl-0 = <&pinctrl_audmux>;
210 status = "okay"; 210 status = "okay";
211 }; 211 };
212 212
213 &clks { 213 &clks {
214 assigned-clocks = <&clks IMX6QDL_CLK_L 214 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
215 <&clks IMX6QDL_CLK_L 215 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
216 assigned-clock-parents = <&clks IMX6QD 216 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
217 <&clks IMX6QD 217 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
218 }; 218 };
219 219
220 &fec { 220 &fec {
221 pinctrl-names = "default"; 221 pinctrl-names = "default";
222 pinctrl-0 = <&pinctrl_enet>; 222 pinctrl-0 = <&pinctrl_enet>;
223 phy-mode = "rgmii-id"; 223 phy-mode = "rgmii-id";
224 status = "okay"; 224 status = "okay";
225 }; 225 };
226 226
227 &i2c1 { 227 &i2c1 {
228 clock-frequency = <100000>; 228 clock-frequency = <100000>;
229 pinctrl-names = "default"; 229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_i2c1>; 230 pinctrl-0 = <&pinctrl_i2c1>;
231 status = "okay"; 231 status = "okay";
232 232
233 gsc: gsc@20 { 233 gsc: gsc@20 {
234 compatible = "gw,gsc"; 234 compatible = "gw,gsc";
235 reg = <0x20>; 235 reg = <0x20>;
236 interrupt-parent = <&gpio1>; 236 interrupt-parent = <&gpio1>;
237 interrupts = <4 IRQ_TYPE_LEVEL 237 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
238 interrupt-controller; 238 interrupt-controller;
239 #interrupt-cells = <1>; 239 #interrupt-cells = <1>;
240 #size-cells = <0>; 240 #size-cells = <0>;
241 241
242 adc { 242 adc {
243 compatible = "gw,gsc-a 243 compatible = "gw,gsc-adc";
244 #address-cells = <1>; 244 #address-cells = <1>;
245 #size-cells = <0>; 245 #size-cells = <0>;
246 246
247 channel@0 { 247 channel@0 {
248 gw,mode = <0>; 248 gw,mode = <0>;
249 reg = <0x00>; 249 reg = <0x00>;
250 label = "temp" 250 label = "temp";
251 }; 251 };
252 252
253 channel@2 { 253 channel@2 {
254 gw,mode = <1>; 254 gw,mode = <1>;
255 reg = <0x02>; 255 reg = <0x02>;
256 label = "vdd_v 256 label = "vdd_vin";
257 }; 257 };
258 258
259 channel@5 { 259 channel@5 {
260 gw,mode = <1>; 260 gw,mode = <1>;
261 reg = <0x05>; 261 reg = <0x05>;
262 label = "vdd_3 262 label = "vdd_3p3";
263 }; 263 };
264 264
265 channel@8 { 265 channel@8 {
266 gw,mode = <1>; 266 gw,mode = <1>;
267 reg = <0x08>; 267 reg = <0x08>;
268 label = "vdd_b 268 label = "vdd_bat";
269 }; 269 };
270 270
271 channel@b { 271 channel@b {
272 gw,mode = <1>; 272 gw,mode = <1>;
273 reg = <0x0b>; 273 reg = <0x0b>;
274 label = "vdd_5 274 label = "vdd_5p0";
275 }; 275 };
276 276
277 channel@e { 277 channel@e {
278 gw,mode = <1>; 278 gw,mode = <1>;
279 reg = <0xe>; 279 reg = <0xe>;
280 label = "vdd_a 280 label = "vdd_arm";
281 }; 281 };
282 282
283 channel@11 { 283 channel@11 {
284 gw,mode = <1>; 284 gw,mode = <1>;
285 reg = <0x11>; 285 reg = <0x11>;
286 label = "vdd_s 286 label = "vdd_soc";
287 }; 287 };
288 288
289 channel@14 { 289 channel@14 {
290 gw,mode = <1>; 290 gw,mode = <1>;
291 reg = <0x14>; 291 reg = <0x14>;
292 label = "vdd_3 292 label = "vdd_3p0";
293 }; 293 };
294 294
295 channel@17 { 295 channel@17 {
296 gw,mode = <1>; 296 gw,mode = <1>;
297 reg = <0x17>; 297 reg = <0x17>;
298 label = "vdd_1 298 label = "vdd_1p5";
299 }; 299 };
300 300
301 channel@1d { 301 channel@1d {
302 gw,mode = <1>; 302 gw,mode = <1>;
303 reg = <0x1d>; 303 reg = <0x1d>;
304 label = "vdd_1 304 label = "vdd_1p8";
305 }; 305 };
306 306
307 channel@20 { 307 channel@20 {
308 gw,mode = <1>; 308 gw,mode = <1>;
309 reg = <0x20>; 309 reg = <0x20>;
310 label = "vdd_a 310 label = "vdd_an1";
311 }; 311 };
312 312
313 channel@23 { 313 channel@23 {
314 gw,mode = <1>; 314 gw,mode = <1>;
315 reg = <0x23>; 315 reg = <0x23>;
316 label = "vdd_2 316 label = "vdd_2p5";
317 }; 317 };
318 }; 318 };
319 }; 319 };
320 320
321 gsc_gpio: gpio@23 { 321 gsc_gpio: gpio@23 {
322 compatible = "nxp,pca9555"; 322 compatible = "nxp,pca9555";
323 reg = <0x23>; 323 reg = <0x23>;
324 gpio-controller; 324 gpio-controller;
325 #gpio-cells = <2>; 325 #gpio-cells = <2>;
326 interrupt-parent = <&gsc>; 326 interrupt-parent = <&gsc>;
327 interrupts = <4>; 327 interrupts = <4>;
328 }; 328 };
329 329
330 eeprom1: eeprom@50 { 330 eeprom1: eeprom@50 {
331 compatible = "atmel,24c02"; 331 compatible = "atmel,24c02";
332 reg = <0x50>; 332 reg = <0x50>;
333 pagesize = <16>; 333 pagesize = <16>;
334 }; 334 };
335 335
336 eeprom2: eeprom@51 { 336 eeprom2: eeprom@51 {
337 compatible = "atmel,24c02"; 337 compatible = "atmel,24c02";
338 reg = <0x51>; 338 reg = <0x51>;
339 pagesize = <16>; 339 pagesize = <16>;
340 }; 340 };
341 341
342 eeprom3: eeprom@52 { 342 eeprom3: eeprom@52 {
343 compatible = "atmel,24c02"; 343 compatible = "atmel,24c02";
344 reg = <0x52>; 344 reg = <0x52>;
345 pagesize = <16>; 345 pagesize = <16>;
346 }; 346 };
347 347
348 eeprom4: eeprom@53 { 348 eeprom4: eeprom@53 {
349 compatible = "atmel,24c02"; 349 compatible = "atmel,24c02";
350 reg = <0x53>; 350 reg = <0x53>;
351 pagesize = <16>; 351 pagesize = <16>;
352 }; 352 };
353 353
354 dts1672: rtc@68 { 354 dts1672: rtc@68 {
355 compatible = "dallas,ds1672"; 355 compatible = "dallas,ds1672";
356 reg = <0x68>; 356 reg = <0x68>;
357 }; 357 };
358 }; 358 };
359 359
360 &i2c2 { 360 &i2c2 {
361 clock-frequency = <400000>; 361 clock-frequency = <400000>;
362 pinctrl-names = "default"; 362 pinctrl-names = "default";
363 pinctrl-0 = <&pinctrl_i2c2>; 363 pinctrl-0 = <&pinctrl_i2c2>;
364 status = "okay"; 364 status = "okay";
365 365
366 ltc3676: pmic@3c { 366 ltc3676: pmic@3c {
367 compatible = "lltc,ltc3676"; 367 compatible = "lltc,ltc3676";
368 reg = <0x3c>; 368 reg = <0x3c>;
369 interrupt-parent = <&gpio1>; 369 interrupt-parent = <&gpio1>;
370 interrupts = <8 IRQ_TYPE_EDGE_ 370 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
371 371
372 regulators { 372 regulators {
373 /* VDD_1P8 (1+R1/R2 = 373 /* VDD_1P8 (1+R1/R2 = 2.505): Aud/eMMC/microSD/Touch */
374 reg_1p8v: sw1 { 374 reg_1p8v: sw1 {
375 regulator-name 375 regulator-name = "vdd1p8";
376 regulator-min- 376 regulator-min-microvolt = <1033310>;
377 regulator-max- 377 regulator-max-microvolt = <2004000>;
378 lltc,fb-voltag 378 lltc,fb-voltage-divider = <301000 200000>;
379 regulator-ramp 379 regulator-ramp-delay = <7000>;
380 regulator-boot 380 regulator-boot-on;
381 regulator-alwa 381 regulator-always-on;
382 }; 382 };
383 383
384 /* VDD_DDR (1+R1/R2 = 384 /* VDD_DDR (1+R1/R2 = 2.105) */
385 reg_vdd_ddr: sw2 { 385 reg_vdd_ddr: sw2 {
386 regulator-name 386 regulator-name = "vddddr";
387 regulator-min- 387 regulator-min-microvolt = <868310>;
388 regulator-max- 388 regulator-max-microvolt = <1684000>;
389 lltc,fb-voltag 389 lltc,fb-voltage-divider = <221000 200000>;
390 regulator-ramp 390 regulator-ramp-delay = <7000>;
391 regulator-boot 391 regulator-boot-on;
392 regulator-alwa 392 regulator-always-on;
393 }; 393 };
394 394
395 /* VDD_ARM (1+R1/R2 = 395 /* VDD_ARM (1+R1/R2 = 1.635) */
396 reg_vdd_arm: sw3 { 396 reg_vdd_arm: sw3 {
397 regulator-name 397 regulator-name = "vddarm";
398 regulator-min- 398 regulator-min-microvolt = <674400>;
399 regulator-max- 399 regulator-max-microvolt = <1308000>;
400 lltc,fb-voltag 400 lltc,fb-voltage-divider = <127000 200000>;
401 regulator-ramp 401 regulator-ramp-delay = <7000>;
402 regulator-boot 402 regulator-boot-on;
403 regulator-alwa 403 regulator-always-on;
404 linux,phandle 404 linux,phandle = <®_vdd_arm>;
405 }; 405 };
406 406
407 /* VDD_SOC (1+R1/R2 = 407 /* VDD_SOC (1+R1/R2 = 1.635) */
408 reg_vdd_soc: sw4 { 408 reg_vdd_soc: sw4 {
409 regulator-name 409 regulator-name = "vddsoc";
410 regulator-min- 410 regulator-min-microvolt = <674400>;
411 regulator-max- 411 regulator-max-microvolt = <1308000>;
412 lltc,fb-voltag 412 lltc,fb-voltage-divider = <127000 200000>;
413 regulator-ramp 413 regulator-ramp-delay = <7000>;
414 regulator-boot 414 regulator-boot-on;
415 regulator-alwa 415 regulator-always-on;
416 linux,phandle 416 linux,phandle = <®_vdd_soc>;
417 }; 417 };
418 418
419 /* VDD_1P0 (1+R1/R2 = 419 /* VDD_1P0 (1+R1/R2 = 1.38): */
420 reg_1p0v: ldo2 { 420 reg_1p0v: ldo2 {
421 regulator-name 421 regulator-name = "vdd1p0";
422 regulator-min- 422 regulator-min-microvolt = <1002777>;
423 regulator-max- 423 regulator-max-microvolt = <1002777>;
424 lltc,fb-voltag 424 lltc,fb-voltage-divider = <100000 261000>;
425 regulator-boot 425 regulator-boot-on;
426 regulator-alwa 426 regulator-always-on;
427 }; 427 };
428 428
429 /* VDD_HIGH (1+R1/R2 = 429 /* VDD_HIGH (1+R1/R2 = 4.17) */
430 reg_3p0v: ldo4 { 430 reg_3p0v: ldo4 {
431 regulator-name 431 regulator-name = "vdd3p0";
432 regulator-min- 432 regulator-min-microvolt = <3023250>;
433 regulator-max- 433 regulator-max-microvolt = <3023250>;
434 lltc,fb-voltag 434 lltc,fb-voltage-divider = <634000 200000>;
435 regulator-boot 435 regulator-boot-on;
436 regulator-alwa 436 regulator-always-on;
437 }; 437 };
438 }; 438 };
439 }; 439 };
440 }; 440 };
441 441
442 &i2c3 { 442 &i2c3 {
443 clock-frequency = <400000>; 443 clock-frequency = <400000>;
444 pinctrl-names = "default"; 444 pinctrl-names = "default";
445 pinctrl-0 = <&pinctrl_i2c3>; 445 pinctrl-0 = <&pinctrl_i2c3>;
446 status = "okay"; 446 status = "okay";
447 447
448 tlv320aic3105: codec@18 { 448 tlv320aic3105: codec@18 {
449 compatible = "ti,tlv320aic3x"; 449 compatible = "ti,tlv320aic3x";
450 reg = <0x18>; 450 reg = <0x18>;
451 reset-gpios = <&gpio5 17 GPIO_ 451 reset-gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
452 clocks = <&clks IMX6QDL_CLK_CK 452 clocks = <&clks IMX6QDL_CLK_CKO>;
453 ai3x-micbias-vg = <2>; /* MICB 453 ai3x-micbias-vg = <2>; /* MICBIAS_2_5V */
454 /* Regulators */ 454 /* Regulators */
455 DRVDD-supply = <®_3p3v>; 455 DRVDD-supply = <®_3p3v>;
456 AVDD-supply = <®_3p3v>; 456 AVDD-supply = <®_3p3v>;
457 IOVDD-supply = <®_3p3v>; 457 IOVDD-supply = <®_3p3v>;
458 DVDD-supply = <®_1p8v>; 458 DVDD-supply = <®_1p8v>;
459 }; 459 };
460 460
461 accelerometer@1d { 461 accelerometer@1d {
462 compatible = "fsl,mma8451"; 462 compatible = "fsl,mma8451";
463 reg = <0x1d>; 463 reg = <0x1d>;
464 interrupt-parent = <&gpio7>; 464 interrupt-parent = <&gpio7>;
465 interrupts = <11 IRQ_TYPE_EDGE 465 interrupts = <11 IRQ_TYPE_EDGE_RISING>;
466 interrupt-names = "INT2"; 466 interrupt-names = "INT2";
467 }; 467 };
468 468
469 /* headphone detect */ 469 /* headphone detect */
470 ts3a227e@3b { 470 ts3a227e@3b {
471 compatible = "ti,ts3a227e"; 471 compatible = "ti,ts3a227e";
472 reg = <0x3b>; 472 reg = <0x3b>;
473 interrupt-parent = <&gpio5>; 473 interrupt-parent = <&gpio5>;
474 interrupts = <15 IRQ_TYPE_LEVE 474 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
475 ti,micbias = <4>; /* 2.5V micb 475 ti,micbias = <4>; /* 2.5V micbias */
476 }; 476 };
477 }; 477 };
478 478
479 &ldb { 479 &ldb {
480 status = "okay"; 480 status = "okay";
481 481
482 lvds-channel@0 { 482 lvds-channel@0 {
483 fsl,data-mapping = "spwg"; 483 fsl,data-mapping = "spwg";
484 fsl,data-width = <18>; 484 fsl,data-width = <18>;
485 status = "okay"; 485 status = "okay";
486 486
487 display-timings { 487 display-timings {
488 native-mode = <&timing 488 native-mode = <&timing0>;
489 timing0: timing-g101ev 489 timing0: timing-g101evn010 {
490 clock-frequenc 490 clock-frequency = <68930000>;
491 hactive = <128 491 hactive = <1280>;
492 vactive = <800 492 vactive = <800>;
493 hback-porch = 493 hback-porch = <220>;
494 hfront-porch = 494 hfront-porch = <40>;
495 vback-porch = 495 vback-porch = <21>;
496 vfront-porch = 496 vfront-porch = <7>;
497 hsync-len = <6 497 hsync-len = <60>;
498 vsync-len = <1 498 vsync-len = <10>;
499 }; 499 };
500 }; 500 };
501 }; 501 };
502 }; 502 };
503 503
504 &pwm1 { 504 &pwm1 {
505 pinctrl-names = "default"; 505 pinctrl-names = "default";
506 pinctrl-0 = <&pinctrl_pwm1>; 506 pinctrl-0 = <&pinctrl_pwm1>;
507 status = "okay"; 507 status = "okay";
508 }; 508 };
509 509
510 &ssi1 { 510 &ssi1 {
511 status = "okay"; 511 status = "okay";
512 }; 512 };
513 513
514 &uart1 { 514 &uart1 {
515 pinctrl-names = "default"; 515 pinctrl-names = "default";
516 pinctrl-0 = <&pinctrl_uart1>; 516 pinctrl-0 = <&pinctrl_uart1>;
517 status = "okay"; 517 status = "okay";
518 }; 518 };
519 519
520 &uart2 { 520 &uart2 {
521 pinctrl-names = "default"; 521 pinctrl-names = "default";
522 pinctrl-0 = <&pinctrl_uart2>; 522 pinctrl-0 = <&pinctrl_uart2>;
523 status = "okay"; 523 status = "okay";
524 }; 524 };
525 525
526 &usbotg { 526 &usbotg {
527 vbus-supply = <®_usb_otg_vbus>; 527 vbus-supply = <®_usb_otg_vbus>;
528 pinctrl-names = "default"; 528 pinctrl-names = "default";
529 pinctrl-0 = <&pinctrl_usbotg>; 529 pinctrl-0 = <&pinctrl_usbotg>;
530 disable-over-current; 530 disable-over-current;
531 status = "okay"; 531 status = "okay";
532 }; 532 };
533 533
534 &usbh1 { 534 &usbh1 {
535 vbus-supply = <®_usb_h1_vbus>; 535 vbus-supply = <®_usb_h1_vbus>;
536 status = "okay"; 536 status = "okay";
537 }; 537 };
538 538
539 &usdhc1 { 539 &usdhc1 {
540 pinctrl-names = "default"; 540 pinctrl-names = "default";
541 pinctrl-0 = <&pinctrl_usdhc1_200mhz>; 541 pinctrl-0 = <&pinctrl_usdhc1_200mhz>;
542 vmmc-supply = <®_3p3v>; 542 vmmc-supply = <®_3p3v>;
543 non-removable; 543 non-removable;
544 bus-width = <4>; 544 bus-width = <4>;
545 status = "okay"; 545 status = "okay";
546 }; 546 };
547 547
548 &usdhc2 { 548 &usdhc2 {
549 pinctrl-names = "default", "state_100m 549 pinctrl-names = "default", "state_100mhz", "state_200mhz";
550 pinctrl-0 = <&pinctrl_usdhc2>; 550 pinctrl-0 = <&pinctrl_usdhc2>;
551 pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 551 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
552 pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 552 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
553 cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW> 553 cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
554 vmmc-supply = <®_3p3v>; 554 vmmc-supply = <®_3p3v>;
555 max-frequency = <100000000>; 555 max-frequency = <100000000>;
556 status = "okay"; 556 status = "okay";
557 }; 557 };
558 558
559 &usdhc3 { 559 &usdhc3 {
560 pinctrl-names = "default", "state_100m 560 pinctrl-names = "default", "state_100mhz", "state_200mhz";
561 pinctrl-0 = <&pinctrl_usdhc3>; 561 pinctrl-0 = <&pinctrl_usdhc3>;
562 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 562 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
563 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 563 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
564 non-removable; 564 non-removable;
565 vmmc-supply = <®_3p3v>; 565 vmmc-supply = <®_3p3v>;
566 keep-power-in-suspend; 566 keep-power-in-suspend;
567 status = "okay"; 567 status = "okay";
568 }; 568 };
569 569
570 &wdog1 { 570 &wdog1 {
571 pinctrl-names = "default"; 571 pinctrl-names = "default";
572 pinctrl-0 = <&pinctrl_wdog>; 572 pinctrl-0 = <&pinctrl_wdog>;
573 fsl,ext-reset-output; 573 fsl,ext-reset-output;
574 }; 574 };
575 575
576 &iomuxc { 576 &iomuxc {
577 pinctrl_audmux: audmuxgrp { 577 pinctrl_audmux: audmuxgrp {
578 fsl,pins = < 578 fsl,pins = <
579 MX6QDL_PAD_DI0_PIN2__A 579 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x130b0
580 MX6QDL_PAD_DI0_PIN3__A 580 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x130b0
581 MX6QDL_PAD_DI0_PIN4__A 581 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x130b0
582 MX6QDL_PAD_DI0_PIN15__ 582 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x130b0
583 MX6QDL_PAD_GPIO_0__CCM 583 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* MCK */
584 >; 584 >;
585 }; 585 };
586 586
587 pinctrl_enet: enetgrp { 587 pinctrl_enet: enetgrp {
588 fsl,pins = < 588 fsl,pins = <
589 MX6QDL_PAD_RGMII_RXC__ 589 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
590 MX6QDL_PAD_RGMII_RD0__ 590 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
591 MX6QDL_PAD_RGMII_RD1__ 591 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
592 MX6QDL_PAD_RGMII_RD2__ 592 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
593 MX6QDL_PAD_RGMII_RD3__ 593 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
594 MX6QDL_PAD_RGMII_RX_CT 594 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
595 MX6QDL_PAD_RGMII_TXC__ 595 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
596 MX6QDL_PAD_RGMII_TD0__ 596 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
597 MX6QDL_PAD_RGMII_TD1__ 597 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
598 MX6QDL_PAD_RGMII_TD2__ 598 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
599 MX6QDL_PAD_RGMII_TD3__ 599 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
600 MX6QDL_PAD_RGMII_TX_CT 600 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
601 MX6QDL_PAD_ENET_REF_CL 601 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
602 MX6QDL_PAD_ENET_MDIO__ 602 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
603 MX6QDL_PAD_ENET_MDC__E 603 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
604 MX6QDL_PAD_ENET_TXD0__ 604 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */
605 MX6QDL_PAD_ENET_CRS_DV 605 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x4001b0b0 /* PHY_EN */
606 >; 606 >;
607 }; 607 };
608 608
609 pinctrl_gpio_leds: gpioledsgrp { 609 pinctrl_gpio_leds: gpioledsgrp {
610 fsl,pins = < 610 fsl,pins = <
611 MX6QDL_PAD_NANDF_CS1__ 611 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
612 >; 612 >;
613 }; 613 };
614 614
615 pinctrl_i2c1: i2c1grp { 615 pinctrl_i2c1: i2c1grp {
616 fsl,pins = < 616 fsl,pins = <
617 MX6QDL_PAD_EIM_D21__I2 617 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
618 MX6QDL_PAD_EIM_D28__I2 618 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
619 MX6QDL_PAD_GPIO_4__GPI 619 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 /* GSC_IRQ# */
620 >; 620 >;
621 }; 621 };
622 622
623 pinctrl_i2c2: i2c2grp { 623 pinctrl_i2c2: i2c2grp {
624 fsl,pins = < 624 fsl,pins = <
625 MX6QDL_PAD_KEY_COL3__I 625 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
626 MX6QDL_PAD_KEY_ROW3__I 626 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
627 MX6QDL_PAD_GPIO_8__GPI 627 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
628 >; 628 >;
629 }; 629 };
630 630
631 pinctrl_i2c3: i2c3grp { 631 pinctrl_i2c3: i2c3grp {
632 fsl,pins = < 632 fsl,pins = <
633 /* I2C3 */ 633 /* I2C3 */
634 MX6QDL_PAD_GPIO_3__I2C 634 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
635 MX6QDL_PAD_GPIO_6__I2C 635 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
636 636
637 /* Headphone Detect */ 637 /* Headphone Detect */
638 MX6QDL_PAD_DISP0_DAT21 638 MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x0001b0b0 /* HPDET_IRQ# */
639 MX6QDL_PAD_DISP0_DAT22 639 MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x0001b0b0 /* HPDET_MIC# */
640 640
641 /* Codec */ 641 /* Codec */
642 MX6QDL_PAD_DISP0_DAT23 642 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x0001b0b0 /* CODEC_RST# */
643 643
644 /* Touch Controller */ 644 /* Touch Controller */
645 MX6QDL_PAD_KEY_COL0__G 645 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x0001b0b0 /* TOUCH_IRQ# */
646 MX6QDL_PAD_KEY_COL1__G 646 MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x0001b0b0 /* TOUCH_RST */
647 647
648 /* Stow Sensor */ 648 /* Stow Sensor */
649 MX6QDL_PAD_GPIO_16__GP 649 MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x0001b0b0 /* ACCEL_IRQ2 */
650 MX6QDL_PAD_GPIO_18__GP 650 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x0001b0b0 /* ACCEL_IRQ1 */
651 >; 651 >;
652 }; 652 };
653 653
654 pinctrl_pwm1: pwm1grp { 654 pinctrl_pwm1: pwm1grp {
655 fsl,pins = < 655 fsl,pins = <
656 MX6QDL_PAD_GPIO_9__PWM 656 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
657 >; 657 >;
658 }; 658 };
659 659
660 pinctrl_uart1: uart1grp { 660 pinctrl_uart1: uart1grp {
661 fsl,pins = < 661 fsl,pins = <
662 MX6QDL_PAD_CSI0_DAT10_ 662 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
663 MX6QDL_PAD_CSI0_DAT11_ 663 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
664 MX6QDL_PAD_CSI0_DAT12_ 664 MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x1b0b1 /* TXEN */
665 >; 665 >;
666 }; 666 };
667 667
668 pinctrl_uart2: uart2grp { 668 pinctrl_uart2: uart2grp {
669 fsl,pins = < 669 fsl,pins = <
670 MX6QDL_PAD_SD4_DAT7__U 670 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
671 MX6QDL_PAD_SD4_DAT4__U 671 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
672 >; 672 >;
673 }; 673 };
674 674
675 pinctrl_usbotg: usbotggrp { 675 pinctrl_usbotg: usbotggrp {
676 fsl,pins = < 676 fsl,pins = <
677 MX6QDL_PAD_GPIO_1__USB 677 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
678 MX6QDL_PAD_KEY_ROW4__G 678 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x4001b0b0 /* PWR_EN */
679 MX6QDL_PAD_KEY_COL4__G 679 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
680 >; 680 >;
681 }; 681 };
682 682
683 pinctrl_usdhc1_200mhz: usdhc1-200mhz-g 683 pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp {
684 fsl,pins = < 684 fsl,pins = <
685 MX6QDL_PAD_NANDF_D3__G 685 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x4001b0b0 /* EMMY_EN */
686 MX6QDL_PAD_NANDF_D4__G 686 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x4001b0b0 /* EMMY_CFG1# */
687 MX6QDL_PAD_NANDF_D5__G 687 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x4001b0b0 /* EMMY_CFG2# */
688 MX6QDL_PAD_NANDF_D6__G 688 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x0001b0b0 /* EMMY_BTWAKE# */
689 MX6QDL_PAD_NANDF_D7__G 689 MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x0001b0b0 /* EMMY_WFWAKE# */
690 690
691 MX6QDL_PAD_SD1_CLK__SD 691 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
692 MX6QDL_PAD_SD1_CMD__SD 692 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x100f9
693 MX6QDL_PAD_SD1_DAT0__S 693 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
694 MX6QDL_PAD_SD1_DAT1__S 694 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
695 MX6QDL_PAD_SD1_DAT2__S 695 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
696 MX6QDL_PAD_SD1_DAT3__S 696 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
697 >; 697 >;
698 }; 698 };
699 699
700 pinctrl_usdhc2: usdhc2grp { 700 pinctrl_usdhc2: usdhc2grp {
701 fsl,pins = < 701 fsl,pins = <
702 MX6QDL_PAD_SD2_CMD__SD 702 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
703 MX6QDL_PAD_SD2_CLK__SD 703 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
704 MX6QDL_PAD_SD2_DAT0__S 704 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
705 MX6QDL_PAD_SD2_DAT1__S 705 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
706 MX6QDL_PAD_SD2_DAT2__S 706 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
707 MX6QDL_PAD_SD2_DAT3__S 707 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
708 MX6QDL_PAD_NANDF_CS0__ 708 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x17059 /* CD */
709 MX6QDL_PAD_KEY_ROW1__S 709 MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x17059
710 >; 710 >;
711 }; 711 };
712 712
713 pinctrl_usdhc2_100mhz: usdhc2-100mhz-g 713 pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp {
714 fsl,pins = < 714 fsl,pins = <
715 MX6QDL_PAD_SD2_CMD__SD 715 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
716 MX6QDL_PAD_SD2_CLK__SD 716 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
717 MX6QDL_PAD_SD2_DAT0__S 717 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
718 MX6QDL_PAD_SD2_DAT1__S 718 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
719 MX6QDL_PAD_SD2_DAT2__S 719 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
720 MX6QDL_PAD_SD2_DAT3__S 720 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
721 MX6QDL_PAD_NANDF_CS0__ 721 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x170b9 /* CD */
722 MX6QDL_PAD_KEY_ROW1__S 722 MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x170b9
723 >; 723 >;
724 }; 724 };
725 725
726 pinctrl_usdhc2_200mhz: usdhc2-200mhz-g 726 pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp {
727 fsl,pins = < 727 fsl,pins = <
728 MX6QDL_PAD_SD2_CMD__SD 728 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
729 MX6QDL_PAD_SD2_CLK__SD 729 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
730 MX6QDL_PAD_SD2_DAT0__S 730 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
731 MX6QDL_PAD_SD2_DAT1__S 731 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
732 MX6QDL_PAD_SD2_DAT2__S 732 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
733 MX6QDL_PAD_SD2_DAT3__S 733 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
734 MX6QDL_PAD_NANDF_CS0__ 734 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x170f9 /* CD */
735 MX6QDL_PAD_KEY_ROW1__S 735 MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x170f9
736 >; 736 >;
737 }; 737 };
738 738
739 pinctrl_usdhc3: usdhc3grp { 739 pinctrl_usdhc3: usdhc3grp {
740 fsl,pins = < 740 fsl,pins = <
741 MX6QDL_PAD_SD3_CMD__SD 741 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
742 MX6QDL_PAD_SD3_CLK__SD 742 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
743 MX6QDL_PAD_SD3_RST__SD 743 MX6QDL_PAD_SD3_RST__SD3_RESET 0x10059
744 MX6QDL_PAD_SD3_DAT0__S 744 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
745 MX6QDL_PAD_SD3_DAT1__S 745 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
746 MX6QDL_PAD_SD3_DAT2__S 746 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
747 MX6QDL_PAD_SD3_DAT3__S 747 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
748 MX6QDL_PAD_SD3_DAT4__S 748 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
749 MX6QDL_PAD_SD3_DAT5__S 749 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
750 MX6QDL_PAD_SD3_DAT6__S 750 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
751 MX6QDL_PAD_SD3_DAT7__S 751 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
752 >; 752 >;
753 }; 753 };
754 754
755 pinctrl_usdhc3_100mhz: usdhc3-100mhz-g 755 pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
756 fsl,pins = < 756 fsl,pins = <
757 MX6QDL_PAD_SD3_CMD__SD 757 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
758 MX6QDL_PAD_SD3_CLK__SD 758 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
759 MX6QDL_PAD_SD3_RST__SD 759 MX6QDL_PAD_SD3_RST__SD3_RESET 0x100b9
760 MX6QDL_PAD_SD3_DAT0__S 760 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
761 MX6QDL_PAD_SD3_DAT1__S 761 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
762 MX6QDL_PAD_SD3_DAT2__S 762 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
763 MX6QDL_PAD_SD3_DAT3__S 763 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
764 MX6QDL_PAD_SD3_DAT4__S 764 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9
765 MX6QDL_PAD_SD3_DAT5__S 765 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9
766 MX6QDL_PAD_SD3_DAT6__S 766 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9
767 MX6QDL_PAD_SD3_DAT7__S 767 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9
768 >; 768 >;
769 }; 769 };
770 770
771 pinctrl_usdhc3_200mhz: usdhc3-200mhz-g 771 pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
772 fsl,pins = < 772 fsl,pins = <
773 MX6QDL_PAD_SD3_CMD__SD 773 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
774 MX6QDL_PAD_SD3_CLK__SD 774 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
775 MX6QDL_PAD_SD3_RST__SD 775 MX6QDL_PAD_SD3_RST__SD3_RESET 0x100f9
776 MX6QDL_PAD_SD3_DAT0__S 776 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
777 MX6QDL_PAD_SD3_DAT1__S 777 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
778 MX6QDL_PAD_SD3_DAT2__S 778 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
779 MX6QDL_PAD_SD3_DAT3__S 779 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
780 MX6QDL_PAD_SD3_DAT4__S 780 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9
781 MX6QDL_PAD_SD3_DAT5__S 781 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9
782 MX6QDL_PAD_SD3_DAT6__S 782 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9
783 MX6QDL_PAD_SD3_DAT7__S 783 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9
784 >; 784 >;
785 }; 785 };
786 786
787 pinctrl_wdog: wdoggrp { 787 pinctrl_wdog: wdoggrp {
788 fsl,pins = < 788 fsl,pins = <
789 MX6QDL_PAD_DISP0_DAT8_ 789 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
790 >; 790 >;
791 }; 791 };
792 }; 792 };
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