1 // SPDX-License-Identifier: GPL-2.0-or-later 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* 2 /*
3 * Copyright 2013 Sascha Hauer, Pengutronix 3 * Copyright 2013 Sascha Hauer, Pengutronix
4 * Copyright 2013-2017 Markus Niebel <Markus.Ni 4 * Copyright 2013-2017 Markus Niebel <Markus.Niebel@tq-group.com>
5 */ 5 */
6 6
7 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/gpio/gpio.h>
8 8
9 &fec { 9 &fec {
10 /delete-property/ interrupts; 10 /delete-property/ interrupts;
11 interrupts-extended = <&gpio1 6 IRQ_TY 11 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
12 <&intc 0 119 IRQ 12 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
13 fsl,err006687-workaround-present; 13 fsl,err006687-workaround-present;
14 }; 14 };
15 15
16 &i2c1 { 16 &i2c1 {
17 pinctrl-names = "default", "gpio"; 17 pinctrl-names = "default", "gpio";
18 pinctrl-0 = <&pinctrl_i2c1>; 18 pinctrl-0 = <&pinctrl_i2c1>;
19 pinctrl-1 = <&pinctrl_i2c1_recovery>; 19 pinctrl-1 = <&pinctrl_i2c1_recovery>;
20 scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HI 20 scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
21 sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HI 21 sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
22 clock-frequency = <100000>; 22 clock-frequency = <100000>;
23 status = "okay"; 23 status = "okay";
24 24
25 pmic: pmic@8 { 25 pmic: pmic@8 {
26 compatible = "fsl,pfuze100"; 26 compatible = "fsl,pfuze100";
27 reg = <0x08>; 27 reg = <0x08>;
28 }; 28 };
29 29
30 temperature-sensor@48 { 30 temperature-sensor@48 {
31 compatible = "national,lm75a"; 31 compatible = "national,lm75a";
32 reg = <0x48>; 32 reg = <0x48>;
33 vs-supply = <®_3p3v>; 33 vs-supply = <®_3p3v>;
34 }; 34 };
35 35
36 eeprom@50 { 36 eeprom@50 {
37 compatible = "st,24c64", "atme 37 compatible = "st,24c64", "atmel,24c64";
38 reg = <0x50>; 38 reg = <0x50>;
39 pagesize = <32>; 39 pagesize = <32>;
40 vcc-supply = <®_3p3v>; 40 vcc-supply = <®_3p3v>;
41 }; 41 };
42 }; 42 };
43 43
44 &iomuxc { 44 &iomuxc {
45 /* 45 /*
46 * This pinmuxing is required for the 46 * This pinmuxing is required for the ERR006687 workaround. Board
47 * DTS files that enable the FEC contr 47 * DTS files that enable the FEC controller with
48 * fsl,err006687-workaround-present mu 48 * fsl,err006687-workaround-present must include this group.
49 */ 49 */
50 pinctrl_enet_fix: enetfixgrp { 50 pinctrl_enet_fix: enetfixgrp {
51 fsl,pins = < 51 fsl,pins = <
52 /* ENET ping patch */ 52 /* ENET ping patch */
53 MX6QDL_PAD_GPIO_6__ENE 53 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
54 >; 54 >;
55 }; 55 };
56 }; 56 };
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