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TOMOYO Linux Cross Reference
Linux/scripts/dtc/include-prefixes/arm/nxp/imx/imx6qdl-vicut1-12inch.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm/nxp/imx/imx6qdl-vicut1-12inch.dtsi (Architecture i386) and /scripts/dtc/include-prefixes/arm/nxp/imx/imx6qdl-vicut1-12inch.dtsi (Architecture mips)


  1 // SPDX-License-Identifier: GPL-2.0-or-later O      1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2 /*                                                  2 /*
  3  * Copyright (c) 2021 Protonic Holland              3  * Copyright (c) 2021 Protonic Holland
  4  */                                                 4  */
  5                                                     5 
  6 / {                                                 6 / {
  7         gpio-keys {                                 7         gpio-keys {
  8                 compatible = "gpio-keys";           8                 compatible = "gpio-keys";
  9                 pinctrl-names = "default";          9                 pinctrl-names = "default";
 10                 pinctrl-0 = <&pinctrl_gpiokeys     10                 pinctrl-0 = <&pinctrl_gpiokeys>;
 11                 autorepeat;                        11                 autorepeat;
 12                                                    12 
 13                 power-button {                     13                 power-button {
 14                         label = "Power Button"     14                         label = "Power Button";
 15                         gpios = <&gpio2 23 GPI     15                         gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
 16                         linux,code = <KEY_POWE     16                         linux,code = <KEY_POWER>;
 17                         wakeup-source;             17                         wakeup-source;
 18                 };                                 18                 };
 19         };                                         19         };
 20                                                    20 
 21         panel {                                    21         panel {
 22                 compatible = "kyo,tcg121xglp";     22                 compatible = "kyo,tcg121xglp";
 23                 backlight = <&backlight_lcd>;      23                 backlight = <&backlight_lcd>;
 24                 power-supply = <&reg_3v3>;         24                 power-supply = <&reg_3v3>;
 25                                                    25 
 26                 port {                             26                 port {
 27                         panel_in: endpoint {       27                         panel_in: endpoint {
 28                                 remote-endpoin     28                                 remote-endpoint = <&lvds0_out>;
 29                         };                         29                         };
 30                 };                                 30                 };
 31         };                                         31         };
 32 };                                                 32 };
 33                                                    33 
 34 &fec {                                             34 &fec {
 35         pinctrl-names = "default";                 35         pinctrl-names = "default";
 36         pinctrl-0 = <&pinctrl_enet>;               36         pinctrl-0 = <&pinctrl_enet>;
 37         phy-mode = "rgmii-id";                     37         phy-mode = "rgmii-id";
 38         phy-handle = <&rgmii_phy>;                 38         phy-handle = <&rgmii_phy>;
 39         status = "okay";                           39         status = "okay";
 40                                                    40 
 41         mdio {                                     41         mdio {
 42                 #address-cells = <1>;              42                 #address-cells = <1>;
 43                 #size-cells = <0>;                 43                 #size-cells = <0>;
 44                                                    44 
 45                 /* Microchip KSZ9031RNX PHY */     45                 /* Microchip KSZ9031RNX PHY */
 46                 rgmii_phy: ethernet-phy@0 {        46                 rgmii_phy: ethernet-phy@0 {
 47                         reg = <0>;                 47                         reg = <0>;
 48                         interrupts-extended =      48                         interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>;
 49                         reset-gpios = <&gpio1      49                         reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
 50                         reset-assert-us = <100     50                         reset-assert-us = <10000>;
 51                         reset-deassert-us = <3     51                         reset-deassert-us = <300>;
 52                 };                                 52                 };
 53         };                                         53         };
 54 };                                                 54 };
 55                                                    55 
 56 &gpio1 {                                           56 &gpio1 {
 57         gpio-line-names =                          57         gpio-line-names =
 58                 "CAN1_TERM", "SD1_CD", "ITU656     58                 "CAN1_TERM", "SD1_CD", "ITU656_RESET", "CAM1_MIRROR",
 59                         "CAM2_MIRROR", "", "",     59                         "CAM2_MIRROR", "", "", "SMBALERT",
 60                 "DEBUG_0", "DEBUG_1", "", "",      60                 "DEBUG_0", "DEBUG_1", "", "", "", "", "", "",
 61                 "SD1_DATA0", "SD1_DATA1", "SD1     61                 "SD1_DATA0", "SD1_DATA1", "SD1_CMD", "SD1_DATA2", "SD1_CLK",
 62                         "SD1_DATA3", "ETH_MDIO     62                         "SD1_DATA3", "ETH_MDIO", "",
 63                 "", "ETH_RESET", "", "", "ETH_     63                 "", "ETH_RESET", "", "", "ETH_INT", "", "", "ETH_MDC";
 64 };                                                 64 };
 65                                                    65 
 66 &gpio4 {                                           66 &gpio4 {
 67         gpio-line-names =                          67         gpio-line-names =
 68                 "", "", "", "", "", "", "UART4     68                 "", "", "", "", "", "", "UART4_TXD", "UART4_RXD",
 69                 "UART5_TXD", "UART5_RXD", "CAN     69                 "UART5_TXD", "UART5_RXD", "CAN1_TX", "CAN1_RX", "CAN1_SR",
 70                         "CAN2_SR", "CAN2_TX",      70                         "CAN2_SR", "CAN2_TX", "CAN2_RX",
 71                 "", "", "DIP1_FB", "", "VCAM_E     71                 "", "", "DIP1_FB", "", "VCAM_EN", "ON1_CTRL", "ON2_CTRL",
 72                         "HITCH_IN_OUT",            72                         "HITCH_IN_OUT",
 73                 "LIGHT_ON", "", "", "CONTACT_I     73                 "LIGHT_ON", "", "", "CONTACT_IN", "BL_EN", "BL_PWM", "",
 74                         "ISB_LED";                 74                         "ISB_LED";
 75 };                                                 75 };
 76                                                    76 
 77 &gpio5 {                                           77 &gpio5 {
 78         gpio-line-names =                          78         gpio-line-names =
 79                 "", "", "", "", "", "", "", ""     79                 "", "", "", "", "", "", "", "",
 80                 "", "", "", "", "", "", "", ""     80                 "", "", "", "", "", "", "", "",
 81                 "", "", "ITU656_CLK", "I2S_MCL     81                 "", "", "ITU656_CLK", "I2S_MCLK", "ITU656_PDN", "AUDIO_RESET",
 82                         "I2S_BITCLK", "I2S_DOU     82                         "I2S_BITCLK", "I2S_DOUT",
 83                 "I2S_LRCLK", "I2S_DIN", "I2C1_     83                 "I2S_LRCLK", "I2S_DIN", "I2C1_SDA", "I2C1_SCL", "YACO_AUX_RX",
 84                         "YACO_AUX_TX", "ITU656     84                         "YACO_AUX_TX", "ITU656_D0", "ITU656_D1";
 85 };                                                 85 };
 86                                                    86 
 87 &gpio6 {                                           87 &gpio6 {
 88         gpio-line-names =                          88         gpio-line-names =
 89                 "ITU656_D2", "ITU656_D3", "ITU     89                 "ITU656_D2", "ITU656_D3", "ITU656_D4", "ITU656_D5",
 90                         "ITU656_D6", "ITU656_D     90                         "ITU656_D6", "ITU656_D7", "", "",
 91                 "", "", "", "", "", "", "", ""     91                 "", "", "", "", "", "", "", "",
 92                 "", "", "", "RGMII_TXC", "RGMI     92                 "", "", "", "RGMII_TXC", "RGMII_TD0", "RGMII_TD1", "RGMII_TD2",
 93                         "RGMII_TD3",               93                         "RGMII_TD3",
 94                 "RGMII_RX_CTL", "RGMII_RD0", "     94                 "RGMII_RX_CTL", "RGMII_RD0", "RGMII_TX_CTL", "RGMII_RD1",
 95                         "RGMII_RD2", "RGMII_RD     95                         "RGMII_RD2", "RGMII_RD3", "", "";
 96 };                                                 96 };
 97                                                    97 
 98 &iomuxc {                                          98 &iomuxc {
 99         pinctrl_enet: enetgrp {                    99         pinctrl_enet: enetgrp {
100                 fsl,pins = <                      100                 fsl,pins = <
101                         MX6QDL_PAD_RGMII_RXC__    101                         MX6QDL_PAD_RGMII_RXC__RGMII_RXC                 0x1b030
102                         MX6QDL_PAD_RGMII_RD0__    102                         MX6QDL_PAD_RGMII_RD0__RGMII_RD0                 0x1b030
103                         MX6QDL_PAD_RGMII_RD1__    103                         MX6QDL_PAD_RGMII_RD1__RGMII_RD1                 0x1b030
104                         MX6QDL_PAD_RGMII_RD2__    104                         MX6QDL_PAD_RGMII_RD2__RGMII_RD2                 0x1b030
105                         MX6QDL_PAD_RGMII_RD3__    105                         MX6QDL_PAD_RGMII_RD3__RGMII_RD3                 0x1b030
106                         MX6QDL_PAD_RGMII_RX_CT    106                         MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL           0x1b030
107                         MX6QDL_PAD_RGMII_TXC__    107                         MX6QDL_PAD_RGMII_TXC__RGMII_TXC                 0x10030
108                         MX6QDL_PAD_RGMII_TD0__    108                         MX6QDL_PAD_RGMII_TD0__RGMII_TD0                 0x10030
109                         MX6QDL_PAD_RGMII_TD1__    109                         MX6QDL_PAD_RGMII_TD1__RGMII_TD1                 0x10030
110                         MX6QDL_PAD_RGMII_TD2__    110                         MX6QDL_PAD_RGMII_TD2__RGMII_TD2                 0x10030
111                         MX6QDL_PAD_RGMII_TD3__    111                         MX6QDL_PAD_RGMII_TD3__RGMII_TD3                 0x10030
112                         MX6QDL_PAD_RGMII_TX_CT    112                         MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL           0x10030
113                         MX6QDL_PAD_ENET_REF_CL    113                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK            0x10030
114                         MX6QDL_PAD_ENET_MDIO__    114                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO                 0x10030
115                         MX6QDL_PAD_ENET_MDC__E    115                         MX6QDL_PAD_ENET_MDC__ENET_MDC                   0x10030
116                         /* Phy reset */           116                         /* Phy reset */
117                         MX6QDL_PAD_ENET_CRS_DV    117                         MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25              0x1b0b0
118                         MX6QDL_PAD_ENET_TX_EN_    118                         MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28               0x1b0b1
119                 >;                                119                 >;
120         };                                        120         };
121                                                   121 
122         pinctrl_gpiokeys: gpiokeygrp {            122         pinctrl_gpiokeys: gpiokeygrp {
123                 fsl,pins = <                      123                 fsl,pins = <
124                         /* nON_SWITCH */          124                         /* nON_SWITCH */
125                         MX6QDL_PAD_EIM_CS0__GP    125                         MX6QDL_PAD_EIM_CS0__GPIO2_IO23                  0x1b0b0
126                 >;                                126                 >;
127         };                                        127         };
128 };                                                128 };
                                                      

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