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TOMOYO Linux Cross Reference
Linux/scripts/dtc/include-prefixes/arm/nxp/imx/imx6qdl-wandboard.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm/nxp/imx/imx6qdl-wandboard.dtsi (Architecture i386) and /scripts/dtc/include-prefixes/arm/nxp/imx/imx6qdl-wandboard.dtsi (Architecture sparc64)


  1 // SPDX-License-Identifier: GPL-2.0                 1 // SPDX-License-Identifier: GPL-2.0
  2 /*                                                  2 /*
  3  * Copyright 2013 Freescale Semiconductor, Inc      3  * Copyright 2013 Freescale Semiconductor, Inc.
  4  *                                                  4  *
  5  * Author: Fabio Estevam <fabio.estevam@freesca      5  * Author: Fabio Estevam <fabio.estevam@freescale.com>
  6  */                                                 6  */
  7                                                     7 
  8 #include <dt-bindings/gpio/gpio.h>                  8 #include <dt-bindings/gpio/gpio.h>
  9                                                     9 
 10 / {                                                10 / {
 11         chosen {                                   11         chosen {
 12                 stdout-path = &uart1;              12                 stdout-path = &uart1;
 13         };                                         13         };
 14                                                    14 
 15         sound {                                    15         sound {
 16                 compatible = "fsl,imx6-wandboa     16                 compatible = "fsl,imx6-wandboard-sgtl5000",
 17                              "fsl,imx-audio-sg     17                              "fsl,imx-audio-sgtl5000";
 18                 model = "imx6-wandboard-sgtl50     18                 model = "imx6-wandboard-sgtl5000";
 19                 ssi-controller = <&ssi1>;          19                 ssi-controller = <&ssi1>;
 20                 audio-codec = <&codec>;            20                 audio-codec = <&codec>;
 21                 audio-routing =                    21                 audio-routing =
 22                         "MIC_IN", "Mic Jack",      22                         "MIC_IN", "Mic Jack",
 23                         "Mic Jack", "Mic Bias"     23                         "Mic Jack", "Mic Bias",
 24                         "Headphone Jack", "HP_     24                         "Headphone Jack", "HP_OUT";
 25                 mux-int-port = <1>;                25                 mux-int-port = <1>;
 26                 mux-ext-port = <3>;                26                 mux-ext-port = <3>;
 27         };                                         27         };
 28                                                    28 
 29         spdif_out: spdif-out {                     29         spdif_out: spdif-out {
 30                 compatible = "linux,spdif-dit"     30                 compatible = "linux,spdif-dit";
 31                 #sound-dai-cells = <0>;            31                 #sound-dai-cells = <0>;
 32         };                                         32         };
 33                                                    33 
 34         sound-spdif {                              34         sound-spdif {
 35                 compatible = "fsl,imx-audio-sp     35                 compatible = "fsl,imx-audio-spdif";
 36                 model = "imx-spdif";               36                 model = "imx-spdif";
 37                 audio-cpu = <&spdif>;              37                 audio-cpu = <&spdif>;
 38                 audio-codec = <&spdif_out>;        38                 audio-codec = <&spdif_out>;
 39         };                                         39         };
 40                                                    40 
 41         reg_1p5v: regulator-1p5v {                 41         reg_1p5v: regulator-1p5v {
 42                 compatible = "regulator-fixed"     42                 compatible = "regulator-fixed";
 43                 regulator-name = "1P5V";           43                 regulator-name = "1P5V";
 44                 regulator-min-microvolt = <150     44                 regulator-min-microvolt = <1500000>;
 45                 regulator-max-microvolt = <150     45                 regulator-max-microvolt = <1500000>;
 46                 regulator-always-on;               46                 regulator-always-on;
 47         };                                         47         };
 48                                                    48 
 49         reg_1p8v: regulator-1p8v {                 49         reg_1p8v: regulator-1p8v {
 50                 compatible = "regulator-fixed"     50                 compatible = "regulator-fixed";
 51                 regulator-name = "1P8V";           51                 regulator-name = "1P8V";
 52                 regulator-min-microvolt = <180     52                 regulator-min-microvolt = <1800000>;
 53                 regulator-max-microvolt = <180     53                 regulator-max-microvolt = <1800000>;
 54                 regulator-always-on;               54                 regulator-always-on;
 55         };                                         55         };
 56                                                    56 
 57         reg_2p8v: regulator-2p8v {                 57         reg_2p8v: regulator-2p8v {
 58                 compatible = "regulator-fixed"     58                 compatible = "regulator-fixed";
 59                 regulator-name = "2P8V";           59                 regulator-name = "2P8V";
 60                 regulator-min-microvolt = <280     60                 regulator-min-microvolt = <2800000>;
 61                 regulator-max-microvolt = <280     61                 regulator-max-microvolt = <2800000>;
 62                 regulator-always-on;               62                 regulator-always-on;
 63         };                                         63         };
 64                                                    64 
 65         reg_2p5v: regulator-2p5v {                 65         reg_2p5v: regulator-2p5v {
 66                 compatible = "regulator-fixed"     66                 compatible = "regulator-fixed";
 67                 regulator-name = "2P5V";           67                 regulator-name = "2P5V";
 68                 regulator-min-microvolt = <250     68                 regulator-min-microvolt = <2500000>;
 69                 regulator-max-microvolt = <250     69                 regulator-max-microvolt = <2500000>;
 70                 regulator-always-on;               70                 regulator-always-on;
 71         };                                         71         };
 72                                                    72 
 73         reg_3p3v: regulator-3p3v {                 73         reg_3p3v: regulator-3p3v {
 74                 compatible = "regulator-fixed"     74                 compatible = "regulator-fixed";
 75                 regulator-name = "3P3V";           75                 regulator-name = "3P3V";
 76                 regulator-min-microvolt = <330     76                 regulator-min-microvolt = <3300000>;
 77                 regulator-max-microvolt = <330     77                 regulator-max-microvolt = <3300000>;
 78                 regulator-always-on;               78                 regulator-always-on;
 79         };                                         79         };
 80                                                    80 
 81         reg_usb_otg_vbus: regulator-usbotgvbus     81         reg_usb_otg_vbus: regulator-usbotgvbus {
 82                 compatible = "regulator-fixed"     82                 compatible = "regulator-fixed";
 83                 regulator-name = "usb_otg_vbus     83                 regulator-name = "usb_otg_vbus";
 84                 regulator-min-microvolt = <500     84                 regulator-min-microvolt = <5000000>;
 85                 regulator-max-microvolt = <500     85                 regulator-max-microvolt = <5000000>;
 86                 pinctrl-names = "default";         86                 pinctrl-names = "default";
 87                 pinctrl-0 = <&pinctrl_usbotgvb     87                 pinctrl-0 = <&pinctrl_usbotgvbus>;
 88                 gpio = <&gpio3 22 GPIO_ACTIVE_     88                 gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
 89         };                                         89         };
 90 };                                                 90 };
 91                                                    91 
 92 &audmux {                                          92 &audmux {
 93         pinctrl-names = "default";                 93         pinctrl-names = "default";
 94         pinctrl-0 = <&pinctrl_audmux>;             94         pinctrl-0 = <&pinctrl_audmux>;
 95         status = "okay";                           95         status = "okay";
 96 };                                                 96 };
 97                                                    97 
 98 &hdmi {                                            98 &hdmi {
 99         ddc-i2c-bus = <&i2c1>;                     99         ddc-i2c-bus = <&i2c1>;
100         status = "okay";                          100         status = "okay";
101 };                                                101 };
102                                                   102 
103 &i2c1 {                                           103 &i2c1 {
104         clock-frequency = <100000>;               104         clock-frequency = <100000>;
105         pinctrl-names = "default", "gpio";        105         pinctrl-names = "default", "gpio";
106         pinctrl-0 = <&pinctrl_i2c1>;              106         pinctrl-0 = <&pinctrl_i2c1>;
107         pinctrl-1 = <&pinctrl_i2c1_gpio>;         107         pinctrl-1 = <&pinctrl_i2c1_gpio>;
108         scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HI    108         scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
109         sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HI    109         sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
110         status = "okay";                          110         status = "okay";
111 };                                                111 };
112                                                   112 
113 &i2c2 {                                           113 &i2c2 {
114         clock-frequency = <100000>;               114         clock-frequency = <100000>;
115         pinctrl-names = "default", "gpio";        115         pinctrl-names = "default", "gpio";
116         pinctrl-0 = <&pinctrl_i2c2>;              116         pinctrl-0 = <&pinctrl_i2c2>;
117         pinctrl-1 = <&pinctrl_i2c2_gpio>;         117         pinctrl-1 = <&pinctrl_i2c2_gpio>;
118         scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HI    118         scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
119         sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HI    119         sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
120         status = "okay";                          120         status = "okay";
121                                                   121 
122         codec: sgtl5000@a {                       122         codec: sgtl5000@a {
123                 pinctrl-names = "default";        123                 pinctrl-names = "default";
124                 pinctrl-0 = <&pinctrl_mclk>;      124                 pinctrl-0 = <&pinctrl_mclk>;
125                 compatible = "fsl,sgtl5000";      125                 compatible = "fsl,sgtl5000";
126                 reg = <0x0a>;                     126                 reg = <0x0a>;
127                 #sound-dai-cells = <0>;           127                 #sound-dai-cells = <0>;
128                 clocks = <&clks IMX6QDL_CLK_CK    128                 clocks = <&clks IMX6QDL_CLK_CKO>;
129                 VDDA-supply = <&reg_2p5v>;        129                 VDDA-supply = <&reg_2p5v>;
130                 VDDIO-supply = <&reg_3p3v>;       130                 VDDIO-supply = <&reg_3p3v>;
131                 lrclk-strength = <3>;             131                 lrclk-strength = <3>;
132         };                                        132         };
133                                                   133 
134         camera@3c {                               134         camera@3c {
135                 compatible = "ovti,ov5645";       135                 compatible = "ovti,ov5645";
136                 pinctrl-names = "default";        136                 pinctrl-names = "default";
137                 pinctrl-0 = <&pinctrl_ov5645>;    137                 pinctrl-0 = <&pinctrl_ov5645>;
138                 reg = <0x3c>;                     138                 reg = <0x3c>;
139                 clocks = <&clks IMX6QDL_CLK_CK    139                 clocks = <&clks IMX6QDL_CLK_CKO2>;
140                 clock-frequency = <24000000>;     140                 clock-frequency = <24000000>;
141                 vdddo-supply = <&reg_1p8v>;       141                 vdddo-supply = <&reg_1p8v>;
142                 vdda-supply = <&reg_2p8v>;        142                 vdda-supply = <&reg_2p8v>;
143                 vddd-supply = <&reg_1p5v>;        143                 vddd-supply = <&reg_1p5v>;
144                 enable-gpios = <&gpio1 6 GPIO_    144                 enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
145                 reset-gpios = <&gpio4 14 GPIO_    145                 reset-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
146                                                   146 
147                 port {                            147                 port {
148                         ov5645_to_mipi_csi2: e    148                         ov5645_to_mipi_csi2: endpoint {
149                                 remote-endpoin    149                                 remote-endpoint = <&mipi_csi2_in>;
150                                 clock-lanes =     150                                 clock-lanes = <0>;
151                                 data-lanes = <    151                                 data-lanes = <1 2>;
152                         };                        152                         };
153                 };                                153                 };
154         };                                        154         };
155 };                                                155 };
156                                                   156 
157 &iomuxc {                                         157 &iomuxc {
158         pinctrl-names = "default";                158         pinctrl-names = "default";
159                                                   159 
160         imx6qdl-wandboard {                       160         imx6qdl-wandboard {
161                                                   161 
162                 pinctrl_audmux: audmuxgrp {       162                 pinctrl_audmux: audmuxgrp {
163                         fsl,pins = <              163                         fsl,pins = <
164                                 MX6QDL_PAD_CSI    164                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
165                                 MX6QDL_PAD_CSI    165                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
166                                 MX6QDL_PAD_CSI    166                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
167                                 MX6QDL_PAD_CSI    167                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
168                         >;                        168                         >;
169                 };                                169                 };
170                                                   170 
171                 pinctrl_enet: enetgrp {           171                 pinctrl_enet: enetgrp {
172                         fsl,pins = <              172                         fsl,pins = <
173                                 MX6QDL_PAD_ENE    173                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
174                                 MX6QDL_PAD_ENE    174                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
175                                 MX6QDL_PAD_RGM    175                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
176                                 MX6QDL_PAD_RGM    176                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
177                                 MX6QDL_PAD_RGM    177                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
178                                 MX6QDL_PAD_RGM    178                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
179                                 MX6QDL_PAD_RGM    179                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
180                                 MX6QDL_PAD_RGM    180                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
181                                 MX6QDL_PAD_ENE    181                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
182                                 MX6QDL_PAD_RGM    182                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
183                                 MX6QDL_PAD_RGM    183                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
184                                 MX6QDL_PAD_RGM    184                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
185                                 MX6QDL_PAD_RGM    185                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
186                                 MX6QDL_PAD_RGM    186                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
187                                 MX6QDL_PAD_RGM    187                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
188                                 MX6QDL_PAD_GPI    188                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
189                         >;                        189                         >;
190                 };                                190                 };
191                                                   191 
192                 pinctrl_i2c1: i2c1grp {           192                 pinctrl_i2c1: i2c1grp {
193                         fsl,pins = <              193                         fsl,pins = <
194                                 MX6QDL_PAD_EIM    194                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
195                                 MX6QDL_PAD_EIM    195                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
196                         >;                        196                         >;
197                 };                                197                 };
198                                                   198 
199                 pinctrl_i2c1_gpio: i2c1gpiogrp    199                 pinctrl_i2c1_gpio: i2c1gpiogrp {
200                         fsl,pins = <              200                         fsl,pins = <
201                                 MX6QDL_PAD_EIM    201                                 MX6QDL_PAD_EIM_D21__GPIO3_IO21          0x4001b8b0
202                                 MX6QDL_PAD_EIM    202                                 MX6QDL_PAD_EIM_D28__GPIO3_IO28          0x4001b8b0
203                         >;                        203                         >;
204                 };                                204                 };
205                                                   205 
206                 pinctrl_i2c2: i2c2grp {           206                 pinctrl_i2c2: i2c2grp {
207                         fsl,pins = <              207                         fsl,pins = <
208                                 MX6QDL_PAD_KEY    208                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
209                                 MX6QDL_PAD_KEY    209                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
210                         >;                        210                         >;
211                 };                                211                 };
212                                                   212 
213                 pinctrl_i2c2_gpio: i2c2gpiogrp    213                 pinctrl_i2c2_gpio: i2c2gpiogrp {
214                         fsl,pins = <              214                         fsl,pins = <
215                                 MX6QDL_PAD_KEY    215                                 MX6QDL_PAD_KEY_COL3__GPIO4_IO12         0x4001b8b0
216                                 MX6QDL_PAD_KEY    216                                 MX6QDL_PAD_KEY_ROW3__GPIO4_IO13         0x4001b8b0
217                         >;                        217                         >;
218                 };                                218                 };
219                                                   219 
220                 pinctrl_mclk: mclkgrp {           220                 pinctrl_mclk: mclkgrp {
221                         fsl,pins = <              221                         fsl,pins = <
222                                 MX6QDL_PAD_GPI    222                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x130b0
223                         >;                        223                         >;
224                 };                                224                 };
225                                                   225 
226                 pinctrl_ov5645: ov5645grp {       226                 pinctrl_ov5645: ov5645grp {
227                         fsl,pins = <              227                         fsl,pins = <
228                                 MX6QDL_PAD_GPI    228                                 MX6QDL_PAD_GPIO_3__CCM_CLKO2            0x000b0
229                                 MX6QDL_PAD_GPI    229                                 MX6QDL_PAD_GPIO_6__GPIO1_IO06           0x1b0b0
230                                 MX6QDL_PAD_KEY    230                                 MX6QDL_PAD_KEY_COL4__GPIO4_IO14         0x1b0b0
231                         >;                        231                         >;
232                 };                                232                 };
233                                                   233 
234                 pinctrl_spdif: spdifgrp {         234                 pinctrl_spdif: spdifgrp {
235                         fsl,pins = <              235                         fsl,pins = <
236                                 MX6QDL_PAD_ENE    236                                 MX6QDL_PAD_ENET_RXD0__SPDIF_OUT         0x1b0b0
237                         >;                        237                         >;
238                 };                                238                 };
239                                                   239 
240                 pinctrl_uart1: uart1grp {         240                 pinctrl_uart1: uart1grp {
241                         fsl,pins = <              241                         fsl,pins = <
242                                 MX6QDL_PAD_CSI    242                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
243                                 MX6QDL_PAD_CSI    243                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
244                         >;                        244                         >;
245                 };                                245                 };
246                                                   246 
247                 pinctrl_uart3: uart3grp {         247                 pinctrl_uart3: uart3grp {
248                         fsl,pins = <              248                         fsl,pins = <
249                                 MX6QDL_PAD_EIM    249                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
250                                 MX6QDL_PAD_EIM    250                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
251                                 MX6QDL_PAD_EIM    251                                 MX6QDL_PAD_EIM_D23__UART3_CTS_B         0x1b0b1
252                                 MX6QDL_PAD_EIM    252                                 MX6QDL_PAD_EIM_EB3__UART3_RTS_B         0x1b0b1
253                         >;                        253                         >;
254                 };                                254                 };
255                                                   255 
256                 pinctrl_usbotg: usbotggrp {       256                 pinctrl_usbotg: usbotggrp {
257                         fsl,pins = <              257                         fsl,pins = <
258                                 MX6QDL_PAD_GPI    258                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
259                         >;                        259                         >;
260                 };                                260                 };
261                                                   261 
262                 pinctrl_usbotgvbus: usbotgvbus    262                 pinctrl_usbotgvbus: usbotgvbusgrp {
263                         fsl,pins = <              263                         fsl,pins = <
264                                 MX6QDL_PAD_EIM    264                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x130b0
265                         >;                        265                         >;
266                 };                                266                 };
267                                                   267 
268                 pinctrl_usdhc1: usdhc1grp {       268                 pinctrl_usdhc1: usdhc1grp {
269                         fsl,pins = <              269                         fsl,pins = <
270                                 MX6QDL_PAD_SD1    270                                 MX6QDL_PAD_SD1_CMD__SD1_CMD             0x17059
271                                 MX6QDL_PAD_SD1    271                                 MX6QDL_PAD_SD1_CLK__SD1_CLK             0x10059
272                                 MX6QDL_PAD_SD1    272                                 MX6QDL_PAD_SD1_DAT0__SD1_DATA0          0x17059
273                                 MX6QDL_PAD_SD1    273                                 MX6QDL_PAD_SD1_DAT1__SD1_DATA1          0x17059
274                                 MX6QDL_PAD_SD1    274                                 MX6QDL_PAD_SD1_DAT2__SD1_DATA2          0x17059
275                                 MX6QDL_PAD_SD1    275                                 MX6QDL_PAD_SD1_DAT3__SD1_DATA3          0x17059
276                         >;                        276                         >;
277                 };                                277                 };
278                                                   278 
279                 pinctrl_usdhc2: usdhc2grp {       279                 pinctrl_usdhc2: usdhc2grp {
280                         fsl,pins = <              280                         fsl,pins = <
281                                 MX6QDL_PAD_SD2    281                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
282                                 MX6QDL_PAD_SD2    282                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
283                                 MX6QDL_PAD_SD2    283                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
284                                 MX6QDL_PAD_SD2    284                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
285                                 MX6QDL_PAD_SD2    285                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
286                                 MX6QDL_PAD_SD2    286                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
287                         >;                        287                         >;
288                 };                                288                 };
289                                                   289 
290                 pinctrl_usdhc3: usdhc3grp {       290                 pinctrl_usdhc3: usdhc3grp {
291                         fsl,pins = <              291                         fsl,pins = <
292                                 MX6QDL_PAD_SD3    292                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
293                                 MX6QDL_PAD_SD3    293                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
294                                 MX6QDL_PAD_SD3    294                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
295                                 MX6QDL_PAD_SD3    295                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
296                                 MX6QDL_PAD_SD3    296                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
297                                 MX6QDL_PAD_SD3    297                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
298                         >;                        298                         >;
299                 };                                299                 };
300         };                                        300         };
301 };                                                301 };
302                                                   302 
303 &fec {                                            303 &fec {
304         pinctrl-names = "default";                304         pinctrl-names = "default";
305         pinctrl-0 = <&pinctrl_enet>;              305         pinctrl-0 = <&pinctrl_enet>;
306         phy-mode = "rgmii-id";                    306         phy-mode = "rgmii-id";
307         phy-handle = <&ethphy>;                   307         phy-handle = <&ethphy>;
308         phy-reset-gpios = <&gpio3 29 GPIO_ACTI    308         phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
309         status = "okay";                          309         status = "okay";
310                                                   310 
311         mdio {                                    311         mdio {
312                 #address-cells = <1>;             312                 #address-cells = <1>;
313                 #size-cells = <0>;                313                 #size-cells = <0>;
314                                                   314 
315                 ethphy: ethernet-phy@1 {          315                 ethphy: ethernet-phy@1 {
316                         reg = <1>;                316                         reg = <1>;
317                         qca,clk-out-frequency     317                         qca,clk-out-frequency = <125000000>;
318                 };                                318                 };
319         };                                        319         };
320 };                                                320 };
321                                                   321 
322 &mipi_csi {                                       322 &mipi_csi {
323         status = "okay";                          323         status = "okay";
324                                                   324 
325         port@0 {                                  325         port@0 {
326                 reg = <0>;                        326                 reg = <0>;
327                                                   327 
328                 mipi_csi2_in: endpoint {          328                 mipi_csi2_in: endpoint {
329                         remote-endpoint = <&ov    329                         remote-endpoint = <&ov5645_to_mipi_csi2>;
330                         clock-lanes = <0>;        330                         clock-lanes = <0>;
331                         data-lanes = <1 2>;       331                         data-lanes = <1 2>;
332                 };                                332                 };
333         };                                        333         };
334 };                                                334 };
335                                                   335 
336 &spdif {                                          336 &spdif {
337         pinctrl-names = "default";                337         pinctrl-names = "default";
338         pinctrl-0 = <&pinctrl_spdif>;             338         pinctrl-0 = <&pinctrl_spdif>;
339         status = "okay";                          339         status = "okay";
340 };                                                340 };
341                                                   341 
342 &ssi1 {                                           342 &ssi1 {
343         status = "okay";                          343         status = "okay";
344 };                                                344 };
345                                                   345 
346 &uart1 {                                          346 &uart1 {
347         pinctrl-names = "default";                347         pinctrl-names = "default";
348         pinctrl-0 = <&pinctrl_uart1>;             348         pinctrl-0 = <&pinctrl_uart1>;
349         status = "okay";                          349         status = "okay";
350 };                                                350 };
351                                                   351 
352 &uart3 {                                          352 &uart3 {
353         pinctrl-names = "default";                353         pinctrl-names = "default";
354         pinctrl-0 = <&pinctrl_uart3>;             354         pinctrl-0 = <&pinctrl_uart3>;
355         uart-has-rtscts;                          355         uart-has-rtscts;
356         status = "okay";                          356         status = "okay";
357 };                                                357 };
358                                                   358 
359 &usbh1 {                                          359 &usbh1 {
360         status = "okay";                          360         status = "okay";
361 };                                                361 };
362                                                   362 
363 &usbotg {                                         363 &usbotg {
364         vbus-supply = <&reg_usb_otg_vbus>;        364         vbus-supply = <&reg_usb_otg_vbus>;
365         pinctrl-names = "default";                365         pinctrl-names = "default";
366         pinctrl-0 = <&pinctrl_usbotg>;            366         pinctrl-0 = <&pinctrl_usbotg>;
367         disable-over-current;                     367         disable-over-current;
368         dr_mode = "otg";                          368         dr_mode = "otg";
369         status = "okay";                          369         status = "okay";
370 };                                                370 };
371                                                   371 
372 &usdhc1 {                                         372 &usdhc1 {
373         pinctrl-names = "default";                373         pinctrl-names = "default";
374         pinctrl-0 = <&pinctrl_usdhc1>;            374         pinctrl-0 = <&pinctrl_usdhc1>;
375         cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;    375         cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
376         status = "okay";                          376         status = "okay";
377 };                                                377 };
378                                                   378 
379 &usdhc3 {                                         379 &usdhc3 {
380         pinctrl-names = "default";                380         pinctrl-names = "default";
381         pinctrl-0 = <&pinctrl_usdhc3>;            381         pinctrl-0 = <&pinctrl_usdhc3>;
382         cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;    382         cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
383         status = "okay";                          383         status = "okay";
384 };                                                384 };
                                                      

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