1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device tree for the Kobo Aura 2 ebook reade 3 * Device tree for the Kobo Aura 2 ebook reader
4 * 4 *
5 * Name on mainboard is: 37NB-E60QL0+4B1 5 * Name on mainboard is: 37NB-E60QL0+4B1
6 * Serials start with: E60QL2 6 * Serials start with: E60QL2
7 * 7 *
8 * Copyright 2022 Andreas Kemnade 8 * Copyright 2022 Andreas Kemnade
9 */ 9 */
10 10
11 /dts-v1/; 11 /dts-v1/;
12 12
13 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/leds/common.h> 15 #include <dt-bindings/leds/common.h>
16 #include "imx6sl.dtsi" 16 #include "imx6sl.dtsi"
17 17
18 / { 18 / {
19 model = "Kobo Aura 2"; 19 model = "Kobo Aura 2";
20 compatible = "kobo,aura2", "fsl,imx6sl 20 compatible = "kobo,aura2", "fsl,imx6sl";
21 21
22 aliases { 22 aliases {
23 mmc0 = &usdhc2; 23 mmc0 = &usdhc2;
24 mmc1 = &usdhc3; 24 mmc1 = &usdhc3;
25 }; 25 };
26 26
27 chosen { 27 chosen {
28 stdout-path = &uart1; 28 stdout-path = &uart1;
29 }; 29 };
30 30
31 gpio_keys: gpio-keys { 31 gpio_keys: gpio-keys {
32 compatible = "gpio-keys"; 32 compatible = "gpio-keys";
33 pinctrl-names = "default"; 33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_gpio_key 34 pinctrl-0 = <&pinctrl_gpio_keys>;
35 35
36 key-cover { 36 key-cover {
37 label = "Cover"; 37 label = "Cover";
38 gpios = <&gpio5 12 GPI 38 gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
39 linux,code = <SW_LID>; 39 linux,code = <SW_LID>;
40 linux,input-type = <EV 40 linux,input-type = <EV_SW>;
41 wakeup-source; 41 wakeup-source;
42 }; 42 };
43 43
44 key-power { 44 key-power {
45 label = "Power"; 45 label = "Power";
46 gpios = <&gpio5 8 GPIO 46 gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
47 linux,code = <KEY_POWE 47 linux,code = <KEY_POWER>;
48 wakeup-source; 48 wakeup-source;
49 }; 49 };
50 }; 50 };
51 51
52 leds: leds { 52 leds: leds {
53 compatible = "gpio-leds"; 53 compatible = "gpio-leds";
54 pinctrl-names = "default"; 54 pinctrl-names = "default";
55 pinctrl-0 = <&pinctrl_led>; 55 pinctrl-0 = <&pinctrl_led>;
56 56
57 led-0 { 57 led-0 {
58 label = "koboaura2:whi 58 label = "koboaura2:white:on";
59 gpios = <&gpio5 7 GPIO 59 gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
60 color = <LED_COLOR_ID_ 60 color = <LED_COLOR_ID_WHITE>;
61 linux,default-trigger 61 linux,default-trigger = "timer";
62 }; 62 };
63 }; 63 };
64 64
65 memory@80000000 { 65 memory@80000000 {
66 device_type = "memory"; 66 device_type = "memory";
67 reg = <0x80000000 0x10000000>; 67 reg = <0x80000000 0x10000000>;
68 }; 68 };
69 69
70 reg_wifi: regulator-wifi { 70 reg_wifi: regulator-wifi {
71 compatible = "regulator-fixed" 71 compatible = "regulator-fixed";
72 pinctrl-names = "default"; 72 pinctrl-names = "default";
73 pinctrl-0 = <&pinctrl_wifi_pow 73 pinctrl-0 = <&pinctrl_wifi_power>;
74 regulator-name = "SD3_SPWR"; 74 regulator-name = "SD3_SPWR";
75 regulator-min-microvolt = <300 75 regulator-min-microvolt = <3000000>;
76 regulator-max-microvolt = <300 76 regulator-max-microvolt = <3000000>;
77 gpio = <&gpio4 29 GPIO_ACTIVE_ 77 gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
78 }; 78 };
79 79
80 wifi_pwrseq: wifi-pwrseq { 80 wifi_pwrseq: wifi-pwrseq {
81 compatible = "mmc-pwrseq-simpl 81 compatible = "mmc-pwrseq-simple";
82 pinctrl-names = "default"; 82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_wifi_res 83 pinctrl-0 = <&pinctrl_wifi_reset>;
84 post-power-on-delay-ms = <20>; 84 post-power-on-delay-ms = <20>;
85 reset-gpios = <&gpio5 0 GPIO_A 85 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
86 }; 86 };
87 }; 87 };
88 88
89 &i2c1 { 89 &i2c1 {
90 pinctrl-names = "default", "sleep"; 90 pinctrl-names = "default", "sleep";
91 pinctrl-0 = <&pinctrl_i2c1>; 91 pinctrl-0 = <&pinctrl_i2c1>;
92 pinctrl-1 = <&pinctrl_i2c1_sleep>; 92 pinctrl-1 = <&pinctrl_i2c1_sleep>;
93 status = "okay"; 93 status = "okay";
94 94
95 lm3630a: backlight@36 { 95 lm3630a: backlight@36 {
96 compatible = "ti,lm3630a"; 96 compatible = "ti,lm3630a";
97 pinctrl-names = "default"; 97 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_lm3630a_ 98 pinctrl-0 = <&pinctrl_lm3630a_bl_gpio>;
99 reg = <0x36>; 99 reg = <0x36>;
100 enable-gpios = <&gpio2 10 GPIO 100 enable-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
101 101
102 #address-cells = <1>; 102 #address-cells = <1>;
103 #size-cells = <0>; 103 #size-cells = <0>;
104 104
105 led@0 { 105 led@0 {
106 reg = <0>; 106 reg = <0>;
107 led-sources = <0>; 107 led-sources = <0>;
108 label = "backlight"; 108 label = "backlight";
109 default-brightness = < 109 default-brightness = <0>;
110 max-brightness = <255> 110 max-brightness = <255>;
111 }; 111 };
112 }; 112 };
113 }; 113 };
114 114
115 &i2c2 { 115 &i2c2 {
116 pinctrl-names = "default", "sleep"; 116 pinctrl-names = "default", "sleep";
117 pinctrl-0 = <&pinctrl_i2c2>; 117 pinctrl-0 = <&pinctrl_i2c2>;
118 pinctrl-1 = <&pinctrl_i2c2_sleep>; 118 pinctrl-1 = <&pinctrl_i2c2_sleep>;
119 clock-frequency = <100000>; 119 clock-frequency = <100000>;
120 status = "okay"; 120 status = "okay";
121 121
122 /* eKTF2232 at 0x15 */ 122 /* eKTF2232 at 0x15 */
123 /* FP9928 at 0x48 */ 123 /* FP9928 at 0x48 */
124 }; 124 };
125 125
126 &i2c3 { 126 &i2c3 {
127 pinctrl-names = "default"; 127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_i2c3>; 128 pinctrl-0 = <&pinctrl_i2c3>;
129 clock-frequency = <400000>; 129 clock-frequency = <400000>;
130 status = "okay"; 130 status = "okay";
131 131
132 ricoh619: pmic@32 { 132 ricoh619: pmic@32 {
133 compatible = "ricoh,rc5t619"; 133 compatible = "ricoh,rc5t619";
134 pinctrl-names = "default"; 134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_ricoh_gp 135 pinctrl-0 = <&pinctrl_ricoh_gpio>;
136 reg = <0x32>; 136 reg = <0x32>;
137 interrupt-parent = <&gpio5>; 137 interrupt-parent = <&gpio5>;
138 interrupts = <11 IRQ_TYPE_LEVE 138 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
139 system-power-controller; 139 system-power-controller;
140 140
141 regulators { 141 regulators {
142 dcdc1_reg: DCDC1 { 142 dcdc1_reg: DCDC1 {
143 regulator-name 143 regulator-name = "DCDC1";
144 regulator-min- 144 regulator-min-microvolt = <300000>;
145 regulator-max- 145 regulator-max-microvolt = <1875000>;
146 regulator-alwa 146 regulator-always-on;
147 regulator-boot 147 regulator-boot-on;
148 148
149 regulator-stat 149 regulator-state-mem {
150 regula 150 regulator-on-in-suspend;
151 regula 151 regulator-suspend-max-microvolt = <900000>;
152 regula 152 regulator-suspend-min-microvolt = <900000>;
153 }; 153 };
154 }; 154 };
155 155
156 /* Core3_3V3 */ 156 /* Core3_3V3 */
157 dcdc2_reg: DCDC2 { 157 dcdc2_reg: DCDC2 {
158 regulator-name 158 regulator-name = "DCDC2";
159 regulator-alwa 159 regulator-always-on;
160 regulator-boot 160 regulator-boot-on;
161 161
162 regulator-stat 162 regulator-state-mem {
163 regula 163 regulator-on-in-suspend;
164 regula 164 regulator-suspend-max-microvolt = <3100000>;
165 regula 165 regulator-suspend-min-microvolt = <3100000>;
166 }; 166 };
167 }; 167 };
168 168
169 dcdc3_reg: DCDC3 { 169 dcdc3_reg: DCDC3 {
170 regulator-name 170 regulator-name = "DCDC3";
171 regulator-min- 171 regulator-min-microvolt = <300000>;
172 regulator-max- 172 regulator-max-microvolt = <1875000>;
173 regulator-alwa 173 regulator-always-on;
174 regulator-boot 174 regulator-boot-on;
175 175
176 regulator-stat 176 regulator-state-mem {
177 regula 177 regulator-on-in-suspend;
178 regula 178 regulator-suspend-max-microvolt = <1140000>;
179 regula 179 regulator-suspend-min-microvolt = <1140000>;
180 }; 180 };
181 }; 181 };
182 182
183 /* Core4_1V2 */ 183 /* Core4_1V2 */
184 dcdc4_reg: DCDC4 { 184 dcdc4_reg: DCDC4 {
185 regulator-name 185 regulator-name = "DCDC4";
186 regulator-min- 186 regulator-min-microvolt = <1200000>;
187 regulator-max- 187 regulator-max-microvolt = <1200000>;
188 regulator-alwa 188 regulator-always-on;
189 regulator-boot 189 regulator-boot-on;
190 190
191 regulator-stat 191 regulator-state-mem {
192 regula 192 regulator-on-in-suspend;
193 regula 193 regulator-suspend-max-microvolt = <1140000>;
194 regula 194 regulator-suspend-min-microvolt = <1140000>;
195 }; 195 };
196 }; 196 };
197 197
198 /* Core4_1V8 */ 198 /* Core4_1V8 */
199 dcdc5_reg: DCDC5 { 199 dcdc5_reg: DCDC5 {
200 regulator-name 200 regulator-name = "DCDC5";
201 regulator-min- 201 regulator-min-microvolt = <1800000>;
202 regulator-max- 202 regulator-max-microvolt = <1800000>;
203 regulator-alwa 203 regulator-always-on;
204 regulator-boot 204 regulator-boot-on;
205 205
206 regulator-stat 206 regulator-state-mem {
207 regula 207 regulator-on-in-suspend;
208 regula 208 regulator-suspend-max-microvolt = <1700000>;
209 regula 209 regulator-suspend-min-microvolt = <1700000>;
210 }; 210 };
211 }; 211 };
212 212
213 /* IR_3V3 */ 213 /* IR_3V3 */
214 ldo1_reg: LDO1 { 214 ldo1_reg: LDO1 {
215 regulator-name 215 regulator-name = "LDO1";
216 regulator-alwa 216 regulator-always-on;
217 regulator-boot 217 regulator-boot-on;
218 }; 218 };
219 219
220 /* Core1_3V3 */ 220 /* Core1_3V3 */
221 ldo2_reg: LDO2 { 221 ldo2_reg: LDO2 {
222 regulator-name 222 regulator-name = "LDO2";
223 regulator-alwa 223 regulator-always-on;
224 regulator-boot 224 regulator-boot-on;
225 225
226 regulator-stat 226 regulator-state-mem {
227 regula 227 regulator-on-in-suspend;
228 regula 228 regulator-suspend-max-microvolt = <3000000>;
229 regula 229 regulator-suspend-min-microvolt = <3000000>;
230 }; 230 };
231 }; 231 };
232 232
233 /* Core5_1V2 */ 233 /* Core5_1V2 */
234 ldo3_reg: LDO3 { 234 ldo3_reg: LDO3 {
235 regulator-name 235 regulator-name = "LDO3";
236 regulator-alwa 236 regulator-always-on;
237 regulator-boot 237 regulator-boot-on;
238 }; 238 };
239 239
240 ldo4_reg: LDO4 { 240 ldo4_reg: LDO4 {
241 regulator-name 241 regulator-name = "LDO4";
242 regulator-boot 242 regulator-boot-on;
243 }; 243 };
244 244
245 /* SPD_3V3 */ 245 /* SPD_3V3 */
246 ldo5_reg: LDO5 { 246 ldo5_reg: LDO5 {
247 regulator-name 247 regulator-name = "LDO5";
248 regulator-alwa 248 regulator-always-on;
249 regulator-boot 249 regulator-boot-on;
250 }; 250 };
251 251
252 /* DDR_0V6 */ 252 /* DDR_0V6 */
253 ldo6_reg: LDO6 { 253 ldo6_reg: LDO6 {
254 regulator-name 254 regulator-name = "LDO6";
255 regulator-alwa 255 regulator-always-on;
256 regulator-boot 256 regulator-boot-on;
257 }; 257 };
258 258
259 /* VDD_PWM */ 259 /* VDD_PWM */
260 ldo7_reg: LDO7 { 260 ldo7_reg: LDO7 {
261 regulator-name 261 regulator-name = "LDO7";
262 regulator-alwa 262 regulator-always-on;
263 regulator-boot 263 regulator-boot-on;
264 }; 264 };
265 265
266 /* ldo_1v8 */ 266 /* ldo_1v8 */
267 ldo8_reg: LDO8 { 267 ldo8_reg: LDO8 {
268 regulator-name 268 regulator-name = "LDO8";
269 regulator-min- 269 regulator-min-microvolt = <1800000>;
270 regulator-max- 270 regulator-max-microvolt = <1800000>;
271 regulator-alwa 271 regulator-always-on;
272 regulator-boot 272 regulator-boot-on;
273 }; 273 };
274 274
275 ldo9_reg: LDO9 { 275 ldo9_reg: LDO9 {
276 regulator-name 276 regulator-name = "LDO9";
277 regulator-boot 277 regulator-boot-on;
278 }; 278 };
279 279
280 ldo10_reg: LDO10 { 280 ldo10_reg: LDO10 {
281 regulator-name 281 regulator-name = "LDO10";
282 regulator-boot 282 regulator-boot-on;
283 }; 283 };
284 284
285 ldortc1_reg: LDORTC1 285 ldortc1_reg: LDORTC1 {
286 regulator-name 286 regulator-name = "LDORTC1";
287 regulator-alwa 287 regulator-always-on;
288 regulator-boot 288 regulator-boot-on;
289 }; 289 };
290 }; 290 };
291 }; 291 };
292 }; 292 };
293 293
294 ®_vdd1p1 { 294 ®_vdd1p1 {
295 vin-supply = <&dcdc2_reg>; 295 vin-supply = <&dcdc2_reg>;
296 }; 296 };
297 297
298 ®_vdd2p5 { 298 ®_vdd2p5 {
299 vin-supply = <&dcdc2_reg>; 299 vin-supply = <&dcdc2_reg>;
300 }; 300 };
301 301
302 ®_arm { 302 ®_arm {
303 vin-supply = <&dcdc3_reg>; 303 vin-supply = <&dcdc3_reg>;
304 }; 304 };
305 305
306 ®_soc { 306 ®_soc {
307 vin-supply = <&dcdc1_reg>; 307 vin-supply = <&dcdc1_reg>;
308 }; 308 };
309 309
310 ®_pu { 310 ®_pu {
311 vin-supply = <&dcdc1_reg>; 311 vin-supply = <&dcdc1_reg>;
312 }; 312 };
313 313
314 &snvs_rtc { 314 &snvs_rtc {
315 /* 315 /*
316 * We are using the RTC in the PMIC, b 316 * We are using the RTC in the PMIC, but this one is not disabled
317 * in imx6sl.dtsi. 317 * in imx6sl.dtsi.
318 */ 318 */
319 status = "disabled"; 319 status = "disabled";
320 }; 320 };
321 321
322 &uart1 { 322 &uart1 {
323 /* J4, through-holes */ 323 /* J4, through-holes */
324 pinctrl-names = "default"; 324 pinctrl-names = "default";
325 pinctrl-0 = <&pinctrl_uart1>; 325 pinctrl-0 = <&pinctrl_uart1>;
326 status = "okay"; 326 status = "okay";
327 }; 327 };
328 328
329 &uart4 { 329 &uart4 {
330 /* TP198, next to J4, SMD pads */ 330 /* TP198, next to J4, SMD pads */
331 pinctrl-names = "default"; 331 pinctrl-names = "default";
332 pinctrl-0 = <&pinctrl_uart4>; 332 pinctrl-0 = <&pinctrl_uart4>;
333 status = "okay"; 333 status = "okay";
334 }; 334 };
335 335
336 &usdhc2 { 336 &usdhc2 {
337 pinctrl-names = "default", "state_100m 337 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
338 pinctrl-0 = <&pinctrl_usdhc2>; 338 pinctrl-0 = <&pinctrl_usdhc2>;
339 pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 339 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
340 pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 340 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
341 pinctrl-3 = <&pinctrl_usdhc2_sleep>; 341 pinctrl-3 = <&pinctrl_usdhc2_sleep>;
342 non-removable; 342 non-removable;
343 status = "okay"; 343 status = "okay";
344 344
345 /* internal uSD card */ 345 /* internal uSD card */
346 }; 346 };
347 347
348 &usdhc3 { 348 &usdhc3 {
349 pinctrl-names = "default", "state_100m 349 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
350 pinctrl-0 = <&pinctrl_usdhc3>; 350 pinctrl-0 = <&pinctrl_usdhc3>;
351 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 351 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
352 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 352 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
353 pinctrl-3 = <&pinctrl_usdhc3_sleep>; 353 pinctrl-3 = <&pinctrl_usdhc3_sleep>;
354 vmmc-supply = <®_wifi>; 354 vmmc-supply = <®_wifi>;
355 mmc-pwrseq = <&wifi_pwrseq>; 355 mmc-pwrseq = <&wifi_pwrseq>;
356 cap-power-off-card; 356 cap-power-off-card;
357 non-removable; 357 non-removable;
358 status = "okay"; 358 status = "okay";
359 359
360 /* 360 /*
361 * RTL8189F SDIO WiFi 361 * RTL8189F SDIO WiFi
362 */ 362 */
363 }; 363 };
364 364
365 &usbotg1 { 365 &usbotg1 {
366 disable-over-current; 366 disable-over-current;
367 srp-disable; 367 srp-disable;
368 hnp-disable; 368 hnp-disable;
369 adp-disable; 369 adp-disable;
370 status = "okay"; 370 status = "okay";
371 }; 371 };
372 372
373 &iomuxc { 373 &iomuxc {
374 pinctrl_gpio_keys: gpio-keysgrp { 374 pinctrl_gpio_keys: gpio-keysgrp {
375 fsl,pins = < 375 fsl,pins = <
376 MX6SL_PAD_SD1_DAT1__GP 376 MX6SL_PAD_SD1_DAT1__GPIO5_IO08 0x17059
377 MX6SL_PAD_SD1_DAT4__GP 377 MX6SL_PAD_SD1_DAT4__GPIO5_IO12 0x17059
378 >; 378 >;
379 }; 379 };
380 380
381 pinctrl_i2c1: i2c1grp { 381 pinctrl_i2c1: i2c1grp {
382 fsl,pins = < 382 fsl,pins = <
383 MX6SL_PAD_I2C1_SCL__I2 383 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001f8b1
384 MX6SL_PAD_I2C1_SDA__I2 384 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001f8b1
385 >; 385 >;
386 }; 386 };
387 387
388 pinctrl_i2c1_sleep: i2c1-sleepgrp { 388 pinctrl_i2c1_sleep: i2c1-sleepgrp {
389 fsl,pins = < 389 fsl,pins = <
390 MX6SL_PAD_I2C1_SCL__I2 390 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x400108b1
391 MX6SL_PAD_I2C1_SDA__I2 391 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x400108b1
392 >; 392 >;
393 }; 393 };
394 394
395 pinctrl_i2c2: i2c2grp { 395 pinctrl_i2c2: i2c2grp {
396 fsl,pins = < 396 fsl,pins = <
397 MX6SL_PAD_I2C2_SCL__I2 397 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001f8b1
398 MX6SL_PAD_I2C2_SDA__I2 398 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001f8b1
399 >; 399 >;
400 }; 400 };
401 401
402 pinctrl_i2c2_sleep: i2c2-sleepgrp { 402 pinctrl_i2c2_sleep: i2c2-sleepgrp {
403 fsl,pins = < 403 fsl,pins = <
404 MX6SL_PAD_I2C2_SCL__I2 404 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x400108b1
405 MX6SL_PAD_I2C2_SDA__I2 405 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x400108b1
406 >; 406 >;
407 }; 407 };
408 408
409 pinctrl_i2c3: i2c3grp { 409 pinctrl_i2c3: i2c3grp {
410 fsl,pins = < 410 fsl,pins = <
411 MX6SL_PAD_REF_CLK_24M_ 411 MX6SL_PAD_REF_CLK_24M__I2C3_SCL 0x4001f8b1
412 MX6SL_PAD_REF_CLK_32K_ 412 MX6SL_PAD_REF_CLK_32K__I2C3_SDA 0x4001f8b1
413 >; 413 >;
414 }; 414 };
415 415
416 pinctrl_led: ledgrp { 416 pinctrl_led: ledgrp {
417 fsl,pins = < 417 fsl,pins = <
418 MX6SL_PAD_SD1_DAT6__GP 418 MX6SL_PAD_SD1_DAT6__GPIO5_IO07 0x17059
419 >; 419 >;
420 }; 420 };
421 421
422 pinctrl_lm3630a_bl_gpio: lm3630a-bl-gp 422 pinctrl_lm3630a_bl_gpio: lm3630a-bl-gpiogrp {
423 fsl,pins = < 423 fsl,pins = <
424 MX6SL_PAD_EPDC_PWRCTRL 424 MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x10059 /* HWEN */
425 >; 425 >;
426 }; 426 };
427 427
428 pinctrl_ricoh_gpio: ricoh-gpiogrp { 428 pinctrl_ricoh_gpio: ricoh-gpiogrp {
429 fsl,pins = < 429 fsl,pins = <
430 MX6SL_PAD_SD1_CLK__GPI 430 MX6SL_PAD_SD1_CLK__GPIO5_IO15 0x1b8b1 /* ricoh619 chg */
431 MX6SL_PAD_SD1_DAT0__GP 431 MX6SL_PAD_SD1_DAT0__GPIO5_IO11 0x1b8b1 /* ricoh619 irq */
432 MX6SL_PAD_KEY_COL2__GP 432 MX6SL_PAD_KEY_COL2__GPIO3_IO28 0x1b8b1 /* ricoh619 bat_low_int */
433 >; 433 >;
434 }; 434 };
435 435
436 pinctrl_uart1: uart1grp { 436 pinctrl_uart1: uart1grp {
437 fsl,pins = < 437 fsl,pins = <
438 MX6SL_PAD_UART1_TXD__U 438 MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
439 MX6SL_PAD_UART1_RXD__U 439 MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
440 >; 440 >;
441 }; 441 };
442 442
443 pinctrl_uart4: uart4grp { 443 pinctrl_uart4: uart4grp {
444 fsl,pins = < 444 fsl,pins = <
445 MX6SL_PAD_KEY_ROW6__UA 445 MX6SL_PAD_KEY_ROW6__UART4_TX_DATA 0x1b0b1
446 MX6SL_PAD_KEY_COL6__UA 446 MX6SL_PAD_KEY_COL6__UART4_RX_DATA 0x1b0b1
447 >; 447 >;
448 }; 448 };
449 449
450 pinctrl_usbotg1: usbotg1grp { 450 pinctrl_usbotg1: usbotg1grp {
451 fsl,pins = < 451 fsl,pins = <
452 MX6SL_PAD_EPDC_PWRCOM_ 452 MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
453 >; 453 >;
454 }; 454 };
455 455
456 pinctrl_usdhc2: usdhc2grp { 456 pinctrl_usdhc2: usdhc2grp {
457 fsl,pins = < 457 fsl,pins = <
458 MX6SL_PAD_SD2_CMD__SD2 458 MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059
459 MX6SL_PAD_SD2_CLK__SD2 459 MX6SL_PAD_SD2_CLK__SD2_CLK 0x13059
460 MX6SL_PAD_SD2_DAT0__SD 460 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059
461 MX6SL_PAD_SD2_DAT1__SD 461 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059
462 MX6SL_PAD_SD2_DAT2__SD 462 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059
463 MX6SL_PAD_SD2_DAT3__SD 463 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059
464 >; 464 >;
465 }; 465 };
466 466
467 pinctrl_usdhc2_100mhz: usdhc2-100mhzgr 467 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
468 fsl,pins = < 468 fsl,pins = <
469 MX6SL_PAD_SD2_CMD__SD2 469 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9
470 MX6SL_PAD_SD2_CLK__SD2 470 MX6SL_PAD_SD2_CLK__SD2_CLK 0x130b9
471 MX6SL_PAD_SD2_DAT0__SD 471 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
472 MX6SL_PAD_SD2_DAT1__SD 472 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
473 MX6SL_PAD_SD2_DAT2__SD 473 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
474 MX6SL_PAD_SD2_DAT3__SD 474 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
475 >; 475 >;
476 }; 476 };
477 477
478 pinctrl_usdhc2_200mhz: usdhc2-200mhzgr 478 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
479 fsl,pins = < 479 fsl,pins = <
480 MX6SL_PAD_SD2_CMD__SD2 480 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9
481 MX6SL_PAD_SD2_CLK__SD2 481 MX6SL_PAD_SD2_CLK__SD2_CLK 0x130f9
482 MX6SL_PAD_SD2_DAT0__SD 482 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
483 MX6SL_PAD_SD2_DAT1__SD 483 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
484 MX6SL_PAD_SD2_DAT2__SD 484 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
485 MX6SL_PAD_SD2_DAT3__SD 485 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
486 >; 486 >;
487 }; 487 };
488 488
489 pinctrl_usdhc2_sleep: usdhc2-sleepgrp 489 pinctrl_usdhc2_sleep: usdhc2-sleepgrp {
490 fsl,pins = < 490 fsl,pins = <
491 MX6SL_PAD_SD2_CMD__GPI 491 MX6SL_PAD_SD2_CMD__GPIO5_IO04 0x100f9
492 MX6SL_PAD_SD2_CLK__GPI 492 MX6SL_PAD_SD2_CLK__GPIO5_IO05 0x100f9
493 MX6SL_PAD_SD2_DAT0__GP 493 MX6SL_PAD_SD2_DAT0__GPIO5_IO01 0x100f9
494 MX6SL_PAD_SD2_DAT1__GP 494 MX6SL_PAD_SD2_DAT1__GPIO4_IO30 0x100f9
495 MX6SL_PAD_SD2_DAT2__GP 495 MX6SL_PAD_SD2_DAT2__GPIO5_IO03 0x100f9
496 MX6SL_PAD_SD2_DAT3__GP 496 MX6SL_PAD_SD2_DAT3__GPIO4_IO28 0x100f9
497 >; 497 >;
498 }; 498 };
499 499
500 pinctrl_usdhc3: usdhc3grp { 500 pinctrl_usdhc3: usdhc3grp {
501 fsl,pins = < 501 fsl,pins = <
502 MX6SL_PAD_SD3_CMD__SD3 502 MX6SL_PAD_SD3_CMD__SD3_CMD 0x11059
503 MX6SL_PAD_SD3_CLK__SD3 503 MX6SL_PAD_SD3_CLK__SD3_CLK 0x11059
504 MX6SL_PAD_SD3_DAT0__SD 504 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x11059
505 MX6SL_PAD_SD3_DAT1__SD 505 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x11059
506 MX6SL_PAD_SD3_DAT2__SD 506 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x11059
507 MX6SL_PAD_SD3_DAT3__SD 507 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x11059
508 >; 508 >;
509 }; 509 };
510 510
511 pinctrl_usdhc3_100mhz: usdhc3-100mhzgr 511 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
512 fsl,pins = < 512 fsl,pins = <
513 MX6SL_PAD_SD3_CMD__SD3 513 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
514 MX6SL_PAD_SD3_CLK__SD3 514 MX6SL_PAD_SD3_CLK__SD3_CLK 0x170b9
515 MX6SL_PAD_SD3_DAT0__SD 515 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
516 MX6SL_PAD_SD3_DAT1__SD 516 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
517 MX6SL_PAD_SD3_DAT2__SD 517 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
518 MX6SL_PAD_SD3_DAT3__SD 518 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
519 >; 519 >;
520 }; 520 };
521 521
522 pinctrl_usdhc3_200mhz: usdhc3-200mhzgr 522 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
523 fsl,pins = < 523 fsl,pins = <
524 MX6SL_PAD_SD3_CMD__SD3 524 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
525 MX6SL_PAD_SD3_CLK__SD3 525 MX6SL_PAD_SD3_CLK__SD3_CLK 0x170f9
526 MX6SL_PAD_SD3_DAT0__SD 526 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
527 MX6SL_PAD_SD3_DAT1__SD 527 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
528 MX6SL_PAD_SD3_DAT2__SD 528 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
529 MX6SL_PAD_SD3_DAT3__SD 529 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
530 >; 530 >;
531 }; 531 };
532 532
533 pinctrl_usdhc3_sleep: usdhc3-sleepgrp 533 pinctrl_usdhc3_sleep: usdhc3-sleepgrp {
534 fsl,pins = < 534 fsl,pins = <
535 MX6SL_PAD_SD3_CMD__GPI 535 MX6SL_PAD_SD3_CMD__GPIO5_IO21 0x100c1
536 MX6SL_PAD_SD3_CLK__GPI 536 MX6SL_PAD_SD3_CLK__GPIO5_IO18 0x100c1
537 MX6SL_PAD_SD3_DAT0__GP 537 MX6SL_PAD_SD3_DAT0__GPIO5_IO19 0x100c1
538 MX6SL_PAD_SD3_DAT1__GP 538 MX6SL_PAD_SD3_DAT1__GPIO5_IO20 0x100c1
539 MX6SL_PAD_SD3_DAT2__GP 539 MX6SL_PAD_SD3_DAT2__GPIO5_IO16 0x100c1
540 MX6SL_PAD_SD3_DAT3__GP 540 MX6SL_PAD_SD3_DAT3__GPIO5_IO17 0x100c1
541 >; 541 >;
542 }; 542 };
543 543
544 pinctrl_wifi_power: wifi-powergrp { 544 pinctrl_wifi_power: wifi-powergrp {
545 fsl,pins = < 545 fsl,pins = <
546 MX6SL_PAD_SD2_DAT6__GP 546 MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x10059 /* WIFI_3V3_ON */
547 >; 547 >;
548 }; 548 };
549 549
550 pinctrl_wifi_reset: wifi-resetgrp { 550 pinctrl_wifi_reset: wifi-resetgrp {
551 fsl,pins = < 551 fsl,pins = <
552 MX6SL_PAD_SD2_DAT7__GP 552 MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x10059 /* WIFI_RST */
553 >; 553 >;
554 }; 554 };
555 }; 555 };
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