1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 2 /* 3 * Copyright 2013 Freescale Semiconductor, Inc 3 * Copyright 2013 Freescale Semiconductor, Inc. 4 */ 4 */ 5 5 6 #ifndef __DTS_IMX6SL_PINFUNC_H 6 #ifndef __DTS_IMX6SL_PINFUNC_H 7 #define __DTS_IMX6SL_PINFUNC_H 7 #define __DTS_IMX6SL_PINFUNC_H 8 8 9 /* 9 /* 10 * The pin function ID is a tuple of 10 * The pin function ID is a tuple of 11 * <mux_reg conf_reg input_reg mux_mode input_ 11 * <mux_reg conf_reg input_reg mux_mode input_val> 12 */ 12 */ 13 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 13 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0 14 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 14 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x0 15 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 15 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0 16 #define MX6SL_PAD_AUD_MCLK__FEC_MDC 16 #define MX6SL_PAD_AUD_MCLK__FEC_MDC 0x04c 0x2a4 0x000 0x3 0x0 17 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 17 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0 18 #define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 18 #define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 0x04c 0x2a4 0x000 0x5 0x0 19 #define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 19 #define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 0x04c 0x2a4 0x7f4 0x6 0x0 20 #define MX6SL_PAD_AUD_RXC__AUD3_RXC 20 #define MX6SL_PAD_AUD_RXC__AUD3_RXC 0x050 0x2a8 0x000 0x0 0x0 21 #define MX6SL_PAD_AUD_RXC__I2C1_SDA 21 #define MX6SL_PAD_AUD_RXC__I2C1_SDA 0x050 0x2a8 0x720 0x1 0x0 22 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 22 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0 23 #define MX6SL_PAD_AUD_RXC__UART3_RX_DATA 23 #define MX6SL_PAD_AUD_RXC__UART3_RX_DATA 0x050 0x2a8 0x80c 0x2 0x0 24 #define MX6SL_PAD_AUD_RXC__FEC_TX_CLK 24 #define MX6SL_PAD_AUD_RXC__FEC_TX_CLK 0x050 0x2a8 0x70c 0x3 0x0 25 #define MX6SL_PAD_AUD_RXC__I2C3_SDA 25 #define MX6SL_PAD_AUD_RXC__I2C3_SDA 0x050 0x2a8 0x730 0x4 0x0 26 #define MX6SL_PAD_AUD_RXC__GPIO1_IO01 26 #define MX6SL_PAD_AUD_RXC__GPIO1_IO01 0x050 0x2a8 0x000 0x5 0x0 27 #define MX6SL_PAD_AUD_RXC__ECSPI3_SS1 27 #define MX6SL_PAD_AUD_RXC__ECSPI3_SS1 0x050 0x2a8 0x6c4 0x6 0x0 28 #define MX6SL_PAD_AUD_RXD__AUD3_RXD 28 #define MX6SL_PAD_AUD_RXD__AUD3_RXD 0x054 0x2ac 0x000 0x0 0x0 29 #define MX6SL_PAD_AUD_RXD__ECSPI3_MOSI 29 #define MX6SL_PAD_AUD_RXD__ECSPI3_MOSI 0x054 0x2ac 0x6bc 0x1 0x0 30 #define MX6SL_PAD_AUD_RXD__UART4_RX_DATA 30 #define MX6SL_PAD_AUD_RXD__UART4_RX_DATA 0x054 0x2ac 0x814 0x2 0x0 31 #define MX6SL_PAD_AUD_RXD__UART4_TX_DATA 31 #define MX6SL_PAD_AUD_RXD__UART4_TX_DATA 0x054 0x2ac 0x000 0x2 0x0 32 #define MX6SL_PAD_AUD_RXD__FEC_RX_ER 32 #define MX6SL_PAD_AUD_RXD__FEC_RX_ER 0x054 0x2ac 0x708 0x3 0x0 33 #define MX6SL_PAD_AUD_RXD__SD1_LCTL 33 #define MX6SL_PAD_AUD_RXD__SD1_LCTL 0x054 0x2ac 0x000 0x4 0x0 34 #define MX6SL_PAD_AUD_RXD__GPIO1_IO02 34 #define MX6SL_PAD_AUD_RXD__GPIO1_IO02 0x054 0x2ac 0x000 0x5 0x0 35 #define MX6SL_PAD_AUD_RXFS__AUD3_RXFS 35 #define MX6SL_PAD_AUD_RXFS__AUD3_RXFS 0x058 0x2b0 0x000 0x0 0x0 36 #define MX6SL_PAD_AUD_RXFS__I2C1_SCL 36 #define MX6SL_PAD_AUD_RXFS__I2C1_SCL 0x058 0x2b0 0x71c 0x1 0x0 37 #define MX6SL_PAD_AUD_RXFS__UART3_RX_DATA 37 #define MX6SL_PAD_AUD_RXFS__UART3_RX_DATA 0x058 0x2b0 0x80c 0x2 0x1 38 #define MX6SL_PAD_AUD_RXFS__UART3_TX_DATA 38 #define MX6SL_PAD_AUD_RXFS__UART3_TX_DATA 0x058 0x2b0 0x000 0x2 0x0 39 #define MX6SL_PAD_AUD_RXFS__FEC_MDIO 39 #define MX6SL_PAD_AUD_RXFS__FEC_MDIO 0x058 0x2b0 0x6f4 0x3 0x0 40 #define MX6SL_PAD_AUD_RXFS__I2C3_SCL 40 #define MX6SL_PAD_AUD_RXFS__I2C3_SCL 0x058 0x2b0 0x72c 0x4 0x0 41 #define MX6SL_PAD_AUD_RXFS__GPIO1_IO00 41 #define MX6SL_PAD_AUD_RXFS__GPIO1_IO00 0x058 0x2b0 0x000 0x5 0x0 42 #define MX6SL_PAD_AUD_RXFS__ECSPI3_SS0 42 #define MX6SL_PAD_AUD_RXFS__ECSPI3_SS0 0x058 0x2b0 0x6c0 0x6 0x0 43 #define MX6SL_PAD_AUD_TXC__AUD3_TXC 43 #define MX6SL_PAD_AUD_TXC__AUD3_TXC 0x05c 0x2b4 0x000 0x0 0x0 44 #define MX6SL_PAD_AUD_TXC__ECSPI3_MISO 44 #define MX6SL_PAD_AUD_TXC__ECSPI3_MISO 0x05c 0x2b4 0x6b8 0x1 0x0 45 #define MX6SL_PAD_AUD_TXC__UART4_TX_DATA 45 #define MX6SL_PAD_AUD_TXC__UART4_TX_DATA 0x05c 0x2b4 0x000 0x2 0x0 46 #define MX6SL_PAD_AUD_TXC__UART4_RX_DATA 46 #define MX6SL_PAD_AUD_TXC__UART4_RX_DATA 0x05c 0x2b4 0x814 0x2 0x1 47 #define MX6SL_PAD_AUD_TXC__FEC_RX_DV 47 #define MX6SL_PAD_AUD_TXC__FEC_RX_DV 0x05c 0x2b4 0x704 0x3 0x0 48 #define MX6SL_PAD_AUD_TXC__SD2_LCTL 48 #define MX6SL_PAD_AUD_TXC__SD2_LCTL 0x05c 0x2b4 0x000 0x4 0x0 49 #define MX6SL_PAD_AUD_TXC__GPIO1_IO03 49 #define MX6SL_PAD_AUD_TXC__GPIO1_IO03 0x05c 0x2b4 0x000 0x5 0x0 50 #define MX6SL_PAD_AUD_TXD__AUD3_TXD 50 #define MX6SL_PAD_AUD_TXD__AUD3_TXD 0x060 0x2b8 0x000 0x0 0x0 51 #define MX6SL_PAD_AUD_TXD__ECSPI3_SCLK 51 #define MX6SL_PAD_AUD_TXD__ECSPI3_SCLK 0x060 0x2b8 0x6b0 0x1 0x0 52 #define MX6SL_PAD_AUD_TXD__UART4_CTS_B 52 #define MX6SL_PAD_AUD_TXD__UART4_CTS_B 0x060 0x2b8 0x000 0x2 0x0 53 #define MX6SL_PAD_AUD_TXD__UART4_RTS_B 53 #define MX6SL_PAD_AUD_TXD__UART4_RTS_B 0x060 0x2b8 0x810 0x2 0x0 54 #define MX6SL_PAD_AUD_TXD__FEC_TX_DATA0 54 #define MX6SL_PAD_AUD_TXD__FEC_TX_DATA0 0x060 0x2b8 0x000 0x3 0x0 55 #define MX6SL_PAD_AUD_TXD__SD4_LCTL 55 #define MX6SL_PAD_AUD_TXD__SD4_LCTL 0x060 0x2b8 0x000 0x4 0x0 56 #define MX6SL_PAD_AUD_TXD__GPIO1_IO05 56 #define MX6SL_PAD_AUD_TXD__GPIO1_IO05 0x060 0x2b8 0x000 0x5 0x0 57 #define MX6SL_PAD_AUD_TXFS__AUD3_TXFS 57 #define MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x064 0x2bc 0x000 0x0 0x0 58 #define MX6SL_PAD_AUD_TXFS__PWM3_OUT 58 #define MX6SL_PAD_AUD_TXFS__PWM3_OUT 0x064 0x2bc 0x000 0x1 0x0 59 #define MX6SL_PAD_AUD_TXFS__UART4_RTS_B 59 #define MX6SL_PAD_AUD_TXFS__UART4_RTS_B 0x064 0x2bc 0x810 0x2 0x1 60 #define MX6SL_PAD_AUD_TXFS__UART4_CTS_B 60 #define MX6SL_PAD_AUD_TXFS__UART4_CTS_B 0x064 0x2bc 0x000 0x2 0x0 61 #define MX6SL_PAD_AUD_TXFS__FEC_RX_DATA1 61 #define MX6SL_PAD_AUD_TXFS__FEC_RX_DATA1 0x064 0x2bc 0x6fc 0x3 0x0 62 #define MX6SL_PAD_AUD_TXFS__SD3_LCTL 62 #define MX6SL_PAD_AUD_TXFS__SD3_LCTL 0x064 0x2bc 0x000 0x4 0x0 63 #define MX6SL_PAD_AUD_TXFS__GPIO1_IO04 63 #define MX6SL_PAD_AUD_TXFS__GPIO1_IO04 0x064 0x2bc 0x000 0x5 0x0 64 #define MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 64 #define MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x068 0x358 0x684 0x0 0x0 65 #define MX6SL_PAD_ECSPI1_MISO__AUD4_TXFS 65 #define MX6SL_PAD_ECSPI1_MISO__AUD4_TXFS 0x068 0x358 0x5f8 0x1 0x0 66 #define MX6SL_PAD_ECSPI1_MISO__UART5_RTS_B 66 #define MX6SL_PAD_ECSPI1_MISO__UART5_RTS_B 0x068 0x358 0x818 0x2 0x0 67 #define MX6SL_PAD_ECSPI1_MISO__UART5_CTS_B 67 #define MX6SL_PAD_ECSPI1_MISO__UART5_CTS_B 0x068 0x358 0x000 0x2 0x0 68 #define MX6SL_PAD_ECSPI1_MISO__EPDC_BDR0 68 #define MX6SL_PAD_ECSPI1_MISO__EPDC_BDR0 0x068 0x358 0x000 0x3 0x0 69 #define MX6SL_PAD_ECSPI1_MISO__SD2_WP 69 #define MX6SL_PAD_ECSPI1_MISO__SD2_WP 0x068 0x358 0x834 0x4 0x0 70 #define MX6SL_PAD_ECSPI1_MISO__GPIO4_IO10 70 #define MX6SL_PAD_ECSPI1_MISO__GPIO4_IO10 0x068 0x358 0x000 0x5 0x0 71 #define MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 71 #define MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x06c 0x35c 0x688 0x0 0x0 72 #define MX6SL_PAD_ECSPI1_MOSI__AUD4_TXC 72 #define MX6SL_PAD_ECSPI1_MOSI__AUD4_TXC 0x06c 0x35c 0x5f4 0x1 0x0 73 #define MX6SL_PAD_ECSPI1_MOSI__UART5_TX_DATA 73 #define MX6SL_PAD_ECSPI1_MOSI__UART5_TX_DATA 0x06c 0x35c 0x000 0x2 0x0 74 #define MX6SL_PAD_ECSPI1_MOSI__UART5_RX_DATA 74 #define MX6SL_PAD_ECSPI1_MOSI__UART5_RX_DATA 0x06c 0x35c 0x81c 0x2 0x0 75 #define MX6SL_PAD_ECSPI1_MOSI__EPDC_VCOM1 75 #define MX6SL_PAD_ECSPI1_MOSI__EPDC_VCOM1 0x06c 0x35c 0x000 0x3 0x0 76 #define MX6SL_PAD_ECSPI1_MOSI__SD2_VSELECT 76 #define MX6SL_PAD_ECSPI1_MOSI__SD2_VSELECT 0x06c 0x35c 0x000 0x4 0x0 77 #define MX6SL_PAD_ECSPI1_MOSI__GPIO4_IO09 77 #define MX6SL_PAD_ECSPI1_MOSI__GPIO4_IO09 0x06c 0x35c 0x000 0x5 0x0 78 #define MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 78 #define MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x070 0x360 0x67c 0x0 0x0 79 #define MX6SL_PAD_ECSPI1_SCLK__AUD4_TXD 79 #define MX6SL_PAD_ECSPI1_SCLK__AUD4_TXD 0x070 0x360 0x5e8 0x1 0x0 80 #define MX6SL_PAD_ECSPI1_SCLK__UART5_RX_DATA 80 #define MX6SL_PAD_ECSPI1_SCLK__UART5_RX_DATA 0x070 0x360 0x81c 0x2 0x1 81 #define MX6SL_PAD_ECSPI1_SCLK__UART5_TX_DATA 81 #define MX6SL_PAD_ECSPI1_SCLK__UART5_TX_DATA 0x070 0x360 0x000 0x2 0x0 82 #define MX6SL_PAD_ECSPI1_SCLK__EPDC_VCOM0 82 #define MX6SL_PAD_ECSPI1_SCLK__EPDC_VCOM0 0x070 0x360 0x000 0x3 0x0 83 #define MX6SL_PAD_ECSPI1_SCLK__SD2_RESET 83 #define MX6SL_PAD_ECSPI1_SCLK__SD2_RESET 0x070 0x360 0x000 0x4 0x0 84 #define MX6SL_PAD_ECSPI1_SCLK__GPIO4_IO08 84 #define MX6SL_PAD_ECSPI1_SCLK__GPIO4_IO08 0x070 0x360 0x000 0x5 0x0 85 #define MX6SL_PAD_ECSPI1_SCLK__USB_OTG2_OC 85 #define MX6SL_PAD_ECSPI1_SCLK__USB_OTG2_OC 0x070 0x360 0x820 0x6 0x0 86 #define MX6SL_PAD_ECSPI1_SS0__ECSPI1_SS0 86 #define MX6SL_PAD_ECSPI1_SS0__ECSPI1_SS0 0x074 0x364 0x68c 0x0 0x0 87 #define MX6SL_PAD_ECSPI1_SS0__AUD4_RXD 87 #define MX6SL_PAD_ECSPI1_SS0__AUD4_RXD 0x074 0x364 0x5e4 0x1 0x0 88 #define MX6SL_PAD_ECSPI1_SS0__UART5_CTS_B 88 #define MX6SL_PAD_ECSPI1_SS0__UART5_CTS_B 0x074 0x364 0x000 0x2 0x0 89 #define MX6SL_PAD_ECSPI1_SS0__UART5_RTS_B 89 #define MX6SL_PAD_ECSPI1_SS0__UART5_RTS_B 0x074 0x364 0x818 0x2 0x1 90 #define MX6SL_PAD_ECSPI1_SS0__EPDC_BDR1 90 #define MX6SL_PAD_ECSPI1_SS0__EPDC_BDR1 0x074 0x364 0x000 0x3 0x0 91 #define MX6SL_PAD_ECSPI1_SS0__SD2_CD_B 91 #define MX6SL_PAD_ECSPI1_SS0__SD2_CD_B 0x074 0x364 0x830 0x4 0x0 92 #define MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 92 #define MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x074 0x364 0x000 0x5 0x0 93 #define MX6SL_PAD_ECSPI1_SS0__USB_OTG2_PWR 93 #define MX6SL_PAD_ECSPI1_SS0__USB_OTG2_PWR 0x074 0x364 0x000 0x6 0x0 94 #define MX6SL_PAD_ECSPI2_MISO__ECSPI2_MISO 94 #define MX6SL_PAD_ECSPI2_MISO__ECSPI2_MISO 0x078 0x368 0x6a0 0x0 0x0 95 #define MX6SL_PAD_ECSPI2_MISO__SDMA_EXT_EVENT0 95 #define MX6SL_PAD_ECSPI2_MISO__SDMA_EXT_EVENT0 0x078 0x368 0x000 0x1 0x0 96 #define MX6SL_PAD_ECSPI2_MISO__UART3_RTS_B 96 #define MX6SL_PAD_ECSPI2_MISO__UART3_RTS_B 0x078 0x368 0x808 0x2 0x0 97 #define MX6SL_PAD_ECSPI2_MISO__UART3_CTS_B 97 #define MX6SL_PAD_ECSPI2_MISO__UART3_CTS_B 0x078 0x368 0x000 0x2 0x0 98 #define MX6SL_PAD_ECSPI2_MISO__CSI_MCLK 98 #define MX6SL_PAD_ECSPI2_MISO__CSI_MCLK 0x078 0x368 0x000 0x3 0x0 99 #define MX6SL_PAD_ECSPI2_MISO__SD1_WP 99 #define MX6SL_PAD_ECSPI2_MISO__SD1_WP 0x078 0x368 0x82c 0x4 0x0 100 #define MX6SL_PAD_ECSPI2_MISO__GPIO4_IO14 100 #define MX6SL_PAD_ECSPI2_MISO__GPIO4_IO14 0x078 0x368 0x000 0x5 0x0 101 #define MX6SL_PAD_ECSPI2_MISO__USB_OTG1_OC 101 #define MX6SL_PAD_ECSPI2_MISO__USB_OTG1_OC 0x078 0x368 0x824 0x6 0x0 102 #define MX6SL_PAD_ECSPI2_MOSI__ECSPI2_MOSI 102 #define MX6SL_PAD_ECSPI2_MOSI__ECSPI2_MOSI 0x07c 0x36c 0x6a4 0x0 0x0 103 #define MX6SL_PAD_ECSPI2_MOSI__SDMA_EXT_EVENT1 103 #define MX6SL_PAD_ECSPI2_MOSI__SDMA_EXT_EVENT1 0x07c 0x36c 0x000 0x1 0x0 104 #define MX6SL_PAD_ECSPI2_MOSI__UART3_TX_DATA 104 #define MX6SL_PAD_ECSPI2_MOSI__UART3_TX_DATA 0x07c 0x36c 0x000 0x2 0x0 105 #define MX6SL_PAD_ECSPI2_MOSI__UART3_RX_DATA 105 #define MX6SL_PAD_ECSPI2_MOSI__UART3_RX_DATA 0x07c 0x36c 0x80c 0x2 0x2 106 #define MX6SL_PAD_ECSPI2_MOSI__CSI_HSYNC 106 #define MX6SL_PAD_ECSPI2_MOSI__CSI_HSYNC 0x07c 0x36c 0x670 0x3 0x0 107 #define MX6SL_PAD_ECSPI2_MOSI__SD1_VSELECT 107 #define MX6SL_PAD_ECSPI2_MOSI__SD1_VSELECT 0x07c 0x36c 0x000 0x4 0x0 108 #define MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 108 #define MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x07c 0x36c 0x000 0x5 0x0 109 #define MX6SL_PAD_ECSPI2_SCLK__ECSPI2_SCLK 109 #define MX6SL_PAD_ECSPI2_SCLK__ECSPI2_SCLK 0x080 0x370 0x69c 0x0 0x0 110 #define MX6SL_PAD_ECSPI2_SCLK__SPDIF_EXT_CLK 110 #define MX6SL_PAD_ECSPI2_SCLK__SPDIF_EXT_CLK 0x080 0x370 0x7f4 0x1 0x1 111 #define MX6SL_PAD_ECSPI2_SCLK__UART3_RX_DATA 111 #define MX6SL_PAD_ECSPI2_SCLK__UART3_RX_DATA 0x080 0x370 0x80c 0x2 0x3 112 #define MX6SL_PAD_ECSPI2_SCLK__UART3_TX_DATA 112 #define MX6SL_PAD_ECSPI2_SCLK__UART3_TX_DATA 0x080 0x370 0x000 0x2 0x0 113 #define MX6SL_PAD_ECSPI2_SCLK__CSI_PIXCLK 113 #define MX6SL_PAD_ECSPI2_SCLK__CSI_PIXCLK 0x080 0x370 0x674 0x3 0x0 114 #define MX6SL_PAD_ECSPI2_SCLK__SD1_RESET 114 #define MX6SL_PAD_ECSPI2_SCLK__SD1_RESET 0x080 0x370 0x000 0x4 0x0 115 #define MX6SL_PAD_ECSPI2_SCLK__GPIO4_IO12 115 #define MX6SL_PAD_ECSPI2_SCLK__GPIO4_IO12 0x080 0x370 0x000 0x5 0x0 116 #define MX6SL_PAD_ECSPI2_SCLK__USB_OTG2_OC 116 #define MX6SL_PAD_ECSPI2_SCLK__USB_OTG2_OC 0x080 0x370 0x820 0x6 0x1 117 #define MX6SL_PAD_ECSPI2_SS0__ECSPI2_SS0 117 #define MX6SL_PAD_ECSPI2_SS0__ECSPI2_SS0 0x084 0x374 0x6a8 0x0 0x0 118 #define MX6SL_PAD_ECSPI2_SS0__ECSPI1_SS3 118 #define MX6SL_PAD_ECSPI2_SS0__ECSPI1_SS3 0x084 0x374 0x698 0x1 0x0 119 #define MX6SL_PAD_ECSPI2_SS0__UART3_CTS_B 119 #define MX6SL_PAD_ECSPI2_SS0__UART3_CTS_B 0x084 0x374 0x000 0x2 0x0 120 #define MX6SL_PAD_ECSPI2_SS0__UART3_RTS_B 120 #define MX6SL_PAD_ECSPI2_SS0__UART3_RTS_B 0x084 0x374 0x808 0x2 0x1 121 #define MX6SL_PAD_ECSPI2_SS0__CSI_VSYNC 121 #define MX6SL_PAD_ECSPI2_SS0__CSI_VSYNC 0x084 0x374 0x678 0x3 0x0 122 #define MX6SL_PAD_ECSPI2_SS0__SD1_CD_B 122 #define MX6SL_PAD_ECSPI2_SS0__SD1_CD_B 0x084 0x374 0x828 0x4 0x0 123 #define MX6SL_PAD_ECSPI2_SS0__GPIO4_IO15 123 #define MX6SL_PAD_ECSPI2_SS0__GPIO4_IO15 0x084 0x374 0x000 0x5 0x0 124 #define MX6SL_PAD_ECSPI2_SS0__USB_OTG1_PWR 124 #define MX6SL_PAD_ECSPI2_SS0__USB_OTG1_PWR 0x084 0x374 0x000 0x6 0x0 125 #define MX6SL_PAD_EPDC_BDR0__EPDC_BDR0 125 #define MX6SL_PAD_EPDC_BDR0__EPDC_BDR0 0x088 0x378 0x000 0x0 0x0 126 #define MX6SL_PAD_EPDC_BDR0__SD4_CLK 126 #define MX6SL_PAD_EPDC_BDR0__SD4_CLK 0x088 0x378 0x850 0x1 0x0 127 #define MX6SL_PAD_EPDC_BDR0__UART3_RTS_B 127 #define MX6SL_PAD_EPDC_BDR0__UART3_RTS_B 0x088 0x378 0x808 0x2 0x2 128 #define MX6SL_PAD_EPDC_BDR0__UART3_CTS_B 128 #define MX6SL_PAD_EPDC_BDR0__UART3_CTS_B 0x088 0x378 0x000 0x2 0x0 129 #define MX6SL_PAD_EPDC_BDR0__EIM_ADDR26 129 #define MX6SL_PAD_EPDC_BDR0__EIM_ADDR26 0x088 0x378 0x000 0x3 0x0 130 #define MX6SL_PAD_EPDC_BDR0__SPDC_RL 130 #define MX6SL_PAD_EPDC_BDR0__SPDC_RL 0x088 0x378 0x000 0x4 0x0 131 #define MX6SL_PAD_EPDC_BDR0__GPIO2_IO05 131 #define MX6SL_PAD_EPDC_BDR0__GPIO2_IO05 0x088 0x378 0x000 0x5 0x0 132 #define MX6SL_PAD_EPDC_BDR0__EPDC_SDCE7 132 #define MX6SL_PAD_EPDC_BDR0__EPDC_SDCE7 0x088 0x378 0x000 0x6 0x0 133 #define MX6SL_PAD_EPDC_BDR1__EPDC_BDR1 133 #define MX6SL_PAD_EPDC_BDR1__EPDC_BDR1 0x08c 0x37c 0x000 0x0 0x0 134 #define MX6SL_PAD_EPDC_BDR1__SD4_CMD 134 #define MX6SL_PAD_EPDC_BDR1__SD4_CMD 0x08c 0x37c 0x858 0x1 0x0 135 #define MX6SL_PAD_EPDC_BDR1__UART3_CTS_B 135 #define MX6SL_PAD_EPDC_BDR1__UART3_CTS_B 0x08c 0x37c 0x000 0x2 0x0 136 #define MX6SL_PAD_EPDC_BDR1__UART3_RTS_B 136 #define MX6SL_PAD_EPDC_BDR1__UART3_RTS_B 0x08c 0x37c 0x808 0x2 0x3 137 #define MX6SL_PAD_EPDC_BDR1__EIM_CRE 137 #define MX6SL_PAD_EPDC_BDR1__EIM_CRE 0x08c 0x37c 0x000 0x3 0x0 138 #define MX6SL_PAD_EPDC_BDR1__SPDC_UD 138 #define MX6SL_PAD_EPDC_BDR1__SPDC_UD 0x08c 0x37c 0x000 0x4 0x0 139 #define MX6SL_PAD_EPDC_BDR1__GPIO2_IO06 139 #define MX6SL_PAD_EPDC_BDR1__GPIO2_IO06 0x08c 0x37c 0x000 0x5 0x0 140 #define MX6SL_PAD_EPDC_BDR1__EPDC_SDCE8 140 #define MX6SL_PAD_EPDC_BDR1__EPDC_SDCE8 0x08c 0x37c 0x000 0x6 0x0 141 #define MX6SL_PAD_EPDC_D0__EPDC_DATA00 141 #define MX6SL_PAD_EPDC_D0__EPDC_DATA00 0x090 0x380 0x000 0x0 0x0 142 #define MX6SL_PAD_EPDC_D0__ECSPI4_MOSI 142 #define MX6SL_PAD_EPDC_D0__ECSPI4_MOSI 0x090 0x380 0x6d8 0x1 0x0 143 #define MX6SL_PAD_EPDC_D0__LCD_DATA24 143 #define MX6SL_PAD_EPDC_D0__LCD_DATA24 0x090 0x380 0x000 0x2 0x0 144 #define MX6SL_PAD_EPDC_D0__CSI_DATA00 144 #define MX6SL_PAD_EPDC_D0__CSI_DATA00 0x090 0x380 0x630 0x3 0x0 145 #define MX6SL_PAD_EPDC_D0__SPDC_DATA00 145 #define MX6SL_PAD_EPDC_D0__SPDC_DATA00 0x090 0x380 0x000 0x4 0x0 146 #define MX6SL_PAD_EPDC_D0__GPIO1_IO07 146 #define MX6SL_PAD_EPDC_D0__GPIO1_IO07 0x090 0x380 0x000 0x5 0x0 147 #define MX6SL_PAD_EPDC_D1__EPDC_DATA01 147 #define MX6SL_PAD_EPDC_D1__EPDC_DATA01 0x094 0x384 0x000 0x0 0x0 148 #define MX6SL_PAD_EPDC_D1__ECSPI4_MISO 148 #define MX6SL_PAD_EPDC_D1__ECSPI4_MISO 0x094 0x384 0x6d4 0x1 0x0 149 #define MX6SL_PAD_EPDC_D1__LCD_DATA25 149 #define MX6SL_PAD_EPDC_D1__LCD_DATA25 0x094 0x384 0x000 0x2 0x0 150 #define MX6SL_PAD_EPDC_D1__CSI_DATA01 150 #define MX6SL_PAD_EPDC_D1__CSI_DATA01 0x094 0x384 0x634 0x3 0x0 151 #define MX6SL_PAD_EPDC_D1__SPDC_DATA01 151 #define MX6SL_PAD_EPDC_D1__SPDC_DATA01 0x094 0x384 0x000 0x4 0x0 152 #define MX6SL_PAD_EPDC_D1__GPIO1_IO08 152 #define MX6SL_PAD_EPDC_D1__GPIO1_IO08 0x094 0x384 0x000 0x5 0x0 153 #define MX6SL_PAD_EPDC_D10__EPDC_DATA10 153 #define MX6SL_PAD_EPDC_D10__EPDC_DATA10 0x098 0x388 0x000 0x0 0x0 154 #define MX6SL_PAD_EPDC_D10__ECSPI3_SS0 154 #define MX6SL_PAD_EPDC_D10__ECSPI3_SS0 0x098 0x388 0x6c0 0x1 0x1 155 #define MX6SL_PAD_EPDC_D10__EPDC_PWR_CTRL2 155 #define MX6SL_PAD_EPDC_D10__EPDC_PWR_CTRL2 0x098 0x388 0x000 0x2 0x0 156 #define MX6SL_PAD_EPDC_D10__EIM_ADDR18 156 #define MX6SL_PAD_EPDC_D10__EIM_ADDR18 0x098 0x388 0x000 0x3 0x0 157 #define MX6SL_PAD_EPDC_D10__SPDC_DATA10 157 #define MX6SL_PAD_EPDC_D10__SPDC_DATA10 0x098 0x388 0x000 0x4 0x0 158 #define MX6SL_PAD_EPDC_D10__GPIO1_IO17 158 #define MX6SL_PAD_EPDC_D10__GPIO1_IO17 0x098 0x388 0x000 0x5 0x0 159 #define MX6SL_PAD_EPDC_D10__SD4_WP 159 #define MX6SL_PAD_EPDC_D10__SD4_WP 0x098 0x388 0x87c 0x6 0x0 160 #define MX6SL_PAD_EPDC_D11__EPDC_DATA11 160 #define MX6SL_PAD_EPDC_D11__EPDC_DATA11 0x09c 0x38c 0x000 0x0 0x0 161 #define MX6SL_PAD_EPDC_D11__ECSPI3_SCLK 161 #define MX6SL_PAD_EPDC_D11__ECSPI3_SCLK 0x09c 0x38c 0x6b0 0x1 0x1 162 #define MX6SL_PAD_EPDC_D11__EPDC_PWR_CTRL3 162 #define MX6SL_PAD_EPDC_D11__EPDC_PWR_CTRL3 0x09c 0x38c 0x000 0x2 0x0 163 #define MX6SL_PAD_EPDC_D11__EIM_ADDR19 163 #define MX6SL_PAD_EPDC_D11__EIM_ADDR19 0x09c 0x38c 0x000 0x3 0x0 164 #define MX6SL_PAD_EPDC_D11__SPDC_DATA11 164 #define MX6SL_PAD_EPDC_D11__SPDC_DATA11 0x09c 0x38c 0x000 0x4 0x0 165 #define MX6SL_PAD_EPDC_D11__GPIO1_IO18 165 #define MX6SL_PAD_EPDC_D11__GPIO1_IO18 0x09c 0x38c 0x000 0x5 0x0 166 #define MX6SL_PAD_EPDC_D11__SD4_CD_B 166 #define MX6SL_PAD_EPDC_D11__SD4_CD_B 0x09c 0x38c 0x854 0x6 0x0 167 #define MX6SL_PAD_EPDC_D12__EPDC_DATA12 167 #define MX6SL_PAD_EPDC_D12__EPDC_DATA12 0x0a0 0x390 0x000 0x0 0x0 168 #define MX6SL_PAD_EPDC_D12__UART2_RX_DATA 168 #define MX6SL_PAD_EPDC_D12__UART2_RX_DATA 0x0a0 0x390 0x804 0x1 0x0 169 #define MX6SL_PAD_EPDC_D12__UART2_TX_DATA 169 #define MX6SL_PAD_EPDC_D12__UART2_TX_DATA 0x0a0 0x390 0x000 0x1 0x0 170 #define MX6SL_PAD_EPDC_D12__EPDC_PWR_COM 170 #define MX6SL_PAD_EPDC_D12__EPDC_PWR_COM 0x0a0 0x390 0x000 0x2 0x0 171 #define MX6SL_PAD_EPDC_D12__EIM_ADDR20 171 #define MX6SL_PAD_EPDC_D12__EIM_ADDR20 0x0a0 0x390 0x000 0x3 0x0 172 #define MX6SL_PAD_EPDC_D12__SPDC_DATA12 172 #define MX6SL_PAD_EPDC_D12__SPDC_DATA12 0x0a0 0x390 0x000 0x4 0x0 173 #define MX6SL_PAD_EPDC_D12__GPIO1_IO19 173 #define MX6SL_PAD_EPDC_D12__GPIO1_IO19 0x0a0 0x390 0x000 0x5 0x0 174 #define MX6SL_PAD_EPDC_D12__ECSPI3_SS1 174 #define MX6SL_PAD_EPDC_D12__ECSPI3_SS1 0x0a0 0x390 0x6c4 0x6 0x1 175 #define MX6SL_PAD_EPDC_D13__EPDC_DATA13 175 #define MX6SL_PAD_EPDC_D13__EPDC_DATA13 0x0a4 0x394 0x000 0x0 0x0 176 #define MX6SL_PAD_EPDC_D13__UART2_TX_DATA 176 #define MX6SL_PAD_EPDC_D13__UART2_TX_DATA 0x0a4 0x394 0x000 0x1 0x0 177 #define MX6SL_PAD_EPDC_D13__UART2_RX_DATA 177 #define MX6SL_PAD_EPDC_D13__UART2_RX_DATA 0x0a4 0x394 0x804 0x1 0x1 178 #define MX6SL_PAD_EPDC_D13__EPDC_PWR_IRQ 178 #define MX6SL_PAD_EPDC_D13__EPDC_PWR_IRQ 0x0a4 0x394 0x6e8 0x2 0x0 179 #define MX6SL_PAD_EPDC_D13__EIM_ADDR21 179 #define MX6SL_PAD_EPDC_D13__EIM_ADDR21 0x0a4 0x394 0x000 0x3 0x0 180 #define MX6SL_PAD_EPDC_D13__SPDC_DATA13 180 #define MX6SL_PAD_EPDC_D13__SPDC_DATA13 0x0a4 0x394 0x000 0x4 0x0 181 #define MX6SL_PAD_EPDC_D13__GPIO1_IO20 181 #define MX6SL_PAD_EPDC_D13__GPIO1_IO20 0x0a4 0x394 0x000 0x5 0x0 182 #define MX6SL_PAD_EPDC_D13__ECSPI3_SS2 182 #define MX6SL_PAD_EPDC_D13__ECSPI3_SS2 0x0a4 0x394 0x6c8 0x6 0x0 183 #define MX6SL_PAD_EPDC_D14__EPDC_DATA14 183 #define MX6SL_PAD_EPDC_D14__EPDC_DATA14 0x0a8 0x398 0x000 0x0 0x0 184 #define MX6SL_PAD_EPDC_D14__UART2_RTS_B 184 #define MX6SL_PAD_EPDC_D14__UART2_RTS_B 0x0a8 0x398 0x800 0x1 0x0 185 #define MX6SL_PAD_EPDC_D14__UART2_CTS_B 185 #define MX6SL_PAD_EPDC_D14__UART2_CTS_B 0x0a8 0x398 0x000 0x1 0x0 186 #define MX6SL_PAD_EPDC_D14__EPDC_PWR_STAT 186 #define MX6SL_PAD_EPDC_D14__EPDC_PWR_STAT 0x0a8 0x398 0x6ec 0x2 0x0 187 #define MX6SL_PAD_EPDC_D14__EIM_ADDR22 187 #define MX6SL_PAD_EPDC_D14__EIM_ADDR22 0x0a8 0x398 0x000 0x3 0x0 188 #define MX6SL_PAD_EPDC_D14__SPDC_DATA14 188 #define MX6SL_PAD_EPDC_D14__SPDC_DATA14 0x0a8 0x398 0x000 0x4 0x0 189 #define MX6SL_PAD_EPDC_D14__GPIO1_IO21 189 #define MX6SL_PAD_EPDC_D14__GPIO1_IO21 0x0a8 0x398 0x000 0x5 0x0 190 #define MX6SL_PAD_EPDC_D14__ECSPI3_SS3 190 #define MX6SL_PAD_EPDC_D14__ECSPI3_SS3 0x0a8 0x398 0x6cc 0x6 0x0 191 #define MX6SL_PAD_EPDC_D15__EPDC_DATA15 191 #define MX6SL_PAD_EPDC_D15__EPDC_DATA15 0x0ac 0x39c 0x000 0x0 0x0 192 #define MX6SL_PAD_EPDC_D15__UART2_CTS_B 192 #define MX6SL_PAD_EPDC_D15__UART2_CTS_B 0x0ac 0x39c 0x000 0x1 0x0 193 #define MX6SL_PAD_EPDC_D15__UART2_RTS_B 193 #define MX6SL_PAD_EPDC_D15__UART2_RTS_B 0x0ac 0x39c 0x800 0x1 0x1 194 #define MX6SL_PAD_EPDC_D15__EPDC_PWR_WAKE 194 #define MX6SL_PAD_EPDC_D15__EPDC_PWR_WAKE 0x0ac 0x39c 0x000 0x2 0x0 195 #define MX6SL_PAD_EPDC_D15__EIM_ADDR23 195 #define MX6SL_PAD_EPDC_D15__EIM_ADDR23 0x0ac 0x39c 0x000 0x3 0x0 196 #define MX6SL_PAD_EPDC_D15__SPDC_DATA15 196 #define MX6SL_PAD_EPDC_D15__SPDC_DATA15 0x0ac 0x39c 0x000 0x4 0x0 197 #define MX6SL_PAD_EPDC_D15__GPIO1_IO22 197 #define MX6SL_PAD_EPDC_D15__GPIO1_IO22 0x0ac 0x39c 0x000 0x5 0x0 198 #define MX6SL_PAD_EPDC_D15__ECSPI3_RDY 198 #define MX6SL_PAD_EPDC_D15__ECSPI3_RDY 0x0ac 0x39c 0x6b4 0x6 0x1 199 #define MX6SL_PAD_EPDC_D2__EPDC_DATA02 199 #define MX6SL_PAD_EPDC_D2__EPDC_DATA02 0x0b0 0x3a0 0x000 0x0 0x0 200 #define MX6SL_PAD_EPDC_D2__ECSPI4_SS0 200 #define MX6SL_PAD_EPDC_D2__ECSPI4_SS0 0x0b0 0x3a0 0x6dc 0x1 0x0 201 #define MX6SL_PAD_EPDC_D2__LCD_DATA26 201 #define MX6SL_PAD_EPDC_D2__LCD_DATA26 0x0b0 0x3a0 0x000 0x2 0x0 202 #define MX6SL_PAD_EPDC_D2__CSI_DATA02 202 #define MX6SL_PAD_EPDC_D2__CSI_DATA02 0x0b0 0x3a0 0x638 0x3 0x0 203 #define MX6SL_PAD_EPDC_D2__SPDC_DATA02 203 #define MX6SL_PAD_EPDC_D2__SPDC_DATA02 0x0b0 0x3a0 0x000 0x4 0x0 204 #define MX6SL_PAD_EPDC_D2__GPIO1_IO09 204 #define MX6SL_PAD_EPDC_D2__GPIO1_IO09 0x0b0 0x3a0 0x000 0x5 0x0 205 #define MX6SL_PAD_EPDC_D3__EPDC_DATA03 205 #define MX6SL_PAD_EPDC_D3__EPDC_DATA03 0x0b4 0x3a4 0x000 0x0 0x0 206 #define MX6SL_PAD_EPDC_D3__ECSPI4_SCLK 206 #define MX6SL_PAD_EPDC_D3__ECSPI4_SCLK 0x0b4 0x3a4 0x6d0 0x1 0x0 207 #define MX6SL_PAD_EPDC_D3__LCD_DATA27 207 #define MX6SL_PAD_EPDC_D3__LCD_DATA27 0x0b4 0x3a4 0x000 0x2 0x0 208 #define MX6SL_PAD_EPDC_D3__CSI_DATA03 208 #define MX6SL_PAD_EPDC_D3__CSI_DATA03 0x0b4 0x3a4 0x63c 0x3 0x0 209 #define MX6SL_PAD_EPDC_D3__SPDC_DATA03 209 #define MX6SL_PAD_EPDC_D3__SPDC_DATA03 0x0b4 0x3a4 0x000 0x4 0x0 210 #define MX6SL_PAD_EPDC_D3__GPIO1_IO10 210 #define MX6SL_PAD_EPDC_D3__GPIO1_IO10 0x0b4 0x3a4 0x000 0x5 0x0 211 #define MX6SL_PAD_EPDC_D4__EPDC_DATA04 211 #define MX6SL_PAD_EPDC_D4__EPDC_DATA04 0x0b8 0x3a8 0x000 0x0 0x0 212 #define MX6SL_PAD_EPDC_D4__ECSPI4_SS1 212 #define MX6SL_PAD_EPDC_D4__ECSPI4_SS1 0x0b8 0x3a8 0x6e0 0x1 0x0 213 #define MX6SL_PAD_EPDC_D4__LCD_DATA28 213 #define MX6SL_PAD_EPDC_D4__LCD_DATA28 0x0b8 0x3a8 0x000 0x2 0x0 214 #define MX6SL_PAD_EPDC_D4__CSI_DATA04 214 #define MX6SL_PAD_EPDC_D4__CSI_DATA04 0x0b8 0x3a8 0x640 0x3 0x0 215 #define MX6SL_PAD_EPDC_D4__SPDC_DATA04 215 #define MX6SL_PAD_EPDC_D4__SPDC_DATA04 0x0b8 0x3a8 0x000 0x4 0x0 216 #define MX6SL_PAD_EPDC_D4__GPIO1_IO11 216 #define MX6SL_PAD_EPDC_D4__GPIO1_IO11 0x0b8 0x3a8 0x000 0x5 0x0 217 #define MX6SL_PAD_EPDC_D5__EPDC_DATA05 217 #define MX6SL_PAD_EPDC_D5__EPDC_DATA05 0x0bc 0x3ac 0x000 0x0 0x0 218 #define MX6SL_PAD_EPDC_D5__ECSPI4_SS2 218 #define MX6SL_PAD_EPDC_D5__ECSPI4_SS2 0x0bc 0x3ac 0x6e4 0x1 0x0 219 #define MX6SL_PAD_EPDC_D5__LCD_DATA29 219 #define MX6SL_PAD_EPDC_D5__LCD_DATA29 0x0bc 0x3ac 0x000 0x2 0x0 220 #define MX6SL_PAD_EPDC_D5__CSI_DATA05 220 #define MX6SL_PAD_EPDC_D5__CSI_DATA05 0x0bc 0x3ac 0x644 0x3 0x0 221 #define MX6SL_PAD_EPDC_D5__SPDC_DATA05 221 #define MX6SL_PAD_EPDC_D5__SPDC_DATA05 0x0bc 0x3ac 0x000 0x4 0x0 222 #define MX6SL_PAD_EPDC_D5__GPIO1_IO12 222 #define MX6SL_PAD_EPDC_D5__GPIO1_IO12 0x0bc 0x3ac 0x000 0x5 0x0 223 #define MX6SL_PAD_EPDC_D6__EPDC_DATA06 223 #define MX6SL_PAD_EPDC_D6__EPDC_DATA06 0x0c0 0x3b0 0x000 0x0 0x0 224 #define MX6SL_PAD_EPDC_D6__ECSPI4_SS3 224 #define MX6SL_PAD_EPDC_D6__ECSPI4_SS3 0x0c0 0x3b0 0x000 0x1 0x0 225 #define MX6SL_PAD_EPDC_D6__LCD_DATA30 225 #define MX6SL_PAD_EPDC_D6__LCD_DATA30 0x0c0 0x3b0 0x000 0x2 0x0 226 #define MX6SL_PAD_EPDC_D6__CSI_DATA06 226 #define MX6SL_PAD_EPDC_D6__CSI_DATA06 0x0c0 0x3b0 0x648 0x3 0x0 227 #define MX6SL_PAD_EPDC_D6__SPDC_DATA06 227 #define MX6SL_PAD_EPDC_D6__SPDC_DATA06 0x0c0 0x3b0 0x000 0x4 0x0 228 #define MX6SL_PAD_EPDC_D6__GPIO1_IO13 228 #define MX6SL_PAD_EPDC_D6__GPIO1_IO13 0x0c0 0x3b0 0x000 0x5 0x0 229 #define MX6SL_PAD_EPDC_D7__EPDC_DATA07 229 #define MX6SL_PAD_EPDC_D7__EPDC_DATA07 0x0c4 0x3b4 0x000 0x0 0x0 230 #define MX6SL_PAD_EPDC_D7__ECSPI4_RDY 230 #define MX6SL_PAD_EPDC_D7__ECSPI4_RDY 0x0c4 0x3b4 0x000 0x1 0x0 231 #define MX6SL_PAD_EPDC_D7__LCD_DATA31 231 #define MX6SL_PAD_EPDC_D7__LCD_DATA31 0x0c4 0x3b4 0x000 0x2 0x0 232 #define MX6SL_PAD_EPDC_D7__CSI_DATA07 232 #define MX6SL_PAD_EPDC_D7__CSI_DATA07 0x0c4 0x3b4 0x64c 0x3 0x0 233 #define MX6SL_PAD_EPDC_D7__SPDC_DATA07 233 #define MX6SL_PAD_EPDC_D7__SPDC_DATA07 0x0c4 0x3b4 0x000 0x4 0x0 234 #define MX6SL_PAD_EPDC_D7__GPIO1_IO14 234 #define MX6SL_PAD_EPDC_D7__GPIO1_IO14 0x0c4 0x3b4 0x000 0x5 0x0 235 #define MX6SL_PAD_EPDC_D8__EPDC_DATA08 235 #define MX6SL_PAD_EPDC_D8__EPDC_DATA08 0x0c8 0x3b8 0x000 0x0 0x0 236 #define MX6SL_PAD_EPDC_D8__ECSPI3_MOSI 236 #define MX6SL_PAD_EPDC_D8__ECSPI3_MOSI 0x0c8 0x3b8 0x6bc 0x1 0x1 237 #define MX6SL_PAD_EPDC_D8__EPDC_PWR_CTRL0 237 #define MX6SL_PAD_EPDC_D8__EPDC_PWR_CTRL0 0x0c8 0x3b8 0x000 0x2 0x0 238 #define MX6SL_PAD_EPDC_D8__EIM_ADDR16 238 #define MX6SL_PAD_EPDC_D8__EIM_ADDR16 0x0c8 0x3b8 0x000 0x3 0x0 239 #define MX6SL_PAD_EPDC_D8__SPDC_DATA08 239 #define MX6SL_PAD_EPDC_D8__SPDC_DATA08 0x0c8 0x3b8 0x000 0x4 0x0 240 #define MX6SL_PAD_EPDC_D8__GPIO1_IO15 240 #define MX6SL_PAD_EPDC_D8__GPIO1_IO15 0x0c8 0x3b8 0x000 0x5 0x0 241 #define MX6SL_PAD_EPDC_D8__SD4_RESET 241 #define MX6SL_PAD_EPDC_D8__SD4_RESET 0x0c8 0x3b8 0x000 0x6 0x0 242 #define MX6SL_PAD_EPDC_D9__EPDC_DATA09 242 #define MX6SL_PAD_EPDC_D9__EPDC_DATA09 0x0cc 0x3bc 0x000 0x0 0x0 243 #define MX6SL_PAD_EPDC_D9__ECSPI3_MISO 243 #define MX6SL_PAD_EPDC_D9__ECSPI3_MISO 0x0cc 0x3bc 0x6b8 0x1 0x1 244 #define MX6SL_PAD_EPDC_D9__EPDC_PWR_CTRL1 244 #define MX6SL_PAD_EPDC_D9__EPDC_PWR_CTRL1 0x0cc 0x3bc 0x000 0x2 0x0 245 #define MX6SL_PAD_EPDC_D9__EIM_ADDR17 245 #define MX6SL_PAD_EPDC_D9__EIM_ADDR17 0x0cc 0x3bc 0x000 0x3 0x0 246 #define MX6SL_PAD_EPDC_D9__SPDC_DATA09 246 #define MX6SL_PAD_EPDC_D9__SPDC_DATA09 0x0cc 0x3bc 0x000 0x4 0x0 247 #define MX6SL_PAD_EPDC_D9__GPIO1_IO16 247 #define MX6SL_PAD_EPDC_D9__GPIO1_IO16 0x0cc 0x3bc 0x000 0x5 0x0 248 #define MX6SL_PAD_EPDC_D9__SD4_VSELECT 248 #define MX6SL_PAD_EPDC_D9__SD4_VSELECT 0x0cc 0x3bc 0x000 0x6 0x0 249 #define MX6SL_PAD_EPDC_GDCLK__EPDC_GDCLK 249 #define MX6SL_PAD_EPDC_GDCLK__EPDC_GDCLK 0x0d0 0x3c0 0x000 0x0 0x0 250 #define MX6SL_PAD_EPDC_GDCLK__ECSPI2_SS2 250 #define MX6SL_PAD_EPDC_GDCLK__ECSPI2_SS2 0x0d0 0x3c0 0x000 0x1 0x0 251 #define MX6SL_PAD_EPDC_GDCLK__SPDC_YCKR 251 #define MX6SL_PAD_EPDC_GDCLK__SPDC_YCKR 0x0d0 0x3c0 0x000 0x2 0x0 252 #define MX6SL_PAD_EPDC_GDCLK__CSI_PIXCLK 252 #define MX6SL_PAD_EPDC_GDCLK__CSI_PIXCLK 0x0d0 0x3c0 0x674 0x3 0x1 253 #define MX6SL_PAD_EPDC_GDCLK__SPDC_YCKL 253 #define MX6SL_PAD_EPDC_GDCLK__SPDC_YCKL 0x0d0 0x3c0 0x000 0x4 0x0 254 #define MX6SL_PAD_EPDC_GDCLK__GPIO1_IO31 254 #define MX6SL_PAD_EPDC_GDCLK__GPIO1_IO31 0x0d0 0x3c0 0x000 0x5 0x0 255 #define MX6SL_PAD_EPDC_GDCLK__SD2_RESET 255 #define MX6SL_PAD_EPDC_GDCLK__SD2_RESET 0x0d0 0x3c0 0x000 0x6 0x0 256 #define MX6SL_PAD_EPDC_GDOE__EPDC_GDOE 256 #define MX6SL_PAD_EPDC_GDOE__EPDC_GDOE 0x0d4 0x3c4 0x000 0x0 0x0 257 #define MX6SL_PAD_EPDC_GDOE__ECSPI2_SS3 257 #define MX6SL_PAD_EPDC_GDOE__ECSPI2_SS3 0x0d4 0x3c4 0x000 0x1 0x0 258 #define MX6SL_PAD_EPDC_GDOE__SPDC_YOER 258 #define MX6SL_PAD_EPDC_GDOE__SPDC_YOER 0x0d4 0x3c4 0x000 0x2 0x0 259 #define MX6SL_PAD_EPDC_GDOE__CSI_HSYNC 259 #define MX6SL_PAD_EPDC_GDOE__CSI_HSYNC 0x0d4 0x3c4 0x670 0x3 0x1 260 #define MX6SL_PAD_EPDC_GDOE__SPDC_YOEL 260 #define MX6SL_PAD_EPDC_GDOE__SPDC_YOEL 0x0d4 0x3c4 0x000 0x4 0x0 261 #define MX6SL_PAD_EPDC_GDOE__GPIO2_IO00 261 #define MX6SL_PAD_EPDC_GDOE__GPIO2_IO00 0x0d4 0x3c4 0x000 0x5 0x0 262 #define MX6SL_PAD_EPDC_GDOE__SD2_VSELECT 262 #define MX6SL_PAD_EPDC_GDOE__SD2_VSELECT 0x0d4 0x3c4 0x000 0x6 0x0 263 #define MX6SL_PAD_EPDC_GDRL__EPDC_GDRL 263 #define MX6SL_PAD_EPDC_GDRL__EPDC_GDRL 0x0d8 0x3c8 0x000 0x0 0x0 264 #define MX6SL_PAD_EPDC_GDRL__ECSPI2_RDY 264 #define MX6SL_PAD_EPDC_GDRL__ECSPI2_RDY 0x0d8 0x3c8 0x000 0x1 0x0 265 #define MX6SL_PAD_EPDC_GDRL__SPDC_YDIOUR 265 #define MX6SL_PAD_EPDC_GDRL__SPDC_YDIOUR 0x0d8 0x3c8 0x000 0x2 0x0 266 #define MX6SL_PAD_EPDC_GDRL__CSI_MCLK 266 #define MX6SL_PAD_EPDC_GDRL__CSI_MCLK 0x0d8 0x3c8 0x000 0x3 0x0 267 #define MX6SL_PAD_EPDC_GDRL__SPDC_YDIOUL 267 #define MX6SL_PAD_EPDC_GDRL__SPDC_YDIOUL 0x0d8 0x3c8 0x000 0x4 0x0 268 #define MX6SL_PAD_EPDC_GDRL__GPIO2_IO01 268 #define MX6SL_PAD_EPDC_GDRL__GPIO2_IO01 0x0d8 0x3c8 0x000 0x5 0x0 269 #define MX6SL_PAD_EPDC_GDRL__SD2_WP 269 #define MX6SL_PAD_EPDC_GDRL__SD2_WP 0x0d8 0x3c8 0x834 0x6 0x1 270 #define MX6SL_PAD_EPDC_GDSP__EPDC_GDSP 270 #define MX6SL_PAD_EPDC_GDSP__EPDC_GDSP 0x0dc 0x3cc 0x000 0x0 0x0 271 #define MX6SL_PAD_EPDC_GDSP__PWM4_OUT 271 #define MX6SL_PAD_EPDC_GDSP__PWM4_OUT 0x0dc 0x3cc 0x000 0x1 0x0 272 #define MX6SL_PAD_EPDC_GDSP__SPDC_YDIODR 272 #define MX6SL_PAD_EPDC_GDSP__SPDC_YDIODR 0x0dc 0x3cc 0x000 0x2 0x0 273 #define MX6SL_PAD_EPDC_GDSP__CSI_VSYNC 273 #define MX6SL_PAD_EPDC_GDSP__CSI_VSYNC 0x0dc 0x3cc 0x678 0x3 0x1 274 #define MX6SL_PAD_EPDC_GDSP__SPDC_YDIODL 274 #define MX6SL_PAD_EPDC_GDSP__SPDC_YDIODL 0x0dc 0x3cc 0x000 0x4 0x0 275 #define MX6SL_PAD_EPDC_GDSP__GPIO2_IO02 275 #define MX6SL_PAD_EPDC_GDSP__GPIO2_IO02 0x0dc 0x3cc 0x000 0x5 0x0 276 #define MX6SL_PAD_EPDC_GDSP__SD2_CD_B 276 #define MX6SL_PAD_EPDC_GDSP__SD2_CD_B 0x0dc 0x3cc 0x830 0x6 0x1 277 #define MX6SL_PAD_EPDC_PWRCOM__EPDC_PWR_COM 277 #define MX6SL_PAD_EPDC_PWRCOM__EPDC_PWR_COM 0x0e0 0x3d0 0x000 0x0 0x0 278 #define MX6SL_PAD_EPDC_PWRCOM__SD4_DATA0 278 #define MX6SL_PAD_EPDC_PWRCOM__SD4_DATA0 0x0e0 0x3d0 0x85c 0x1 0x0 279 #define MX6SL_PAD_EPDC_PWRCOM__LCD_DATA20 279 #define MX6SL_PAD_EPDC_PWRCOM__LCD_DATA20 0x0e0 0x3d0 0x7c8 0x2 0x0 280 #define MX6SL_PAD_EPDC_PWRCOM__EIM_BCLK 280 #define MX6SL_PAD_EPDC_PWRCOM__EIM_BCLK 0x0e0 0x3d0 0x000 0x3 0x0 281 #define MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 281 #define MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x0e0 0x3d0 0x5dc 0x4 0x0 282 #define MX6SL_PAD_EPDC_PWRCOM__GPIO2_IO11 282 #define MX6SL_PAD_EPDC_PWRCOM__GPIO2_IO11 0x0e0 0x3d0 0x000 0x5 0x0 283 #define MX6SL_PAD_EPDC_PWRCOM__SD3_RESET 283 #define MX6SL_PAD_EPDC_PWRCOM__SD3_RESET 0x0e0 0x3d0 0x000 0x6 0x0 284 #define MX6SL_PAD_EPDC_PWRCTRL0__EPDC_PWR_CTRL 284 #define MX6SL_PAD_EPDC_PWRCTRL0__EPDC_PWR_CTRL0 0x0e4 0x3d4 0x000 0x0 0x0 285 #define MX6SL_PAD_EPDC_PWRCTRL0__AUD5_RXC 285 #define MX6SL_PAD_EPDC_PWRCTRL0__AUD5_RXC 0x0e4 0x3d4 0x604 0x1 0x0 286 #define MX6SL_PAD_EPDC_PWRCTRL0__LCD_DATA16 286 #define MX6SL_PAD_EPDC_PWRCTRL0__LCD_DATA16 0x0e4 0x3d4 0x7b8 0x2 0x0 287 #define MX6SL_PAD_EPDC_PWRCTRL0__EIM_RW 287 #define MX6SL_PAD_EPDC_PWRCTRL0__EIM_RW 0x0e4 0x3d4 0x000 0x3 0x0 288 #define MX6SL_PAD_EPDC_PWRCTRL0__SPDC_YCKL 288 #define MX6SL_PAD_EPDC_PWRCTRL0__SPDC_YCKL 0x0e4 0x3d4 0x000 0x4 0x0 289 #define MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 289 #define MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 0x0e4 0x3d4 0x000 0x5 0x0 290 #define MX6SL_PAD_EPDC_PWRCTRL0__SD4_RESET 290 #define MX6SL_PAD_EPDC_PWRCTRL0__SD4_RESET 0x0e4 0x3d4 0x000 0x6 0x0 291 #define MX6SL_PAD_EPDC_PWRCTRL1__EPDC_PWR_CTRL 291 #define MX6SL_PAD_EPDC_PWRCTRL1__EPDC_PWR_CTRL1 0x0e8 0x3d8 0x000 0x0 0x0 292 #define MX6SL_PAD_EPDC_PWRCTRL1__AUD5_TXFS 292 #define MX6SL_PAD_EPDC_PWRCTRL1__AUD5_TXFS 0x0e8 0x3d8 0x610 0x1 0x0 293 #define MX6SL_PAD_EPDC_PWRCTRL1__LCD_DATA17 293 #define MX6SL_PAD_EPDC_PWRCTRL1__LCD_DATA17 0x0e8 0x3d8 0x7bc 0x2 0x0 294 #define MX6SL_PAD_EPDC_PWRCTRL1__EIM_OE_B 294 #define MX6SL_PAD_EPDC_PWRCTRL1__EIM_OE_B 0x0e8 0x3d8 0x000 0x3 0x0 295 #define MX6SL_PAD_EPDC_PWRCTRL1__SPDC_YOEL 295 #define MX6SL_PAD_EPDC_PWRCTRL1__SPDC_YOEL 0x0e8 0x3d8 0x000 0x4 0x0 296 #define MX6SL_PAD_EPDC_PWRCTRL1__GPIO2_IO08 296 #define MX6SL_PAD_EPDC_PWRCTRL1__GPIO2_IO08 0x0e8 0x3d8 0x000 0x5 0x0 297 #define MX6SL_PAD_EPDC_PWRCTRL1__SD4_VSELECT 297 #define MX6SL_PAD_EPDC_PWRCTRL1__SD4_VSELECT 0x0e8 0x3d8 0x000 0x6 0x0 298 #define MX6SL_PAD_EPDC_PWRCTRL2__EPDC_PWR_CTRL 298 #define MX6SL_PAD_EPDC_PWRCTRL2__EPDC_PWR_CTRL2 0x0ec 0x3dc 0x000 0x0 0x0 299 #define MX6SL_PAD_EPDC_PWRCTRL2__AUD5_TXD 299 #define MX6SL_PAD_EPDC_PWRCTRL2__AUD5_TXD 0x0ec 0x3dc 0x600 0x1 0x0 300 #define MX6SL_PAD_EPDC_PWRCTRL2__LCD_DATA18 300 #define MX6SL_PAD_EPDC_PWRCTRL2__LCD_DATA18 0x0ec 0x3dc 0x7c0 0x2 0x0 301 #define MX6SL_PAD_EPDC_PWRCTRL2__EIM_CS0_B 301 #define MX6SL_PAD_EPDC_PWRCTRL2__EIM_CS0_B 0x0ec 0x3dc 0x000 0x3 0x0 302 #define MX6SL_PAD_EPDC_PWRCTRL2__SPDC_YDIOUL 302 #define MX6SL_PAD_EPDC_PWRCTRL2__SPDC_YDIOUL 0x0ec 0x3dc 0x000 0x4 0x0 303 #define MX6SL_PAD_EPDC_PWRCTRL2__GPIO2_IO09 303 #define MX6SL_PAD_EPDC_PWRCTRL2__GPIO2_IO09 0x0ec 0x3dc 0x000 0x5 0x0 304 #define MX6SL_PAD_EPDC_PWRCTRL2__SD4_WP 304 #define MX6SL_PAD_EPDC_PWRCTRL2__SD4_WP 0x0ec 0x3dc 0x87c 0x6 0x1 305 #define MX6SL_PAD_EPDC_PWRCTRL3__EPDC_PWR_CTRL 305 #define MX6SL_PAD_EPDC_PWRCTRL3__EPDC_PWR_CTRL3 0x0f0 0x3e0 0x000 0x0 0x0 306 #define MX6SL_PAD_EPDC_PWRCTRL3__AUD5_TXC 306 #define MX6SL_PAD_EPDC_PWRCTRL3__AUD5_TXC 0x0f0 0x3e0 0x60c 0x1 0x0 307 #define MX6SL_PAD_EPDC_PWRCTRL3__LCD_DATA19 307 #define MX6SL_PAD_EPDC_PWRCTRL3__LCD_DATA19 0x0f0 0x3e0 0x7c4 0x2 0x0 308 #define MX6SL_PAD_EPDC_PWRCTRL3__EIM_CS1_B 308 #define MX6SL_PAD_EPDC_PWRCTRL3__EIM_CS1_B 0x0f0 0x3e0 0x000 0x3 0x0 309 #define MX6SL_PAD_EPDC_PWRCTRL3__SPDC_YDIODL 309 #define MX6SL_PAD_EPDC_PWRCTRL3__SPDC_YDIODL 0x0f0 0x3e0 0x000 0x4 0x0 310 #define MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 310 #define MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x0f0 0x3e0 0x000 0x5 0x0 311 #define MX6SL_PAD_EPDC_PWRCTRL3__SD4_CD_B 311 #define MX6SL_PAD_EPDC_PWRCTRL3__SD4_CD_B 0x0f0 0x3e0 0x854 0x6 0x1 312 #define MX6SL_PAD_EPDC_PWRINT__EPDC_PWR_IRQ 312 #define MX6SL_PAD_EPDC_PWRINT__EPDC_PWR_IRQ 0x0f4 0x3e4 0x6e8 0x0 0x1 313 #define MX6SL_PAD_EPDC_PWRINT__SD4_DATA1 313 #define MX6SL_PAD_EPDC_PWRINT__SD4_DATA1 0x0f4 0x3e4 0x860 0x1 0x0 314 #define MX6SL_PAD_EPDC_PWRINT__LCD_DATA21 314 #define MX6SL_PAD_EPDC_PWRINT__LCD_DATA21 0x0f4 0x3e4 0x7cc 0x2 0x0 315 #define MX6SL_PAD_EPDC_PWRINT__EIM_ACLK_FREERU 315 #define MX6SL_PAD_EPDC_PWRINT__EIM_ACLK_FREERUN 0x0f4 0x3e4 0x000 0x3 0x0 316 #define MX6SL_PAD_EPDC_PWRINT__USB_OTG2_ID 316 #define MX6SL_PAD_EPDC_PWRINT__USB_OTG2_ID 0x0f4 0x3e4 0x5e0 0x4 0x0 317 #define MX6SL_PAD_EPDC_PWRINT__GPIO2_IO12 317 #define MX6SL_PAD_EPDC_PWRINT__GPIO2_IO12 0x0f4 0x3e4 0x000 0x5 0x0 318 #define MX6SL_PAD_EPDC_PWRINT__SD3_VSELECT 318 #define MX6SL_PAD_EPDC_PWRINT__SD3_VSELECT 0x0f4 0x3e4 0x000 0x6 0x0 319 #define MX6SL_PAD_EPDC_PWRSTAT__EPDC_PWR_STAT 319 #define MX6SL_PAD_EPDC_PWRSTAT__EPDC_PWR_STAT 0x0f8 0x3e8 0x6ec 0x0 0x1 320 #define MX6SL_PAD_EPDC_PWRSTAT__SD4_DATA2 320 #define MX6SL_PAD_EPDC_PWRSTAT__SD4_DATA2 0x0f8 0x3e8 0x864 0x1 0x0 321 #define MX6SL_PAD_EPDC_PWRSTAT__LCD_DATA22 321 #define MX6SL_PAD_EPDC_PWRSTAT__LCD_DATA22 0x0f8 0x3e8 0x7d0 0x2 0x0 322 #define MX6SL_PAD_EPDC_PWRSTAT__EIM_WAIT_B 322 #define MX6SL_PAD_EPDC_PWRSTAT__EIM_WAIT_B 0x0f8 0x3e8 0x884 0x3 0x0 323 #define MX6SL_PAD_EPDC_PWRSTAT__ARM_EVENTI 323 #define MX6SL_PAD_EPDC_PWRSTAT__ARM_EVENTI 0x0f8 0x3e8 0x000 0x4 0x0 324 #define MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 324 #define MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x0f8 0x3e8 0x000 0x5 0x0 325 #define MX6SL_PAD_EPDC_PWRSTAT__SD3_WP 325 #define MX6SL_PAD_EPDC_PWRSTAT__SD3_WP 0x0f8 0x3e8 0x84c 0x6 0x0 326 #define MX6SL_PAD_EPDC_PWRWAKEUP__EPDC_PWR_WAK 326 #define MX6SL_PAD_EPDC_PWRWAKEUP__EPDC_PWR_WAKE 0x0fc 0x3ec 0x000 0x0 0x0 327 #define MX6SL_PAD_EPDC_PWRWAKEUP__SD4_DATA3 327 #define MX6SL_PAD_EPDC_PWRWAKEUP__SD4_DATA3 0x0fc 0x3ec 0x868 0x1 0x0 328 #define MX6SL_PAD_EPDC_PWRWAKEUP__LCD_DATA23 328 #define MX6SL_PAD_EPDC_PWRWAKEUP__LCD_DATA23 0x0fc 0x3ec 0x7d4 0x2 0x0 329 #define MX6SL_PAD_EPDC_PWRWAKEUP__EIM_DTACK_B 329 #define MX6SL_PAD_EPDC_PWRWAKEUP__EIM_DTACK_B 0x0fc 0x3ec 0x880 0x3 0x0 330 #define MX6SL_PAD_EPDC_PWRWAKEUP__ARM_EVENTO 330 #define MX6SL_PAD_EPDC_PWRWAKEUP__ARM_EVENTO 0x0fc 0x3ec 0x000 0x4 0x0 331 #define MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 331 #define MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x0fc 0x3ec 0x000 0x5 0x0 332 #define MX6SL_PAD_EPDC_PWRWAKEUP__SD3_CD_B 332 #define MX6SL_PAD_EPDC_PWRWAKEUP__SD3_CD_B 0x0fc 0x3ec 0x838 0x6 0x0 333 #define MX6SL_PAD_EPDC_SDCE0__EPDC_SDCE0 333 #define MX6SL_PAD_EPDC_SDCE0__EPDC_SDCE0 0x100 0x3f0 0x000 0x0 0x0 334 #define MX6SL_PAD_EPDC_SDCE0__ECSPI2_SS1 334 #define MX6SL_PAD_EPDC_SDCE0__ECSPI2_SS1 0x100 0x3f0 0x6ac 0x1 0x0 335 #define MX6SL_PAD_EPDC_SDCE0__PWM3_OUT 335 #define MX6SL_PAD_EPDC_SDCE0__PWM3_OUT 0x100 0x3f0 0x000 0x2 0x0 336 #define MX6SL_PAD_EPDC_SDCE0__EIM_CS2_B 336 #define MX6SL_PAD_EPDC_SDCE0__EIM_CS2_B 0x100 0x3f0 0x000 0x3 0x0 337 #define MX6SL_PAD_EPDC_SDCE0__SPDC_YCKR 337 #define MX6SL_PAD_EPDC_SDCE0__SPDC_YCKR 0x100 0x3f0 0x000 0x4 0x0 338 #define MX6SL_PAD_EPDC_SDCE0__GPIO1_IO27 338 #define MX6SL_PAD_EPDC_SDCE0__GPIO1_IO27 0x100 0x3f0 0x000 0x5 0x0 339 #define MX6SL_PAD_EPDC_SDCE1__EPDC_SDCE1 339 #define MX6SL_PAD_EPDC_SDCE1__EPDC_SDCE1 0x104 0x3f4 0x000 0x0 0x0 340 #define MX6SL_PAD_EPDC_SDCE1__WDOG2_B 340 #define MX6SL_PAD_EPDC_SDCE1__WDOG2_B 0x104 0x3f4 0x000 0x1 0x0 341 #define MX6SL_PAD_EPDC_SDCE1__PWM4_OUT 341 #define MX6SL_PAD_EPDC_SDCE1__PWM4_OUT 0x104 0x3f4 0x000 0x2 0x0 342 #define MX6SL_PAD_EPDC_SDCE1__EIM_LBA_B 342 #define MX6SL_PAD_EPDC_SDCE1__EIM_LBA_B 0x104 0x3f4 0x000 0x3 0x0 343 #define MX6SL_PAD_EPDC_SDCE1__SPDC_YOER 343 #define MX6SL_PAD_EPDC_SDCE1__SPDC_YOER 0x104 0x3f4 0x000 0x4 0x0 344 #define MX6SL_PAD_EPDC_SDCE1__GPIO1_IO28 344 #define MX6SL_PAD_EPDC_SDCE1__GPIO1_IO28 0x104 0x3f4 0x000 0x5 0x0 345 #define MX6SL_PAD_EPDC_SDCE2__EPDC_SDCE2 345 #define MX6SL_PAD_EPDC_SDCE2__EPDC_SDCE2 0x108 0x3f8 0x000 0x0 0x0 346 #define MX6SL_PAD_EPDC_SDCE2__I2C3_SCL 346 #define MX6SL_PAD_EPDC_SDCE2__I2C3_SCL 0x108 0x3f8 0x72c 0x1 0x1 347 #define MX6SL_PAD_EPDC_SDCE2__PWM1_OUT 347 #define MX6SL_PAD_EPDC_SDCE2__PWM1_OUT 0x108 0x3f8 0x000 0x2 0x0 348 #define MX6SL_PAD_EPDC_SDCE2__EIM_EB0_B 348 #define MX6SL_PAD_EPDC_SDCE2__EIM_EB0_B 0x108 0x3f8 0x000 0x3 0x0 349 #define MX6SL_PAD_EPDC_SDCE2__SPDC_YDIOUR 349 #define MX6SL_PAD_EPDC_SDCE2__SPDC_YDIOUR 0x108 0x3f8 0x000 0x4 0x0 350 #define MX6SL_PAD_EPDC_SDCE2__GPIO1_IO29 350 #define MX6SL_PAD_EPDC_SDCE2__GPIO1_IO29 0x108 0x3f8 0x000 0x5 0x0 351 #define MX6SL_PAD_EPDC_SDCE3__EPDC_SDCE3 351 #define MX6SL_PAD_EPDC_SDCE3__EPDC_SDCE3 0x10c 0x3fc 0x000 0x0 0x0 352 #define MX6SL_PAD_EPDC_SDCE3__I2C3_SDA 352 #define MX6SL_PAD_EPDC_SDCE3__I2C3_SDA 0x10c 0x3fc 0x730 0x1 0x1 353 #define MX6SL_PAD_EPDC_SDCE3__PWM2_OUT 353 #define MX6SL_PAD_EPDC_SDCE3__PWM2_OUT 0x10c 0x3fc 0x000 0x2 0x0 354 #define MX6SL_PAD_EPDC_SDCE3__EIM_EB1_B 354 #define MX6SL_PAD_EPDC_SDCE3__EIM_EB1_B 0x10c 0x3fc 0x000 0x3 0x0 355 #define MX6SL_PAD_EPDC_SDCE3__SPDC_YDIODR 355 #define MX6SL_PAD_EPDC_SDCE3__SPDC_YDIODR 0x10c 0x3fc 0x000 0x4 0x0 356 #define MX6SL_PAD_EPDC_SDCE3__GPIO1_IO30 356 #define MX6SL_PAD_EPDC_SDCE3__GPIO1_IO30 0x10c 0x3fc 0x000 0x5 0x0 357 #define MX6SL_PAD_EPDC_SDCLK__EPDC_SDCLK_P 357 #define MX6SL_PAD_EPDC_SDCLK__EPDC_SDCLK_P 0x110 0x400 0x000 0x0 0x0 358 #define MX6SL_PAD_EPDC_SDCLK__ECSPI2_MOSI 358 #define MX6SL_PAD_EPDC_SDCLK__ECSPI2_MOSI 0x110 0x400 0x6a4 0x1 0x1 359 #define MX6SL_PAD_EPDC_SDCLK__I2C2_SCL 359 #define MX6SL_PAD_EPDC_SDCLK__I2C2_SCL 0x110 0x400 0x724 0x2 0x0 360 #define MX6SL_PAD_EPDC_SDCLK__CSI_DATA08 360 #define MX6SL_PAD_EPDC_SDCLK__CSI_DATA08 0x110 0x400 0x650 0x3 0x0 361 #define MX6SL_PAD_EPDC_SDCLK__SPDC_CL 361 #define MX6SL_PAD_EPDC_SDCLK__SPDC_CL 0x110 0x400 0x000 0x4 0x0 362 #define MX6SL_PAD_EPDC_SDCLK__GPIO1_IO23 362 #define MX6SL_PAD_EPDC_SDCLK__GPIO1_IO23 0x110 0x400 0x000 0x5 0x0 363 #define MX6SL_PAD_EPDC_SDLE__EPDC_SDLE 363 #define MX6SL_PAD_EPDC_SDLE__EPDC_SDLE 0x114 0x404 0x000 0x0 0x0 364 #define MX6SL_PAD_EPDC_SDLE__ECSPI2_MISO 364 #define MX6SL_PAD_EPDC_SDLE__ECSPI2_MISO 0x114 0x404 0x6a0 0x1 0x1 365 #define MX6SL_PAD_EPDC_SDLE__I2C2_SDA 365 #define MX6SL_PAD_EPDC_SDLE__I2C2_SDA 0x114 0x404 0x728 0x2 0x0 366 #define MX6SL_PAD_EPDC_SDLE__CSI_DATA09 366 #define MX6SL_PAD_EPDC_SDLE__CSI_DATA09 0x114 0x404 0x654 0x3 0x0 367 #define MX6SL_PAD_EPDC_SDLE__SPDC_LD 367 #define MX6SL_PAD_EPDC_SDLE__SPDC_LD 0x114 0x404 0x000 0x4 0x0 368 #define MX6SL_PAD_EPDC_SDLE__GPIO1_IO24 368 #define MX6SL_PAD_EPDC_SDLE__GPIO1_IO24 0x114 0x404 0x000 0x5 0x0 369 #define MX6SL_PAD_EPDC_SDOE__EPDC_SDOE 369 #define MX6SL_PAD_EPDC_SDOE__EPDC_SDOE 0x118 0x408 0x000 0x0 0x0 370 #define MX6SL_PAD_EPDC_SDOE__ECSPI2_SS0 370 #define MX6SL_PAD_EPDC_SDOE__ECSPI2_SS0 0x118 0x408 0x6a8 0x1 0x1 371 #define MX6SL_PAD_EPDC_SDOE__SPDC_XDIOR 371 #define MX6SL_PAD_EPDC_SDOE__SPDC_XDIOR 0x118 0x408 0x000 0x2 0x0 372 #define MX6SL_PAD_EPDC_SDOE__CSI_DATA10 372 #define MX6SL_PAD_EPDC_SDOE__CSI_DATA10 0x118 0x408 0x658 0x3 0x0 373 #define MX6SL_PAD_EPDC_SDOE__SPDC_XDIOL 373 #define MX6SL_PAD_EPDC_SDOE__SPDC_XDIOL 0x118 0x408 0x000 0x4 0x0 374 #define MX6SL_PAD_EPDC_SDOE__GPIO1_IO25 374 #define MX6SL_PAD_EPDC_SDOE__GPIO1_IO25 0x118 0x408 0x000 0x5 0x0 375 #define MX6SL_PAD_EPDC_SDSHR__EPDC_SDSHR 375 #define MX6SL_PAD_EPDC_SDSHR__EPDC_SDSHR 0x11c 0x40c 0x000 0x0 0x0 376 #define MX6SL_PAD_EPDC_SDSHR__ECSPI2_SCLK 376 #define MX6SL_PAD_EPDC_SDSHR__ECSPI2_SCLK 0x11c 0x40c 0x69c 0x1 0x1 377 #define MX6SL_PAD_EPDC_SDSHR__EPDC_SDCE4 377 #define MX6SL_PAD_EPDC_SDSHR__EPDC_SDCE4 0x11c 0x40c 0x000 0x2 0x0 378 #define MX6SL_PAD_EPDC_SDSHR__CSI_DATA11 378 #define MX6SL_PAD_EPDC_SDSHR__CSI_DATA11 0x11c 0x40c 0x65c 0x3 0x0 379 #define MX6SL_PAD_EPDC_SDSHR__SPDC_XDIOR 379 #define MX6SL_PAD_EPDC_SDSHR__SPDC_XDIOR 0x11c 0x40c 0x000 0x4 0x0 380 #define MX6SL_PAD_EPDC_SDSHR__GPIO1_IO26 380 #define MX6SL_PAD_EPDC_SDSHR__GPIO1_IO26 0x11c 0x40c 0x000 0x5 0x0 381 #define MX6SL_PAD_EPDC_VCOM0__EPDC_VCOM0 381 #define MX6SL_PAD_EPDC_VCOM0__EPDC_VCOM0 0x120 0x410 0x000 0x0 0x0 382 #define MX6SL_PAD_EPDC_VCOM0__AUD5_RXFS 382 #define MX6SL_PAD_EPDC_VCOM0__AUD5_RXFS 0x120 0x410 0x608 0x1 0x0 383 #define MX6SL_PAD_EPDC_VCOM0__UART3_RX_DATA 383 #define MX6SL_PAD_EPDC_VCOM0__UART3_RX_DATA 0x120 0x410 0x80c 0x2 0x4 384 #define MX6SL_PAD_EPDC_VCOM0__UART3_TX_DATA 384 #define MX6SL_PAD_EPDC_VCOM0__UART3_TX_DATA 0x120 0x410 0x000 0x2 0x0 385 #define MX6SL_PAD_EPDC_VCOM0__EIM_ADDR24 385 #define MX6SL_PAD_EPDC_VCOM0__EIM_ADDR24 0x120 0x410 0x000 0x3 0x0 386 #define MX6SL_PAD_EPDC_VCOM0__SPDC_VCOM0 386 #define MX6SL_PAD_EPDC_VCOM0__SPDC_VCOM0 0x120 0x410 0x000 0x4 0x0 387 #define MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03 387 #define MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03 0x120 0x410 0x000 0x5 0x0 388 #define MX6SL_PAD_EPDC_VCOM0__EPDC_SDCE5 388 #define MX6SL_PAD_EPDC_VCOM0__EPDC_SDCE5 0x120 0x410 0x000 0x6 0x0 389 #define MX6SL_PAD_EPDC_VCOM1__EPDC_VCOM1 389 #define MX6SL_PAD_EPDC_VCOM1__EPDC_VCOM1 0x124 0x414 0x000 0x0 0x0 390 #define MX6SL_PAD_EPDC_VCOM1__AUD5_RXD 390 #define MX6SL_PAD_EPDC_VCOM1__AUD5_RXD 0x124 0x414 0x5fc 0x1 0x0 391 #define MX6SL_PAD_EPDC_VCOM1__UART3_TX_DATA 391 #define MX6SL_PAD_EPDC_VCOM1__UART3_TX_DATA 0x124 0x414 0x000 0x2 0x0 392 #define MX6SL_PAD_EPDC_VCOM1__UART3_RX_DATA 392 #define MX6SL_PAD_EPDC_VCOM1__UART3_RX_DATA 0x124 0x414 0x80c 0x2 0x5 393 #define MX6SL_PAD_EPDC_VCOM1__EIM_ADDR25 393 #define MX6SL_PAD_EPDC_VCOM1__EIM_ADDR25 0x124 0x414 0x000 0x3 0x0 394 #define MX6SL_PAD_EPDC_VCOM1__SPDC_VCOM1 394 #define MX6SL_PAD_EPDC_VCOM1__SPDC_VCOM1 0x124 0x414 0x000 0x4 0x0 395 #define MX6SL_PAD_EPDC_VCOM1__GPIO2_IO04 395 #define MX6SL_PAD_EPDC_VCOM1__GPIO2_IO04 0x124 0x414 0x000 0x5 0x0 396 #define MX6SL_PAD_EPDC_VCOM1__EPDC_SDCE6 396 #define MX6SL_PAD_EPDC_VCOM1__EPDC_SDCE6 0x124 0x414 0x000 0x6 0x0 397 #define MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV 397 #define MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV 0x128 0x418 0x704 0x0 0x1 398 #define MX6SL_PAD_FEC_CRS_DV__SD4_DATA1 398 #define MX6SL_PAD_FEC_CRS_DV__SD4_DATA1 0x128 0x418 0x860 0x1 0x1 399 #define MX6SL_PAD_FEC_CRS_DV__AUD6_TXC 399 #define MX6SL_PAD_FEC_CRS_DV__AUD6_TXC 0x128 0x418 0x624 0x2 0x0 400 #define MX6SL_PAD_FEC_CRS_DV__ECSPI4_MISO 400 #define MX6SL_PAD_FEC_CRS_DV__ECSPI4_MISO 0x128 0x418 0x6d4 0x3 0x1 401 #define MX6SL_PAD_FEC_CRS_DV__GPT_COMPARE2 401 #define MX6SL_PAD_FEC_CRS_DV__GPT_COMPARE2 0x128 0x418 0x000 0x4 0x0 402 #define MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25 402 #define MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25 0x128 0x418 0x000 0x5 0x0 403 #define MX6SL_PAD_FEC_CRS_DV__ARM_TRACE31 403 #define MX6SL_PAD_FEC_CRS_DV__ARM_TRACE31 0x128 0x418 0x000 0x6 0x0 404 #define MX6SL_PAD_FEC_MDC__FEC_MDC 404 #define MX6SL_PAD_FEC_MDC__FEC_MDC 0x12c 0x41c 0x000 0x0 0x0 405 #define MX6SL_PAD_FEC_MDC__SD4_DATA4 405 #define MX6SL_PAD_FEC_MDC__SD4_DATA4 0x12c 0x41c 0x86c 0x1 0x0 406 #define MX6SL_PAD_FEC_MDC__AUDIO_CLK_OUT 406 #define MX6SL_PAD_FEC_MDC__AUDIO_CLK_OUT 0x12c 0x41c 0x000 0x2 0x0 407 #define MX6SL_PAD_FEC_MDC__SD1_RESET 407 #define MX6SL_PAD_FEC_MDC__SD1_RESET 0x12c 0x41c 0x000 0x3 0x0 408 #define MX6SL_PAD_FEC_MDC__SD3_RESET 408 #define MX6SL_PAD_FEC_MDC__SD3_RESET 0x12c 0x41c 0x000 0x4 0x0 409 #define MX6SL_PAD_FEC_MDC__GPIO4_IO23 409 #define MX6SL_PAD_FEC_MDC__GPIO4_IO23 0x12c 0x41c 0x000 0x5 0x0 410 #define MX6SL_PAD_FEC_MDC__ARM_TRACE29 410 #define MX6SL_PAD_FEC_MDC__ARM_TRACE29 0x12c 0x41c 0x000 0x6 0x0 411 #define MX6SL_PAD_FEC_MDIO__FEC_MDIO 411 #define MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x130 0x420 0x6f4 0x0 0x1 412 #define MX6SL_PAD_FEC_MDIO__SD4_CLK 412 #define MX6SL_PAD_FEC_MDIO__SD4_CLK 0x130 0x420 0x850 0x1 0x1 413 #define MX6SL_PAD_FEC_MDIO__AUD6_RXFS 413 #define MX6SL_PAD_FEC_MDIO__AUD6_RXFS 0x130 0x420 0x620 0x2 0x0 414 #define MX6SL_PAD_FEC_MDIO__ECSPI4_SS0 414 #define MX6SL_PAD_FEC_MDIO__ECSPI4_SS0 0x130 0x420 0x6dc 0x3 0x1 415 #define MX6SL_PAD_FEC_MDIO__GPT_CAPTURE1 415 #define MX6SL_PAD_FEC_MDIO__GPT_CAPTURE1 0x130 0x420 0x710 0x4 0x0 416 #define MX6SL_PAD_FEC_MDIO__GPIO4_IO20 416 #define MX6SL_PAD_FEC_MDIO__GPIO4_IO20 0x130 0x420 0x000 0x5 0x0 417 #define MX6SL_PAD_FEC_MDIO__ARM_TRACE26 417 #define MX6SL_PAD_FEC_MDIO__ARM_TRACE26 0x130 0x420 0x000 0x6 0x0 418 #define MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT 418 #define MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT 0x134 0x424 0x000 0x0 0x0 419 #define MX6SL_PAD_FEC_REF_CLK__SD4_RESET 419 #define MX6SL_PAD_FEC_REF_CLK__SD4_RESET 0x134 0x424 0x000 0x1 0x0 420 #define MX6SL_PAD_FEC_REF_CLK__WDOG1_B 420 #define MX6SL_PAD_FEC_REF_CLK__WDOG1_B 0x134 0x424 0x000 0x2 0x0 421 #define MX6SL_PAD_FEC_REF_CLK__PWM4_OUT 421 #define MX6SL_PAD_FEC_REF_CLK__PWM4_OUT 0x134 0x424 0x000 0x3 0x0 422 #define MX6SL_PAD_FEC_REF_CLK__CCM_PMIC_READY 422 #define MX6SL_PAD_FEC_REF_CLK__CCM_PMIC_READY 0x134 0x424 0x62c 0x4 0x0 423 #define MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26 423 #define MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26 0x134 0x424 0x000 0x5 0x0 424 #define MX6SL_PAD_FEC_REF_CLK__SPDIF_EXT_CLK 424 #define MX6SL_PAD_FEC_REF_CLK__SPDIF_EXT_CLK 0x134 0x424 0x7f4 0x6 0x2 425 #define MX6SL_PAD_FEC_RX_ER__FEC_RX_ER 425 #define MX6SL_PAD_FEC_RX_ER__FEC_RX_ER 0x138 0x428 0x708 0x0 0x1 426 #define MX6SL_PAD_FEC_RX_ER__SD4_DATA0 426 #define MX6SL_PAD_FEC_RX_ER__SD4_DATA0 0x138 0x428 0x85c 0x1 0x1 427 #define MX6SL_PAD_FEC_RX_ER__AUD6_RXD 427 #define MX6SL_PAD_FEC_RX_ER__AUD6_RXD 0x138 0x428 0x614 0x2 0x0 428 #define MX6SL_PAD_FEC_RX_ER__ECSPI4_MOSI 428 #define MX6SL_PAD_FEC_RX_ER__ECSPI4_MOSI 0x138 0x428 0x6d8 0x3 0x1 429 #define MX6SL_PAD_FEC_RX_ER__GPT_COMPARE1 429 #define MX6SL_PAD_FEC_RX_ER__GPT_COMPARE1 0x138 0x428 0x000 0x4 0x0 430 #define MX6SL_PAD_FEC_RX_ER__GPIO4_IO19 430 #define MX6SL_PAD_FEC_RX_ER__GPIO4_IO19 0x138 0x428 0x000 0x5 0x0 431 #define MX6SL_PAD_FEC_RX_ER__ARM_TRACE25 431 #define MX6SL_PAD_FEC_RX_ER__ARM_TRACE25 0x138 0x428 0x000 0x6 0x0 432 #define MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0 432 #define MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0 0x13c 0x42c 0x6f8 0x0 0x0 433 #define MX6SL_PAD_FEC_RXD0__SD4_DATA5 433 #define MX6SL_PAD_FEC_RXD0__SD4_DATA5 0x13c 0x42c 0x870 0x1 0x0 434 #define MX6SL_PAD_FEC_RXD0__USB_OTG1_ID 434 #define MX6SL_PAD_FEC_RXD0__USB_OTG1_ID 0x13c 0x42c 0x5dc 0x2 0x1 435 #define MX6SL_PAD_FEC_RXD0__SD1_VSELECT 435 #define MX6SL_PAD_FEC_RXD0__SD1_VSELECT 0x13c 0x42c 0x000 0x3 0x0 436 #define MX6SL_PAD_FEC_RXD0__SD3_VSELECT 436 #define MX6SL_PAD_FEC_RXD0__SD3_VSELECT 0x13c 0x42c 0x000 0x4 0x0 437 #define MX6SL_PAD_FEC_RXD0__GPIO4_IO17 437 #define MX6SL_PAD_FEC_RXD0__GPIO4_IO17 0x13c 0x42c 0x000 0x5 0x0 438 #define MX6SL_PAD_FEC_RXD0__ARM_TRACE24 438 #define MX6SL_PAD_FEC_RXD0__ARM_TRACE24 0x13c 0x42c 0x000 0x6 0x0 439 #define MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1 439 #define MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1 0x140 0x430 0x6fc 0x0 0x1 440 #define MX6SL_PAD_FEC_RXD1__SD4_DATA2 440 #define MX6SL_PAD_FEC_RXD1__SD4_DATA2 0x140 0x430 0x864 0x1 0x1 441 #define MX6SL_PAD_FEC_RXD1__AUD6_TXFS 441 #define MX6SL_PAD_FEC_RXD1__AUD6_TXFS 0x140 0x430 0x628 0x2 0x0 442 #define MX6SL_PAD_FEC_RXD1__ECSPI4_SS1 442 #define MX6SL_PAD_FEC_RXD1__ECSPI4_SS1 0x140 0x430 0x6e0 0x3 0x1 443 #define MX6SL_PAD_FEC_RXD1__GPT_COMPARE3 443 #define MX6SL_PAD_FEC_RXD1__GPT_COMPARE3 0x140 0x430 0x000 0x4 0x0 444 #define MX6SL_PAD_FEC_RXD1__GPIO4_IO18 444 #define MX6SL_PAD_FEC_RXD1__GPIO4_IO18 0x140 0x430 0x000 0x5 0x0 445 #define MX6SL_PAD_FEC_RXD1__FEC_COL 445 #define MX6SL_PAD_FEC_RXD1__FEC_COL 0x140 0x430 0x6f0 0x6 0x0 446 #define MX6SL_PAD_FEC_TX_CLK__FEC_TX_CLK 446 #define MX6SL_PAD_FEC_TX_CLK__FEC_TX_CLK 0x144 0x434 0x70c 0x0 0x1 447 #define MX6SL_PAD_FEC_TX_CLK__SD4_CMD 447 #define MX6SL_PAD_FEC_TX_CLK__SD4_CMD 0x144 0x434 0x858 0x1 0x1 448 #define MX6SL_PAD_FEC_TX_CLK__AUD6_RXC 448 #define MX6SL_PAD_FEC_TX_CLK__AUD6_RXC 0x144 0x434 0x61c 0x2 0x0 449 #define MX6SL_PAD_FEC_TX_CLK__ECSPI4_SCLK 449 #define MX6SL_PAD_FEC_TX_CLK__ECSPI4_SCLK 0x144 0x434 0x6d0 0x3 0x1 450 #define MX6SL_PAD_FEC_TX_CLK__GPT_CAPTURE2 450 #define MX6SL_PAD_FEC_TX_CLK__GPT_CAPTURE2 0x144 0x434 0x714 0x4 0x0 451 #define MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21 451 #define MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21 0x144 0x434 0x000 0x5 0x0 452 #define MX6SL_PAD_FEC_TX_CLK__ARM_TRACE27 452 #define MX6SL_PAD_FEC_TX_CLK__ARM_TRACE27 0x144 0x434 0x000 0x6 0x0 453 #define MX6SL_PAD_FEC_TX_EN__FEC_TX_EN 453 #define MX6SL_PAD_FEC_TX_EN__FEC_TX_EN 0x148 0x438 0x000 0x0 0x0 454 #define MX6SL_PAD_FEC_TX_EN__SD4_DATA6 454 #define MX6SL_PAD_FEC_TX_EN__SD4_DATA6 0x148 0x438 0x874 0x1 0x0 455 #define MX6SL_PAD_FEC_TX_EN__SPDIF_IN 455 #define MX6SL_PAD_FEC_TX_EN__SPDIF_IN 0x148 0x438 0x7f0 0x2 0x0 456 #define MX6SL_PAD_FEC_TX_EN__SD1_WP 456 #define MX6SL_PAD_FEC_TX_EN__SD1_WP 0x148 0x438 0x82c 0x3 0x1 457 #define MX6SL_PAD_FEC_TX_EN__SD3_WP 457 #define MX6SL_PAD_FEC_TX_EN__SD3_WP 0x148 0x438 0x84c 0x4 0x1 458 #define MX6SL_PAD_FEC_TX_EN__GPIO4_IO22 458 #define MX6SL_PAD_FEC_TX_EN__GPIO4_IO22 0x148 0x438 0x000 0x5 0x0 459 #define MX6SL_PAD_FEC_TX_EN__ARM_TRACE28 459 #define MX6SL_PAD_FEC_TX_EN__ARM_TRACE28 0x148 0x438 0x000 0x6 0x0 460 #define MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0 460 #define MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0 0x14c 0x43c 0x000 0x0 0x0 461 #define MX6SL_PAD_FEC_TXD0__SD4_DATA3 461 #define MX6SL_PAD_FEC_TXD0__SD4_DATA3 0x14c 0x43c 0x868 0x1 0x1 462 #define MX6SL_PAD_FEC_TXD0__AUD6_TXD 462 #define MX6SL_PAD_FEC_TXD0__AUD6_TXD 0x14c 0x43c 0x618 0x2 0x0 463 #define MX6SL_PAD_FEC_TXD0__ECSPI4_SS2 463 #define MX6SL_PAD_FEC_TXD0__ECSPI4_SS2 0x14c 0x43c 0x6e4 0x3 0x1 464 #define MX6SL_PAD_FEC_TXD0__GPT_CLKIN 464 #define MX6SL_PAD_FEC_TXD0__GPT_CLKIN 0x14c 0x43c 0x718 0x4 0x0 465 #define MX6SL_PAD_FEC_TXD0__GPIO4_IO24 465 #define MX6SL_PAD_FEC_TXD0__GPIO4_IO24 0x14c 0x43c 0x000 0x5 0x0 466 #define MX6SL_PAD_FEC_TXD0__ARM_TRACE30 466 #define MX6SL_PAD_FEC_TXD0__ARM_TRACE30 0x14c 0x43c 0x000 0x6 0x0 467 #define MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1 467 #define MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1 0x150 0x440 0x000 0x0 0x0 468 #define MX6SL_PAD_FEC_TXD1__SD4_DATA7 468 #define MX6SL_PAD_FEC_TXD1__SD4_DATA7 0x150 0x440 0x878 0x1 0x0 469 #define MX6SL_PAD_FEC_TXD1__SPDIF_OUT 469 #define MX6SL_PAD_FEC_TXD1__SPDIF_OUT 0x150 0x440 0x000 0x2 0x0 470 #define MX6SL_PAD_FEC_TXD1__SD1_CD_B 470 #define MX6SL_PAD_FEC_TXD1__SD1_CD_B 0x150 0x440 0x828 0x3 0x1 471 #define MX6SL_PAD_FEC_TXD1__SD3_CD_B 471 #define MX6SL_PAD_FEC_TXD1__SD3_CD_B 0x150 0x440 0x838 0x4 0x1 472 #define MX6SL_PAD_FEC_TXD1__GPIO4_IO16 472 #define MX6SL_PAD_FEC_TXD1__GPIO4_IO16 0x150 0x440 0x000 0x5 0x0 473 #define MX6SL_PAD_FEC_TXD1__FEC_RX_CLK 473 #define MX6SL_PAD_FEC_TXD1__FEC_RX_CLK 0x150 0x440 0x700 0x6 0x0 474 #define MX6SL_PAD_HSIC_DAT__USB_H_DATA 474 #define MX6SL_PAD_HSIC_DAT__USB_H_DATA 0x154 0x444 0x000 0x0 0x0 475 #define MX6SL_PAD_HSIC_DAT__I2C1_SCL 475 #define MX6SL_PAD_HSIC_DAT__I2C1_SCL 0x154 0x444 0x71c 0x1 0x1 476 #define MX6SL_PAD_HSIC_DAT__PWM1_OUT 476 #define MX6SL_PAD_HSIC_DAT__PWM1_OUT 0x154 0x444 0x000 0x2 0x0 477 #define MX6SL_PAD_HSIC_DAT__XTALOSC_REF_CLK_24 477 #define MX6SL_PAD_HSIC_DAT__XTALOSC_REF_CLK_24M 0x154 0x444 0x000 0x3 0x0 478 #define MX6SL_PAD_HSIC_DAT__GPIO3_IO19 478 #define MX6SL_PAD_HSIC_DAT__GPIO3_IO19 0x154 0x444 0x000 0x5 0x0 479 #define MX6SL_PAD_HSIC_STROBE__USB_H_STROBE 479 #define MX6SL_PAD_HSIC_STROBE__USB_H_STROBE 0x158 0x448 0x000 0x0 0x0 480 #define MX6SL_PAD_HSIC_STROBE__I2C1_SDA 480 #define MX6SL_PAD_HSIC_STROBE__I2C1_SDA 0x158 0x448 0x720 0x1 0x1 481 #define MX6SL_PAD_HSIC_STROBE__PWM2_OUT 481 #define MX6SL_PAD_HSIC_STROBE__PWM2_OUT 0x158 0x448 0x000 0x2 0x0 482 #define MX6SL_PAD_HSIC_STROBE__XTALOSC_REF_CLK 482 #define MX6SL_PAD_HSIC_STROBE__XTALOSC_REF_CLK_32K 0x158 0x448 0x000 0x3 0x0 483 #define MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 483 #define MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x158 0x448 0x000 0x5 0x0 484 #define MX6SL_PAD_I2C1_SCL__I2C1_SCL 484 #define MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x15c 0x44c 0x71c 0x0 0x2 485 #define MX6SL_PAD_I2C1_SCL__UART1_RTS_B 485 #define MX6SL_PAD_I2C1_SCL__UART1_RTS_B 0x15c 0x44c 0x7f8 0x1 0x0 486 #define MX6SL_PAD_I2C1_SCL__UART1_CTS_B 486 #define MX6SL_PAD_I2C1_SCL__UART1_CTS_B 0x15c 0x44c 0x000 0x1 0x0 487 #define MX6SL_PAD_I2C1_SCL__ECSPI3_SS2 487 #define MX6SL_PAD_I2C1_SCL__ECSPI3_SS2 0x15c 0x44c 0x6c8 0x2 0x1 488 #define MX6SL_PAD_I2C1_SCL__FEC_RX_DATA0 488 #define MX6SL_PAD_I2C1_SCL__FEC_RX_DATA0 0x15c 0x44c 0x6f8 0x3 0x1 489 #define MX6SL_PAD_I2C1_SCL__SD3_RESET 489 #define MX6SL_PAD_I2C1_SCL__SD3_RESET 0x15c 0x44c 0x000 0x4 0x0 490 #define MX6SL_PAD_I2C1_SCL__GPIO3_IO12 490 #define MX6SL_PAD_I2C1_SCL__GPIO3_IO12 0x15c 0x44c 0x000 0x5 0x0 491 #define MX6SL_PAD_I2C1_SCL__ECSPI1_SS1 491 #define MX6SL_PAD_I2C1_SCL__ECSPI1_SS1 0x15c 0x44c 0x690 0x6 0x0 492 #define MX6SL_PAD_I2C1_SDA__I2C1_SDA 492 #define MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x160 0x450 0x720 0x0 0x2 493 #define MX6SL_PAD_I2C1_SDA__UART1_CTS_B 493 #define MX6SL_PAD_I2C1_SDA__UART1_CTS_B 0x160 0x450 0x000 0x1 0x0 494 #define MX6SL_PAD_I2C1_SDA__UART1_RTS_B 494 #define MX6SL_PAD_I2C1_SDA__UART1_RTS_B 0x160 0x450 0x7f8 0x1 0x1 495 #define MX6SL_PAD_I2C1_SDA__ECSPI3_SS3 495 #define MX6SL_PAD_I2C1_SDA__ECSPI3_SS3 0x160 0x450 0x6cc 0x2 0x1 496 #define MX6SL_PAD_I2C1_SDA__FEC_TX_EN 496 #define MX6SL_PAD_I2C1_SDA__FEC_TX_EN 0x160 0x450 0x000 0x3 0x0 497 #define MX6SL_PAD_I2C1_SDA__SD3_VSELECT 497 #define MX6SL_PAD_I2C1_SDA__SD3_VSELECT 0x160 0x450 0x000 0x4 0x0 498 #define MX6SL_PAD_I2C1_SDA__GPIO3_IO13 498 #define MX6SL_PAD_I2C1_SDA__GPIO3_IO13 0x160 0x450 0x000 0x5 0x0 499 #define MX6SL_PAD_I2C1_SDA__ECSPI1_SS2 499 #define MX6SL_PAD_I2C1_SDA__ECSPI1_SS2 0x160 0x450 0x694 0x6 0x0 500 #define MX6SL_PAD_I2C2_SCL__I2C2_SCL 500 #define MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x164 0x454 0x724 0x0 0x1 501 #define MX6SL_PAD_I2C2_SCL__AUD4_RXFS 501 #define MX6SL_PAD_I2C2_SCL__AUD4_RXFS 0x164 0x454 0x5f0 0x1 0x0 502 #define MX6SL_PAD_I2C2_SCL__SPDIF_IN 502 #define MX6SL_PAD_I2C2_SCL__SPDIF_IN 0x164 0x454 0x7f0 0x2 0x1 503 #define MX6SL_PAD_I2C2_SCL__FEC_TX_DATA1 503 #define MX6SL_PAD_I2C2_SCL__FEC_TX_DATA1 0x164 0x454 0x000 0x3 0x0 504 #define MX6SL_PAD_I2C2_SCL__SD3_WP 504 #define MX6SL_PAD_I2C2_SCL__SD3_WP 0x164 0x454 0x84c 0x4 0x2 505 #define MX6SL_PAD_I2C2_SCL__GPIO3_IO14 505 #define MX6SL_PAD_I2C2_SCL__GPIO3_IO14 0x164 0x454 0x000 0x5 0x0 506 #define MX6SL_PAD_I2C2_SCL__ECSPI1_RDY 506 #define MX6SL_PAD_I2C2_SCL__ECSPI1_RDY 0x164 0x454 0x680 0x6 0x0 507 #define MX6SL_PAD_I2C2_SDA__I2C2_SDA 507 #define MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x168 0x458 0x728 0x0 0x1 508 #define MX6SL_PAD_I2C2_SDA__AUD4_RXC 508 #define MX6SL_PAD_I2C2_SDA__AUD4_RXC 0x168 0x458 0x5ec 0x1 0x0 509 #define MX6SL_PAD_I2C2_SDA__SPDIF_OUT 509 #define MX6SL_PAD_I2C2_SDA__SPDIF_OUT 0x168 0x458 0x000 0x2 0x0 510 #define MX6SL_PAD_I2C2_SDA__FEC_REF_OUT 510 #define MX6SL_PAD_I2C2_SDA__FEC_REF_OUT 0x168 0x458 0x000 0x3 0x0 511 #define MX6SL_PAD_I2C2_SDA__SD3_CD_B 511 #define MX6SL_PAD_I2C2_SDA__SD3_CD_B 0x168 0x458 0x838 0x4 0x2 512 #define MX6SL_PAD_I2C2_SDA__GPIO3_IO15 512 #define MX6SL_PAD_I2C2_SDA__GPIO3_IO15 0x168 0x458 0x000 0x5 0x0 513 #define MX6SL_PAD_KEY_COL0__KEY_COL0 513 #define MX6SL_PAD_KEY_COL0__KEY_COL0 0x16c 0x474 0x734 0x0 0x0 514 #define MX6SL_PAD_KEY_COL0__I2C2_SCL 514 #define MX6SL_PAD_KEY_COL0__I2C2_SCL 0x16c 0x474 0x724 0x1 0x2 515 #define MX6SL_PAD_KEY_COL0__LCD_DATA00 515 #define MX6SL_PAD_KEY_COL0__LCD_DATA00 0x16c 0x474 0x778 0x2 0x0 516 #define MX6SL_PAD_KEY_COL0__EIM_AD00 516 #define MX6SL_PAD_KEY_COL0__EIM_AD00 0x16c 0x474 0x000 0x3 0x0 517 #define MX6SL_PAD_KEY_COL0__SD1_CD_B 517 #define MX6SL_PAD_KEY_COL0__SD1_CD_B 0x16c 0x474 0x828 0x4 0x2 518 #define MX6SL_PAD_KEY_COL0__GPIO3_IO24 518 #define MX6SL_PAD_KEY_COL0__GPIO3_IO24 0x16c 0x474 0x000 0x5 0x0 519 #define MX6SL_PAD_KEY_COL1__KEY_COL1 519 #define MX6SL_PAD_KEY_COL1__KEY_COL1 0x170 0x478 0x738 0x0 0x0 520 #define MX6SL_PAD_KEY_COL1__ECSPI4_MOSI 520 #define MX6SL_PAD_KEY_COL1__ECSPI4_MOSI 0x170 0x478 0x6d8 0x1 0x2 521 #define MX6SL_PAD_KEY_COL1__LCD_DATA02 521 #define MX6SL_PAD_KEY_COL1__LCD_DATA02 0x170 0x478 0x780 0x2 0x0 522 #define MX6SL_PAD_KEY_COL1__EIM_AD02 522 #define MX6SL_PAD_KEY_COL1__EIM_AD02 0x170 0x478 0x000 0x3 0x0 523 #define MX6SL_PAD_KEY_COL1__SD3_DATA4 523 #define MX6SL_PAD_KEY_COL1__SD3_DATA4 0x170 0x478 0x83c 0x4 0x0 524 #define MX6SL_PAD_KEY_COL1__GPIO3_IO26 524 #define MX6SL_PAD_KEY_COL1__GPIO3_IO26 0x170 0x478 0x000 0x5 0x0 525 #define MX6SL_PAD_KEY_COL2__KEY_COL2 525 #define MX6SL_PAD_KEY_COL2__KEY_COL2 0x174 0x47c 0x73c 0x0 0x0 526 #define MX6SL_PAD_KEY_COL2__ECSPI4_SS0 526 #define MX6SL_PAD_KEY_COL2__ECSPI4_SS0 0x174 0x47c 0x6dc 0x1 0x2 527 #define MX6SL_PAD_KEY_COL2__LCD_DATA04 527 #define MX6SL_PAD_KEY_COL2__LCD_DATA04 0x174 0x47c 0x788 0x2 0x0 528 #define MX6SL_PAD_KEY_COL2__EIM_AD04 528 #define MX6SL_PAD_KEY_COL2__EIM_AD04 0x174 0x47c 0x000 0x3 0x0 529 #define MX6SL_PAD_KEY_COL2__SD3_DATA6 529 #define MX6SL_PAD_KEY_COL2__SD3_DATA6 0x174 0x47c 0x844 0x4 0x0 530 #define MX6SL_PAD_KEY_COL2__GPIO3_IO28 530 #define MX6SL_PAD_KEY_COL2__GPIO3_IO28 0x174 0x47c 0x000 0x5 0x0 531 #define MX6SL_PAD_KEY_COL3__KEY_COL3 531 #define MX6SL_PAD_KEY_COL3__KEY_COL3 0x178 0x480 0x740 0x0 0x0 532 #define MX6SL_PAD_KEY_COL3__AUD6_RXFS 532 #define MX6SL_PAD_KEY_COL3__AUD6_RXFS 0x178 0x480 0x620 0x1 0x1 533 #define MX6SL_PAD_KEY_COL3__LCD_DATA06 533 #define MX6SL_PAD_KEY_COL3__LCD_DATA06 0x178 0x480 0x790 0x2 0x0 534 #define MX6SL_PAD_KEY_COL3__EIM_AD06 534 #define MX6SL_PAD_KEY_COL3__EIM_AD06 0x178 0x480 0x000 0x3 0x0 535 #define MX6SL_PAD_KEY_COL3__SD4_DATA6 535 #define MX6SL_PAD_KEY_COL3__SD4_DATA6 0x178 0x480 0x874 0x4 0x1 536 #define MX6SL_PAD_KEY_COL3__GPIO3_IO30 536 #define MX6SL_PAD_KEY_COL3__GPIO3_IO30 0x178 0x480 0x000 0x5 0x0 537 #define MX6SL_PAD_KEY_COL3__SD1_RESET 537 #define MX6SL_PAD_KEY_COL3__SD1_RESET 0x178 0x480 0x000 0x6 0x0 538 #define MX6SL_PAD_KEY_COL4__KEY_COL4 538 #define MX6SL_PAD_KEY_COL4__KEY_COL4 0x17c 0x484 0x744 0x0 0x0 539 #define MX6SL_PAD_KEY_COL4__AUD6_RXD 539 #define MX6SL_PAD_KEY_COL4__AUD6_RXD 0x17c 0x484 0x614 0x1 0x1 540 #define MX6SL_PAD_KEY_COL4__LCD_DATA08 540 #define MX6SL_PAD_KEY_COL4__LCD_DATA08 0x17c 0x484 0x798 0x2 0x0 541 #define MX6SL_PAD_KEY_COL4__EIM_AD08 541 #define MX6SL_PAD_KEY_COL4__EIM_AD08 0x17c 0x484 0x000 0x3 0x0 542 #define MX6SL_PAD_KEY_COL4__SD4_CLK 542 #define MX6SL_PAD_KEY_COL4__SD4_CLK 0x17c 0x484 0x850 0x4 0x2 543 #define MX6SL_PAD_KEY_COL4__GPIO4_IO00 543 #define MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x17c 0x484 0x000 0x5 0x0 544 #define MX6SL_PAD_KEY_COL4__USB_OTG1_PWR 544 #define MX6SL_PAD_KEY_COL4__USB_OTG1_PWR 0x17c 0x484 0x000 0x6 0x0 545 #define MX6SL_PAD_KEY_COL5__KEY_COL5 545 #define MX6SL_PAD_KEY_COL5__KEY_COL5 0x180 0x488 0x748 0x0 0x0 546 #define MX6SL_PAD_KEY_COL5__AUD6_TXFS 546 #define MX6SL_PAD_KEY_COL5__AUD6_TXFS 0x180 0x488 0x628 0x1 0x1 547 #define MX6SL_PAD_KEY_COL5__LCD_DATA10 547 #define MX6SL_PAD_KEY_COL5__LCD_DATA10 0x180 0x488 0x7a0 0x2 0x0 548 #define MX6SL_PAD_KEY_COL5__EIM_AD10 548 #define MX6SL_PAD_KEY_COL5__EIM_AD10 0x180 0x488 0x000 0x3 0x0 549 #define MX6SL_PAD_KEY_COL5__SD4_DATA0 549 #define MX6SL_PAD_KEY_COL5__SD4_DATA0 0x180 0x488 0x85c 0x4 0x2 550 #define MX6SL_PAD_KEY_COL5__GPIO4_IO02 550 #define MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x180 0x488 0x000 0x5 0x0 551 #define MX6SL_PAD_KEY_COL5__USB_OTG2_PWR 551 #define MX6SL_PAD_KEY_COL5__USB_OTG2_PWR 0x180 0x488 0x000 0x6 0x0 552 #define MX6SL_PAD_KEY_COL6__KEY_COL6 552 #define MX6SL_PAD_KEY_COL6__KEY_COL6 0x184 0x48c 0x74c 0x0 0x0 553 #define MX6SL_PAD_KEY_COL6__UART4_RX_DATA 553 #define MX6SL_PAD_KEY_COL6__UART4_RX_DATA 0x184 0x48c 0x814 0x1 0x2 554 #define MX6SL_PAD_KEY_COL6__UART4_TX_DATA 554 #define MX6SL_PAD_KEY_COL6__UART4_TX_DATA 0x184 0x48c 0x000 0x1 0x0 555 #define MX6SL_PAD_KEY_COL6__LCD_DATA12 555 #define MX6SL_PAD_KEY_COL6__LCD_DATA12 0x184 0x48c 0x7a8 0x2 0x0 556 #define MX6SL_PAD_KEY_COL6__EIM_AD12 556 #define MX6SL_PAD_KEY_COL6__EIM_AD12 0x184 0x48c 0x000 0x3 0x0 557 #define MX6SL_PAD_KEY_COL6__SD4_DATA2 557 #define MX6SL_PAD_KEY_COL6__SD4_DATA2 0x184 0x48c 0x864 0x4 0x2 558 #define MX6SL_PAD_KEY_COL6__GPIO4_IO04 558 #define MX6SL_PAD_KEY_COL6__GPIO4_IO04 0x184 0x48c 0x000 0x5 0x0 559 #define MX6SL_PAD_KEY_COL6__SD3_RESET 559 #define MX6SL_PAD_KEY_COL6__SD3_RESET 0x184 0x48c 0x000 0x6 0x0 560 #define MX6SL_PAD_KEY_COL7__KEY_COL7 560 #define MX6SL_PAD_KEY_COL7__KEY_COL7 0x188 0x490 0x750 0x0 0x0 561 #define MX6SL_PAD_KEY_COL7__UART4_RTS_B 561 #define MX6SL_PAD_KEY_COL7__UART4_RTS_B 0x188 0x490 0x810 0x1 0x2 562 #define MX6SL_PAD_KEY_COL7__UART4_CTS_B 562 #define MX6SL_PAD_KEY_COL7__UART4_CTS_B 0x188 0x490 0x000 0x1 0x0 563 #define MX6SL_PAD_KEY_COL7__LCD_DATA14 563 #define MX6SL_PAD_KEY_COL7__LCD_DATA14 0x188 0x490 0x7b0 0x2 0x0 564 #define MX6SL_PAD_KEY_COL7__EIM_AD14 564 #define MX6SL_PAD_KEY_COL7__EIM_AD14 0x188 0x490 0x000 0x3 0x0 565 #define MX6SL_PAD_KEY_COL7__SD4_DATA4 565 #define MX6SL_PAD_KEY_COL7__SD4_DATA4 0x188 0x490 0x86c 0x4 0x1 566 #define MX6SL_PAD_KEY_COL7__GPIO4_IO06 566 #define MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x188 0x490 0x000 0x5 0x0 567 #define MX6SL_PAD_KEY_COL7__SD1_WP 567 #define MX6SL_PAD_KEY_COL7__SD1_WP 0x188 0x490 0x82c 0x6 0x2 568 #define MX6SL_PAD_KEY_ROW0__KEY_ROW0 568 #define MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x18c 0x494 0x754 0x0 0x0 569 #define MX6SL_PAD_KEY_ROW0__I2C2_SDA 569 #define MX6SL_PAD_KEY_ROW0__I2C2_SDA 0x18c 0x494 0x728 0x1 0x2 570 #define MX6SL_PAD_KEY_ROW0__LCD_DATA01 570 #define MX6SL_PAD_KEY_ROW0__LCD_DATA01 0x18c 0x494 0x77c 0x2 0x0 571 #define MX6SL_PAD_KEY_ROW0__EIM_AD01 571 #define MX6SL_PAD_KEY_ROW0__EIM_AD01 0x18c 0x494 0x000 0x3 0x0 572 #define MX6SL_PAD_KEY_ROW0__SD1_WP 572 #define MX6SL_PAD_KEY_ROW0__SD1_WP 0x18c 0x494 0x82c 0x4 0x3 573 #define MX6SL_PAD_KEY_ROW0__GPIO3_IO25 573 #define MX6SL_PAD_KEY_ROW0__GPIO3_IO25 0x18c 0x494 0x000 0x5 0x0 574 #define MX6SL_PAD_KEY_ROW1__KEY_ROW1 574 #define MX6SL_PAD_KEY_ROW1__KEY_ROW1 0x190 0x498 0x758 0x0 0x0 575 #define MX6SL_PAD_KEY_ROW1__ECSPI4_MISO 575 #define MX6SL_PAD_KEY_ROW1__ECSPI4_MISO 0x190 0x498 0x6d4 0x1 0x2 576 #define MX6SL_PAD_KEY_ROW1__LCD_DATA03 576 #define MX6SL_PAD_KEY_ROW1__LCD_DATA03 0x190 0x498 0x784 0x2 0x0 577 #define MX6SL_PAD_KEY_ROW1__EIM_AD03 577 #define MX6SL_PAD_KEY_ROW1__EIM_AD03 0x190 0x498 0x000 0x3 0x0 578 #define MX6SL_PAD_KEY_ROW1__SD3_DATA5 578 #define MX6SL_PAD_KEY_ROW1__SD3_DATA5 0x190 0x498 0x840 0x4 0x0 579 #define MX6SL_PAD_KEY_ROW1__GPIO3_IO27 579 #define MX6SL_PAD_KEY_ROW1__GPIO3_IO27 0x190 0x498 0x000 0x5 0x0 580 #define MX6SL_PAD_KEY_ROW2__KEY_ROW2 580 #define MX6SL_PAD_KEY_ROW2__KEY_ROW2 0x194 0x49c 0x75c 0x0 0x0 581 #define MX6SL_PAD_KEY_ROW2__ECSPI4_SCLK 581 #define MX6SL_PAD_KEY_ROW2__ECSPI4_SCLK 0x194 0x49c 0x6d0 0x1 0x2 582 #define MX6SL_PAD_KEY_ROW2__LCD_DATA05 582 #define MX6SL_PAD_KEY_ROW2__LCD_DATA05 0x194 0x49c 0x78c 0x2 0x0 583 #define MX6SL_PAD_KEY_ROW2__EIM_AD05 583 #define MX6SL_PAD_KEY_ROW2__EIM_AD05 0x194 0x49c 0x000 0x3 0x0 584 #define MX6SL_PAD_KEY_ROW2__SD3_DATA7 584 #define MX6SL_PAD_KEY_ROW2__SD3_DATA7 0x194 0x49c 0x848 0x4 0x0 585 #define MX6SL_PAD_KEY_ROW2__GPIO3_IO29 585 #define MX6SL_PAD_KEY_ROW2__GPIO3_IO29 0x194 0x49c 0x000 0x5 0x0 586 #define MX6SL_PAD_KEY_ROW3__KEY_ROW3 586 #define MX6SL_PAD_KEY_ROW3__KEY_ROW3 0x198 0x4a0 0x760 0x0 0x0 587 #define MX6SL_PAD_KEY_ROW3__AUD6_RXC 587 #define MX6SL_PAD_KEY_ROW3__AUD6_RXC 0x198 0x4a0 0x61c 0x1 0x1 588 #define MX6SL_PAD_KEY_ROW3__LCD_DATA07 588 #define MX6SL_PAD_KEY_ROW3__LCD_DATA07 0x198 0x4a0 0x794 0x2 0x0 589 #define MX6SL_PAD_KEY_ROW3__EIM_AD07 589 #define MX6SL_PAD_KEY_ROW3__EIM_AD07 0x198 0x4a0 0x000 0x3 0x0 590 #define MX6SL_PAD_KEY_ROW3__SD4_DATA7 590 #define MX6SL_PAD_KEY_ROW3__SD4_DATA7 0x198 0x4a0 0x878 0x4 0x1 591 #define MX6SL_PAD_KEY_ROW3__GPIO3_IO31 591 #define MX6SL_PAD_KEY_ROW3__GPIO3_IO31 0x198 0x4a0 0x000 0x5 0x0 592 #define MX6SL_PAD_KEY_ROW3__SD1_VSELECT 592 #define MX6SL_PAD_KEY_ROW3__SD1_VSELECT 0x198 0x4a0 0x000 0x6 0x0 593 #define MX6SL_PAD_KEY_ROW4__KEY_ROW4 593 #define MX6SL_PAD_KEY_ROW4__KEY_ROW4 0x19c 0x4a4 0x764 0x0 0x0 594 #define MX6SL_PAD_KEY_ROW4__AUD6_TXC 594 #define MX6SL_PAD_KEY_ROW4__AUD6_TXC 0x19c 0x4a4 0x624 0x1 0x1 595 #define MX6SL_PAD_KEY_ROW4__LCD_DATA09 595 #define MX6SL_PAD_KEY_ROW4__LCD_DATA09 0x19c 0x4a4 0x79c 0x2 0x0 596 #define MX6SL_PAD_KEY_ROW4__EIM_AD09 596 #define MX6SL_PAD_KEY_ROW4__EIM_AD09 0x19c 0x4a4 0x000 0x3 0x0 597 #define MX6SL_PAD_KEY_ROW4__SD4_CMD 597 #define MX6SL_PAD_KEY_ROW4__SD4_CMD 0x19c 0x4a4 0x858 0x4 0x2 598 #define MX6SL_PAD_KEY_ROW4__GPIO4_IO01 598 #define MX6SL_PAD_KEY_ROW4__GPIO4_IO01 0x19c 0x4a4 0x000 0x5 0x0 599 #define MX6SL_PAD_KEY_ROW4__USB_OTG1_OC 599 #define MX6SL_PAD_KEY_ROW4__USB_OTG1_OC 0x19c 0x4a4 0x824 0x6 0x1 600 #define MX6SL_PAD_KEY_ROW5__KEY_ROW5 600 #define MX6SL_PAD_KEY_ROW5__KEY_ROW5 0x1a0 0x4a8 0x768 0x0 0x0 601 #define MX6SL_PAD_KEY_ROW5__AUD6_TXD 601 #define MX6SL_PAD_KEY_ROW5__AUD6_TXD 0x1a0 0x4a8 0x618 0x1 0x1 602 #define MX6SL_PAD_KEY_ROW5__LCD_DATA11 602 #define MX6SL_PAD_KEY_ROW5__LCD_DATA11 0x1a0 0x4a8 0x7a4 0x2 0x0 603 #define MX6SL_PAD_KEY_ROW5__EIM_AD11 603 #define MX6SL_PAD_KEY_ROW5__EIM_AD11 0x1a0 0x4a8 0x000 0x3 0x0 604 #define MX6SL_PAD_KEY_ROW5__SD4_DATA1 604 #define MX6SL_PAD_KEY_ROW5__SD4_DATA1 0x1a0 0x4a8 0x860 0x4 0x2 605 #define MX6SL_PAD_KEY_ROW5__GPIO4_IO03 605 #define MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x1a0 0x4a8 0x000 0x5 0x0 606 #define MX6SL_PAD_KEY_ROW5__USB_OTG2_OC 606 #define MX6SL_PAD_KEY_ROW5__USB_OTG2_OC 0x1a0 0x4a8 0x820 0x6 0x2 607 #define MX6SL_PAD_KEY_ROW6__KEY_ROW6 607 #define MX6SL_PAD_KEY_ROW6__KEY_ROW6 0x1a4 0x4ac 0x76c 0x0 0x0 608 #define MX6SL_PAD_KEY_ROW6__UART4_TX_DATA 608 #define MX6SL_PAD_KEY_ROW6__UART4_TX_DATA 0x1a4 0x4ac 0x000 0x1 0x0 609 #define MX6SL_PAD_KEY_ROW6__UART4_RX_DATA 609 #define MX6SL_PAD_KEY_ROW6__UART4_RX_DATA 0x1a4 0x4ac 0x814 0x1 0x3 610 #define MX6SL_PAD_KEY_ROW6__LCD_DATA13 610 #define MX6SL_PAD_KEY_ROW6__LCD_DATA13 0x1a4 0x4ac 0x7ac 0x2 0x0 611 #define MX6SL_PAD_KEY_ROW6__EIM_AD13 611 #define MX6SL_PAD_KEY_ROW6__EIM_AD13 0x1a4 0x4ac 0x000 0x3 0x0 612 #define MX6SL_PAD_KEY_ROW6__SD4_DATA3 612 #define MX6SL_PAD_KEY_ROW6__SD4_DATA3 0x1a4 0x4ac 0x868 0x4 0x2 613 #define MX6SL_PAD_KEY_ROW6__GPIO4_IO05 613 #define MX6SL_PAD_KEY_ROW6__GPIO4_IO05 0x1a4 0x4ac 0x000 0x5 0x0 614 #define MX6SL_PAD_KEY_ROW6__SD3_VSELECT 614 #define MX6SL_PAD_KEY_ROW6__SD3_VSELECT 0x1a4 0x4ac 0x000 0x6 0x0 615 #define MX6SL_PAD_KEY_ROW7__KEY_ROW7 615 #define MX6SL_PAD_KEY_ROW7__KEY_ROW7 0x1a8 0x4b0 0x770 0x0 0x0 616 #define MX6SL_PAD_KEY_ROW7__UART4_CTS_B 616 #define MX6SL_PAD_KEY_ROW7__UART4_CTS_B 0x1a8 0x4b0 0x000 0x1 0x0 617 #define MX6SL_PAD_KEY_ROW7__UART4_RTS_B 617 #define MX6SL_PAD_KEY_ROW7__UART4_RTS_B 0x1a8 0x4b0 0x810 0x1 0x3 618 #define MX6SL_PAD_KEY_ROW7__LCD_DATA15 618 #define MX6SL_PAD_KEY_ROW7__LCD_DATA15 0x1a8 0x4b0 0x7b4 0x2 0x0 619 #define MX6SL_PAD_KEY_ROW7__EIM_AD15 619 #define MX6SL_PAD_KEY_ROW7__EIM_AD15 0x1a8 0x4b0 0x000 0x3 0x0 620 #define MX6SL_PAD_KEY_ROW7__SD4_DATA5 620 #define MX6SL_PAD_KEY_ROW7__SD4_DATA5 0x1a8 0x4b0 0x870 0x4 0x1 621 #define MX6SL_PAD_KEY_ROW7__GPIO4_IO07 621 #define MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x1a8 0x4b0 0x000 0x5 0x0 622 #define MX6SL_PAD_KEY_ROW7__SD1_CD_B 622 #define MX6SL_PAD_KEY_ROW7__SD1_CD_B 0x1a8 0x4b0 0x828 0x6 0x3 623 #define MX6SL_PAD_LCD_CLK__LCD_CLK 623 #define MX6SL_PAD_LCD_CLK__LCD_CLK 0x1ac 0x4b4 0x000 0x0 0x0 624 #define MX6SL_PAD_LCD_CLK__SD4_DATA4 624 #define MX6SL_PAD_LCD_CLK__SD4_DATA4 0x1ac 0x4b4 0x86c 0x1 0x2 625 #define MX6SL_PAD_LCD_CLK__LCD_WR_RWN 625 #define MX6SL_PAD_LCD_CLK__LCD_WR_RWN 0x1ac 0x4b4 0x000 0x2 0x0 626 #define MX6SL_PAD_LCD_CLK__EIM_RW 626 #define MX6SL_PAD_LCD_CLK__EIM_RW 0x1ac 0x4b4 0x000 0x3 0x0 627 #define MX6SL_PAD_LCD_CLK__PWM4_OUT 627 #define MX6SL_PAD_LCD_CLK__PWM4_OUT 0x1ac 0x4b4 0x000 0x4 0x0 628 #define MX6SL_PAD_LCD_CLK__GPIO2_IO15 628 #define MX6SL_PAD_LCD_CLK__GPIO2_IO15 0x1ac 0x4b4 0x000 0x5 0x0 629 #define MX6SL_PAD_LCD_DAT0__LCD_DATA00 629 #define MX6SL_PAD_LCD_DAT0__LCD_DATA00 0x1b0 0x4b8 0x778 0x0 0x1 630 #define MX6SL_PAD_LCD_DAT0__ECSPI1_MOSI 630 #define MX6SL_PAD_LCD_DAT0__ECSPI1_MOSI 0x1b0 0x4b8 0x688 0x1 0x1 631 #define MX6SL_PAD_LCD_DAT0__USB_OTG2_ID 631 #define MX6SL_PAD_LCD_DAT0__USB_OTG2_ID 0x1b0 0x4b8 0x5e0 0x2 0x1 632 #define MX6SL_PAD_LCD_DAT0__PWM1_OUT 632 #define MX6SL_PAD_LCD_DAT0__PWM1_OUT 0x1b0 0x4b8 0x000 0x3 0x0 633 #define MX6SL_PAD_LCD_DAT0__UART5_DTR_B 633 #define MX6SL_PAD_LCD_DAT0__UART5_DTR_B 0x1b0 0x4b8 0x000 0x4 0x0 634 #define MX6SL_PAD_LCD_DAT0__GPIO2_IO20 634 #define MX6SL_PAD_LCD_DAT0__GPIO2_IO20 0x1b0 0x4b8 0x000 0x5 0x0 635 #define MX6SL_PAD_LCD_DAT0__ARM_TRACE00 635 #define MX6SL_PAD_LCD_DAT0__ARM_TRACE00 0x1b0 0x4b8 0x000 0x6 0x0 636 #define MX6SL_PAD_LCD_DAT0__SRC_BOOT_CFG00 636 #define MX6SL_PAD_LCD_DAT0__SRC_BOOT_CFG00 0x1b0 0x4b8 0x000 0x7 0x0 637 #define MX6SL_PAD_LCD_DAT1__LCD_DATA01 637 #define MX6SL_PAD_LCD_DAT1__LCD_DATA01 0x1b4 0x4bc 0x77c 0x0 0x1 638 #define MX6SL_PAD_LCD_DAT1__ECSPI1_MISO 638 #define MX6SL_PAD_LCD_DAT1__ECSPI1_MISO 0x1b4 0x4bc 0x684 0x1 0x1 639 #define MX6SL_PAD_LCD_DAT1__USB_OTG1_ID 639 #define MX6SL_PAD_LCD_DAT1__USB_OTG1_ID 0x1b4 0x4bc 0x5dc 0x2 0x2 640 #define MX6SL_PAD_LCD_DAT1__PWM2_OUT 640 #define MX6SL_PAD_LCD_DAT1__PWM2_OUT 0x1b4 0x4bc 0x000 0x3 0x0 641 #define MX6SL_PAD_LCD_DAT1__AUD4_RXFS 641 #define MX6SL_PAD_LCD_DAT1__AUD4_RXFS 0x1b4 0x4bc 0x5f0 0x4 0x1 642 #define MX6SL_PAD_LCD_DAT1__GPIO2_IO21 642 #define MX6SL_PAD_LCD_DAT1__GPIO2_IO21 0x1b4 0x4bc 0x000 0x5 0x0 643 #define MX6SL_PAD_LCD_DAT1__ARM_TRACE01 643 #define MX6SL_PAD_LCD_DAT1__ARM_TRACE01 0x1b4 0x4bc 0x000 0x6 0x0 644 #define MX6SL_PAD_LCD_DAT1__SRC_BOOT_CFG01 644 #define MX6SL_PAD_LCD_DAT1__SRC_BOOT_CFG01 0x1b4 0x4bc 0x000 0x7 0x0 645 #define MX6SL_PAD_LCD_DAT10__LCD_DATA10 645 #define MX6SL_PAD_LCD_DAT10__LCD_DATA10 0x1b8 0x4c0 0x7a0 0x0 0x1 646 #define MX6SL_PAD_LCD_DAT10__KEY_COL1 646 #define MX6SL_PAD_LCD_DAT10__KEY_COL1 0x1b8 0x4c0 0x738 0x1 0x1 647 #define MX6SL_PAD_LCD_DAT10__CSI_DATA07 647 #define MX6SL_PAD_LCD_DAT10__CSI_DATA07 0x1b8 0x4c0 0x64c 0x2 0x1 648 #define MX6SL_PAD_LCD_DAT10__EIM_DATA04 648 #define MX6SL_PAD_LCD_DAT10__EIM_DATA04 0x1b8 0x4c0 0x000 0x3 0x0 649 #define MX6SL_PAD_LCD_DAT10__ECSPI2_MISO 649 #define MX6SL_PAD_LCD_DAT10__ECSPI2_MISO 0x1b8 0x4c0 0x6a0 0x4 0x2 650 #define MX6SL_PAD_LCD_DAT10__GPIO2_IO30 650 #define MX6SL_PAD_LCD_DAT10__GPIO2_IO30 0x1b8 0x4c0 0x000 0x5 0x0 651 #define MX6SL_PAD_LCD_DAT10__ARM_TRACE10 651 #define MX6SL_PAD_LCD_DAT10__ARM_TRACE10 0x1b8 0x4c0 0x000 0x6 0x0 652 #define MX6SL_PAD_LCD_DAT10__SRC_BOOT_CFG10 652 #define MX6SL_PAD_LCD_DAT10__SRC_BOOT_CFG10 0x1b8 0x4c0 0x000 0x7 0x0 653 #define MX6SL_PAD_LCD_DAT11__LCD_DATA11 653 #define MX6SL_PAD_LCD_DAT11__LCD_DATA11 0x1bc 0x4c4 0x7a4 0x0 0x1 654 #define MX6SL_PAD_LCD_DAT11__KEY_ROW1 654 #define MX6SL_PAD_LCD_DAT11__KEY_ROW1 0x1bc 0x4c4 0x758 0x1 0x1 655 #define MX6SL_PAD_LCD_DAT11__CSI_DATA06 655 #define MX6SL_PAD_LCD_DAT11__CSI_DATA06 0x1bc 0x4c4 0x648 0x2 0x1 656 #define MX6SL_PAD_LCD_DAT11__EIM_DATA05 656 #define MX6SL_PAD_LCD_DAT11__EIM_DATA05 0x1bc 0x4c4 0x000 0x3 0x0 657 #define MX6SL_PAD_LCD_DAT11__ECSPI2_SS1 657 #define MX6SL_PAD_LCD_DAT11__ECSPI2_SS1 0x1bc 0x4c4 0x6ac 0x4 0x1 658 #define MX6SL_PAD_LCD_DAT11__GPIO2_IO31 658 #define MX6SL_PAD_LCD_DAT11__GPIO2_IO31 0x1bc 0x4c4 0x000 0x5 0x0 659 #define MX6SL_PAD_LCD_DAT11__ARM_TRACE11 659 #define MX6SL_PAD_LCD_DAT11__ARM_TRACE11 0x1bc 0x4c4 0x000 0x6 0x0 660 #define MX6SL_PAD_LCD_DAT11__SRC_BOOT_CFG11 660 #define MX6SL_PAD_LCD_DAT11__SRC_BOOT_CFG11 0x1bc 0x4c4 0x000 0x7 0x0 661 #define MX6SL_PAD_LCD_DAT12__LCD_DATA12 661 #define MX6SL_PAD_LCD_DAT12__LCD_DATA12 0x1c0 0x4c8 0x7a8 0x0 0x1 662 #define MX6SL_PAD_LCD_DAT12__KEY_COL2 662 #define MX6SL_PAD_LCD_DAT12__KEY_COL2 0x1c0 0x4c8 0x73c 0x1 0x1 663 #define MX6SL_PAD_LCD_DAT12__CSI_DATA05 663 #define MX6SL_PAD_LCD_DAT12__CSI_DATA05 0x1c0 0x4c8 0x644 0x2 0x1 664 #define MX6SL_PAD_LCD_DAT12__EIM_DATA06 664 #define MX6SL_PAD_LCD_DAT12__EIM_DATA06 0x1c0 0x4c8 0x000 0x3 0x0 665 #define MX6SL_PAD_LCD_DAT12__UART5_RTS_B 665 #define MX6SL_PAD_LCD_DAT12__UART5_RTS_B 0x1c0 0x4c8 0x818 0x4 0x2 666 #define MX6SL_PAD_LCD_DAT12__UART5_CTS_B 666 #define MX6SL_PAD_LCD_DAT12__UART5_CTS_B 0x1c0 0x4c8 0x000 0x4 0x0 667 #define MX6SL_PAD_LCD_DAT12__GPIO3_IO00 667 #define MX6SL_PAD_LCD_DAT12__GPIO3_IO00 0x1c0 0x4c8 0x000 0x5 0x0 668 #define MX6SL_PAD_LCD_DAT12__ARM_TRACE12 668 #define MX6SL_PAD_LCD_DAT12__ARM_TRACE12 0x1c0 0x4c8 0x000 0x6 0x0 669 #define MX6SL_PAD_LCD_DAT12__SRC_BOOT_CFG12 669 #define MX6SL_PAD_LCD_DAT12__SRC_BOOT_CFG12 0x1c0 0x4c8 0x000 0x7 0x0 670 #define MX6SL_PAD_LCD_DAT13__LCD_DATA13 670 #define MX6SL_PAD_LCD_DAT13__LCD_DATA13 0x1c4 0x4cc 0x7ac 0x0 0x1 671 #define MX6SL_PAD_LCD_DAT13__KEY_ROW2 671 #define MX6SL_PAD_LCD_DAT13__KEY_ROW2 0x1c4 0x4cc 0x75c 0x1 0x1 672 #define MX6SL_PAD_LCD_DAT13__CSI_DATA04 672 #define MX6SL_PAD_LCD_DAT13__CSI_DATA04 0x1c4 0x4cc 0x640 0x2 0x1 673 #define MX6SL_PAD_LCD_DAT13__EIM_DATA07 673 #define MX6SL_PAD_LCD_DAT13__EIM_DATA07 0x1c4 0x4cc 0x000 0x3 0x0 674 #define MX6SL_PAD_LCD_DAT13__UART5_CTS_B 674 #define MX6SL_PAD_LCD_DAT13__UART5_CTS_B 0x1c4 0x4cc 0x000 0x4 0x0 675 #define MX6SL_PAD_LCD_DAT13__UART5_RTS_B 675 #define MX6SL_PAD_LCD_DAT13__UART5_RTS_B 0x1c4 0x4cc 0x818 0x4 0x3 676 #define MX6SL_PAD_LCD_DAT13__GPIO3_IO01 676 #define MX6SL_PAD_LCD_DAT13__GPIO3_IO01 0x1c4 0x4cc 0x000 0x5 0x0 677 #define MX6SL_PAD_LCD_DAT13__ARM_TRACE13 677 #define MX6SL_PAD_LCD_DAT13__ARM_TRACE13 0x1c4 0x4cc 0x000 0x6 0x0 678 #define MX6SL_PAD_LCD_DAT13__SRC_BOOT_CFG13 678 #define MX6SL_PAD_LCD_DAT13__SRC_BOOT_CFG13 0x1c4 0x4cc 0x000 0x7 0x0 679 #define MX6SL_PAD_LCD_DAT14__LCD_DATA14 679 #define MX6SL_PAD_LCD_DAT14__LCD_DATA14 0x1c8 0x4d0 0x7b0 0x0 0x1 680 #define MX6SL_PAD_LCD_DAT14__KEY_COL3 680 #define MX6SL_PAD_LCD_DAT14__KEY_COL3 0x1c8 0x4d0 0x740 0x1 0x1 681 #define MX6SL_PAD_LCD_DAT14__CSI_DATA03 681 #define MX6SL_PAD_LCD_DAT14__CSI_DATA03 0x1c8 0x4d0 0x63c 0x2 0x1 682 #define MX6SL_PAD_LCD_DAT14__EIM_DATA08 682 #define MX6SL_PAD_LCD_DAT14__EIM_DATA08 0x1c8 0x4d0 0x000 0x3 0x0 683 #define MX6SL_PAD_LCD_DAT14__UART5_RX_DATA 683 #define MX6SL_PAD_LCD_DAT14__UART5_RX_DATA 0x1c8 0x4d0 0x81c 0x4 0x2 684 #define MX6SL_PAD_LCD_DAT14__UART5_TX_DATA 684 #define MX6SL_PAD_LCD_DAT14__UART5_TX_DATA 0x1c8 0x4d0 0x000 0x4 0x0 685 #define MX6SL_PAD_LCD_DAT14__GPIO3_IO02 685 #define MX6SL_PAD_LCD_DAT14__GPIO3_IO02 0x1c8 0x4d0 0x000 0x5 0x0 686 #define MX6SL_PAD_LCD_DAT14__ARM_TRACE14 686 #define MX6SL_PAD_LCD_DAT14__ARM_TRACE14 0x1c8 0x4d0 0x000 0x6 0x0 687 #define MX6SL_PAD_LCD_DAT14__SRC_BOOT_CFG14 687 #define MX6SL_PAD_LCD_DAT14__SRC_BOOT_CFG14 0x1c8 0x4d0 0x000 0x7 0x0 688 #define MX6SL_PAD_LCD_DAT15__LCD_DATA15 688 #define MX6SL_PAD_LCD_DAT15__LCD_DATA15 0x1cc 0x4d4 0x7b4 0x0 0x1 689 #define MX6SL_PAD_LCD_DAT15__KEY_ROW3 689 #define MX6SL_PAD_LCD_DAT15__KEY_ROW3 0x1cc 0x4d4 0x760 0x1 0x1 690 #define MX6SL_PAD_LCD_DAT15__CSI_DATA02 690 #define MX6SL_PAD_LCD_DAT15__CSI_DATA02 0x1cc 0x4d4 0x638 0x2 0x1 691 #define MX6SL_PAD_LCD_DAT15__EIM_DATA09 691 #define MX6SL_PAD_LCD_DAT15__EIM_DATA09 0x1cc 0x4d4 0x000 0x3 0x0 692 #define MX6SL_PAD_LCD_DAT15__UART5_TX_DATA 692 #define MX6SL_PAD_LCD_DAT15__UART5_TX_DATA 0x1cc 0x4d4 0x000 0x4 0x0 693 #define MX6SL_PAD_LCD_DAT15__UART5_RX_DATA 693 #define MX6SL_PAD_LCD_DAT15__UART5_RX_DATA 0x1cc 0x4d4 0x81c 0x4 0x3 694 #define MX6SL_PAD_LCD_DAT15__GPIO3_IO03 694 #define MX6SL_PAD_LCD_DAT15__GPIO3_IO03 0x1cc 0x4d4 0x000 0x5 0x0 695 #define MX6SL_PAD_LCD_DAT15__ARM_TRACE15 695 #define MX6SL_PAD_LCD_DAT15__ARM_TRACE15 0x1cc 0x4d4 0x000 0x6 0x0 696 #define MX6SL_PAD_LCD_DAT15__SRC_BOOT_CFG15 696 #define MX6SL_PAD_LCD_DAT15__SRC_BOOT_CFG15 0x1cc 0x4d4 0x000 0x7 0x0 697 #define MX6SL_PAD_LCD_DAT16__LCD_DATA16 697 #define MX6SL_PAD_LCD_DAT16__LCD_DATA16 0x1d0 0x4d8 0x7b8 0x0 0x1 698 #define MX6SL_PAD_LCD_DAT16__KEY_COL4 698 #define MX6SL_PAD_LCD_DAT16__KEY_COL4 0x1d0 0x4d8 0x744 0x1 0x1 699 #define MX6SL_PAD_LCD_DAT16__CSI_DATA01 699 #define MX6SL_PAD_LCD_DAT16__CSI_DATA01 0x1d0 0x4d8 0x634 0x2 0x1 700 #define MX6SL_PAD_LCD_DAT16__EIM_DATA10 700 #define MX6SL_PAD_LCD_DAT16__EIM_DATA10 0x1d0 0x4d8 0x000 0x3 0x0 701 #define MX6SL_PAD_LCD_DAT16__I2C2_SCL 701 #define MX6SL_PAD_LCD_DAT16__I2C2_SCL 0x1d0 0x4d8 0x724 0x4 0x3 702 #define MX6SL_PAD_LCD_DAT16__GPIO3_IO04 702 #define MX6SL_PAD_LCD_DAT16__GPIO3_IO04 0x1d0 0x4d8 0x000 0x5 0x0 703 #define MX6SL_PAD_LCD_DAT16__ARM_TRACE16 703 #define MX6SL_PAD_LCD_DAT16__ARM_TRACE16 0x1d0 0x4d8 0x000 0x6 0x0 704 #define MX6SL_PAD_LCD_DAT16__SRC_BOOT_CFG24 704 #define MX6SL_PAD_LCD_DAT16__SRC_BOOT_CFG24 0x1d0 0x4d8 0x000 0x7 0x0 705 #define MX6SL_PAD_LCD_DAT17__LCD_DATA17 705 #define MX6SL_PAD_LCD_DAT17__LCD_DATA17 0x1d4 0x4dc 0x7bc 0x0 0x1 706 #define MX6SL_PAD_LCD_DAT17__KEY_ROW4 706 #define MX6SL_PAD_LCD_DAT17__KEY_ROW4 0x1d4 0x4dc 0x764 0x1 0x1 707 #define MX6SL_PAD_LCD_DAT17__CSI_DATA00 707 #define MX6SL_PAD_LCD_DAT17__CSI_DATA00 0x1d4 0x4dc 0x630 0x2 0x1 708 #define MX6SL_PAD_LCD_DAT17__EIM_DATA11 708 #define MX6SL_PAD_LCD_DAT17__EIM_DATA11 0x1d4 0x4dc 0x000 0x3 0x0 709 #define MX6SL_PAD_LCD_DAT17__I2C2_SDA 709 #define MX6SL_PAD_LCD_DAT17__I2C2_SDA 0x1d4 0x4dc 0x728 0x4 0x3 710 #define MX6SL_PAD_LCD_DAT17__GPIO3_IO05 710 #define MX6SL_PAD_LCD_DAT17__GPIO3_IO05 0x1d4 0x4dc 0x000 0x5 0x0 711 #define MX6SL_PAD_LCD_DAT17__ARM_TRACE17 711 #define MX6SL_PAD_LCD_DAT17__ARM_TRACE17 0x1d4 0x4dc 0x000 0x6 0x0 712 #define MX6SL_PAD_LCD_DAT17__SRC_BOOT_CFG25 712 #define MX6SL_PAD_LCD_DAT17__SRC_BOOT_CFG25 0x1d4 0x4dc 0x000 0x7 0x0 713 #define MX6SL_PAD_LCD_DAT18__LCD_DATA18 713 #define MX6SL_PAD_LCD_DAT18__LCD_DATA18 0x1d8 0x4e0 0x7c0 0x0 0x1 714 #define MX6SL_PAD_LCD_DAT18__KEY_COL5 714 #define MX6SL_PAD_LCD_DAT18__KEY_COL5 0x1d8 0x4e0 0x748 0x1 0x1 715 #define MX6SL_PAD_LCD_DAT18__CSI_DATA15 715 #define MX6SL_PAD_LCD_DAT18__CSI_DATA15 0x1d8 0x4e0 0x66c 0x2 0x0 716 #define MX6SL_PAD_LCD_DAT18__EIM_DATA12 716 #define MX6SL_PAD_LCD_DAT18__EIM_DATA12 0x1d8 0x4e0 0x000 0x3 0x0 717 #define MX6SL_PAD_LCD_DAT18__GPT_CAPTURE1 717 #define MX6SL_PAD_LCD_DAT18__GPT_CAPTURE1 0x1d8 0x4e0 0x710 0x4 0x1 718 #define MX6SL_PAD_LCD_DAT18__GPIO3_IO06 718 #define MX6SL_PAD_LCD_DAT18__GPIO3_IO06 0x1d8 0x4e0 0x000 0x5 0x0 719 #define MX6SL_PAD_LCD_DAT18__ARM_TRACE18 719 #define MX6SL_PAD_LCD_DAT18__ARM_TRACE18 0x1d8 0x4e0 0x000 0x6 0x0 720 #define MX6SL_PAD_LCD_DAT18__SRC_BOOT_CFG26 720 #define MX6SL_PAD_LCD_DAT18__SRC_BOOT_CFG26 0x1d8 0x4e0 0x000 0x7 0x0 721 #define MX6SL_PAD_LCD_DAT19__LCD_DATA19 721 #define MX6SL_PAD_LCD_DAT19__LCD_DATA19 0x1dc 0x4e4 0x7c4 0x0 0x1 722 #define MX6SL_PAD_LCD_DAT19__KEY_ROW5 722 #define MX6SL_PAD_LCD_DAT19__KEY_ROW5 0x1dc 0x4e4 0x768 0x1 0x1 723 #define MX6SL_PAD_LCD_DAT19__CSI_DATA14 723 #define MX6SL_PAD_LCD_DAT19__CSI_DATA14 0x1dc 0x4e4 0x668 0x2 0x0 724 #define MX6SL_PAD_LCD_DAT19__EIM_DATA13 724 #define MX6SL_PAD_LCD_DAT19__EIM_DATA13 0x1dc 0x4e4 0x000 0x3 0x0 725 #define MX6SL_PAD_LCD_DAT19__GPT_CAPTURE2 725 #define MX6SL_PAD_LCD_DAT19__GPT_CAPTURE2 0x1dc 0x4e4 0x714 0x4 0x1 726 #define MX6SL_PAD_LCD_DAT19__GPIO3_IO07 726 #define MX6SL_PAD_LCD_DAT19__GPIO3_IO07 0x1dc 0x4e4 0x000 0x5 0x0 727 #define MX6SL_PAD_LCD_DAT19__ARM_TRACE19 727 #define MX6SL_PAD_LCD_DAT19__ARM_TRACE19 0x1dc 0x4e4 0x000 0x6 0x0 728 #define MX6SL_PAD_LCD_DAT19__SRC_BOOT_CFG27 728 #define MX6SL_PAD_LCD_DAT19__SRC_BOOT_CFG27 0x1dc 0x4e4 0x000 0x7 0x0 729 #define MX6SL_PAD_LCD_DAT2__LCD_DATA02 729 #define MX6SL_PAD_LCD_DAT2__LCD_DATA02 0x1e0 0x4e8 0x780 0x0 0x1 730 #define MX6SL_PAD_LCD_DAT2__ECSPI1_SS0 730 #define MX6SL_PAD_LCD_DAT2__ECSPI1_SS0 0x1e0 0x4e8 0x68c 0x1 0x1 731 #define MX6SL_PAD_LCD_DAT2__EPIT2_OUT 731 #define MX6SL_PAD_LCD_DAT2__EPIT2_OUT 0x1e0 0x4e8 0x000 0x2 0x0 732 #define MX6SL_PAD_LCD_DAT2__PWM3_OUT 732 #define MX6SL_PAD_LCD_DAT2__PWM3_OUT 0x1e0 0x4e8 0x000 0x3 0x0 733 #define MX6SL_PAD_LCD_DAT2__AUD4_RXC 733 #define MX6SL_PAD_LCD_DAT2__AUD4_RXC 0x1e0 0x4e8 0x5ec 0x4 0x1 734 #define MX6SL_PAD_LCD_DAT2__GPIO2_IO22 734 #define MX6SL_PAD_LCD_DAT2__GPIO2_IO22 0x1e0 0x4e8 0x000 0x5 0x0 735 #define MX6SL_PAD_LCD_DAT2__ARM_TRACE02 735 #define MX6SL_PAD_LCD_DAT2__ARM_TRACE02 0x1e0 0x4e8 0x000 0x6 0x0 736 #define MX6SL_PAD_LCD_DAT2__SRC_BOOT_CFG02 736 #define MX6SL_PAD_LCD_DAT2__SRC_BOOT_CFG02 0x1e0 0x4e8 0x000 0x7 0x0 737 #define MX6SL_PAD_LCD_DAT20__LCD_DATA20 737 #define MX6SL_PAD_LCD_DAT20__LCD_DATA20 0x1e4 0x4ec 0x7c8 0x0 0x1 738 #define MX6SL_PAD_LCD_DAT20__KEY_COL6 738 #define MX6SL_PAD_LCD_DAT20__KEY_COL6 0x1e4 0x4ec 0x74c 0x1 0x1 739 #define MX6SL_PAD_LCD_DAT20__CSI_DATA13 739 #define MX6SL_PAD_LCD_DAT20__CSI_DATA13 0x1e4 0x4ec 0x664 0x2 0x0 740 #define MX6SL_PAD_LCD_DAT20__EIM_DATA14 740 #define MX6SL_PAD_LCD_DAT20__EIM_DATA14 0x1e4 0x4ec 0x000 0x3 0x0 741 #define MX6SL_PAD_LCD_DAT20__GPT_COMPARE1 741 #define MX6SL_PAD_LCD_DAT20__GPT_COMPARE1 0x1e4 0x4ec 0x000 0x4 0x0 742 #define MX6SL_PAD_LCD_DAT20__GPIO3_IO08 742 #define MX6SL_PAD_LCD_DAT20__GPIO3_IO08 0x1e4 0x4ec 0x000 0x5 0x0 743 #define MX6SL_PAD_LCD_DAT20__ARM_TRACE20 743 #define MX6SL_PAD_LCD_DAT20__ARM_TRACE20 0x1e4 0x4ec 0x000 0x6 0x0 744 #define MX6SL_PAD_LCD_DAT20__SRC_BOOT_CFG28 744 #define MX6SL_PAD_LCD_DAT20__SRC_BOOT_CFG28 0x1e4 0x4ec 0x000 0x7 0x0 745 #define MX6SL_PAD_LCD_DAT21__LCD_DATA21 745 #define MX6SL_PAD_LCD_DAT21__LCD_DATA21 0x1e8 0x4f0 0x7cc 0x0 0x1 746 #define MX6SL_PAD_LCD_DAT21__KEY_ROW6 746 #define MX6SL_PAD_LCD_DAT21__KEY_ROW6 0x1e8 0x4f0 0x76c 0x1 0x1 747 #define MX6SL_PAD_LCD_DAT21__CSI_DATA12 747 #define MX6SL_PAD_LCD_DAT21__CSI_DATA12 0x1e8 0x4f0 0x660 0x2 0x0 748 #define MX6SL_PAD_LCD_DAT21__EIM_DATA15 748 #define MX6SL_PAD_LCD_DAT21__EIM_DATA15 0x1e8 0x4f0 0x000 0x3 0x0 749 #define MX6SL_PAD_LCD_DAT21__GPT_COMPARE2 749 #define MX6SL_PAD_LCD_DAT21__GPT_COMPARE2 0x1e8 0x4f0 0x000 0x4 0x0 750 #define MX6SL_PAD_LCD_DAT21__GPIO3_IO09 750 #define MX6SL_PAD_LCD_DAT21__GPIO3_IO09 0x1e8 0x4f0 0x000 0x5 0x0 751 #define MX6SL_PAD_LCD_DAT21__ARM_TRACE21 751 #define MX6SL_PAD_LCD_DAT21__ARM_TRACE21 0x1e8 0x4f0 0x000 0x6 0x0 752 #define MX6SL_PAD_LCD_DAT21__SRC_BOOT_CFG29 752 #define MX6SL_PAD_LCD_DAT21__SRC_BOOT_CFG29 0x1e8 0x4f0 0x000 0x7 0x0 753 #define MX6SL_PAD_LCD_DAT22__LCD_DATA22 753 #define MX6SL_PAD_LCD_DAT22__LCD_DATA22 0x1ec 0x4f4 0x7d0 0x0 0x1 754 #define MX6SL_PAD_LCD_DAT22__KEY_COL7 754 #define MX6SL_PAD_LCD_DAT22__KEY_COL7 0x1ec 0x4f4 0x750 0x1 0x1 755 #define MX6SL_PAD_LCD_DAT22__CSI_DATA11 755 #define MX6SL_PAD_LCD_DAT22__CSI_DATA11 0x1ec 0x4f4 0x65c 0x2 0x1 756 #define MX6SL_PAD_LCD_DAT22__EIM_EB3_B 756 #define MX6SL_PAD_LCD_DAT22__EIM_EB3_B 0x1ec 0x4f4 0x000 0x3 0x0 757 #define MX6SL_PAD_LCD_DAT22__GPT_COMPARE3 757 #define MX6SL_PAD_LCD_DAT22__GPT_COMPARE3 0x1ec 0x4f4 0x000 0x4 0x0 758 #define MX6SL_PAD_LCD_DAT22__GPIO3_IO10 758 #define MX6SL_PAD_LCD_DAT22__GPIO3_IO10 0x1ec 0x4f4 0x000 0x5 0x0 759 #define MX6SL_PAD_LCD_DAT22__ARM_TRACE22 759 #define MX6SL_PAD_LCD_DAT22__ARM_TRACE22 0x1ec 0x4f4 0x000 0x6 0x0 760 #define MX6SL_PAD_LCD_DAT22__SRC_BOOT_CFG30 760 #define MX6SL_PAD_LCD_DAT22__SRC_BOOT_CFG30 0x1ec 0x4f4 0x000 0x7 0x0 761 #define MX6SL_PAD_LCD_DAT23__LCD_DATA23 761 #define MX6SL_PAD_LCD_DAT23__LCD_DATA23 0x1f0 0x4f8 0x7d4 0x0 0x1 762 #define MX6SL_PAD_LCD_DAT23__KEY_ROW7 762 #define MX6SL_PAD_LCD_DAT23__KEY_ROW7 0x1f0 0x4f8 0x770 0x1 0x1 763 #define MX6SL_PAD_LCD_DAT23__CSI_DATA10 763 #define MX6SL_PAD_LCD_DAT23__CSI_DATA10 0x1f0 0x4f8 0x658 0x2 0x1 764 #define MX6SL_PAD_LCD_DAT23__EIM_EB2_B 764 #define MX6SL_PAD_LCD_DAT23__EIM_EB2_B 0x1f0 0x4f8 0x000 0x3 0x0 765 #define MX6SL_PAD_LCD_DAT23__GPT_CLKIN 765 #define MX6SL_PAD_LCD_DAT23__GPT_CLKIN 0x1f0 0x4f8 0x718 0x4 0x1 766 #define MX6SL_PAD_LCD_DAT23__GPIO3_IO11 766 #define MX6SL_PAD_LCD_DAT23__GPIO3_IO11 0x1f0 0x4f8 0x000 0x5 0x0 767 #define MX6SL_PAD_LCD_DAT23__ARM_TRACE23 767 #define MX6SL_PAD_LCD_DAT23__ARM_TRACE23 0x1f0 0x4f8 0x000 0x6 0x0 768 #define MX6SL_PAD_LCD_DAT23__SRC_BOOT_CFG31 768 #define MX6SL_PAD_LCD_DAT23__SRC_BOOT_CFG31 0x1f0 0x4f8 0x000 0x7 0x0 769 #define MX6SL_PAD_LCD_DAT3__LCD_DATA03 769 #define MX6SL_PAD_LCD_DAT3__LCD_DATA03 0x1f4 0x4fc 0x784 0x0 0x1 770 #define MX6SL_PAD_LCD_DAT3__ECSPI1_SCLK 770 #define MX6SL_PAD_LCD_DAT3__ECSPI1_SCLK 0x1f4 0x4fc 0x67c 0x1 0x1 771 #define MX6SL_PAD_LCD_DAT3__UART5_DSR_B 771 #define MX6SL_PAD_LCD_DAT3__UART5_DSR_B 0x1f4 0x4fc 0x000 0x2 0x0 772 #define MX6SL_PAD_LCD_DAT3__PWM4_OUT 772 #define MX6SL_PAD_LCD_DAT3__PWM4_OUT 0x1f4 0x4fc 0x000 0x3 0x0 773 #define MX6SL_PAD_LCD_DAT3__AUD4_RXD 773 #define MX6SL_PAD_LCD_DAT3__AUD4_RXD 0x1f4 0x4fc 0x5e4 0x4 0x1 774 #define MX6SL_PAD_LCD_DAT3__GPIO2_IO23 774 #define MX6SL_PAD_LCD_DAT3__GPIO2_IO23 0x1f4 0x4fc 0x000 0x5 0x0 775 #define MX6SL_PAD_LCD_DAT3__ARM_TRACE03 775 #define MX6SL_PAD_LCD_DAT3__ARM_TRACE03 0x1f4 0x4fc 0x000 0x6 0x0 776 #define MX6SL_PAD_LCD_DAT3__SRC_BOOT_CFG03 776 #define MX6SL_PAD_LCD_DAT3__SRC_BOOT_CFG03 0x1f4 0x4fc 0x000 0x7 0x0 777 #define MX6SL_PAD_LCD_DAT4__LCD_DATA04 777 #define MX6SL_PAD_LCD_DAT4__LCD_DATA04 0x1f8 0x500 0x788 0x0 0x1 778 #define MX6SL_PAD_LCD_DAT4__ECSPI1_SS1 778 #define MX6SL_PAD_LCD_DAT4__ECSPI1_SS1 0x1f8 0x500 0x690 0x1 0x1 779 #define MX6SL_PAD_LCD_DAT4__CSI_VSYNC 779 #define MX6SL_PAD_LCD_DAT4__CSI_VSYNC 0x1f8 0x500 0x678 0x2 0x2 780 #define MX6SL_PAD_LCD_DAT4__WDOG2_RESET_B_DEB 780 #define MX6SL_PAD_LCD_DAT4__WDOG2_RESET_B_DEB 0x1f8 0x500 0x000 0x3 0x0 781 #define MX6SL_PAD_LCD_DAT4__AUD4_TXC 781 #define MX6SL_PAD_LCD_DAT4__AUD4_TXC 0x1f8 0x500 0x5f4 0x4 0x1 782 #define MX6SL_PAD_LCD_DAT4__GPIO2_IO24 782 #define MX6SL_PAD_LCD_DAT4__GPIO2_IO24 0x1f8 0x500 0x000 0x5 0x0 783 #define MX6SL_PAD_LCD_DAT4__ARM_TRACE04 783 #define MX6SL_PAD_LCD_DAT4__ARM_TRACE04 0x1f8 0x500 0x000 0x6 0x0 784 #define MX6SL_PAD_LCD_DAT4__SRC_BOOT_CFG04 784 #define MX6SL_PAD_LCD_DAT4__SRC_BOOT_CFG04 0x1f8 0x500 0x000 0x7 0x0 785 #define MX6SL_PAD_LCD_DAT5__LCD_DATA05 785 #define MX6SL_PAD_LCD_DAT5__LCD_DATA05 0x1fc 0x504 0x78c 0x0 0x1 786 #define MX6SL_PAD_LCD_DAT5__ECSPI1_SS2 786 #define MX6SL_PAD_LCD_DAT5__ECSPI1_SS2 0x1fc 0x504 0x694 0x1 0x1 787 #define MX6SL_PAD_LCD_DAT5__CSI_HSYNC 787 #define MX6SL_PAD_LCD_DAT5__CSI_HSYNC 0x1fc 0x504 0x670 0x2 0x2 788 #define MX6SL_PAD_LCD_DAT5__EIM_CS3_B 788 #define MX6SL_PAD_LCD_DAT5__EIM_CS3_B 0x1fc 0x504 0x000 0x3 0x0 789 #define MX6SL_PAD_LCD_DAT5__AUD4_TXFS 789 #define MX6SL_PAD_LCD_DAT5__AUD4_TXFS 0x1fc 0x504 0x5f8 0x4 0x1 790 #define MX6SL_PAD_LCD_DAT5__GPIO2_IO25 790 #define MX6SL_PAD_LCD_DAT5__GPIO2_IO25 0x1fc 0x504 0x000 0x5 0x0 791 #define MX6SL_PAD_LCD_DAT5__ARM_TRACE05 791 #define MX6SL_PAD_LCD_DAT5__ARM_TRACE05 0x1fc 0x504 0x000 0x6 0x0 792 #define MX6SL_PAD_LCD_DAT5__SRC_BOOT_CFG05 792 #define MX6SL_PAD_LCD_DAT5__SRC_BOOT_CFG05 0x1fc 0x504 0x000 0x7 0x0 793 #define MX6SL_PAD_LCD_DAT6__LCD_DATA06 793 #define MX6SL_PAD_LCD_DAT6__LCD_DATA06 0x200 0x508 0x790 0x0 0x1 794 #define MX6SL_PAD_LCD_DAT6__ECSPI1_SS3 794 #define MX6SL_PAD_LCD_DAT6__ECSPI1_SS3 0x200 0x508 0x698 0x1 0x1 795 #define MX6SL_PAD_LCD_DAT6__CSI_PIXCLK 795 #define MX6SL_PAD_LCD_DAT6__CSI_PIXCLK 0x200 0x508 0x674 0x2 0x2 796 #define MX6SL_PAD_LCD_DAT6__EIM_DATA00 796 #define MX6SL_PAD_LCD_DAT6__EIM_DATA00 0x200 0x508 0x000 0x3 0x0 797 #define MX6SL_PAD_LCD_DAT6__AUD4_TXD 797 #define MX6SL_PAD_LCD_DAT6__AUD4_TXD 0x200 0x508 0x5e8 0x4 0x1 798 #define MX6SL_PAD_LCD_DAT6__GPIO2_IO26 798 #define MX6SL_PAD_LCD_DAT6__GPIO2_IO26 0x200 0x508 0x000 0x5 0x0 799 #define MX6SL_PAD_LCD_DAT6__ARM_TRACE06 799 #define MX6SL_PAD_LCD_DAT6__ARM_TRACE06 0x200 0x508 0x000 0x6 0x0 800 #define MX6SL_PAD_LCD_DAT6__SRC_BOOT_CFG06 800 #define MX6SL_PAD_LCD_DAT6__SRC_BOOT_CFG06 0x200 0x508 0x000 0x7 0x0 801 #define MX6SL_PAD_LCD_DAT7__LCD_DATA07 801 #define MX6SL_PAD_LCD_DAT7__LCD_DATA07 0x204 0x50c 0x794 0x0 0x1 802 #define MX6SL_PAD_LCD_DAT7__ECSPI1_RDY 802 #define MX6SL_PAD_LCD_DAT7__ECSPI1_RDY 0x204 0x50c 0x680 0x1 0x1 803 #define MX6SL_PAD_LCD_DAT7__CSI_MCLK 803 #define MX6SL_PAD_LCD_DAT7__CSI_MCLK 0x204 0x50c 0x000 0x2 0x0 804 #define MX6SL_PAD_LCD_DAT7__EIM_DATA01 804 #define MX6SL_PAD_LCD_DAT7__EIM_DATA01 0x204 0x50c 0x000 0x3 0x0 805 #define MX6SL_PAD_LCD_DAT7__AUDIO_CLK_OUT 805 #define MX6SL_PAD_LCD_DAT7__AUDIO_CLK_OUT 0x204 0x50c 0x000 0x4 0x0 806 #define MX6SL_PAD_LCD_DAT7__GPIO2_IO27 806 #define MX6SL_PAD_LCD_DAT7__GPIO2_IO27 0x204 0x50c 0x000 0x5 0x0 807 #define MX6SL_PAD_LCD_DAT7__ARM_TRACE07 807 #define MX6SL_PAD_LCD_DAT7__ARM_TRACE07 0x204 0x50c 0x000 0x6 0x0 808 #define MX6SL_PAD_LCD_DAT7__SRC_BOOT_CFG07 808 #define MX6SL_PAD_LCD_DAT7__SRC_BOOT_CFG07 0x204 0x50c 0x000 0x7 0x0 809 #define MX6SL_PAD_LCD_DAT8__LCD_DATA08 809 #define MX6SL_PAD_LCD_DAT8__LCD_DATA08 0x208 0x510 0x798 0x0 0x1 810 #define MX6SL_PAD_LCD_DAT8__KEY_COL0 810 #define MX6SL_PAD_LCD_DAT8__KEY_COL0 0x208 0x510 0x734 0x1 0x1 811 #define MX6SL_PAD_LCD_DAT8__CSI_DATA09 811 #define MX6SL_PAD_LCD_DAT8__CSI_DATA09 0x208 0x510 0x654 0x2 0x1 812 #define MX6SL_PAD_LCD_DAT8__EIM_DATA02 812 #define MX6SL_PAD_LCD_DAT8__EIM_DATA02 0x208 0x510 0x000 0x3 0x0 813 #define MX6SL_PAD_LCD_DAT8__ECSPI2_SCLK 813 #define MX6SL_PAD_LCD_DAT8__ECSPI2_SCLK 0x208 0x510 0x69c 0x4 0x2 814 #define MX6SL_PAD_LCD_DAT8__GPIO2_IO28 814 #define MX6SL_PAD_LCD_DAT8__GPIO2_IO28 0x208 0x510 0x000 0x5 0x0 815 #define MX6SL_PAD_LCD_DAT8__ARM_TRACE08 815 #define MX6SL_PAD_LCD_DAT8__ARM_TRACE08 0x208 0x510 0x000 0x6 0x0 816 #define MX6SL_PAD_LCD_DAT8__SRC_BOOT_CFG08 816 #define MX6SL_PAD_LCD_DAT8__SRC_BOOT_CFG08 0x208 0x510 0x000 0x7 0x0 817 #define MX6SL_PAD_LCD_DAT9__LCD_DATA09 817 #define MX6SL_PAD_LCD_DAT9__LCD_DATA09 0x20c 0x514 0x79c 0x0 0x1 818 #define MX6SL_PAD_LCD_DAT9__KEY_ROW0 818 #define MX6SL_PAD_LCD_DAT9__KEY_ROW0 0x20c 0x514 0x754 0x1 0x1 819 #define MX6SL_PAD_LCD_DAT9__CSI_DATA08 819 #define MX6SL_PAD_LCD_DAT9__CSI_DATA08 0x20c 0x514 0x650 0x2 0x1 820 #define MX6SL_PAD_LCD_DAT9__EIM_DATA03 820 #define MX6SL_PAD_LCD_DAT9__EIM_DATA03 0x20c 0x514 0x000 0x3 0x0 821 #define MX6SL_PAD_LCD_DAT9__ECSPI2_MOSI 821 #define MX6SL_PAD_LCD_DAT9__ECSPI2_MOSI 0x20c 0x514 0x6a4 0x4 0x2 822 #define MX6SL_PAD_LCD_DAT9__GPIO2_IO29 822 #define MX6SL_PAD_LCD_DAT9__GPIO2_IO29 0x20c 0x514 0x000 0x5 0x0 823 #define MX6SL_PAD_LCD_DAT9__ARM_TRACE09 823 #define MX6SL_PAD_LCD_DAT9__ARM_TRACE09 0x20c 0x514 0x000 0x6 0x0 824 #define MX6SL_PAD_LCD_DAT9__SRC_BOOT_CFG09 824 #define MX6SL_PAD_LCD_DAT9__SRC_BOOT_CFG09 0x20c 0x514 0x000 0x7 0x0 825 #define MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 825 #define MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 0x210 0x518 0x000 0x0 0x0 826 #define MX6SL_PAD_LCD_ENABLE__SD4_DATA5 826 #define MX6SL_PAD_LCD_ENABLE__SD4_DATA5 0x210 0x518 0x870 0x1 0x2 827 #define MX6SL_PAD_LCD_ENABLE__LCD_RD_E 827 #define MX6SL_PAD_LCD_ENABLE__LCD_RD_E 0x210 0x518 0x000 0x2 0x0 828 #define MX6SL_PAD_LCD_ENABLE__EIM_OE_B 828 #define MX6SL_PAD_LCD_ENABLE__EIM_OE_B 0x210 0x518 0x000 0x3 0x0 829 #define MX6SL_PAD_LCD_ENABLE__UART2_RX_DATA 829 #define MX6SL_PAD_LCD_ENABLE__UART2_RX_DATA 0x210 0x518 0x804 0x4 0x2 830 #define MX6SL_PAD_LCD_ENABLE__UART2_TX_DATA 830 #define MX6SL_PAD_LCD_ENABLE__UART2_TX_DATA 0x210 0x518 0x000 0x4 0x0 831 #define MX6SL_PAD_LCD_ENABLE__GPIO2_IO16 831 #define MX6SL_PAD_LCD_ENABLE__GPIO2_IO16 0x210 0x518 0x000 0x5 0x0 832 #define MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 832 #define MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 0x214 0x51c 0x774 0x0 0x0 833 #define MX6SL_PAD_LCD_HSYNC__SD4_DATA6 833 #define MX6SL_PAD_LCD_HSYNC__SD4_DATA6 0x214 0x51c 0x874 0x1 0x2 834 #define MX6SL_PAD_LCD_HSYNC__LCD_CS 834 #define MX6SL_PAD_LCD_HSYNC__LCD_CS 0x214 0x51c 0x000 0x2 0x0 835 #define MX6SL_PAD_LCD_HSYNC__EIM_CS0_B 835 #define MX6SL_PAD_LCD_HSYNC__EIM_CS0_B 0x214 0x51c 0x000 0x3 0x0 836 #define MX6SL_PAD_LCD_HSYNC__UART2_TX_DATA 836 #define MX6SL_PAD_LCD_HSYNC__UART2_TX_DATA 0x214 0x51c 0x000 0x4 0x0 837 #define MX6SL_PAD_LCD_HSYNC__UART2_RX_DATA 837 #define MX6SL_PAD_LCD_HSYNC__UART2_RX_DATA 0x214 0x51c 0x804 0x4 0x3 838 #define MX6SL_PAD_LCD_HSYNC__GPIO2_IO17 838 #define MX6SL_PAD_LCD_HSYNC__GPIO2_IO17 0x214 0x51c 0x000 0x5 0x0 839 #define MX6SL_PAD_LCD_HSYNC__ARM_TRACE_CLK 839 #define MX6SL_PAD_LCD_HSYNC__ARM_TRACE_CLK 0x214 0x51c 0x000 0x6 0x0 840 #define MX6SL_PAD_LCD_RESET__LCD_RESET 840 #define MX6SL_PAD_LCD_RESET__LCD_RESET 0x218 0x520 0x000 0x0 0x0 841 #define MX6SL_PAD_LCD_RESET__EIM_DTACK_B 841 #define MX6SL_PAD_LCD_RESET__EIM_DTACK_B 0x218 0x520 0x880 0x1 0x1 842 #define MX6SL_PAD_LCD_RESET__LCD_BUSY 842 #define MX6SL_PAD_LCD_RESET__LCD_BUSY 0x218 0x520 0x774 0x2 0x1 843 #define MX6SL_PAD_LCD_RESET__EIM_WAIT_B 843 #define MX6SL_PAD_LCD_RESET__EIM_WAIT_B 0x218 0x520 0x884 0x3 0x1 844 #define MX6SL_PAD_LCD_RESET__UART2_CTS_B 844 #define MX6SL_PAD_LCD_RESET__UART2_CTS_B 0x218 0x520 0x000 0x4 0x0 845 #define MX6SL_PAD_LCD_RESET__UART2_RTS_B 845 #define MX6SL_PAD_LCD_RESET__UART2_RTS_B 0x218 0x520 0x800 0x4 0x2 846 #define MX6SL_PAD_LCD_RESET__GPIO2_IO19 846 #define MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x218 0x520 0x000 0x5 0x0 847 #define MX6SL_PAD_LCD_RESET__CCM_PMIC_READY 847 #define MX6SL_PAD_LCD_RESET__CCM_PMIC_READY 0x218 0x520 0x62c 0x6 0x1 848 #define MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 848 #define MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 0x21c 0x524 0x000 0x0 0x0 849 #define MX6SL_PAD_LCD_VSYNC__SD4_DATA7 849 #define MX6SL_PAD_LCD_VSYNC__SD4_DATA7 0x21c 0x524 0x878 0x1 0x2 850 #define MX6SL_PAD_LCD_VSYNC__LCD_RS 850 #define MX6SL_PAD_LCD_VSYNC__LCD_RS 0x21c 0x524 0x000 0x2 0x0 851 #define MX6SL_PAD_LCD_VSYNC__EIM_CS1_B 851 #define MX6SL_PAD_LCD_VSYNC__EIM_CS1_B 0x21c 0x524 0x000 0x3 0x0 852 #define MX6SL_PAD_LCD_VSYNC__UART2_RTS_B 852 #define MX6SL_PAD_LCD_VSYNC__UART2_RTS_B 0x21c 0x524 0x800 0x4 0x3 853 #define MX6SL_PAD_LCD_VSYNC__UART2_CTS_B 853 #define MX6SL_PAD_LCD_VSYNC__UART2_CTS_B 0x21c 0x524 0x000 0x4 0x0 854 #define MX6SL_PAD_LCD_VSYNC__GPIO2_IO18 854 #define MX6SL_PAD_LCD_VSYNC__GPIO2_IO18 0x21c 0x524 0x000 0x5 0x0 855 #define MX6SL_PAD_LCD_VSYNC__ARM_TRACE_CTL 855 #define MX6SL_PAD_LCD_VSYNC__ARM_TRACE_CTL 0x21c 0x524 0x000 0x6 0x0 856 #define MX6SL_PAD_PWM1__PWM1_OUT 856 #define MX6SL_PAD_PWM1__PWM1_OUT 0x220 0x528 0x000 0x0 0x0 857 #define MX6SL_PAD_PWM1__CCM_CLKO 857 #define MX6SL_PAD_PWM1__CCM_CLKO 0x220 0x528 0x000 0x1 0x0 858 #define MX6SL_PAD_PWM1__AUDIO_CLK_OUT 858 #define MX6SL_PAD_PWM1__AUDIO_CLK_OUT 0x220 0x528 0x000 0x2 0x0 859 #define MX6SL_PAD_PWM1__FEC_REF_OUT 859 #define MX6SL_PAD_PWM1__FEC_REF_OUT 0x220 0x528 0x000 0x3 0x0 860 #define MX6SL_PAD_PWM1__CSI_MCLK 860 #define MX6SL_PAD_PWM1__CSI_MCLK 0x220 0x528 0x000 0x4 0x0 861 #define MX6SL_PAD_PWM1__GPIO3_IO23 861 #define MX6SL_PAD_PWM1__GPIO3_IO23 0x220 0x528 0x000 0x5 0x0 862 #define MX6SL_PAD_PWM1__EPIT1_OUT 862 #define MX6SL_PAD_PWM1__EPIT1_OUT 0x220 0x528 0x000 0x6 0x0 863 #define MX6SL_PAD_REF_CLK_24M__XTALOSC_REF_CLK 863 #define MX6SL_PAD_REF_CLK_24M__XTALOSC_REF_CLK_24M 0x224 0x52c 0x000 0x0 0x0 864 #define MX6SL_PAD_REF_CLK_24M__I2C3_SCL 864 #define MX6SL_PAD_REF_CLK_24M__I2C3_SCL 0x224 0x52c 0x72c 0x1 0x2 865 #define MX6SL_PAD_REF_CLK_24M__PWM3_OUT 865 #define MX6SL_PAD_REF_CLK_24M__PWM3_OUT 0x224 0x52c 0x000 0x2 0x0 866 #define MX6SL_PAD_REF_CLK_24M__USB_OTG2_ID 866 #define MX6SL_PAD_REF_CLK_24M__USB_OTG2_ID 0x224 0x52c 0x5e0 0x3 0x2 867 #define MX6SL_PAD_REF_CLK_24M__CCM_PMIC_READY 867 #define MX6SL_PAD_REF_CLK_24M__CCM_PMIC_READY 0x224 0x52c 0x62c 0x4 0x2 868 #define MX6SL_PAD_REF_CLK_24M__GPIO3_IO21 868 #define MX6SL_PAD_REF_CLK_24M__GPIO3_IO21 0x224 0x52c 0x000 0x5 0x0 869 #define MX6SL_PAD_REF_CLK_24M__SD3_WP 869 #define MX6SL_PAD_REF_CLK_24M__SD3_WP 0x224 0x52c 0x84c 0x6 0x3 870 #define MX6SL_PAD_REF_CLK_32K__XTALOSC_REF_CLK 870 #define MX6SL_PAD_REF_CLK_32K__XTALOSC_REF_CLK_32K 0x228 0x530 0x000 0x0 0x0 871 #define MX6SL_PAD_REF_CLK_32K__I2C3_SDA 871 #define MX6SL_PAD_REF_CLK_32K__I2C3_SDA 0x228 0x530 0x730 0x1 0x2 872 #define MX6SL_PAD_REF_CLK_32K__PWM4_OUT 872 #define MX6SL_PAD_REF_CLK_32K__PWM4_OUT 0x228 0x530 0x000 0x2 0x0 873 #define MX6SL_PAD_REF_CLK_32K__USB_OTG1_ID 873 #define MX6SL_PAD_REF_CLK_32K__USB_OTG1_ID 0x228 0x530 0x5dc 0x3 0x3 874 #define MX6SL_PAD_REF_CLK_32K__SD1_LCTL 874 #define MX6SL_PAD_REF_CLK_32K__SD1_LCTL 0x228 0x530 0x000 0x4 0x0 875 #define MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 875 #define MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x228 0x530 0x000 0x5 0x0 876 #define MX6SL_PAD_REF_CLK_32K__SD3_CD_B 876 #define MX6SL_PAD_REF_CLK_32K__SD3_CD_B 0x228 0x530 0x838 0x6 0x3 877 #define MX6SL_PAD_SD1_CLK__SD1_CLK 877 #define MX6SL_PAD_SD1_CLK__SD1_CLK 0x22c 0x534 0x000 0x0 0x0 878 #define MX6SL_PAD_SD1_CLK__FEC_MDIO 878 #define MX6SL_PAD_SD1_CLK__FEC_MDIO 0x22c 0x534 0x6f4 0x1 0x2 879 #define MX6SL_PAD_SD1_CLK__KEY_COL0 879 #define MX6SL_PAD_SD1_CLK__KEY_COL0 0x22c 0x534 0x734 0x2 0x2 880 #define MX6SL_PAD_SD1_CLK__EPDC_SDCE4 880 #define MX6SL_PAD_SD1_CLK__EPDC_SDCE4 0x22c 0x534 0x000 0x3 0x0 881 #define MX6SL_PAD_SD1_CLK__GPIO5_IO15 881 #define MX6SL_PAD_SD1_CLK__GPIO5_IO15 0x22c 0x534 0x000 0x5 0x0 882 #define MX6SL_PAD_SD1_CMD__SD1_CMD 882 #define MX6SL_PAD_SD1_CMD__SD1_CMD 0x230 0x538 0x000 0x0 0x0 883 #define MX6SL_PAD_SD1_CMD__FEC_TX_CLK 883 #define MX6SL_PAD_SD1_CMD__FEC_TX_CLK 0x230 0x538 0x70c 0x1 0x2 884 #define MX6SL_PAD_SD1_CMD__KEY_ROW0 884 #define MX6SL_PAD_SD1_CMD__KEY_ROW0 0x230 0x538 0x754 0x2 0x2 885 #define MX6SL_PAD_SD1_CMD__EPDC_SDCE5 885 #define MX6SL_PAD_SD1_CMD__EPDC_SDCE5 0x230 0x538 0x000 0x3 0x0 886 #define MX6SL_PAD_SD1_CMD__GPIO5_IO14 886 #define MX6SL_PAD_SD1_CMD__GPIO5_IO14 0x230 0x538 0x000 0x5 0x0 887 #define MX6SL_PAD_SD1_DAT0__SD1_DATA0 887 #define MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x234 0x53c 0x000 0x0 0x0 888 #define MX6SL_PAD_SD1_DAT0__FEC_RX_ER 888 #define MX6SL_PAD_SD1_DAT0__FEC_RX_ER 0x234 0x53c 0x708 0x1 0x2 889 #define MX6SL_PAD_SD1_DAT0__KEY_COL1 889 #define MX6SL_PAD_SD1_DAT0__KEY_COL1 0x234 0x53c 0x738 0x2 0x2 890 #define MX6SL_PAD_SD1_DAT0__EPDC_SDCE6 890 #define MX6SL_PAD_SD1_DAT0__EPDC_SDCE6 0x234 0x53c 0x000 0x3 0x0 891 #define MX6SL_PAD_SD1_DAT0__GPIO5_IO11 891 #define MX6SL_PAD_SD1_DAT0__GPIO5_IO11 0x234 0x53c 0x000 0x5 0x0 892 #define MX6SL_PAD_SD1_DAT1__SD1_DATA1 892 #define MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x238 0x540 0x000 0x0 0x0 893 #define MX6SL_PAD_SD1_DAT1__FEC_RX_DV 893 #define MX6SL_PAD_SD1_DAT1__FEC_RX_DV 0x238 0x540 0x704 0x1 0x2 894 #define MX6SL_PAD_SD1_DAT1__KEY_ROW1 894 #define MX6SL_PAD_SD1_DAT1__KEY_ROW1 0x238 0x540 0x758 0x2 0x2 895 #define MX6SL_PAD_SD1_DAT1__EPDC_SDCE7 895 #define MX6SL_PAD_SD1_DAT1__EPDC_SDCE7 0x238 0x540 0x000 0x3 0x0 896 #define MX6SL_PAD_SD1_DAT1__GPIO5_IO08 896 #define MX6SL_PAD_SD1_DAT1__GPIO5_IO08 0x238 0x540 0x000 0x5 0x0 897 #define MX6SL_PAD_SD1_DAT2__SD1_DATA2 897 #define MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x23c 0x544 0x000 0x0 0x0 898 #define MX6SL_PAD_SD1_DAT2__FEC_RX_DATA1 898 #define MX6SL_PAD_SD1_DAT2__FEC_RX_DATA1 0x23c 0x544 0x6fc 0x1 0x2 899 #define MX6SL_PAD_SD1_DAT2__KEY_COL2 899 #define MX6SL_PAD_SD1_DAT2__KEY_COL2 0x23c 0x544 0x73c 0x2 0x2 900 #define MX6SL_PAD_SD1_DAT2__EPDC_SDCE8 900 #define MX6SL_PAD_SD1_DAT2__EPDC_SDCE8 0x23c 0x544 0x000 0x3 0x0 901 #define MX6SL_PAD_SD1_DAT2__GPIO5_IO13 901 #define MX6SL_PAD_SD1_DAT2__GPIO5_IO13 0x23c 0x544 0x000 0x5 0x0 902 #define MX6SL_PAD_SD1_DAT3__SD1_DATA3 902 #define MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x240 0x548 0x000 0x0 0x0 903 #define MX6SL_PAD_SD1_DAT3__FEC_TX_DATA0 903 #define MX6SL_PAD_SD1_DAT3__FEC_TX_DATA0 0x240 0x548 0x000 0x1 0x0 904 #define MX6SL_PAD_SD1_DAT3__KEY_ROW2 904 #define MX6SL_PAD_SD1_DAT3__KEY_ROW2 0x240 0x548 0x75c 0x2 0x2 905 #define MX6SL_PAD_SD1_DAT3__EPDC_SDCE9 905 #define MX6SL_PAD_SD1_DAT3__EPDC_SDCE9 0x240 0x548 0x000 0x3 0x0 906 #define MX6SL_PAD_SD1_DAT3__GPIO5_IO06 906 #define MX6SL_PAD_SD1_DAT3__GPIO5_IO06 0x240 0x548 0x000 0x5 0x0 907 #define MX6SL_PAD_SD1_DAT4__SD1_DATA4 907 #define MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x244 0x54c 0x000 0x0 0x0 908 #define MX6SL_PAD_SD1_DAT4__FEC_MDC 908 #define MX6SL_PAD_SD1_DAT4__FEC_MDC 0x244 0x54c 0x000 0x1 0x0 909 #define MX6SL_PAD_SD1_DAT4__KEY_COL3 909 #define MX6SL_PAD_SD1_DAT4__KEY_COL3 0x244 0x54c 0x740 0x2 0x2 910 #define MX6SL_PAD_SD1_DAT4__EPDC_SDCLK_N 910 #define MX6SL_PAD_SD1_DAT4__EPDC_SDCLK_N 0x244 0x54c 0x000 0x3 0x0 911 #define MX6SL_PAD_SD1_DAT4__UART4_RX_DATA 911 #define MX6SL_PAD_SD1_DAT4__UART4_RX_DATA 0x244 0x54c 0x814 0x4 0x4 912 #define MX6SL_PAD_SD1_DAT4__UART4_TX_DATA 912 #define MX6SL_PAD_SD1_DAT4__UART4_TX_DATA 0x244 0x54c 0x000 0x4 0x0 913 #define MX6SL_PAD_SD1_DAT4__GPIO5_IO12 913 #define MX6SL_PAD_SD1_DAT4__GPIO5_IO12 0x244 0x54c 0x000 0x5 0x0 914 #define MX6SL_PAD_SD1_DAT5__SD1_DATA5 914 #define MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x248 0x550 0x000 0x0 0x0 915 #define MX6SL_PAD_SD1_DAT5__FEC_RX_DATA0 915 #define MX6SL_PAD_SD1_DAT5__FEC_RX_DATA0 0x248 0x550 0x6f8 0x1 0x2 916 #define MX6SL_PAD_SD1_DAT5__KEY_ROW3 916 #define MX6SL_PAD_SD1_DAT5__KEY_ROW3 0x248 0x550 0x760 0x2 0x2 917 #define MX6SL_PAD_SD1_DAT5__EPDC_SDOED 917 #define MX6SL_PAD_SD1_DAT5__EPDC_SDOED 0x248 0x550 0x000 0x3 0x0 918 #define MX6SL_PAD_SD1_DAT5__UART4_TX_DATA 918 #define MX6SL_PAD_SD1_DAT5__UART4_TX_DATA 0x248 0x550 0x000 0x4 0x0 919 #define MX6SL_PAD_SD1_DAT5__UART4_RX_DATA 919 #define MX6SL_PAD_SD1_DAT5__UART4_RX_DATA 0x248 0x550 0x814 0x4 0x5 920 #define MX6SL_PAD_SD1_DAT5__GPIO5_IO09 920 #define MX6SL_PAD_SD1_DAT5__GPIO5_IO09 0x248 0x550 0x000 0x5 0x0 921 #define MX6SL_PAD_SD1_DAT6__SD1_DATA6 921 #define MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x24c 0x554 0x000 0x0 0x0 922 #define MX6SL_PAD_SD1_DAT6__FEC_TX_EN 922 #define MX6SL_PAD_SD1_DAT6__FEC_TX_EN 0x24c 0x554 0x000 0x1 0x0 923 #define MX6SL_PAD_SD1_DAT6__KEY_COL4 923 #define MX6SL_PAD_SD1_DAT6__KEY_COL4 0x24c 0x554 0x744 0x2 0x2 924 #define MX6SL_PAD_SD1_DAT6__EPDC_SDOEZ 924 #define MX6SL_PAD_SD1_DAT6__EPDC_SDOEZ 0x24c 0x554 0x000 0x3 0x0 925 #define MX6SL_PAD_SD1_DAT6__UART4_RTS_B 925 #define MX6SL_PAD_SD1_DAT6__UART4_RTS_B 0x24c 0x554 0x810 0x4 0x4 926 #define MX6SL_PAD_SD1_DAT6__UART4_CTS_B 926 #define MX6SL_PAD_SD1_DAT6__UART4_CTS_B 0x24c 0x554 0x000 0x4 0x0 927 #define MX6SL_PAD_SD1_DAT6__GPIO5_IO07 927 #define MX6SL_PAD_SD1_DAT6__GPIO5_IO07 0x24c 0x554 0x000 0x5 0x0 928 #define MX6SL_PAD_SD1_DAT7__SD1_DATA7 928 #define MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x250 0x558 0x000 0x0 0x0 929 #define MX6SL_PAD_SD1_DAT7__FEC_TX_DATA1 929 #define MX6SL_PAD_SD1_DAT7__FEC_TX_DATA1 0x250 0x558 0x000 0x1 0x0 930 #define MX6SL_PAD_SD1_DAT7__KEY_ROW4 930 #define MX6SL_PAD_SD1_DAT7__KEY_ROW4 0x250 0x558 0x764 0x2 0x2 931 #define MX6SL_PAD_SD1_DAT7__CCM_PMIC_READY 931 #define MX6SL_PAD_SD1_DAT7__CCM_PMIC_READY 0x250 0x558 0x62c 0x3 0x3 932 #define MX6SL_PAD_SD1_DAT7__UART4_CTS_B 932 #define MX6SL_PAD_SD1_DAT7__UART4_CTS_B 0x250 0x558 0x000 0x4 0x0 933 #define MX6SL_PAD_SD1_DAT7__UART4_RTS_B 933 #define MX6SL_PAD_SD1_DAT7__UART4_RTS_B 0x250 0x558 0x810 0x4 0x5 934 #define MX6SL_PAD_SD1_DAT7__GPIO5_IO10 934 #define MX6SL_PAD_SD1_DAT7__GPIO5_IO10 0x250 0x558 0x000 0x5 0x0 935 #define MX6SL_PAD_SD2_CLK__SD2_CLK 935 #define MX6SL_PAD_SD2_CLK__SD2_CLK 0x254 0x55c 0x000 0x0 0x0 936 #define MX6SL_PAD_SD2_CLK__AUD4_RXFS 936 #define MX6SL_PAD_SD2_CLK__AUD4_RXFS 0x254 0x55c 0x5f0 0x1 0x2 937 #define MX6SL_PAD_SD2_CLK__ECSPI3_SCLK 937 #define MX6SL_PAD_SD2_CLK__ECSPI3_SCLK 0x254 0x55c 0x6b0 0x2 0x2 938 #define MX6SL_PAD_SD2_CLK__CSI_DATA00 938 #define MX6SL_PAD_SD2_CLK__CSI_DATA00 0x254 0x55c 0x630 0x3 0x2 939 #define MX6SL_PAD_SD2_CLK__GPIO5_IO05 939 #define MX6SL_PAD_SD2_CLK__GPIO5_IO05 0x254 0x55c 0x000 0x5 0x0 940 #define MX6SL_PAD_SD2_CMD__SD2_CMD 940 #define MX6SL_PAD_SD2_CMD__SD2_CMD 0x258 0x560 0x000 0x0 0x0 941 #define MX6SL_PAD_SD2_CMD__AUD4_RXC 941 #define MX6SL_PAD_SD2_CMD__AUD4_RXC 0x258 0x560 0x5ec 0x1 0x2 942 #define MX6SL_PAD_SD2_CMD__ECSPI3_SS0 942 #define MX6SL_PAD_SD2_CMD__ECSPI3_SS0 0x258 0x560 0x6c0 0x2 0x2 943 #define MX6SL_PAD_SD2_CMD__CSI_DATA01 943 #define MX6SL_PAD_SD2_CMD__CSI_DATA01 0x258 0x560 0x634 0x3 0x2 944 #define MX6SL_PAD_SD2_CMD__EPIT1_OUT 944 #define MX6SL_PAD_SD2_CMD__EPIT1_OUT 0x258 0x560 0x000 0x4 0x0 945 #define MX6SL_PAD_SD2_CMD__GPIO5_IO04 945 #define MX6SL_PAD_SD2_CMD__GPIO5_IO04 0x258 0x560 0x000 0x5 0x0 946 #define MX6SL_PAD_SD2_DAT0__SD2_DATA0 946 #define MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x25c 0x564 0x000 0x0 0x0 947 #define MX6SL_PAD_SD2_DAT0__AUD4_RXD 947 #define MX6SL_PAD_SD2_DAT0__AUD4_RXD 0x25c 0x564 0x5e4 0x1 0x2 948 #define MX6SL_PAD_SD2_DAT0__ECSPI3_MOSI 948 #define MX6SL_PAD_SD2_DAT0__ECSPI3_MOSI 0x25c 0x564 0x6bc 0x2 0x2 949 #define MX6SL_PAD_SD2_DAT0__CSI_DATA02 949 #define MX6SL_PAD_SD2_DAT0__CSI_DATA02 0x25c 0x564 0x638 0x3 0x2 950 #define MX6SL_PAD_SD2_DAT0__UART5_RTS_B 950 #define MX6SL_PAD_SD2_DAT0__UART5_RTS_B 0x25c 0x564 0x818 0x4 0x4 951 #define MX6SL_PAD_SD2_DAT0__UART5_CTS_B 951 #define MX6SL_PAD_SD2_DAT0__UART5_CTS_B 0x25c 0x564 0x000 0x4 0x0 952 #define MX6SL_PAD_SD2_DAT0__GPIO5_IO01 952 #define MX6SL_PAD_SD2_DAT0__GPIO5_IO01 0x25c 0x564 0x000 0x5 0x0 953 #define MX6SL_PAD_SD2_DAT1__SD2_DATA1 953 #define MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x260 0x568 0x000 0x0 0x0 954 #define MX6SL_PAD_SD2_DAT1__AUD4_TXC 954 #define MX6SL_PAD_SD2_DAT1__AUD4_TXC 0x260 0x568 0x5f4 0x1 0x2 955 #define MX6SL_PAD_SD2_DAT1__ECSPI3_MISO 955 #define MX6SL_PAD_SD2_DAT1__ECSPI3_MISO 0x260 0x568 0x6b8 0x2 0x2 956 #define MX6SL_PAD_SD2_DAT1__CSI_DATA03 956 #define MX6SL_PAD_SD2_DAT1__CSI_DATA03 0x260 0x568 0x63c 0x3 0x2 957 #define MX6SL_PAD_SD2_DAT1__UART5_CTS_B 957 #define MX6SL_PAD_SD2_DAT1__UART5_CTS_B 0x260 0x568 0x000 0x4 0x0 958 #define MX6SL_PAD_SD2_DAT1__UART5_RTS_B 958 #define MX6SL_PAD_SD2_DAT1__UART5_RTS_B 0x260 0x568 0x818 0x4 0x5 959 #define MX6SL_PAD_SD2_DAT1__GPIO4_IO30 959 #define MX6SL_PAD_SD2_DAT1__GPIO4_IO30 0x260 0x568 0x000 0x5 0x0 960 #define MX6SL_PAD_SD2_DAT2__SD2_DATA2 960 #define MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x264 0x56c 0x000 0x0 0x0 961 #define MX6SL_PAD_SD2_DAT2__AUD4_TXFS 961 #define MX6SL_PAD_SD2_DAT2__AUD4_TXFS 0x264 0x56c 0x5f8 0x1 0x2 962 #define MX6SL_PAD_SD2_DAT2__FEC_COL 962 #define MX6SL_PAD_SD2_DAT2__FEC_COL 0x264 0x56c 0x6f0 0x2 0x1 963 #define MX6SL_PAD_SD2_DAT2__CSI_DATA04 963 #define MX6SL_PAD_SD2_DAT2__CSI_DATA04 0x264 0x56c 0x640 0x3 0x2 964 #define MX6SL_PAD_SD2_DAT2__UART5_RX_DATA 964 #define MX6SL_PAD_SD2_DAT2__UART5_RX_DATA 0x264 0x56c 0x81c 0x4 0x4 965 #define MX6SL_PAD_SD2_DAT2__UART5_TX_DATA 965 #define MX6SL_PAD_SD2_DAT2__UART5_TX_DATA 0x264 0x56c 0x000 0x4 0x0 966 #define MX6SL_PAD_SD2_DAT2__GPIO5_IO03 966 #define MX6SL_PAD_SD2_DAT2__GPIO5_IO03 0x264 0x56c 0x000 0x5 0x0 967 #define MX6SL_PAD_SD2_DAT3__SD2_DATA3 967 #define MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x268 0x570 0x000 0x0 0x0 968 #define MX6SL_PAD_SD2_DAT3__AUD4_TXD 968 #define MX6SL_PAD_SD2_DAT3__AUD4_TXD 0x268 0x570 0x5e8 0x1 0x2 969 #define MX6SL_PAD_SD2_DAT3__FEC_RX_CLK 969 #define MX6SL_PAD_SD2_DAT3__FEC_RX_CLK 0x268 0x570 0x700 0x2 0x1 970 #define MX6SL_PAD_SD2_DAT3__CSI_DATA05 970 #define MX6SL_PAD_SD2_DAT3__CSI_DATA05 0x268 0x570 0x644 0x3 0x2 971 #define MX6SL_PAD_SD2_DAT3__UART5_TX_DATA 971 #define MX6SL_PAD_SD2_DAT3__UART5_TX_DATA 0x268 0x570 0x000 0x4 0x0 972 #define MX6SL_PAD_SD2_DAT3__UART5_RX_DATA 972 #define MX6SL_PAD_SD2_DAT3__UART5_RX_DATA 0x268 0x570 0x81c 0x4 0x5 973 #define MX6SL_PAD_SD2_DAT3__GPIO4_IO28 973 #define MX6SL_PAD_SD2_DAT3__GPIO4_IO28 0x268 0x570 0x000 0x5 0x0 974 #define MX6SL_PAD_SD2_DAT4__SD2_DATA4 974 #define MX6SL_PAD_SD2_DAT4__SD2_DATA4 0x26c 0x574 0x000 0x0 0x0 975 #define MX6SL_PAD_SD2_DAT4__SD3_DATA4 975 #define MX6SL_PAD_SD2_DAT4__SD3_DATA4 0x26c 0x574 0x83c 0x1 0x1 976 #define MX6SL_PAD_SD2_DAT4__UART2_RX_DATA 976 #define MX6SL_PAD_SD2_DAT4__UART2_RX_DATA 0x26c 0x574 0x804 0x2 0x4 977 #define MX6SL_PAD_SD2_DAT4__UART2_TX_DATA 977 #define MX6SL_PAD_SD2_DAT4__UART2_TX_DATA 0x26c 0x574 0x000 0x2 0x0 978 #define MX6SL_PAD_SD2_DAT4__CSI_DATA06 978 #define MX6SL_PAD_SD2_DAT4__CSI_DATA06 0x26c 0x574 0x648 0x3 0x2 979 #define MX6SL_PAD_SD2_DAT4__SPDIF_OUT 979 #define MX6SL_PAD_SD2_DAT4__SPDIF_OUT 0x26c 0x574 0x000 0x4 0x0 980 #define MX6SL_PAD_SD2_DAT4__GPIO5_IO02 980 #define MX6SL_PAD_SD2_DAT4__GPIO5_IO02 0x26c 0x574 0x000 0x5 0x0 981 #define MX6SL_PAD_SD2_DAT5__SD2_DATA5 981 #define MX6SL_PAD_SD2_DAT5__SD2_DATA5 0x270 0x578 0x000 0x0 0x0 982 #define MX6SL_PAD_SD2_DAT5__SD3_DATA5 982 #define MX6SL_PAD_SD2_DAT5__SD3_DATA5 0x270 0x578 0x840 0x1 0x1 983 #define MX6SL_PAD_SD2_DAT5__UART2_TX_DATA 983 #define MX6SL_PAD_SD2_DAT5__UART2_TX_DATA 0x270 0x578 0x000 0x2 0x0 984 #define MX6SL_PAD_SD2_DAT5__UART2_RX_DATA 984 #define MX6SL_PAD_SD2_DAT5__UART2_RX_DATA 0x270 0x578 0x804 0x2 0x5 985 #define MX6SL_PAD_SD2_DAT5__CSI_DATA07 985 #define MX6SL_PAD_SD2_DAT5__CSI_DATA07 0x270 0x578 0x64c 0x3 0x2 986 #define MX6SL_PAD_SD2_DAT5__SPDIF_IN 986 #define MX6SL_PAD_SD2_DAT5__SPDIF_IN 0x270 0x578 0x7f0 0x4 0x2 987 #define MX6SL_PAD_SD2_DAT5__GPIO4_IO31 987 #define MX6SL_PAD_SD2_DAT5__GPIO4_IO31 0x270 0x578 0x000 0x5 0x0 988 #define MX6SL_PAD_SD2_DAT6__SD2_DATA6 988 #define MX6SL_PAD_SD2_DAT6__SD2_DATA6 0x274 0x57c 0x000 0x0 0x0 989 #define MX6SL_PAD_SD2_DAT6__SD3_DATA6 989 #define MX6SL_PAD_SD2_DAT6__SD3_DATA6 0x274 0x57c 0x844 0x1 0x1 990 #define MX6SL_PAD_SD2_DAT6__UART2_RTS_B 990 #define MX6SL_PAD_SD2_DAT6__UART2_RTS_B 0x274 0x57c 0x800 0x2 0x4 991 #define MX6SL_PAD_SD2_DAT6__UART2_CTS_B 991 #define MX6SL_PAD_SD2_DAT6__UART2_CTS_B 0x274 0x57c 0x000 0x2 0x0 992 #define MX6SL_PAD_SD2_DAT6__CSI_DATA08 992 #define MX6SL_PAD_SD2_DAT6__CSI_DATA08 0x274 0x57c 0x650 0x3 0x2 993 #define MX6SL_PAD_SD2_DAT6__SD2_WP 993 #define MX6SL_PAD_SD2_DAT6__SD2_WP 0x274 0x57c 0x834 0x4 0x2 994 #define MX6SL_PAD_SD2_DAT6__GPIO4_IO29 994 #define MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x274 0x57c 0x000 0x5 0x0 995 #define MX6SL_PAD_SD2_DAT7__SD2_DATA7 995 #define MX6SL_PAD_SD2_DAT7__SD2_DATA7 0x278 0x580 0x000 0x0 0x0 996 #define MX6SL_PAD_SD2_DAT7__SD3_DATA7 996 #define MX6SL_PAD_SD2_DAT7__SD3_DATA7 0x278 0x580 0x848 0x1 0x1 997 #define MX6SL_PAD_SD2_DAT7__UART2_CTS_B 997 #define MX6SL_PAD_SD2_DAT7__UART2_CTS_B 0x278 0x580 0x000 0x2 0x0 998 #define MX6SL_PAD_SD2_DAT7__UART2_RTS_B 998 #define MX6SL_PAD_SD2_DAT7__UART2_RTS_B 0x278 0x580 0x800 0x2 0x5 999 #define MX6SL_PAD_SD2_DAT7__CSI_DATA09 999 #define MX6SL_PAD_SD2_DAT7__CSI_DATA09 0x278 0x580 0x654 0x3 0x2 1000 #define MX6SL_PAD_SD2_DAT7__SD2_CD_B 1000 #define MX6SL_PAD_SD2_DAT7__SD2_CD_B 0x278 0x580 0x830 0x4 0x2 1001 #define MX6SL_PAD_SD2_DAT7__GPIO5_IO00 1001 #define MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x278 0x580 0x000 0x5 0x0 1002 #define MX6SL_PAD_SD2_RST__SD2_RESET 1002 #define MX6SL_PAD_SD2_RST__SD2_RESET 0x27c 0x584 0x000 0x0 0x0 1003 #define MX6SL_PAD_SD2_RST__FEC_REF_OUT 1003 #define MX6SL_PAD_SD2_RST__FEC_REF_OUT 0x27c 0x584 0x000 0x1 0x0 1004 #define MX6SL_PAD_SD2_RST__WDOG2_B 1004 #define MX6SL_PAD_SD2_RST__WDOG2_B 0x27c 0x584 0x000 0x2 0x0 1005 #define MX6SL_PAD_SD2_RST__SPDIF_OUT 1005 #define MX6SL_PAD_SD2_RST__SPDIF_OUT 0x27c 0x584 0x000 0x3 0x0 1006 #define MX6SL_PAD_SD2_RST__CSI_MCLK 1006 #define MX6SL_PAD_SD2_RST__CSI_MCLK 0x27c 0x584 0x000 0x4 0x0 1007 #define MX6SL_PAD_SD2_RST__GPIO4_IO27 1007 #define MX6SL_PAD_SD2_RST__GPIO4_IO27 0x27c 0x584 0x000 0x5 0x0 1008 #define MX6SL_PAD_SD3_CLK__SD3_CLK 1008 #define MX6SL_PAD_SD3_CLK__SD3_CLK 0x280 0x588 0x000 0x0 0x0 1009 #define MX6SL_PAD_SD3_CLK__AUD5_RXFS 1009 #define MX6SL_PAD_SD3_CLK__AUD5_RXFS 0x280 0x588 0x608 0x1 0x1 1010 #define MX6SL_PAD_SD3_CLK__KEY_COL5 1010 #define MX6SL_PAD_SD3_CLK__KEY_COL5 0x280 0x588 0x748 0x2 0x2 1011 #define MX6SL_PAD_SD3_CLK__CSI_DATA10 1011 #define MX6SL_PAD_SD3_CLK__CSI_DATA10 0x280 0x588 0x658 0x3 0x2 1012 #define MX6SL_PAD_SD3_CLK__WDOG1_RESET_B_DEB 1012 #define MX6SL_PAD_SD3_CLK__WDOG1_RESET_B_DEB 0x280 0x588 0x000 0x4 0x0 1013 #define MX6SL_PAD_SD3_CLK__GPIO5_IO18 1013 #define MX6SL_PAD_SD3_CLK__GPIO5_IO18 0x280 0x588 0x000 0x5 0x0 1014 #define MX6SL_PAD_SD3_CLK__USB_OTG1_PWR 1014 #define MX6SL_PAD_SD3_CLK__USB_OTG1_PWR 0x280 0x588 0x000 0x6 0x0 1015 #define MX6SL_PAD_SD3_CMD__SD3_CMD 1015 #define MX6SL_PAD_SD3_CMD__SD3_CMD 0x284 0x58c 0x000 0x0 0x0 1016 #define MX6SL_PAD_SD3_CMD__AUD5_RXC 1016 #define MX6SL_PAD_SD3_CMD__AUD5_RXC 0x284 0x58c 0x604 0x1 0x1 1017 #define MX6SL_PAD_SD3_CMD__KEY_ROW5 1017 #define MX6SL_PAD_SD3_CMD__KEY_ROW5 0x284 0x58c 0x768 0x2 0x2 1018 #define MX6SL_PAD_SD3_CMD__CSI_DATA11 1018 #define MX6SL_PAD_SD3_CMD__CSI_DATA11 0x284 0x58c 0x65c 0x3 0x2 1019 #define MX6SL_PAD_SD3_CMD__USB_OTG2_ID 1019 #define MX6SL_PAD_SD3_CMD__USB_OTG2_ID 0x284 0x58c 0x5e0 0x4 0x3 1020 #define MX6SL_PAD_SD3_CMD__GPIO5_IO21 1020 #define MX6SL_PAD_SD3_CMD__GPIO5_IO21 0x284 0x58c 0x000 0x5 0x0 1021 #define MX6SL_PAD_SD3_CMD__USB_OTG2_PWR 1021 #define MX6SL_PAD_SD3_CMD__USB_OTG2_PWR 0x284 0x58c 0x000 0x6 0x0 1022 #define MX6SL_PAD_SD3_DAT0__SD3_DATA0 1022 #define MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x288 0x590 0x000 0x0 0x0 1023 #define MX6SL_PAD_SD3_DAT0__AUD5_RXD 1023 #define MX6SL_PAD_SD3_DAT0__AUD5_RXD 0x288 0x590 0x5fc 0x1 0x1 1024 #define MX6SL_PAD_SD3_DAT0__KEY_COL6 1024 #define MX6SL_PAD_SD3_DAT0__KEY_COL6 0x288 0x590 0x74c 0x2 0x2 1025 #define MX6SL_PAD_SD3_DAT0__CSI_DATA12 1025 #define MX6SL_PAD_SD3_DAT0__CSI_DATA12 0x288 0x590 0x660 0x3 0x1 1026 #define MX6SL_PAD_SD3_DAT0__USB_OTG1_ID 1026 #define MX6SL_PAD_SD3_DAT0__USB_OTG1_ID 0x288 0x590 0x5dc 0x4 0x4 1027 #define MX6SL_PAD_SD3_DAT0__GPIO5_IO19 1027 #define MX6SL_PAD_SD3_DAT0__GPIO5_IO19 0x288 0x590 0x000 0x5 0x0 1028 #define MX6SL_PAD_SD3_DAT1__SD3_DATA1 1028 #define MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x28c 0x594 0x000 0x0 0x0 1029 #define MX6SL_PAD_SD3_DAT1__AUD5_TXC 1029 #define MX6SL_PAD_SD3_DAT1__AUD5_TXC 0x28c 0x594 0x60c 0x1 0x1 1030 #define MX6SL_PAD_SD3_DAT1__KEY_ROW6 1030 #define MX6SL_PAD_SD3_DAT1__KEY_ROW6 0x28c 0x594 0x76c 0x2 0x2 1031 #define MX6SL_PAD_SD3_DAT1__CSI_DATA13 1031 #define MX6SL_PAD_SD3_DAT1__CSI_DATA13 0x28c 0x594 0x664 0x3 0x1 1032 #define MX6SL_PAD_SD3_DAT1__SD1_VSELECT 1032 #define MX6SL_PAD_SD3_DAT1__SD1_VSELECT 0x28c 0x594 0x000 0x4 0x0 1033 #define MX6SL_PAD_SD3_DAT1__GPIO5_IO20 1033 #define MX6SL_PAD_SD3_DAT1__GPIO5_IO20 0x28c 0x594 0x000 0x5 0x0 1034 #define MX6SL_PAD_SD3_DAT1__JTAG_DE_B 1034 #define MX6SL_PAD_SD3_DAT1__JTAG_DE_B 0x28c 0x594 0x000 0x6 0x0 1035 #define MX6SL_PAD_SD3_DAT2__SD3_DATA2 1035 #define MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x290 0x598 0x000 0x0 0x0 1036 #define MX6SL_PAD_SD3_DAT2__AUD5_TXFS 1036 #define MX6SL_PAD_SD3_DAT2__AUD5_TXFS 0x290 0x598 0x610 0x1 0x1 1037 #define MX6SL_PAD_SD3_DAT2__KEY_COL7 1037 #define MX6SL_PAD_SD3_DAT2__KEY_COL7 0x290 0x598 0x750 0x2 0x2 1038 #define MX6SL_PAD_SD3_DAT2__CSI_DATA14 1038 #define MX6SL_PAD_SD3_DAT2__CSI_DATA14 0x290 0x598 0x668 0x3 0x1 1039 #define MX6SL_PAD_SD3_DAT2__EPIT1_OUT 1039 #define MX6SL_PAD_SD3_DAT2__EPIT1_OUT 0x290 0x598 0x000 0x4 0x0 1040 #define MX6SL_PAD_SD3_DAT2__GPIO5_IO16 1040 #define MX6SL_PAD_SD3_DAT2__GPIO5_IO16 0x290 0x598 0x000 0x5 0x0 1041 #define MX6SL_PAD_SD3_DAT2__USB_OTG2_OC 1041 #define MX6SL_PAD_SD3_DAT2__USB_OTG2_OC 0x290 0x598 0x820 0x6 0x3 1042 #define MX6SL_PAD_SD3_DAT3__SD3_DATA3 1042 #define MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x294 0x59c 0x000 0x0 0x0 1043 #define MX6SL_PAD_SD3_DAT3__AUD5_TXD 1043 #define MX6SL_PAD_SD3_DAT3__AUD5_TXD 0x294 0x59c 0x600 0x1 0x1 1044 #define MX6SL_PAD_SD3_DAT3__KEY_ROW7 1044 #define MX6SL_PAD_SD3_DAT3__KEY_ROW7 0x294 0x59c 0x770 0x2 0x2 1045 #define MX6SL_PAD_SD3_DAT3__CSI_DATA15 1045 #define MX6SL_PAD_SD3_DAT3__CSI_DATA15 0x294 0x59c 0x66c 0x3 0x1 1046 #define MX6SL_PAD_SD3_DAT3__EPIT2_OUT 1046 #define MX6SL_PAD_SD3_DAT3__EPIT2_OUT 0x294 0x59c 0x000 0x4 0x0 1047 #define MX6SL_PAD_SD3_DAT3__GPIO5_IO17 1047 #define MX6SL_PAD_SD3_DAT3__GPIO5_IO17 0x294 0x59c 0x000 0x5 0x0 1048 #define MX6SL_PAD_SD3_DAT3__USB_OTG1_OC 1048 #define MX6SL_PAD_SD3_DAT3__USB_OTG1_OC 0x294 0x59c 0x824 0x6 0x2 1049 #define MX6SL_PAD_UART1_RXD__UART1_RX_DATA 1049 #define MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x298 0x5a0 0x7fc 0x0 0x0 1050 #define MX6SL_PAD_UART1_RXD__UART1_TX_DATA 1050 #define MX6SL_PAD_UART1_RXD__UART1_TX_DATA 0x298 0x5a0 0x000 0x0 0x0 1051 #define MX6SL_PAD_UART1_RXD__PWM1_OUT 1051 #define MX6SL_PAD_UART1_RXD__PWM1_OUT 0x298 0x5a0 0x000 0x1 0x0 1052 #define MX6SL_PAD_UART1_RXD__UART4_RX_DATA 1052 #define MX6SL_PAD_UART1_RXD__UART4_RX_DATA 0x298 0x5a0 0x814 0x2 0x6 1053 #define MX6SL_PAD_UART1_RXD__UART4_TX_DATA 1053 #define MX6SL_PAD_UART1_RXD__UART4_TX_DATA 0x298 0x5a0 0x000 0x2 0x0 1054 #define MX6SL_PAD_UART1_RXD__FEC_COL 1054 #define MX6SL_PAD_UART1_RXD__FEC_COL 0x298 0x5a0 0x6f0 0x3 0x2 1055 #define MX6SL_PAD_UART1_RXD__UART5_RX_DATA 1055 #define MX6SL_PAD_UART1_RXD__UART5_RX_DATA 0x298 0x5a0 0x81c 0x4 0x6 1056 #define MX6SL_PAD_UART1_RXD__UART5_TX_DATA 1056 #define MX6SL_PAD_UART1_RXD__UART5_TX_DATA 0x298 0x5a0 0x000 0x4 0x0 1057 #define MX6SL_PAD_UART1_RXD__GPIO3_IO16 1057 #define MX6SL_PAD_UART1_RXD__GPIO3_IO16 0x298 0x5a0 0x000 0x5 0x0 1058 #define MX6SL_PAD_UART1_TXD__UART1_TX_DATA 1058 #define MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x29c 0x5a4 0x000 0x0 0x0 1059 #define MX6SL_PAD_UART1_TXD__UART1_RX_DATA 1059 #define MX6SL_PAD_UART1_TXD__UART1_RX_DATA 0x29c 0x5a4 0x7fc 0x0 0x1 1060 #define MX6SL_PAD_UART1_TXD__PWM2_OUT 1060 #define MX6SL_PAD_UART1_TXD__PWM2_OUT 0x29c 0x5a4 0x000 0x1 0x0 1061 #define MX6SL_PAD_UART1_TXD__UART4_TX_DATA 1061 #define MX6SL_PAD_UART1_TXD__UART4_TX_DATA 0x29c 0x5a4 0x000 0x2 0x0 1062 #define MX6SL_PAD_UART1_TXD__UART4_RX_DATA 1062 #define MX6SL_PAD_UART1_TXD__UART4_RX_DATA 0x29c 0x5a4 0x814 0x2 0x7 1063 #define MX6SL_PAD_UART1_TXD__FEC_RX_CLK 1063 #define MX6SL_PAD_UART1_TXD__FEC_RX_CLK 0x29c 0x5a4 0x700 0x3 0x2 1064 #define MX6SL_PAD_UART1_TXD__UART5_TX_DATA 1064 #define MX6SL_PAD_UART1_TXD__UART5_TX_DATA 0x29c 0x5a4 0x000 0x4 0x0 1065 #define MX6SL_PAD_UART1_TXD__UART5_RX_DATA 1065 #define MX6SL_PAD_UART1_TXD__UART5_RX_DATA 0x29c 0x5a4 0x81c 0x4 0x7 1066 #define MX6SL_PAD_UART1_TXD__GPIO3_IO17 1066 #define MX6SL_PAD_UART1_TXD__GPIO3_IO17 0x29c 0x5a4 0x000 0x5 0x0 1067 #define MX6SL_PAD_UART1_TXD__UART5_DCD_B 1067 #define MX6SL_PAD_UART1_TXD__UART5_DCD_B 0x29c 0x5a4 0x000 0x7 0x0 1068 #define MX6SL_PAD_WDOG_B__WDOG1_B 1068 #define MX6SL_PAD_WDOG_B__WDOG1_B 0x2a0 0x5a8 0x000 0x0 0x0 1069 #define MX6SL_PAD_WDOG_B__WDOG1_RESET_B_DEB 1069 #define MX6SL_PAD_WDOG_B__WDOG1_RESET_B_DEB 0x2a0 0x5a8 0x000 0x1 0x0 1070 #define MX6SL_PAD_WDOG_B__UART5_RI_B 1070 #define MX6SL_PAD_WDOG_B__UART5_RI_B 0x2a0 0x5a8 0x000 0x2 0x0 1071 #define MX6SL_PAD_WDOG_B__GPIO3_IO18 1071 #define MX6SL_PAD_WDOG_B__GPIO3_IO18 0x2a0 0x5a8 0x000 0x5 0x0 1072 1072 1073 #endif /* __DTS_IMX6SL_PINFUNC_H */ 1073 #endif /* __DTS_IMX6SL_PINFUNC_H */ 1074 1074
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