1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 // 2 //
3 // Copyright 2015 Technexion Ltd. 3 // Copyright 2015 Technexion Ltd.
4 // 4 //
5 // Author: Wig Cheng <wig.cheng@technexion.com 5 // Author: Wig Cheng <wig.cheng@technexion.com>
6 // Richard Hu <richard.hu@technexion.co 6 // Richard Hu <richard.hu@technexion.com>
7 // Tapani Utriainen <tapani@technexion. 7 // Tapani Utriainen <tapani@technexion.com>
8 /dts-v1/; 8 /dts-v1/;
9 9
10 #include "imx6ul-pico.dtsi" 10 #include "imx6ul-pico.dtsi"
11 / { 11 / {
12 model = "TechNexion PICO-IMX6UL and DW 12 model = "TechNexion PICO-IMX6UL and DWARF baseboard";
13 compatible = "technexion,imx6ul-pico-d 13 compatible = "technexion,imx6ul-pico-dwarf", "fsl,imx6ul";
14 14
15 sound { 15 sound {
16 compatible = "fsl,imx-audio-sg 16 compatible = "fsl,imx-audio-sgtl5000";
17 model = "imx6ul-sgtl5000"; 17 model = "imx6ul-sgtl5000";
18 audio-cpu = <&sai1>; 18 audio-cpu = <&sai1>;
19 audio-codec = <&sgtl5000>; 19 audio-codec = <&sgtl5000>;
20 audio-routing = 20 audio-routing =
21 "LINE_IN", "Line In Ja 21 "LINE_IN", "Line In Jack",
22 "MIC_IN", "Mic Jack", 22 "MIC_IN", "Mic Jack",
23 "Mic Jack", "Mic Bias" 23 "Mic Jack", "Mic Bias",
24 "Headphone Jack", "HP_ 24 "Headphone Jack", "HP_OUT";
25 }; 25 };
26 26
27 sys_mclk: clock-sys-mclk { 27 sys_mclk: clock-sys-mclk {
28 compatible = "fixed-clock"; 28 compatible = "fixed-clock";
29 #clock-cells = <0>; 29 #clock-cells = <0>;
30 clock-frequency = <24576000>; 30 clock-frequency = <24576000>;
31 }; 31 };
32 }; 32 };
33 33
34 &i2c2 { 34 &i2c2 {
35 clock-frequency = <100000>; 35 clock-frequency = <100000>;
36 pinctrl-names = "default"; 36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_i2c2>; 37 pinctrl-0 = <&pinctrl_i2c2>;
38 status = "okay"; 38 status = "okay";
39 39
40 sgtl5000: audio-codec@a { 40 sgtl5000: audio-codec@a {
41 reg = <0x0a>; 41 reg = <0x0a>;
42 compatible = "fsl,sgtl5000"; 42 compatible = "fsl,sgtl5000";
43 #sound-dai-cells = <0>; 43 #sound-dai-cells = <0>;
44 clocks = <&sys_mclk>; 44 clocks = <&sys_mclk>;
45 VDDA-supply = <®_2p5v>; 45 VDDA-supply = <®_2p5v>;
46 VDDIO-supply = <®_3p3v>; 46 VDDIO-supply = <®_3p3v>;
47 }; 47 };
48 48
49 pressure-sensor@60 { 49 pressure-sensor@60 {
50 compatible = "fsl,mpl3115"; 50 compatible = "fsl,mpl3115";
51 reg = <0x60>; 51 reg = <0x60>;
52 }; 52 };
53 }; 53 };
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