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Linux/scripts/dtc/include-prefixes/arm/nxp/imx/imx6ul-tqma6ul1-mba6ulx.dts

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm/nxp/imx/imx6ul-tqma6ul1-mba6ulx.dts (Architecture i386) and /scripts/dtc/include-prefixes/arm/nxp/imx/imx6ul-tqma6ul1-mba6ulx.dts (Architecture sparc)


  1 // SPDX-License-Identifier: (GPL-2.0-or-later       1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
  2 /*                                                  2 /*
  3  * Copyright 2018-2022 TQ-Systems GmbH              3  * Copyright 2018-2022 TQ-Systems GmbH
  4  * Author: Markus Niebel <Markus.Niebel@tq-grou      4  * Author: Markus Niebel <Markus.Niebel@tq-group.com>
  5  */                                                 5  */
  6                                                     6 
  7 /dts-v1/;                                           7 /dts-v1/;
  8                                                     8 
  9 #include "imx6ul-tqma6ul1.dtsi"                     9 #include "imx6ul-tqma6ul1.dtsi"
 10 #include "mba6ulx.dtsi"                            10 #include "mba6ulx.dtsi"
 11                                                    11 
 12 / {                                                12 / {
 13         model = "TQ-Systems TQMa6UL1 SoM on MB     13         model = "TQ-Systems TQMa6UL1 SoM on MBa6ULx board";
 14         compatible = "tq,imx6ul-tqma6ul1-mba6u     14         compatible = "tq,imx6ul-tqma6ul1-mba6ulx", "tq,imx6ul-tqma6ul1", "fsl,imx6ul";
 15 };                                                 15 };
 16                                                    16 
 17 /*                                                 17 /*
 18  * Note: can2 and fec2 are enabled on mba6ulx      18  * Note: can2 and fec2 are enabled on mba6ulx level (for i.MX6ULG2 usage)
 19  * and need to be disabled here again              19  * and need to be disabled here again
 20  */                                                20  */
 21 &can2 {                                            21 &can2 {
 22         status = "disabled";                       22         status = "disabled";
 23 };                                                 23 };
 24                                                    24 
 25 &fec1 {                                            25 &fec1 {
 26         pinctrl-names = "default";                 26         pinctrl-names = "default";
 27         pinctrl-0 = <&pinctrl_enet1>, <&pinctr     27         pinctrl-0 = <&pinctrl_enet1>, <&pinctrl_enet1_mdc>;
 28         status = "okay";                           28         status = "okay";
 29                                                    29 
 30         mdio {                                     30         mdio {
 31                 #address-cells = <1>;              31                 #address-cells = <1>;
 32                 #size-cells = <0>;                 32                 #size-cells = <0>;
 33                                                    33 
 34                 ethphy0: ethernet-phy@0 {          34                 ethphy0: ethernet-phy@0 {
 35                         compatible = "ethernet     35                         compatible = "ethernet-phy-ieee802.3-c22";
 36                         max-speed = <100>;         36                         max-speed = <100>;
 37                         reg = <0>;                 37                         reg = <0>;
 38                 };                                 38                 };
 39         };                                         39         };
 40 };                                                 40 };
 41                                                    41 
 42 &fec2 {                                            42 &fec2 {
 43         /delete-property/ phy-handle;              43         /delete-property/ phy-handle;
 44         /delete-node/ mdio;                        44         /delete-node/ mdio;
 45 };                                                 45 };
 46                                                    46 
 47 &iomuxc {                                          47 &iomuxc {
 48         pinctrl_enet1_mdc: enet1mdcgrp {           48         pinctrl_enet1_mdc: enet1mdcgrp {
 49                 fsl,pins = <                       49                 fsl,pins = <
 50                         /* mdio */                 50                         /* mdio */
 51                         MX6UL_PAD_GPIO1_IO07__     51                         MX6UL_PAD_GPIO1_IO07__ENET1_MDC         0x1b0b0
 52                         MX6UL_PAD_GPIO1_IO06__     52                         MX6UL_PAD_GPIO1_IO06__ENET1_MDIO        0x1b0b0
 53                 >;                                 53                 >;
 54         };                                         54         };
 55 };                                                 55 };
                                                      

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