1 // SPDX-License-Identifier: GPL-2.0-or-later 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* 2 /*
3 * Copyright 2013 Free Electrons 3 * Copyright 2013 Free Electrons
4 */ 4 */
5 5
6 /* 6 /*
7 * The CFA-10055 is an expansion board for the 7 * The CFA-10055 is an expansion board for the CFA-10036 module and
8 * CFA-10037, thus we need to include the CFA- 8 * CFA-10037, thus we need to include the CFA-10037 DTS.
9 */ 9 */
10 #include "imx28-cfa10037.dts" 10 #include "imx28-cfa10037.dts"
11 11
12 / { 12 / {
13 model = "Crystalfontz CFA-10056 Board" 13 model = "Crystalfontz CFA-10056 Board";
14 compatible = "crystalfontz,cfa10056", 14 compatible = "crystalfontz,cfa10056", "crystalfontz,cfa10037", "crystalfontz,cfa10036", "fsl,imx28";
15 15
16 spi-2 { 16 spi-2 {
17 compatible = "spi-gpio"; 17 compatible = "spi-gpio";
18 pinctrl-names = "default"; 18 pinctrl-names = "default";
19 pinctrl-0 = <&spi2_pins_cfa100 19 pinctrl-0 = <&spi2_pins_cfa10056>;
20 status = "okay"; 20 status = "okay";
21 sck-gpios = <&gpio2 16 0>; 21 sck-gpios = <&gpio2 16 0>;
22 mosi-gpios = <&gpio2 17 0>; 22 mosi-gpios = <&gpio2 17 0>;
23 miso-gpios = <&gpio2 18 0>; 23 miso-gpios = <&gpio2 18 0>;
24 cs-gpios = <&gpio3 5 0>; 24 cs-gpios = <&gpio3 5 0>;
25 num-chipselects = <1>; 25 num-chipselects = <1>;
26 #address-cells = <1>; 26 #address-cells = <1>;
27 #size-cells = <0>; 27 #size-cells = <0>;
28 28
29 hx8369: hx8369@0 { 29 hx8369: hx8369@0 {
30 compatible = "himax,hx 30 compatible = "himax,hx8369a", "himax,hx8369";
31 reg = <0>; 31 reg = <0>;
32 spi-max-frequency = <1 32 spi-max-frequency = <100000>;
33 spi-cpol; 33 spi-cpol;
34 spi-cpha; 34 spi-cpha;
35 gpios-reset = <&gpio3 35 gpios-reset = <&gpio3 30 0>;
36 }; 36 };
37 }; 37 };
38 }; 38 };
39 39
40 &pinctrl { 40 &pinctrl {
41 spi2_pins_cfa10056: spi2-cfa10056@0 { 41 spi2_pins_cfa10056: spi2-cfa10056@0 {
42 reg = <0>; 42 reg = <0>;
43 fsl,pinmux-ids = < 43 fsl,pinmux-ids = <
44 MX28_PAD_SSP2_SCK__GPI 44 MX28_PAD_SSP2_SCK__GPIO_2_16
45 MX28_PAD_SSP2_MOSI__GP 45 MX28_PAD_SSP2_MOSI__GPIO_2_17
46 MX28_PAD_SSP2_MISO__GP 46 MX28_PAD_SSP2_MISO__GPIO_2_18
47 MX28_PAD_AUART1_TX__GP 47 MX28_PAD_AUART1_TX__GPIO_3_5
48 >; 48 >;
49 fsl,drive-strength = <MXS_DRIV 49 fsl,drive-strength = <MXS_DRIVE_8mA>;
50 fsl,voltage = <MXS_VOLTAGE_HIG 50 fsl,voltage = <MXS_VOLTAGE_HIGH>;
51 fsl,pull-up = <MXS_PULL_ENABLE 51 fsl,pull-up = <MXS_PULL_ENABLE>;
52 }; 52 };
53 53
54 lcdif_pins_cfa10056: lcdif-10056@0 { 54 lcdif_pins_cfa10056: lcdif-10056@0 {
55 reg = <0>; 55 reg = <0>;
56 fsl,pinmux-ids = < 56 fsl,pinmux-ids = <
57 MX28_PAD_LCD_RD_E__LCD 57 MX28_PAD_LCD_RD_E__LCD_VSYNC
58 MX28_PAD_LCD_WR_RWN__L 58 MX28_PAD_LCD_WR_RWN__LCD_HSYNC
59 MX28_PAD_LCD_RS__LCD_D 59 MX28_PAD_LCD_RS__LCD_DOTCLK
60 MX28_PAD_LCD_CS__LCD_E 60 MX28_PAD_LCD_CS__LCD_ENABLE
61 >; 61 >;
62 fsl,drive-strength = <MXS_DRIV 62 fsl,drive-strength = <MXS_DRIVE_4mA>;
63 fsl,voltage = <MXS_VOLTAGE_HIG 63 fsl,voltage = <MXS_VOLTAGE_HIGH>;
64 fsl,pull-up = <MXS_PULL_DISABL 64 fsl,pull-up = <MXS_PULL_DISABLE>;
65 }; 65 };
66 66
67 lcdif_pins_cfa10056_pullup: lcdif-1005 67 lcdif_pins_cfa10056_pullup: lcdif-10056-pullup@0 {
68 reg = <0>; 68 reg = <0>;
69 fsl,pinmux-ids = < 69 fsl,pinmux-ids = <
70 MX28_PAD_LCD_RESET__GP 70 MX28_PAD_LCD_RESET__GPIO_3_30
71 >; 71 >;
72 fsl,drive-strength = <MXS_DRIV 72 fsl,drive-strength = <MXS_DRIVE_4mA>;
73 fsl,voltage = <MXS_VOLTAGE_HIG 73 fsl,voltage = <MXS_VOLTAGE_HIGH>;
74 fsl,pull-up = <MXS_PULL_ENABLE 74 fsl,pull-up = <MXS_PULL_ENABLE>;
75 }; 75 };
76 }; 76 };
77 77
78 &lcdif { 78 &lcdif {
79 pinctrl-names = "default"; 79 pinctrl-names = "default";
80 pinctrl-0 = <&lcdif_24bit_pins_a 80 pinctrl-0 = <&lcdif_24bit_pins_a
81 &lcdif_pins_cfa10056 81 &lcdif_pins_cfa10056
82 &lcdif_pins_cfa10056_p 82 &lcdif_pins_cfa10056_pullup >;
83 display = <&display0>; 83 display = <&display0>;
84 status = "okay"; 84 status = "okay";
85 85
86 display0: display0 { 86 display0: display0 {
87 bits-per-pixel = <32>; 87 bits-per-pixel = <32>;
88 bus-width = <24>; 88 bus-width = <24>;
89 89
90 display-timings { 90 display-timings {
91 native-mode = <&timing 91 native-mode = <&timing0>;
92 timing0: timing0 { 92 timing0: timing0 {
93 clock-frequenc 93 clock-frequency = <32000000>;
94 hactive = <480 94 hactive = <480>;
95 vactive = <800 95 vactive = <800>;
96 hback-porch = 96 hback-porch = <2>;
97 hfront-porch = 97 hfront-porch = <2>;
98 vback-porch = 98 vback-porch = <2>;
99 vfront-porch = 99 vfront-porch = <2>;
100 hsync-len = <5 100 hsync-len = <5>;
101 vsync-len = <5 101 vsync-len = <5>;
102 hsync-active = 102 hsync-active = <0>;
103 vsync-active = 103 vsync-active = <0>;
104 de-active = <1 104 de-active = <1>;
105 pixelclk-activ 105 pixelclk-active = <1>;
106 }; 106 };
107 }; 107 };
108 }; 108 };
109 }; 109 };
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