1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2018, The Linux Foundation. A 2 // Copyright (c) 2018, The Linux Foundation. All rights reserved.
3 3
4 #include "qcom-ipq4019.dtsi" 4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/gpio/gpio.h>
7 7
8 / { 8 / {
9 model = "Qualcomm Technologies, Inc. I 9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
10 10
11 aliases { 11 aliases {
12 serial0 = &blsp1_uart1; 12 serial0 = &blsp1_uart1;
13 serial1 = &blsp1_uart2; 13 serial1 = &blsp1_uart2;
14 }; 14 };
15 15
16 chosen { 16 chosen {
17 stdout-path = "serial0:115200n 17 stdout-path = "serial0:115200n8";
18 }; 18 };
19 19
20 memory { 20 memory {
21 device_type = "memory"; 21 device_type = "memory";
22 reg = <0x80000000 0x10000000>; 22 reg = <0x80000000 0x10000000>; /* 256MB */
23 }; 23 };
24 24
25 soc { 25 soc {
26 pinctrl@1000000 { 26 pinctrl@1000000 {
27 serial_0_pins: serial0 27 serial_0_pins: serial0-state {
28 pins = "gpio16 28 pins = "gpio16", "gpio17";
29 function = "bl 29 function = "blsp_uart0";
30 bias-disable; 30 bias-disable;
31 }; 31 };
32 32
33 serial_1_pins: serial1 33 serial_1_pins: serial1-state {
34 pins = "gpio8" 34 pins = "gpio8", "gpio9",
35 "gpio1 35 "gpio10", "gpio11";
36 function = "bl 36 function = "blsp_uart1";
37 bias-disable; 37 bias-disable;
38 }; 38 };
39 39
40 spi_0_pins: spi-0-stat 40 spi_0_pins: spi-0-state {
41 spi0-pins { 41 spi0-pins {
42 functi 42 function = "blsp_spi0";
43 pins = 43 pins = "gpio13", "gpio14", "gpio15";
44 bias-d 44 bias-disable;
45 }; 45 };
46 spi0-cs-pins { 46 spi0-cs-pins {
47 functi 47 function = "gpio";
48 pins = 48 pins = "gpio12";
49 bias-d 49 bias-disable;
50 output 50 output-high;
51 }; 51 };
52 }; 52 };
53 53
54 i2c_0_pins: i2c-0-stat 54 i2c_0_pins: i2c-0-state {
55 pins = "gpio20 55 pins = "gpio20", "gpio21";
56 function = "bl 56 function = "blsp_i2c0";
57 bias-disable; 57 bias-disable;
58 }; 58 };
59 59
60 nand_pins: nand-state 60 nand_pins: nand-state {
61 pins = "gpio53 61 pins = "gpio53", "gpio55", "gpio56",
62 "gpio5 62 "gpio57", "gpio58", "gpio59",
63 "gpio6 63 "gpio60", "gpio62", "gpio63",
64 "gpio6 64 "gpio64", "gpio65", "gpio66",
65 "gpio6 65 "gpio67", "gpio68", "gpio69";
66 function = "qp 66 function = "qpic";
67 }; 67 };
68 }; 68 };
69 69
70 serial@78af000 { 70 serial@78af000 {
71 pinctrl-0 = <&serial_0 71 pinctrl-0 = <&serial_0_pins>;
72 pinctrl-names = "defau 72 pinctrl-names = "default";
73 status = "okay"; 73 status = "okay";
74 }; 74 };
75 75
76 serial@78b0000 { 76 serial@78b0000 {
77 pinctrl-0 = <&serial_1 77 pinctrl-0 = <&serial_1_pins>;
78 pinctrl-names = "defau 78 pinctrl-names = "default";
79 status = "okay"; 79 status = "okay";
80 }; 80 };
81 81
82 dma-controller@7884000 { 82 dma-controller@7884000 {
83 status = "okay"; 83 status = "okay";
84 }; 84 };
85 85
86 spi@78b5000 { /* BLSP1 QUP1 */ 86 spi@78b5000 { /* BLSP1 QUP1 */
87 pinctrl-0 = <&spi_0_pi 87 pinctrl-0 = <&spi_0_pins>;
88 pinctrl-names = "defau 88 pinctrl-names = "default";
89 status = "okay"; 89 status = "okay";
90 cs-gpios = <&tlmm 12 G 90 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
91 91
92 flash@0 { 92 flash@0 {
93 #address-cells 93 #address-cells = <1>;
94 #size-cells = 94 #size-cells = <1>;
95 reg = <0>; 95 reg = <0>;
96 compatible = " 96 compatible = "micron,n25q128a11", "jedec,spi-nor";
97 spi-max-freque 97 spi-max-frequency = <24000000>;
98 }; 98 };
99 }; 99 };
100 100
101 pcie@40000000 { 101 pcie@40000000 {
102 status = "okay"; 102 status = "okay";
103 perst-gpios = <&tlmm 3 103 perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
104 }; 104 };
105 }; 105 };
106 }; 106 };
107 107
108 &nand { 108 &nand {
109 pinctrl-0 = <&nand_pins>; 109 pinctrl-0 = <&nand_pins>;
110 pinctrl-names = "default"; 110 pinctrl-names = "default";
111 }; 111 };
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