1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * Copyright (c) 2021 Qualcomm Innovation Cent
4 */
5 /dts-v1/;
6
7 /* PM7250B is configured to use SID2/3 */
8 #define PM7250B_SID 2
9 #define PM7250B_SID1 3
10
11 #include "qcom-sdx65.dtsi"
12 #include <dt-bindings/regulator/qcom,rpmh-regu
13 #include <arm64/qcom/pmk8350.dtsi>
14 #include <arm64/qcom/pm7250b.dtsi>
15 #include "pmx65.dtsi"
16
17 / {
18 model = "Qualcomm Technologies, Inc. S
19 compatible = "qcom,sdx65-mtp", "qcom,s
20 qcom,board-id = <0x2010008 0x302>;
21
22 aliases {
23 serial0 = &blsp1_uart3;
24 };
25
26 chosen {
27 stdout-path = "serial0:115200n
28 };
29
30 reserved-memory {
31 #address-cells = <1>;
32 #size-cells = <1>;
33 ranges;
34
35 mpss_dsm: memory@8c400000 {
36 no-map;
37 reg = <0x8c400000 0x32
38 };
39
40 ipa_fw_mem: memory@8fced000 {
41 no-map;
42 reg = <0x8fced000 0x10
43 };
44
45 mpss_adsp_mem: memory@90800000
46 no-map;
47 reg = <0x90800000 0x10
48 };
49 };
50
51 vph_pwr: vph-pwr-regulator {
52 compatible = "regulator-fixed"
53 regulator-name = "vph_pwr";
54 regulator-min-microvolt = <370
55 regulator-max-microvolt = <370
56 };
57
58 vreg_bob_3p3: pmx65_bob {
59 compatible = "regulator-fixed"
60 regulator-name = "vreg_bob_3p3
61 regulator-min-microvolt = <330
62 regulator-max-microvolt = <330
63
64 regulator-always-on;
65 regulator-boot-on;
66
67 vin-supply = <&vph_pwr>;
68 };
69 };
70
71 &apps_rsc {
72 regulators-0 {
73 compatible = "qcom,pmx65-rpmh-
74 qcom,pmic-id = "b";
75
76 vdd-s1-supply = <&vph_pwr>;
77 vdd-s2-supply = <&vph_pwr>;
78 vdd-s3-supply = <&vph_pwr>;
79 vdd-s4-supply = <&vph_pwr>;
80 vdd-s5-supply = <&vph_pwr>;
81 vdd-s6-supply = <&vph_pwr>;
82 vdd-s7-supply = <&vph_pwr>;
83 vdd-s8-supply = <&vph_pwr>;
84 vdd-l1-supply = <&vreg_s2b_1p2
85 vdd-l2-l18-supply = <&vreg_s2b
86 vdd-l3-supply = <&vreg_s8b_0p8
87 vdd-l4-supply = <&vreg_s7b_0p9
88 vdd-l5-l6-l16-supply = <&vreg_
89 vdd-l7-supply = <&vreg_s3b_0p7
90 vdd-l8-l9-supply = <&vreg_s8b_
91 vdd-l10-supply = <&vreg_bob_3p
92 vdd-l11-l13-supply = <&vreg_bo
93 vdd-l12-supply = <&vreg_s2b_1p
94 vdd-l14-supply = <&vreg_s3b_0p
95 vdd-l15-supply = <&vreg_s2b_1p
96 vdd-l17-supply = <&vreg_s8b_0p
97 vdd-l19-supply = <&vreg_s3b_0p
98 vdd-l20-supply = <&vreg_s7b_0p
99 vdd-l21-supply = <&vreg_s7b_0p
100
101 vreg_s2b_1p224: smps2 {
102 regulator-min-microvol
103 regulator-max-microvol
104 };
105
106 vreg_s3b_0p776: smps3 {
107 regulator-min-microvol
108 regulator-max-microvol
109 };
110
111 vreg_s4b_1p824: smps4 {
112 regulator-min-microvol
113 regulator-max-microvol
114 };
115
116 vreg_s7b_0p936: smps7 {
117 regulator-min-microvol
118 regulator-max-microvol
119 };
120
121 vreg_s8b_0p824: smps8 {
122 regulator-min-microvol
123 regulator-max-microvol
124 };
125
126 vreg_l1b_1p2: ldo1 {
127 regulator-min-microvol
128 regulator-max-microvol
129 regulator-initial-mode
130 };
131
132 ldo2 {
133 regulator-min-microvol
134 regulator-max-microvol
135 regulator-initial-mode
136 };
137
138 ldo3 {
139 regulator-min-microvol
140 regulator-max-microvol
141 regulator-initial-mode
142 };
143
144 vreg_l4b_0p88: ldo4 {
145 regulator-min-microvol
146 regulator-max-microvol
147 regulator-initial-mode
148 };
149
150 vreg_l5b_1p8: ldo5 {
151 regulator-min-microvol
152 regulator-max-microvol
153 regulator-initial-mode
154 };
155
156 ldo6 {
157 regulator-min-microvol
158 regulator-max-microvol
159 regulator-initial-mode
160 };
161
162 ldo7 {
163 regulator-min-microvol
164 regulator-max-microvol
165 regulator-initial-mode
166 };
167
168 ldo8 {
169 regulator-min-microvol
170 regulator-max-microvol
171 regulator-initial-mode
172 };
173
174 ldo9 {
175 regulator-min-microvol
176 regulator-max-microvol
177 regulator-initial-mode
178 };
179
180 vreg_l10b_3p08: ldo10 {
181 regulator-min-microvol
182 regulator-max-microvol
183 regulator-initial-mode
184 };
185
186 ldo11 {
187 regulator-min-microvol
188 regulator-max-microvol
189 regulator-initial-mode
190 };
191
192 ldo12 {
193 regulator-min-microvol
194 regulator-max-microvol
195 regulator-initial-mode
196 };
197
198 ldo13 {
199 regulator-min-microvol
200 regulator-max-microvol
201 regulator-initial-mode
202 };
203
204 ldo14 {
205 regulator-min-microvol
206 regulator-max-microvol
207 regulator-initial-mode
208 };
209
210 ldo15 {
211 regulator-min-microvol
212 regulator-max-microvol
213 regulator-initial-mode
214 };
215
216 ldo16 {
217 regulator-min-microvol
218 regulator-max-microvol
219 regulator-initial-mode
220 };
221
222 ldo17 {
223 regulator-min-microvol
224 regulator-max-microvol
225 regulator-initial-mode
226 };
227
228 ldo19 {
229 regulator-min-microvol
230 regulator-max-microvol
231 regulator-initial-mode
232 };
233
234 ldo20 {
235 regulator-min-microvol
236 regulator-max-microvol
237 regulator-initial-mode
238 };
239
240 ldo21 {
241 regulator-min-microvol
242 regulator-max-microvol
243 regulator-initial-mode
244 };
245 };
246 };
247
248 &blsp1_uart3 {
249 status = "okay";
250 };
251
252 &ipa {
253 qcom,gsi-loader = "skip";
254 status = "okay";
255 };
256
257 &pcie_ep {
258 pinctrl-0 = <&pcie_ep_clkreq_default
259 &pcie_ep_perst_default
260 &pcie_ep_wake_default>;
261 pinctrl-names = "default";
262
263 reset-gpios = <&tlmm 57 GPIO_ACTIVE_LO
264 wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW
265
266 status = "okay";
267 };
268
269 &pcie_phy {
270 vdda-phy-supply = <&vreg_l1b_1p2>;
271 vdda-pll-supply = <&vreg_l4b_0p88>;
272
273 status = "okay";
274 };
275
276 &qpic_bam {
277 status = "okay";
278 };
279
280 &qpic_nand {
281 status = "okay";
282
283 nand@0 {
284 reg = <0>;
285
286 nand-ecc-strength = <4>;
287 nand-ecc-step-size = <512>;
288 nand-bus-width = <8>;
289 /* ico and efs2 partitions are
290 secure-regions = /bits/ 64 <0x
291 0x
292 };
293 };
294
295 &remoteproc_mpss {
296 memory-region = <&mpss_adsp_mem>;
297 status = "okay";
298 };
299
300 &tlmm {
301 pcie_ep_clkreq_default: pcie-ep-clkreq
302 pins = "gpio56";
303 function = "pcie_clkreq";
304 drive-strength = <2>;
305 bias-disable;
306 };
307
308 pcie_ep_perst_default: pcie-ep-perst-d
309 pins = "gpio57";
310 function = "gpio";
311 drive-strength = <2>;
312 bias-pull-down;
313 };
314
315 pcie_ep_wake_default: pcie-ep-wake-def
316 pins = "gpio53";
317 function = "gpio";
318 drive-strength = <2>;
319 bias-disable;
320 };
321 };
322
323 &usb {
324 status = "okay";
325 };
326
327 &usb_dwc3 {
328 dr_mode = "peripheral";
329 };
330
331 &usb_hsphy {
332 vdda-pll-supply = <&vreg_l4b_0p88>;
333 vdda33-supply = <&vreg_l10b_3p08>;
334 vdda18-supply = <&vreg_l5b_1p8>;
335 status = "okay";
336 };
337
338 &usb_qmpphy {
339 vdda-phy-supply = <&vreg_l4b_0p88>;
340 vdda-pll-supply = <&vreg_l1b_1p2>;
341 status = "okay";
342 };
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