1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the Genmai board 3 * Device Tree Source for the Genmai board
4 * 4 *
5 * Copyright (C) 2013-14 Renesas Solutions Cor 5 * Copyright (C) 2013-14 Renesas Solutions Corp.
6 * Copyright (C) 2014 Wolfram Sang, Sang Engin< 6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
7 */ 7 */
8 8
9 /dts-v1/; 9 /dts-v1/;
10 #include "r7s72100.dtsi" 10 #include "r7s72100.dtsi"
11 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/r7s72100-pinctrl 12 #include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
13 13
14 / { 14 / {
15 model = "Genmai"; 15 model = "Genmai";
16 compatible = "renesas,genmai", "renesa 16 compatible = "renesas,genmai", "renesas,r7s72100";
17 17
18 aliases { 18 aliases {
19 serial0 = &scif2; 19 serial0 = &scif2;
20 }; 20 };
21 21
22 chosen { 22 chosen {
23 bootargs = "ignore_loglevel rw 23 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
24 stdout-path = "serial0:115200n 24 stdout-path = "serial0:115200n8";
25 }; 25 };
26 26
27 memory@8000000 { 27 memory@8000000 {
28 device_type = "memory"; 28 device_type = "memory";
29 reg = <0x08000000 0x08000000>; 29 reg = <0x08000000 0x08000000>;
30 }; 30 };
31 31
32 flash@18000000 { !! 32 lbsc {
33 compatible = "mtd-rom"; <<
34 reg = <0x18000000 0x08000000>; <<
35 bank-width = <4>; <<
36 device-width = <1>; <<
37 <<
38 clocks = <&mstp9_clks R7S72100 <<
39 power-domains = <&cpg_clocks>; <<
40 <<
41 #address-cells = <1>; 33 #address-cells = <1>;
42 #size-cells = <1>; 34 #size-cells = <1>;
43 <<
44 partitions { <<
45 compatible = "fixed-pa <<
46 #address-cells = <1>; <<
47 #size-cells = <1>; <<
48 <<
49 partition@0 { <<
50 label = "user" <<
51 reg = <0x00000 <<
52 }; <<
53 <<
54 partition@4000000 { <<
55 label = "user1 <<
56 reg = <0x04000 <<
57 }; <<
58 }; <<
59 }; 35 };
60 36
61 leds { 37 leds {
62 status = "okay"; 38 status = "okay";
63 compatible = "gpio-leds"; 39 compatible = "gpio-leds";
64 40
65 led1 { 41 led1 {
66 gpios = <&port4 10 GPI 42 gpios = <&port4 10 GPIO_ACTIVE_LOW>;
67 }; 43 };
68 44
69 led2 { 45 led2 {
70 gpios = <&port4 11 GPI 46 gpios = <&port4 11 GPIO_ACTIVE_LOW>;
71 }; 47 };
72 }; 48 };
73 }; 49 };
74 50
75 &pinctrl { 51 &pinctrl {
76 52
77 scif2_pins: serial2 { 53 scif2_pins: serial2 {
78 /* P3_0 as TxD2; P3_2 as RxD2 54 /* P3_0 as TxD2; P3_2 as RxD2 */
79 pinmux = <RZA1_PINMUX(3, 0, 6) 55 pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>;
80 }; 56 };
81 57
82 i2c2_pins: i2c2 { 58 i2c2_pins: i2c2 {
83 /* RIIC2: P1_4 as SCL, P1_5 as 59 /* RIIC2: P1_4 as SCL, P1_5 as SDA */
84 pinmux = <RZA1_PINMUX(1, 4, 1) 60 pinmux = <RZA1_PINMUX(1, 4, 1)>, <RZA1_PINMUX(1, 5, 1)>;
85 }; 61 };
86 62
87 ether_pins: ether { 63 ether_pins: ether {
88 /* Ethernet on Ports 1,2,3,5 * 64 /* Ethernet on Ports 1,2,3,5 */
89 pinmux = <RZA1_PINMUX(1, 14, 4 65 pinmux = <RZA1_PINMUX(1, 14, 4)>,/* P1_14 = ET_COL */
90 <RZA1_PINMUX(5, 9, 2) 66 <RZA1_PINMUX(5, 9, 2)>, /* P5_9 = ET_MDC */
91 <RZA1_PINMUX(3, 3, 2) 67 <RZA1_PINMUX(3, 3, 2)>, /* P3_3 = ET_MDIO */
92 <RZA1_PINMUX(3, 4, 2) 68 <RZA1_PINMUX(3, 4, 2)>, /* P3_4 = ET_RXCLK */
93 <RZA1_PINMUX(3, 5, 2) 69 <RZA1_PINMUX(3, 5, 2)>, /* P3_5 = ET_RXER */
94 <RZA1_PINMUX(3, 6, 2) 70 <RZA1_PINMUX(3, 6, 2)>, /* P3_6 = ET_RXDV */
95 <RZA1_PINMUX(2, 0, 2) 71 <RZA1_PINMUX(2, 0, 2)>, /* P2_0 = ET_TXCLK */
96 <RZA1_PINMUX(2, 1, 2) 72 <RZA1_PINMUX(2, 1, 2)>, /* P2_1 = ET_TXER */
97 <RZA1_PINMUX(2, 2, 2) 73 <RZA1_PINMUX(2, 2, 2)>, /* P2_2 = ET_TXEN */
98 <RZA1_PINMUX(2, 3, 2) 74 <RZA1_PINMUX(2, 3, 2)>, /* P2_3 = ET_CRS */
99 <RZA1_PINMUX(2, 4, 2) 75 <RZA1_PINMUX(2, 4, 2)>, /* P2_4 = ET_TXD0 */
100 <RZA1_PINMUX(2, 5, 2) 76 <RZA1_PINMUX(2, 5, 2)>, /* P2_5 = ET_TXD1 */
101 <RZA1_PINMUX(2, 6, 2) 77 <RZA1_PINMUX(2, 6, 2)>, /* P2_6 = ET_TXD2 */
102 <RZA1_PINMUX(2, 7, 2) 78 <RZA1_PINMUX(2, 7, 2)>, /* P2_7 = ET_TXD3 */
103 <RZA1_PINMUX(2, 8, 2) 79 <RZA1_PINMUX(2, 8, 2)>, /* P2_8 = ET_RXD0 */
104 <RZA1_PINMUX(2, 9, 2) 80 <RZA1_PINMUX(2, 9, 2)>, /* P2_9 = ET_RXD1 */
105 <RZA1_PINMUX(2, 10, 2 81 <RZA1_PINMUX(2, 10, 2)>,/* P2_10 = ET_RXD2 */
106 <RZA1_PINMUX(2, 11, 2 82 <RZA1_PINMUX(2, 11, 2)>;/* P2_11 = ET_RXD3 */
107 }; 83 };
108 }; 84 };
109 85
110 &extal_clk { 86 &extal_clk {
111 clock-frequency = <13330000>; 87 clock-frequency = <13330000>;
112 }; <<
113 <<
114 &bsc { <<
115 flash@0 { <<
116 compatible = "cfi-flash"; <<
117 reg = <0x00000000 0x04000000>; <<
118 bank-width = <2>; <<
119 <<
120 partitions { <<
121 compatible = "fixed-pa <<
122 #address-cells = <1>; <<
123 #size-cells = <1>; <<
124 <<
125 partition@0 { <<
126 label = "uboot <<
127 reg = <0x00000 <<
128 }; <<
129 <<
130 partition@40000 { <<
131 label = "uboot <<
132 reg = <0x00040 <<
133 }; <<
134 <<
135 partition@60000 { <<
136 label = "flash <<
137 reg = <0x00060 <<
138 }; <<
139 }; <<
140 }; <<
141 <<
142 flash@4000000 { <<
143 compatible = "cfi-flash"; <<
144 reg = <0x04000000 0x04000000>; <<
145 bank-width = <2>; <<
146 <<
147 partitions { <<
148 compatible = "fixed-pa <<
149 #address-cells = <1>; <<
150 #size-cells = <1>; <<
151 <<
152 partition@0 { <<
153 label = "uboot <<
154 reg = <0x00000 <<
155 }; <<
156 <<
157 partition@40000 { <<
158 label = "uboot <<
159 reg = <0x00040 <<
160 }; <<
161 <<
162 partition@60000 { <<
163 label = "flash <<
164 reg = <0x00060 <<
165 }; <<
166 }; <<
167 }; <<
168 }; 88 };
169 89
170 &usb_x1_clk { 90 &usb_x1_clk {
171 clock-frequency = <48000000>; 91 clock-frequency = <48000000>;
172 }; 92 };
173 93
174 &rtc_x1_clk { 94 &rtc_x1_clk {
175 clock-frequency = <32768>; 95 clock-frequency = <32768>;
176 }; 96 };
177 97
178 &mtu2 { 98 &mtu2 {
179 status = "okay"; 99 status = "okay";
180 }; 100 };
181 101
182 ðer { 102 ðer {
183 pinctrl-names = "default"; 103 pinctrl-names = "default";
184 pinctrl-0 = <ðer_pins>; 104 pinctrl-0 = <ðer_pins>;
185 105
186 status = "okay"; 106 status = "okay";
187 107
188 renesas,no-ether-link; 108 renesas,no-ether-link;
189 phy-handle = <&phy0>; 109 phy-handle = <&phy0>;
190 phy0: ethernet-phy@0 { 110 phy0: ethernet-phy@0 {
191 compatible = "ethernet-phy-idb 111 compatible = "ethernet-phy-idb824.2814",
192 "ethernet-phy-iee 112 "ethernet-phy-ieee802.3-c22";
193 reg = <0>; 113 reg = <0>;
194 }; 114 };
195 }; 115 };
196 116
197 &i2c2 { 117 &i2c2 {
198 status = "okay"; 118 status = "okay";
199 clock-frequency = <400000>; 119 clock-frequency = <400000>;
200 120
201 pinctrl-names = "default"; 121 pinctrl-names = "default";
202 pinctrl-0 = <&i2c2_pins>; 122 pinctrl-0 = <&i2c2_pins>;
203 123
204 eeprom@50 { 124 eeprom@50 {
205 compatible = "renesas,r1ex2412 125 compatible = "renesas,r1ex24128", "atmel,24c128";
206 reg = <0x50>; 126 reg = <0x50>;
207 pagesize = <64>; 127 pagesize = <64>;
208 }; 128 };
209 }; 129 };
210 130
211 &rtc { 131 &rtc {
212 status = "okay"; 132 status = "okay";
213 }; 133 };
214 134
215 &scif2 { 135 &scif2 {
216 pinctrl-names = "default"; 136 pinctrl-names = "default";
217 pinctrl-0 = <&scif2_pins>; 137 pinctrl-0 = <&scif2_pins>;
218 138
219 status = "okay"; 139 status = "okay";
220 }; 140 };
221 141
222 &spi4 { 142 &spi4 {
223 status = "okay"; 143 status = "okay";
224 144
225 codec: codec@0 { 145 codec: codec@0 {
226 compatible = "wlf,wm8978"; 146 compatible = "wlf,wm8978";
227 reg = <0>; 147 reg = <0>;
228 spi-max-frequency = <5000000>; 148 spi-max-frequency = <5000000>;
229 }; 149 };
230 }; 150 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.