1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Device Tree Source for the GR-Peach board 4 * 5 * Copyright (C) 2017 Jacopo Mondi <jacopo+rene 6 * Copyright (C) 2016 Renesas Electronics 7 */ 8 9 /dts-v1/; 10 #include "r7s72100.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/pinctrl/r7s72100-pinctrl 13 14 / { 15 model = "GR-Peach"; 16 compatible = "renesas,gr-peach", "rene 17 18 aliases { 19 serial0 = &scif2; 20 }; 21 22 chosen { 23 bootargs = "ignore_loglevel rw 24 stdout-path = "serial0:115200n 25 }; 26 27 memory@20000000 { 28 device_type = "memory"; 29 reg = <0x20000000 0x00a00000>; 30 }; 31 32 flash@18000000 { 33 compatible = "mtd-rom"; 34 reg = <0x18000000 0x00800000>; 35 bank-width = <4>; 36 device-width = <1>; 37 38 clocks = <&mstp9_clks R7S72100 39 power-domains = <&cpg_clocks>; 40 41 #address-cells = <1>; 42 #size-cells = <1>; 43 44 rootfs@600000 { 45 label = "rootfs"; 46 reg = <0x00600000 0x00 47 }; 48 }; 49 50 leds { 51 status = "okay"; 52 compatible = "gpio-leds"; 53 54 led1 { 55 gpios = <&port6 12 GPI 56 }; 57 }; 58 }; 59 60 &pinctrl { 61 scif2_pins: serial2 { 62 /* P6_2 as RxD2; P6_3 as TxD2 63 pinmux = <RZA1_PINMUX(6, 2, 7) 64 }; 65 66 ether_pins: ether { 67 /* Ethernet on Ports 1,3,5,10 68 pinmux = <RZA1_PINMUX(1, 14, 4 69 <RZA1_PINMUX(3, 0, 2) 70 <RZA1_PINMUX(3, 3, 2) 71 <RZA1_PINMUX(3, 4, 2) 72 <RZA1_PINMUX(3, 5, 2) 73 <RZA1_PINMUX(3, 6, 2) 74 <RZA1_PINMUX(5, 9, 2) 75 <RZA1_PINMUX(10, 1, 4 76 <RZA1_PINMUX(10, 2, 4 77 <RZA1_PINMUX(10, 3, 4 78 <RZA1_PINMUX(10, 4, 4 79 <RZA1_PINMUX(10, 5, 4 80 <RZA1_PINMUX(10, 6, 4 81 <RZA1_PINMUX(10, 7, 4 82 <RZA1_PINMUX(10, 8, 4 83 <RZA1_PINMUX(10, 9, 4 84 <RZA1_PINMUX(10, 10, 85 <RZA1_PINMUX(10, 11, 86 }; 87 }; 88 89 &extal_clk { 90 clock-frequency = <13333000>; 91 }; 92 93 &usb_x1_clk { 94 clock-frequency = <48000000>; 95 }; 96 97 &mtu2 { 98 status = "okay"; 99 }; 100 101 &ostm0 { 102 status = "okay"; 103 }; 104 105 &ostm1 { 106 status = "okay"; 107 }; 108 109 &scif2 { 110 pinctrl-names = "default"; 111 pinctrl-0 = <&scif2_pins>; 112 113 status = "okay"; 114 }; 115 116 ðer { 117 pinctrl-names = "default"; 118 pinctrl-0 = <ðer_pins>; 119 120 status = "okay"; 121 122 renesas,no-ether-link; 123 phy-handle = <&phy0>; 124 125 phy0: ethernet-phy@0 { 126 compatible = "ethernet-phy-id0 127 "ethernet-phy-iee 128 reg = <0>; 129 130 reset-gpios = <&port4 2 GPIO_A 131 reset-delay-us = <5>; 132 }; 133 };
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