1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the r8a7744 SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp
6 */
7
8 #include <dt-bindings/interrupt-controller/irq
9 #include <dt-bindings/interrupt-controller/arm
10 #include <dt-bindings/clock/r8a7744-cpg-mssr.h
11 #include <dt-bindings/power/r8a7744-sysc.h>
12
13 / {
14 compatible = "renesas,r8a7744";
15 #address-cells = <2>;
16 #size-cells = <2>;
17
18 /*
19 * The external audio clocks are confi
20 * clocks by default.
21 * Boards that provide audio clocks sh
22 */
23 audio_clk_a: audio_clk_a {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
27 };
28
29 audio_clk_b: audio_clk_b {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <0>;
33 };
34
35 audio_clk_c: audio_clk_c {
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <0>;
39 };
40
41 /* External CAN clock */
42 can_clk: can {
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 /* This value must be overridd
46 clock-frequency = <0>;
47 };
48
49 cpus {
50 #address-cells = <1>;
51 #size-cells = <0>;
52
53 cpu0: cpu@0 {
54 device_type = "cpu";
55 compatible = "arm,cort
56 reg = <0>;
57 clock-frequency = <150
58 clocks = <&cpg CPG_COR
59 clock-latency = <30000
60 power-domains = <&sysc
61 enable-method = "renes
62 next-level-cache = <&L
63
64 /* kHz - uV - OPPs unk
65 operating-points = <15
66 <13
67 <11
68 < 9
69 < 7
70 < 3
71 };
72
73 cpu1: cpu@1 {
74 device_type = "cpu";
75 compatible = "arm,cort
76 reg = <1>;
77 clock-frequency = <150
78 clocks = <&cpg CPG_COR
79 clock-latency = <30000
80 power-domains = <&sysc
81 enable-method = "renes
82 next-level-cache = <&L
83
84 /* kHz - uV - OPPs unk
85 operating-points = <15
86 <13
87 <11
88 < 9
89 < 7
90 < 3
91 };
92
93 L2_CA15: cache-controller-0 {
94 compatible = "cache";
95 cache-unified;
96 cache-level = <2>;
97 power-domains = <&sysc
98 };
99 };
100
101 /* External root clock */
102 extal_clk: extal {
103 compatible = "fixed-clock";
104 #clock-cells = <0>;
105 /* This value must be overridd
106 clock-frequency = <0>;
107 };
108
109 /* External PCIe clock - can be overri
110 pcie_bus_clk: pcie_bus {
111 compatible = "fixed-clock";
112 #clock-cells = <0>;
113 clock-frequency = <0>;
114 };
115
116 pmu {
117 compatible = "arm,cortex-a15-p
118 interrupts-extended = <&gic GI
119 <&gic GI
120 interrupt-affinity = <&cpu0>,
121 };
122
123 /* External SCIF clock */
124 scif_clk: scif {
125 compatible = "fixed-clock";
126 #clock-cells = <0>;
127 /* This value must be overridd
128 clock-frequency = <0>;
129 };
130
131 soc {
132 compatible = "simple-bus";
133 interrupt-parent = <&gic>;
134
135 #address-cells = <2>;
136 #size-cells = <2>;
137 ranges;
138
139 rwdt: watchdog@e6020000 {
140 compatible = "renesas,
141 "renesas,
142 reg = <0 0xe6020000 0
143 interrupts = <GIC_SPI
144 clocks = <&cpg CPG_MOD
145 power-domains = <&sysc
146 resets = <&cpg 402>;
147 status = "disabled";
148 };
149
150 gpio0: gpio@e6050000 {
151 compatible = "renesas,
152 "renesas,
153 reg = <0 0xe6050000 0
154 interrupts = <GIC_SPI
155 #gpio-cells = <2>;
156 gpio-controller;
157 gpio-ranges = <&pfc 0
158 #interrupt-cells = <2>
159 interrupt-controller;
160 clocks = <&cpg CPG_MOD
161 power-domains = <&sysc
162 resets = <&cpg 912>;
163 };
164
165 gpio1: gpio@e6051000 {
166 compatible = "renesas,
167 "renesas,
168 reg = <0 0xe6051000 0
169 interrupts = <GIC_SPI
170 #gpio-cells = <2>;
171 gpio-controller;
172 gpio-ranges = <&pfc 0
173 #interrupt-cells = <2>
174 interrupt-controller;
175 clocks = <&cpg CPG_MOD
176 power-domains = <&sysc
177 resets = <&cpg 911>;
178 };
179
180 gpio2: gpio@e6052000 {
181 compatible = "renesas,
182 "renesas,
183 reg = <0 0xe6052000 0
184 interrupts = <GIC_SPI
185 #gpio-cells = <2>;
186 gpio-controller;
187 gpio-ranges = <&pfc 0
188 #interrupt-cells = <2>
189 interrupt-controller;
190 clocks = <&cpg CPG_MOD
191 power-domains = <&sysc
192 resets = <&cpg 910>;
193 };
194
195 gpio3: gpio@e6053000 {
196 compatible = "renesas,
197 "renesas,
198 reg = <0 0xe6053000 0
199 interrupts = <GIC_SPI
200 #gpio-cells = <2>;
201 gpio-controller;
202 gpio-ranges = <&pfc 0
203 #interrupt-cells = <2>
204 interrupt-controller;
205 clocks = <&cpg CPG_MOD
206 power-domains = <&sysc
207 resets = <&cpg 909>;
208 };
209
210 gpio4: gpio@e6054000 {
211 compatible = "renesas,
212 "renesas,
213 reg = <0 0xe6054000 0
214 interrupts = <GIC_SPI
215 #gpio-cells = <2>;
216 gpio-controller;
217 gpio-ranges = <&pfc 0
218 #interrupt-cells = <2>
219 interrupt-controller;
220 clocks = <&cpg CPG_MOD
221 power-domains = <&sysc
222 resets = <&cpg 908>;
223 };
224
225 gpio5: gpio@e6055000 {
226 compatible = "renesas,
227 "renesas,
228 reg = <0 0xe6055000 0
229 interrupts = <GIC_SPI
230 #gpio-cells = <2>;
231 gpio-controller;
232 gpio-ranges = <&pfc 0
233 #interrupt-cells = <2>
234 interrupt-controller;
235 clocks = <&cpg CPG_MOD
236 power-domains = <&sysc
237 resets = <&cpg 907>;
238 };
239
240 gpio6: gpio@e6055400 {
241 compatible = "renesas,
242 "renesas,
243 reg = <0 0xe6055400 0
244 interrupts = <GIC_SPI
245 #gpio-cells = <2>;
246 gpio-controller;
247 gpio-ranges = <&pfc 0
248 #interrupt-cells = <2>
249 interrupt-controller;
250 clocks = <&cpg CPG_MOD
251 power-domains = <&sysc
252 resets = <&cpg 905>;
253 };
254
255 gpio7: gpio@e6055800 {
256 compatible = "renesas,
257 "renesas,
258 reg = <0 0xe6055800 0
259 interrupts = <GIC_SPI
260 #gpio-cells = <2>;
261 gpio-controller;
262 gpio-ranges = <&pfc 0
263 #interrupt-cells = <2>
264 interrupt-controller;
265 clocks = <&cpg CPG_MOD
266 power-domains = <&sysc
267 resets = <&cpg 904>;
268 };
269
270 pfc: pinctrl@e6060000 {
271 compatible = "renesas,
272 reg = <0 0xe6060000 0
273 };
274
275 tpu: pwm@e60f0000 {
276 compatible = "renesas,
277 reg = <0 0xe60f0000 0
278 clocks = <&cpg CPG_MOD
279 power-domains = <&sysc
280 resets = <&cpg 304>;
281 #pwm-cells = <3>;
282 status = "disabled";
283 };
284
285 cpg: clock-controller@e6150000
286 compatible = "renesas,
287 reg = <0 0xe6150000 0
288 clocks = <&extal_clk>,
289 clock-names = "extal",
290 #clock-cells = <2>;
291 #power-domain-cells =
292 #reset-cells = <1>;
293 };
294
295 apmu@e6152000 {
296 compatible = "renesas,
297 reg = <0 0xe6152000 0
298 cpus = <&cpu0>, <&cpu1
299 };
300
301 rst: reset-controller@e6160000
302 compatible = "renesas,
303 reg = <0 0xe6160000 0
304 };
305
306 sysc: system-controller@e61800
307 compatible = "renesas,
308 reg = <0 0xe6180000 0
309 #power-domain-cells =
310 };
311
312 irqc: interrupt-controller@e61
313 compatible = "renesas,
314 #interrupt-cells = <2>
315 interrupt-controller;
316 reg = <0 0xe61c0000 0
317 interrupts = <GIC_SPI
318 <GIC_SPI
319 <GIC_SPI
320 <GIC_SPI
321 <GIC_SPI
322 <GIC_SPI
323 <GIC_SPI
324 <GIC_SPI
325 <GIC_SPI
326 <GIC_SPI
327 clocks = <&cpg CPG_MOD
328 power-domains = <&sysc
329 resets = <&cpg 407>;
330 };
331
332 tmu0: timer@e61e0000 {
333 compatible = "renesas,
334 reg = <0 0xe61e0000 0
335 interrupts = <GIC_SPI
336 <GIC_SPI
337 <GIC_SPI
338 interrupt-names = "tun
339 clocks = <&cpg CPG_MOD
340 clock-names = "fck";
341 power-domains = <&sysc
342 resets = <&cpg 125>;
343 status = "disabled";
344 };
345
346 tmu1: timer@fff60000 {
347 compatible = "renesas,
348 reg = <0 0xfff60000 0
349 interrupts = <GIC_SPI
350 <GIC_SPI
351 <GIC_SPI
352 <GIC_SPI
353 interrupt-names = "tun
354 clocks = <&cpg CPG_MOD
355 clock-names = "fck";
356 power-domains = <&sysc
357 resets = <&cpg 111>;
358 status = "disabled";
359 };
360
361 tmu2: timer@fff70000 {
362 compatible = "renesas,
363 reg = <0 0xfff70000 0
364 interrupts = <GIC_SPI
365 <GIC_SPI
366 <GIC_SPI
367 <GIC_SPI
368 interrupt-names = "tun
369 clocks = <&cpg CPG_MOD
370 clock-names = "fck";
371 power-domains = <&sysc
372 resets = <&cpg 122>;
373 status = "disabled";
374 };
375
376 tmu3: timer@fff80000 {
377 compatible = "renesas,
378 reg = <0 0xfff80000 0
379 interrupts = <GIC_SPI
380 <GIC_SPI
381 <GIC_SPI
382 interrupt-names = "tun
383 clocks = <&cpg CPG_MOD
384 clock-names = "fck";
385 power-domains = <&sysc
386 resets = <&cpg 121>;
387 status = "disabled";
388 };
389
390 thermal: thermal@e61f0000 {
391 compatible = "renesas,
392 "renesas,
393 reg = <0 0xe61f0000 0
394 interrupts = <GIC_SPI
395 clocks = <&cpg CPG_MOD
396 power-domains = <&sysc
397 resets = <&cpg 522>;
398 #thermal-sensor-cells
399 };
400
401 ipmmu_sy0: iommu@e6280000 {
402 compatible = "renesas,
403 "renesas,
404 reg = <0 0xe6280000 0
405 interrupts = <GIC_SPI
406 <GIC_SPI
407 #iommu-cells = <1>;
408 status = "disabled";
409 };
410
411 ipmmu_sy1: iommu@e6290000 {
412 compatible = "renesas,
413 "renesas,
414 reg = <0 0xe6290000 0
415 interrupts = <GIC_SPI
416 #iommu-cells = <1>;
417 status = "disabled";
418 };
419
420 ipmmu_ds: iommu@e6740000 {
421 compatible = "renesas,
422 "renesas,
423 reg = <0 0xe6740000 0
424 interrupts = <GIC_SPI
425 <GIC_SPI
426 #iommu-cells = <1>;
427 status = "disabled";
428 };
429
430 ipmmu_mp: iommu@ec680000 {
431 compatible = "renesas,
432 "renesas,
433 reg = <0 0xec680000 0
434 interrupts = <GIC_SPI
435 #iommu-cells = <1>;
436 status = "disabled";
437 };
438
439 ipmmu_mx: iommu@fe951000 {
440 compatible = "renesas,
441 "renesas,
442 reg = <0 0xfe951000 0
443 interrupts = <GIC_SPI
444 <GIC_SPI
445 #iommu-cells = <1>;
446 status = "disabled";
447 };
448
449 ipmmu_gp: iommu@e62a0000 {
450 compatible = "renesas,
451 "renesas,
452 reg = <0 0xe62a0000 0
453 interrupts = <GIC_SPI
454 <GIC_SPI
455 #iommu-cells = <1>;
456 status = "disabled";
457 };
458
459 icram0: sram@e63a0000 {
460 compatible = "mmio-sra
461 reg = <0 0xe63a0000 0
462 #address-cells = <1>;
463 #size-cells = <1>;
464 ranges = <0 0 0xe63a00
465 };
466
467 icram1: sram@e63c0000 {
468 compatible = "mmio-sra
469 reg = <0 0xe63c0000 0
470 #address-cells = <1>;
471 #size-cells = <1>;
472 ranges = <0 0 0xe63c00
473
474 smp-sram@0 {
475 compatible = "
476 reg = <0 0x100
477 };
478 };
479
480 icram2: sram@e6300000 {
481 compatible = "mmio-sra
482 reg = <0 0xe6300000 0
483 #address-cells = <1>;
484 #size-cells = <1>;
485 ranges = <0 0 0xe63000
486 };
487
488 /* The memory map in the User'
489 * bus numbers
490 */
491 i2c0: i2c@e6508000 {
492 #address-cells = <1>;
493 #size-cells = <0>;
494 compatible = "renesas,
495 "renesas,
496 reg = <0 0xe6508000 0
497 interrupts = <GIC_SPI
498 clocks = <&cpg CPG_MOD
499 power-domains = <&sysc
500 resets = <&cpg 931>;
501 i2c-scl-internal-delay
502 status = "disabled";
503 };
504
505 i2c1: i2c@e6518000 {
506 #address-cells = <1>;
507 #size-cells = <0>;
508 compatible = "renesas,
509 "renesas,
510 reg = <0 0xe6518000 0
511 interrupts = <GIC_SPI
512 clocks = <&cpg CPG_MOD
513 power-domains = <&sysc
514 resets = <&cpg 930>;
515 i2c-scl-internal-delay
516 status = "disabled";
517 };
518
519 i2c2: i2c@e6530000 {
520 #address-cells = <1>;
521 #size-cells = <0>;
522 compatible = "renesas,
523 "renesas,
524 reg = <0 0xe6530000 0
525 interrupts = <GIC_SPI
526 clocks = <&cpg CPG_MOD
527 power-domains = <&sysc
528 resets = <&cpg 929>;
529 i2c-scl-internal-delay
530 status = "disabled";
531 };
532
533 i2c3: i2c@e6540000 {
534 #address-cells = <1>;
535 #size-cells = <0>;
536 compatible = "renesas,
537 "renesas,
538 reg = <0 0xe6540000 0
539 interrupts = <GIC_SPI
540 clocks = <&cpg CPG_MOD
541 power-domains = <&sysc
542 resets = <&cpg 928>;
543 i2c-scl-internal-delay
544 status = "disabled";
545 };
546
547 i2c4: i2c@e6520000 {
548 #address-cells = <1>;
549 #size-cells = <0>;
550 compatible = "renesas,
551 "renesas,
552 reg = <0 0xe6520000 0
553 interrupts = <GIC_SPI
554 clocks = <&cpg CPG_MOD
555 power-domains = <&sysc
556 resets = <&cpg 927>;
557 i2c-scl-internal-delay
558 status = "disabled";
559 };
560
561 i2c5: i2c@e6528000 {
562 /* doesn't need pinmux
563 #address-cells = <1>;
564 #size-cells = <0>;
565 compatible = "renesas,
566 "renesas,
567 reg = <0 0xe6528000 0
568 interrupts = <GIC_SPI
569 clocks = <&cpg CPG_MOD
570 power-domains = <&sysc
571 resets = <&cpg 925>;
572 i2c-scl-internal-delay
573 status = "disabled";
574 };
575
576 iic0: i2c@e6500000 {
577 #address-cells = <1>;
578 #size-cells = <0>;
579 compatible = "renesas,
580 "renesas,
581 "renesas,
582 reg = <0 0xe6500000 0
583 interrupts = <GIC_SPI
584 clocks = <&cpg CPG_MOD
585 dmas = <&dmac0 0x61>,
586 <&dmac1 0x61>,
587 dma-names = "tx", "rx"
588 power-domains = <&sysc
589 resets = <&cpg 318>;
590 status = "disabled";
591 };
592
593 iic1: i2c@e6510000 {
594 #address-cells = <1>;
595 #size-cells = <0>;
596 compatible = "renesas,
597 "renesas,
598 "renesas,
599 reg = <0 0xe6510000 0
600 interrupts = <GIC_SPI
601 clocks = <&cpg CPG_MOD
602 dmas = <&dmac0 0x65>,
603 <&dmac1 0x65>,
604 dma-names = "tx", "rx"
605 power-domains = <&sysc
606 resets = <&cpg 323>;
607 status = "disabled";
608 };
609
610 iic3: i2c@e60b0000 {
611 /* doesn't need pinmux
612 #address-cells = <1>;
613 #size-cells = <0>;
614 compatible = "renesas,
615 "renesas,
616 "renesas,
617 reg = <0 0xe60b0000 0
618 interrupts = <GIC_SPI
619 clocks = <&cpg CPG_MOD
620 dmas = <&dmac0 0x77>,
621 <&dmac1 0x77>,
622 dma-names = "tx", "rx"
623 power-domains = <&sysc
624 resets = <&cpg 926>;
625 status = "disabled";
626 };
627
628 hsusb: usb@e6590000 {
629 compatible = "renesas,
630 "renesas,
631 reg = <0 0xe6590000 0
632 interrupts = <GIC_SPI
633 clocks = <&cpg CPG_MOD
634 dmas = <&usb_dmac0 0>,
635 <&usb_dmac1 0>,
636 dma-names = "ch0", "ch
637 power-domains = <&sysc
638 resets = <&cpg 704>;
639 renesas,buswait = <4>;
640 phys = <&usb0 1>;
641 phy-names = "usb";
642 status = "disabled";
643 };
644
645 usbphy: usb-phy-controller@e65
646 compatible = "renesas,
647 "renesas,
648 reg = <0 0xe6590100 0
649 #address-cells = <1>;
650 #size-cells = <0>;
651 clocks = <&cpg CPG_MOD
652 clock-names = "usbhs";
653 power-domains = <&sysc
654 resets = <&cpg 704>;
655 status = "disabled";
656
657 usb0: usb-phy@0 {
658 reg = <0>;
659 #phy-cells = <
660 };
661 usb2: usb-phy@2 {
662 reg = <2>;
663 #phy-cells = <
664 };
665 };
666
667 usb_dmac0: dma-controller@e65a
668 compatible = "renesas,
669 "renesas,
670 reg = <0 0xe65a0000 0
671 interrupts = <GIC_SPI
672 <GIC_SPI
673 interrupt-names = "ch0
674 clocks = <&cpg CPG_MOD
675 power-domains = <&sysc
676 resets = <&cpg 330>;
677 #dma-cells = <1>;
678 dma-channels = <2>;
679 };
680
681 usb_dmac1: dma-controller@e65b
682 compatible = "renesas,
683 "renesas,
684 reg = <0 0xe65b0000 0
685 interrupts = <GIC_SPI
686 <GIC_SPI
687 interrupt-names = "ch0
688 clocks = <&cpg CPG_MOD
689 power-domains = <&sysc
690 resets = <&cpg 331>;
691 #dma-cells = <1>;
692 dma-channels = <2>;
693 };
694
695 dmac0: dma-controller@e6700000
696 compatible = "renesas,
697 "renesas,
698 reg = <0 0xe6700000 0
699 interrupts = <GIC_SPI
700 <GIC_SPI
701 <GIC_SPI
702 <GIC_SPI
703 <GIC_SPI
704 <GIC_SPI
705 <GIC_SPI
706 <GIC_SPI
707 <GIC_SPI
708 <GIC_SPI
709 <GIC_SPI
710 <GIC_SPI
711 <GIC_SPI
712 <GIC_SPI
713 <GIC_SPI
714 <GIC_SPI
715 interrupt-names = "err
716 "ch0
717 "ch4
718 "ch8
719 "ch1
720 clocks = <&cpg CPG_MOD
721 clock-names = "fck";
722 power-domains = <&sysc
723 resets = <&cpg 219>;
724 #dma-cells = <1>;
725 dma-channels = <15>;
726 };
727
728 dmac1: dma-controller@e6720000
729 compatible = "renesas,
730 "renesas,
731 reg = <0 0xe6720000 0
732 interrupts = <GIC_SPI
733 <GIC_SPI
734 <GIC_SPI
735 <GIC_SPI
736 <GIC_SPI
737 <GIC_SPI
738 <GIC_SPI
739 <GIC_SPI
740 <GIC_SPI
741 <GIC_SPI
742 <GIC_SPI
743 <GIC_SPI
744 <GIC_SPI
745 <GIC_SPI
746 <GIC_SPI
747 <GIC_SPI
748 interrupt-names = "err
749 "ch0
750 "ch4
751 "ch8
752 "ch1
753 clocks = <&cpg CPG_MOD
754 clock-names = "fck";
755 power-domains = <&sysc
756 resets = <&cpg 218>;
757 #dma-cells = <1>;
758 dma-channels = <15>;
759 };
760
761 avb: ethernet@e6800000 {
762 compatible = "renesas,
763 "renesas,
764 reg = <0 0xe6800000 0
765 interrupts = <GIC_SPI
766 clocks = <&cpg CPG_MOD
767 clock-names = "fck";
768 power-domains = <&sysc
769 resets = <&cpg 812>;
770 #address-cells = <1>;
771 #size-cells = <0>;
772 status = "disabled";
773 };
774
775 qspi: spi@e6b10000 {
776 compatible = "renesas,
777 reg = <0 0xe6b10000 0
778 interrupts = <GIC_SPI
779 clocks = <&cpg CPG_MOD
780 dmas = <&dmac0 0x17>,
781 <&dmac1 0x17>,
782 dma-names = "tx", "rx"
783 power-domains = <&sysc
784 num-cs = <1>;
785 #address-cells = <1>;
786 #size-cells = <0>;
787 resets = <&cpg 917>;
788 status = "disabled";
789 };
790
791 scifa0: serial@e6c40000 {
792 compatible = "renesas,
793 "renesas,
794 reg = <0 0xe6c40000 0
795 interrupts = <GIC_SPI
796 clocks = <&cpg CPG_MOD
797 clock-names = "fck";
798 dmas = <&dmac0 0x21>,
799 <&dmac1 0x21>,
800 dma-names = "tx", "rx"
801 power-domains = <&sysc
802 resets = <&cpg 204>;
803 status = "disabled";
804 };
805
806 scifa1: serial@e6c50000 {
807 compatible = "renesas,
808 "renesas,
809 reg = <0 0xe6c50000 0
810 interrupts = <GIC_SPI
811 clocks = <&cpg CPG_MOD
812 clock-names = "fck";
813 dmas = <&dmac0 0x25>,
814 <&dmac1 0x25>,
815 dma-names = "tx", "rx"
816 power-domains = <&sysc
817 resets = <&cpg 203>;
818 status = "disabled";
819 };
820
821 scifa2: serial@e6c60000 {
822 compatible = "renesas,
823 "renesas,
824 reg = <0 0xe6c60000 0
825 interrupts = <GIC_SPI
826 clocks = <&cpg CPG_MOD
827 clock-names = "fck";
828 dmas = <&dmac0 0x27>,
829 <&dmac1 0x27>,
830 dma-names = "tx", "rx"
831 power-domains = <&sysc
832 resets = <&cpg 202>;
833 status = "disabled";
834 };
835
836 scifa3: serial@e6c70000 {
837 compatible = "renesas,
838 "renesas,
839 reg = <0 0xe6c70000 0
840 interrupts = <GIC_SPI
841 clocks = <&cpg CPG_MOD
842 clock-names = "fck";
843 dmas = <&dmac0 0x1b>,
844 <&dmac1 0x1b>,
845 dma-names = "tx", "rx"
846 power-domains = <&sysc
847 resets = <&cpg 1106>;
848 status = "disabled";
849 };
850
851 scifa4: serial@e6c78000 {
852 compatible = "renesas,
853 "renesas,
854 reg = <0 0xe6c78000 0
855 interrupts = <GIC_SPI
856 clocks = <&cpg CPG_MOD
857 clock-names = "fck";
858 dmas = <&dmac0 0x1f>,
859 <&dmac1 0x1f>,
860 dma-names = "tx", "rx"
861 power-domains = <&sysc
862 resets = <&cpg 1107>;
863 status = "disabled";
864 };
865
866 scifa5: serial@e6c80000 {
867 compatible = "renesas,
868 "renesas,
869 reg = <0 0xe6c80000 0
870 interrupts = <GIC_SPI
871 clocks = <&cpg CPG_MOD
872 clock-names = "fck";
873 dmas = <&dmac0 0x23>,
874 <&dmac1 0x23>,
875 dma-names = "tx", "rx"
876 power-domains = <&sysc
877 resets = <&cpg 1108>;
878 status = "disabled";
879 };
880
881 scifb0: serial@e6c20000 {
882 compatible = "renesas,
883 "renesas,
884 reg = <0 0xe6c20000 0
885 interrupts = <GIC_SPI
886 clocks = <&cpg CPG_MOD
887 clock-names = "fck";
888 dmas = <&dmac0 0x3d>,
889 <&dmac1 0x3d>,
890 dma-names = "tx", "rx"
891 power-domains = <&sysc
892 resets = <&cpg 206>;
893 status = "disabled";
894 };
895
896 scifb1: serial@e6c30000 {
897 compatible = "renesas,
898 "renesas,
899 reg = <0 0xe6c30000 0
900 interrupts = <GIC_SPI
901 clocks = <&cpg CPG_MOD
902 clock-names = "fck";
903 dmas = <&dmac0 0x19>,
904 <&dmac1 0x19>,
905 dma-names = "tx", "rx"
906 power-domains = <&sysc
907 resets = <&cpg 207>;
908 status = "disabled";
909 };
910
911 scifb2: serial@e6ce0000 {
912 compatible = "renesas,
913 "renesas,
914 reg = <0 0xe6ce0000 0
915 interrupts = <GIC_SPI
916 clocks = <&cpg CPG_MOD
917 clock-names = "fck";
918 dmas = <&dmac0 0x1d>,
919 <&dmac1 0x1d>,
920 dma-names = "tx", "rx"
921 power-domains = <&sysc
922 resets = <&cpg 216>;
923 status = "disabled";
924 };
925
926 scif0: serial@e6e60000 {
927 compatible = "renesas,
928 "renesas,
929 reg = <0 0xe6e60000 0
930 interrupts = <GIC_SPI
931 clocks = <&cpg CPG_MOD
932 <&cpg CPG_COR
933 clock-names = "fck", "
934 dmas = <&dmac0 0x29>,
935 <&dmac1 0x29>,
936 dma-names = "tx", "rx"
937 power-domains = <&sysc
938 resets = <&cpg 721>;
939 status = "disabled";
940 };
941
942 scif1: serial@e6e68000 {
943 compatible = "renesas,
944 "renesas,
945 reg = <0 0xe6e68000 0
946 interrupts = <GIC_SPI
947 clocks = <&cpg CPG_MOD
948 <&cpg CPG_COR
949 clock-names = "fck", "
950 dmas = <&dmac0 0x2d>,
951 <&dmac1 0x2d>,
952 dma-names = "tx", "rx"
953 power-domains = <&sysc
954 resets = <&cpg 720>;
955 status = "disabled";
956 };
957
958 scif2: serial@e6e58000 {
959 compatible = "renesas,
960 "renesas,
961 reg = <0 0xe6e58000 0
962 interrupts = <GIC_SPI
963 clocks = <&cpg CPG_MOD
964 <&cpg CPG_COR
965 clock-names = "fck", "
966 dmas = <&dmac0 0x2b>,
967 <&dmac1 0x2b>,
968 dma-names = "tx", "rx"
969 power-domains = <&sysc
970 resets = <&cpg 719>;
971 status = "disabled";
972 };
973
974 scif3: serial@e6ea8000 {
975 compatible = "renesas,
976 "renesas,
977 reg = <0 0xe6ea8000 0
978 interrupts = <GIC_SPI
979 clocks = <&cpg CPG_MOD
980 <&cpg CPG_COR
981 clock-names = "fck", "
982 dmas = <&dmac0 0x2f>,
983 <&dmac1 0x2f>,
984 dma-names = "tx", "rx"
985 power-domains = <&sysc
986 resets = <&cpg 718>;
987 status = "disabled";
988 };
989
990 scif4: serial@e6ee0000 {
991 compatible = "renesas,
992 "renesas,
993 reg = <0 0xe6ee0000 0
994 interrupts = <GIC_SPI
995 clocks = <&cpg CPG_MOD
996 <&cpg CPG_COR
997 clock-names = "fck", "
998 dmas = <&dmac0 0xfb>,
999 <&dmac1 0xfb>,
1000 dma-names = "tx", "rx
1001 power-domains = <&sys
1002 resets = <&cpg 715>;
1003 status = "disabled";
1004 };
1005
1006 scif5: serial@e6ee8000 {
1007 compatible = "renesas
1008 "renesas
1009 reg = <0 0xe6ee8000 0
1010 interrupts = <GIC_SPI
1011 clocks = <&cpg CPG_MO
1012 <&cpg CPG_CO
1013 clock-names = "fck",
1014 dmas = <&dmac0 0xfd>,
1015 <&dmac1 0xfd>,
1016 dma-names = "tx", "rx
1017 power-domains = <&sys
1018 resets = <&cpg 714>;
1019 status = "disabled";
1020 };
1021
1022 hscif0: serial@e62c0000 {
1023 compatible = "renesas
1024 "renesas
1025 reg = <0 0xe62c0000 0
1026 interrupts = <GIC_SPI
1027 clocks = <&cpg CPG_MO
1028 <&cpg CPG_CO
1029 clock-names = "fck",
1030 dmas = <&dmac0 0x39>,
1031 <&dmac1 0x39>,
1032 dma-names = "tx", "rx
1033 power-domains = <&sys
1034 resets = <&cpg 717>;
1035 status = "disabled";
1036 };
1037
1038 hscif1: serial@e62c8000 {
1039 compatible = "renesas
1040 "renesas
1041 reg = <0 0xe62c8000 0
1042 interrupts = <GIC_SPI
1043 clocks = <&cpg CPG_MO
1044 <&cpg CPG_CO
1045 clock-names = "fck",
1046 dmas = <&dmac0 0x4d>,
1047 <&dmac1 0x4d>,
1048 dma-names = "tx", "rx
1049 power-domains = <&sys
1050 resets = <&cpg 716>;
1051 status = "disabled";
1052 };
1053
1054 hscif2: serial@e62d0000 {
1055 compatible = "renesas
1056 "renesas
1057 reg = <0 0xe62d0000 0
1058 interrupts = <GIC_SPI
1059 clocks = <&cpg CPG_MO
1060 <&cpg CPG_CO
1061 clock-names = "fck",
1062 dmas = <&dmac0 0x3b>,
1063 <&dmac1 0x3b>,
1064 dma-names = "tx", "rx
1065 power-domains = <&sys
1066 resets = <&cpg 713>;
1067 status = "disabled";
1068 };
1069
1070 msiof0: spi@e6e20000 {
1071 compatible = "renesas
1072 "renesas
1073 reg = <0 0xe6e20000 0
1074 interrupts = <GIC_SPI
1075 clocks = <&cpg CPG_MO
1076 dmas = <&dmac0 0x51>,
1077 <&dmac1 0x51>,
1078 dma-names = "tx", "rx
1079 power-domains = <&sys
1080 #address-cells = <1>;
1081 #size-cells = <0>;
1082 resets = <&cpg 000>;
1083 status = "disabled";
1084 };
1085
1086 msiof1: spi@e6e10000 {
1087 compatible = "renesas
1088 "renesas
1089 reg = <0 0xe6e10000 0
1090 interrupts = <GIC_SPI
1091 clocks = <&cpg CPG_MO
1092 dmas = <&dmac0 0x55>,
1093 <&dmac1 0x55>,
1094 dma-names = "tx", "rx
1095 power-domains = <&sys
1096 #address-cells = <1>;
1097 #size-cells = <0>;
1098 resets = <&cpg 208>;
1099 status = "disabled";
1100 };
1101
1102 msiof2: spi@e6e00000 {
1103 compatible = "renesas
1104 "renesas
1105 reg = <0 0xe6e00000 0
1106 interrupts = <GIC_SPI
1107 clocks = <&cpg CPG_MO
1108 dmas = <&dmac0 0x41>,
1109 <&dmac1 0x41>,
1110 dma-names = "tx", "rx
1111 power-domains = <&sys
1112 #address-cells = <1>;
1113 #size-cells = <0>;
1114 resets = <&cpg 205>;
1115 status = "disabled";
1116 };
1117
1118 pwm0: pwm@e6e30000 {
1119 compatible = "renesas
1120 reg = <0 0xe6e30000 0
1121 clocks = <&cpg CPG_MO
1122 power-domains = <&sys
1123 resets = <&cpg 523>;
1124 #pwm-cells = <2>;
1125 status = "disabled";
1126 };
1127
1128 pwm1: pwm@e6e31000 {
1129 compatible = "renesas
1130 reg = <0 0xe6e31000 0
1131 clocks = <&cpg CPG_MO
1132 power-domains = <&sys
1133 resets = <&cpg 523>;
1134 #pwm-cells = <2>;
1135 status = "disabled";
1136 };
1137
1138 pwm2: pwm@e6e32000 {
1139 compatible = "renesas
1140 reg = <0 0xe6e32000 0
1141 clocks = <&cpg CPG_MO
1142 power-domains = <&sys
1143 resets = <&cpg 523>;
1144 #pwm-cells = <2>;
1145 status = "disabled";
1146 };
1147
1148 pwm3: pwm@e6e33000 {
1149 compatible = "renesas
1150 reg = <0 0xe6e33000 0
1151 clocks = <&cpg CPG_MO
1152 power-domains = <&sys
1153 resets = <&cpg 523>;
1154 #pwm-cells = <2>;
1155 status = "disabled";
1156 };
1157
1158 pwm4: pwm@e6e34000 {
1159 compatible = "renesas
1160 reg = <0 0xe6e34000 0
1161 clocks = <&cpg CPG_MO
1162 power-domains = <&sys
1163 resets = <&cpg 523>;
1164 #pwm-cells = <2>;
1165 status = "disabled";
1166 };
1167
1168 pwm5: pwm@e6e35000 {
1169 compatible = "renesas
1170 reg = <0 0xe6e35000 0
1171 clocks = <&cpg CPG_MO
1172 power-domains = <&sys
1173 resets = <&cpg 523>;
1174 #pwm-cells = <2>;
1175 status = "disabled";
1176 };
1177
1178 pwm6: pwm@e6e36000 {
1179 compatible = "renesas
1180 reg = <0 0xe6e36000 0
1181 clocks = <&cpg CPG_MO
1182 power-domains = <&sys
1183 resets = <&cpg 523>;
1184 #pwm-cells = <2>;
1185 status = "disabled";
1186 };
1187
1188 can0: can@e6e80000 {
1189 compatible = "renesas
1190 "renesas
1191 reg = <0 0xe6e80000 0
1192 interrupts = <GIC_SPI
1193 clocks = <&cpg CPG_MO
1194 <&cpg CPG_CO
1195 <&can_clk>;
1196 clock-names = "clkp1"
1197 power-domains = <&sys
1198 resets = <&cpg 916>;
1199 status = "disabled";
1200 };
1201
1202 can1: can@e6e88000 {
1203 compatible = "renesas
1204 "renesas
1205 reg = <0 0xe6e88000 0
1206 interrupts = <GIC_SPI
1207 clocks = <&cpg CPG_MO
1208 <&cpg CPG_CO
1209 <&can_clk>;
1210 clock-names = "clkp1"
1211 power-domains = <&sys
1212 resets = <&cpg 915>;
1213 status = "disabled";
1214 };
1215
1216 vin0: video@e6ef0000 {
1217 compatible = "renesas
1218 "renesas
1219 reg = <0 0xe6ef0000 0
1220 interrupts = <GIC_SPI
1221 clocks = <&cpg CPG_MO
1222 power-domains = <&sys
1223 resets = <&cpg 811>;
1224 status = "disabled";
1225 };
1226
1227 vin1: video@e6ef1000 {
1228 compatible = "renesas
1229 "renesas
1230 reg = <0 0xe6ef1000 0
1231 interrupts = <GIC_SPI
1232 clocks = <&cpg CPG_MO
1233 power-domains = <&sys
1234 resets = <&cpg 810>;
1235 status = "disabled";
1236 };
1237
1238 vin2: video@e6ef2000 {
1239 compatible = "renesas
1240 "renesas
1241 reg = <0 0xe6ef2000 0
1242 interrupts = <GIC_SPI
1243 clocks = <&cpg CPG_MO
1244 power-domains = <&sys
1245 resets = <&cpg 809>;
1246 status = "disabled";
1247 };
1248
1249 rcar_sound: sound@ec500000 {
1250 /*
1251 * #sound-dai-cells i
1252 *
1253 * Single DAI : #soun
1254 * Multi DAI : #soun
1255 */
1256 compatible = "renesas
1257 "renesas
1258 reg = <0 0xec500000 0
1259 <0 0xec5a0000 0
1260 <0 0xec540000 0
1261 <0 0xec541000 0
1262 <0 0xec740000 0
1263 reg-names = "scu", "a
1264
1265 clocks = <&cpg CPG_MO
1266 <&cpg CPG_MO
1267 <&cpg CPG_MO
1268 <&cpg CPG_MO
1269 <&cpg CPG_MO
1270 <&cpg CPG_MO
1271 <&cpg CPG_MO
1272 <&cpg CPG_MO
1273 <&cpg CPG_MO
1274 <&cpg CPG_MO
1275 <&cpg CPG_MO
1276 <&cpg CPG_MO
1277 <&cpg CPG_MO
1278 <&cpg CPG_MO
1279 <&audio_clk_
1280 <&cpg CPG_CO
1281 clock-names = "ssi-al
1282 "ssi.9"
1283 "ssi.4"
1284 "src.9"
1285 "src.4"
1286 "ctu.0"
1287 "mix.0"
1288 "dvc.0"
1289 "clk_a"
1290 power-domains = <&sys
1291 resets = <&cpg 1005>,
1292 <&cpg 1006>,
1293 <&cpg 1010>,
1294 <&cpg 1014>,
1295 reset-names = "ssi-al
1296 "ssi.9"
1297 "ssi.4"
1298 status = "disabled";
1299
1300 rcar_sound,dvc {
1301 dvc0: dvc-0 {
1302 dmas
1303 dma-n
1304 };
1305 dvc1: dvc-1 {
1306 dmas
1307 dma-n
1308 };
1309 };
1310
1311 rcar_sound,mix {
1312 mix0: mix-0 {
1313 mix1: mix-1 {
1314 };
1315
1316 rcar_sound,ctu {
1317 ctu00: ctu-0
1318 ctu01: ctu-1
1319 ctu02: ctu-2
1320 ctu03: ctu-3
1321 ctu10: ctu-4
1322 ctu11: ctu-5
1323 ctu12: ctu-6
1324 ctu13: ctu-7
1325 };
1326
1327 rcar_sound,src {
1328 src0: src-0 {
1329 inter
1330 dmas
1331 dma-n
1332 };
1333 src1: src-1 {
1334 inter
1335 dmas
1336 dma-n
1337 };
1338 src2: src-2 {
1339 inter
1340 dmas
1341 dma-n
1342 };
1343 src3: src-3 {
1344 inter
1345 dmas
1346 dma-n
1347 };
1348 src4: src-4 {
1349 inter
1350 dmas
1351 dma-n
1352 };
1353 src5: src-5 {
1354 inter
1355 dmas
1356 dma-n
1357 };
1358 src6: src-6 {
1359 inter
1360 dmas
1361 dma-n
1362 };
1363 src7: src-7 {
1364 inter
1365 dmas
1366 dma-n
1367 };
1368 src8: src-8 {
1369 inter
1370 dmas
1371 dma-n
1372 };
1373 src9: src-9 {
1374 inter
1375 dmas
1376 dma-n
1377 };
1378 };
1379
1380 rcar_sound,ssi {
1381 ssi0: ssi-0 {
1382 inter
1383 dmas
1384 dma-n
1385 };
1386 ssi1: ssi-1 {
1387 inter
1388 dmas
1389 dma-n
1390 };
1391 ssi2: ssi-2 {
1392 inter
1393 dmas
1394 dma-n
1395 };
1396 ssi3: ssi-3 {
1397 inter
1398 dmas
1399 dma-n
1400 };
1401 ssi4: ssi-4 {
1402 inter
1403 dmas
1404 dma-n
1405 };
1406 ssi5: ssi-5 {
1407 inter
1408 dmas
1409 dma-n
1410 };
1411 ssi6: ssi-6 {
1412 inter
1413 dmas
1414 dma-n
1415 };
1416 ssi7: ssi-7 {
1417 inter
1418 dmas
1419 dma-n
1420 };
1421 ssi8: ssi-8 {
1422 inter
1423 dmas
1424 dma-n
1425 };
1426 ssi9: ssi-9 {
1427 inter
1428 dmas
1429 dma-n
1430 };
1431 };
1432 };
1433
1434 audma0: dma-controller@ec7000
1435 compatible = "renesas
1436 "renesas
1437 reg = <0 0xec700000 0
1438 interrupts = <GIC_SPI
1439 <GIC_SPI
1440 <GIC_SPI
1441 <GIC_SPI
1442 <GIC_SPI
1443 <GIC_SPI
1444 <GIC_SPI
1445 <GIC_SPI
1446 <GIC_SPI
1447 <GIC_SPI
1448 <GIC_SPI
1449 <GIC_SPI
1450 <GIC_SPI
1451 <GIC_SPI
1452 interrupt-names = "er
1453 "ch
1454 "ch
1455 "ch
1456 "ch
1457 clocks = <&cpg CPG_MO
1458 clock-names = "fck";
1459 power-domains = <&sys
1460 resets = <&cpg 502>;
1461 #dma-cells = <1>;
1462 dma-channels = <13>;
1463 };
1464
1465 audma1: dma-controller@ec7200
1466 compatible = "renesas
1467 "renesas
1468 reg = <0 0xec720000 0
1469 interrupts = <GIC_SPI
1470 <GIC_SPI
1471 <GIC_SPI
1472 <GIC_SPI
1473 <GIC_SPI
1474 <GIC_SPI
1475 <GIC_SPI
1476 <GIC_SPI
1477 <GIC_SPI
1478 <GIC_SPI
1479 <GIC_SPI
1480 <GIC_SPI
1481 <GIC_SPI
1482 <GIC_SPI
1483 interrupt-names = "er
1484 "ch
1485 "ch
1486 "ch
1487 "ch
1488 clocks = <&cpg CPG_MO
1489 clock-names = "fck";
1490 power-domains = <&sys
1491 resets = <&cpg 501>;
1492 #dma-cells = <1>;
1493 dma-channels = <13>;
1494 };
1495
1496 /*
1497 * pci1 and xhci share the sa
1498 * can be active at any one t
1499 * a race condition will dete
1500 * A firmware file is needed
1501 * USB 3.0 to work properly.
1502 */
1503 xhci: usb@ee000000 {
1504 compatible = "renesas
1505 "renesas
1506 reg = <0 0xee000000 0
1507 interrupts = <GIC_SPI
1508 clocks = <&cpg CPG_MO
1509 power-domains = <&sys
1510 resets = <&cpg 328>;
1511 phys = <&usb2 1>;
1512 phy-names = "usb";
1513 status = "disabled";
1514 };
1515
1516 pci0: pci@ee090000 {
1517 compatible = "renesas
1518 "renesas
1519 device_type = "pci";
1520 reg = <0 0xee090000 0
1521 <0 0xee080000 0
1522 interrupts = <GIC_SPI
1523 clocks = <&cpg CPG_MO
1524 power-domains = <&sys
1525 resets = <&cpg 703>;
1526 status = "disabled";
1527
1528 bus-range = <0 0>;
1529 #address-cells = <3>;
1530 #size-cells = <2>;
1531 #interrupt-cells = <1
1532 ranges = <0x02000000
1533 interrupt-map-mask =
1534 interrupt-map = <0x00
1535 <0x08
1536 <0x10
1537
1538 usb@1,0 {
1539 reg = <0x800
1540 phys = <&usb0
1541 phy-names = "
1542 };
1543
1544 usb@2,0 {
1545 reg = <0x1000
1546 phys = <&usb0
1547 phy-names = "
1548 };
1549 };
1550
1551 pci1: pci@ee0d0000 {
1552 compatible = "renesas
1553 "renesas
1554 device_type = "pci";
1555 reg = <0 0xee0d0000 0
1556 <0 0xee0c0000 0
1557 interrupts = <GIC_SPI
1558 clocks = <&cpg CPG_MO
1559 power-domains = <&sys
1560 resets = <&cpg 703>;
1561 status = "disabled";
1562
1563 bus-range = <1 1>;
1564 #address-cells = <3>;
1565 #size-cells = <2>;
1566 #interrupt-cells = <1
1567 ranges = <0x02000000
1568 interrupt-map-mask =
1569 interrupt-map = <0x00
1570 <0x08
1571 <0x10
1572
1573 usb@1,0 {
1574 reg = <0x1080
1575 phys = <&usb2
1576 phy-names = "
1577 };
1578
1579 usb@2,0 {
1580 reg = <0x1100
1581 phys = <&usb2
1582 phy-names = "
1583 };
1584 };
1585
1586 sdhi0: mmc@ee100000 {
1587 compatible = "renesas
1588 "renesas
1589 reg = <0 0xee100000 0
1590 interrupts = <GIC_SPI
1591 clocks = <&cpg CPG_MO
1592 dmas = <&dmac0 0xcd>,
1593 <&dmac1 0xcd>,
1594 dma-names = "tx", "rx
1595 max-frequency = <1950
1596 power-domains = <&sys
1597 resets = <&cpg 314>;
1598 status = "disabled";
1599 };
1600
1601 sdhi1: mmc@ee140000 {
1602 compatible = "renesas
1603 "renesas
1604 reg = <0 0xee140000 0
1605 interrupts = <GIC_SPI
1606 clocks = <&cpg CPG_MO
1607 dmas = <&dmac0 0xc1>,
1608 <&dmac1 0xc1>,
1609 dma-names = "tx", "rx
1610 max-frequency = <9750
1611 power-domains = <&sys
1612 resets = <&cpg 312>;
1613 status = "disabled";
1614 };
1615
1616 sdhi2: mmc@ee160000 {
1617 compatible = "renesas
1618 "renesas
1619 reg = <0 0xee160000 0
1620 interrupts = <GIC_SPI
1621 clocks = <&cpg CPG_MO
1622 dmas = <&dmac0 0xd3>,
1623 <&dmac1 0xd3>,
1624 dma-names = "tx", "rx
1625 max-frequency = <9750
1626 power-domains = <&sys
1627 resets = <&cpg 311>;
1628 status = "disabled";
1629 };
1630
1631 mmcif0: mmc@ee200000 {
1632 compatible = "renesas
1633 "renesas
1634 reg = <0 0xee200000 0
1635 interrupts = <GIC_SPI
1636 clocks = <&cpg CPG_MO
1637 dmas = <&dmac0 0xd1>,
1638 <&dmac1 0xd1>,
1639 dma-names = "tx", "rx
1640 power-domains = <&sys
1641 resets = <&cpg 315>;
1642 reg-io-width = <4>;
1643 max-frequency = <9750
1644 status = "disabled";
1645 };
1646
1647 gic: interrupt-controller@f10
1648 compatible = "arm,gic
1649 #interrupt-cells = <3
1650 #address-cells = <0>;
1651 interrupt-controller;
1652 reg = <0 0xf1001000 0
1653 <0 0xf1004000 0
1654 interrupts = <GIC_PPI
1655 clocks = <&cpg CPG_MO
1656 clock-names = "clk";
1657 power-domains = <&sys
1658 resets = <&cpg 408>;
1659 };
1660
1661 pciec: pcie@fe000000 {
1662 compatible = "renesas
1663 "renesas
1664 reg = <0 0xfe000000 0
1665 #address-cells = <3>;
1666 #size-cells = <2>;
1667 bus-range = <0x00 0xf
1668 device_type = "pci";
1669 ranges = <0x01000000
1670 <0x02000000
1671 <0x02000000
1672 <0x42000000
1673 /* Map all possible D
1674 dma-ranges = <0x42000
1675 <0x43000
1676 interrupts = <GIC_SPI
1677 <GIC_SPI
1678 <GIC_SPI
1679 #interrupt-cells = <1
1680 interrupt-map-mask =
1681 interrupt-map = <0 0
1682 clocks = <&cpg CPG_MO
1683 clock-names = "pcie",
1684 power-domains = <&sys
1685 resets = <&cpg 319>;
1686 status = "disabled";
1687 };
1688
1689 vsp@fe928000 {
1690 compatible = "renesas
1691 reg = <0 0xfe928000 0
1692 interrupts = <GIC_SPI
1693 clocks = <&cpg CPG_MO
1694 power-domains = <&sys
1695 resets = <&cpg 131>;
1696 };
1697
1698 vsp@fe930000 {
1699 compatible = "renesas
1700 reg = <0 0xfe930000 0
1701 interrupts = <GIC_SPI
1702 clocks = <&cpg CPG_MO
1703 power-domains = <&sys
1704 resets = <&cpg 128>;
1705 };
1706
1707 vsp@fe938000 {
1708 compatible = "renesas
1709 reg = <0 0xfe938000 0
1710 interrupts = <GIC_SPI
1711 clocks = <&cpg CPG_MO
1712 power-domains = <&sys
1713 resets = <&cpg 127>;
1714 };
1715
1716 du: display@feb00000 {
1717 compatible = "renesas
1718 reg = <0 0xfeb00000 0
1719 interrupts = <GIC_SPI
1720 <GIC_SPI
1721 clocks = <&cpg CPG_MO
1722 clock-names = "du.0",
1723 resets = <&cpg 724>;
1724 reset-names = "du.0";
1725 status = "disabled";
1726
1727 ports {
1728 #address-cell
1729 #size-cells =
1730
1731 port@0 {
1732 reg =
1733 du_ou
1734 };
1735 };
1736 port@1 {
1737 reg =
1738 du_ou
1739
1740 };
1741 };
1742 };
1743 };
1744
1745 lvds0: lvds@feb90000 {
1746 compatible = "renesas
1747 reg = <0 0xfeb90000 0
1748 clocks = <&cpg CPG_MO
1749 power-domains = <&sys
1750 resets = <&cpg 726>;
1751 status = "disabled";
1752
1753 ports {
1754 #address-cell
1755 #size-cells =
1756
1757 port@0 {
1758 reg =
1759 lvds0
1760
1761 };
1762 };
1763 port@1 {
1764 reg =
1765 lvds0
1766 };
1767 };
1768 };
1769 };
1770
1771 prr: chipid@ff000044 {
1772 compatible = "renesas
1773 reg = <0 0xff000044 0
1774 };
1775
1776 cmt0: timer@ffca0000 {
1777 compatible = "renesas
1778 "renesas
1779 reg = <0 0xffca0000 0
1780 interrupts = <GIC_SPI
1781 <GIC_SPI
1782 clocks = <&cpg CPG_MO
1783 clock-names = "fck";
1784 power-domains = <&sys
1785 resets = <&cpg 124>;
1786 status = "disabled";
1787 };
1788
1789 cmt1: timer@e6130000 {
1790 compatible = "renesas
1791 "renesas
1792 reg = <0 0xe6130000 0
1793 interrupts = <GIC_SPI
1794 <GIC_SPI
1795 <GIC_SPI
1796 <GIC_SPI
1797 <GIC_SPI
1798 <GIC_SPI
1799 <GIC_SPI
1800 <GIC_SPI
1801 clocks = <&cpg CPG_MO
1802 clock-names = "fck";
1803 power-domains = <&sys
1804 resets = <&cpg 329>;
1805 status = "disabled";
1806 };
1807 };
1808
1809 thermal-zones {
1810 cpu_thermal: cpu-thermal {
1811 polling-delay-passive
1812 polling-delay = <0>;
1813
1814 thermal-sensors = <&t
1815
1816 trips {
1817 cpu-crit {
1818 tempe
1819 hyste
1820 type
1821 };
1822 };
1823
1824 cooling-maps {
1825 };
1826 };
1827 };
1828
1829 timer {
1830 compatible = "arm,armv7-timer
1831 interrupts-extended = <&gic G
1832 <&gic G
1833 <&gic G
1834 <&gic G
1835 interrupt-names = "sec-phys",
1836 };
1837
1838 /* External USB clock - can be overri
1839 usb_extal_clk: usb_extal {
1840 compatible = "fixed-clock";
1841 #clock-cells = <0>;
1842 clock-frequency = <48000000>;
1843 };
1844 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.