1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for the r8a7744 SoC 3 * Device Tree Source for the r8a7744 SoC
4 * 4 *
5 * Copyright (C) 2018 Renesas Electronics Corp 5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */ 6 */
7 7
8 #include <dt-bindings/interrupt-controller/irq 8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm 9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a7744-cpg-mssr.h 10 #include <dt-bindings/clock/r8a7744-cpg-mssr.h>
11 #include <dt-bindings/power/r8a7744-sysc.h> 11 #include <dt-bindings/power/r8a7744-sysc.h>
12 12
13 / { 13 / {
14 compatible = "renesas,r8a7744"; 14 compatible = "renesas,r8a7744";
15 #address-cells = <2>; 15 #address-cells = <2>;
16 #size-cells = <2>; 16 #size-cells = <2>;
17 17
18 /* 18 /*
19 * The external audio clocks are confi 19 * The external audio clocks are configured as 0 Hz fixed frequency
20 * clocks by default. 20 * clocks by default.
21 * Boards that provide audio clocks sh 21 * Boards that provide audio clocks should override them.
22 */ 22 */
23 audio_clk_a: audio_clk_a { 23 audio_clk_a: audio_clk_a {
24 compatible = "fixed-clock"; 24 compatible = "fixed-clock";
25 #clock-cells = <0>; 25 #clock-cells = <0>;
26 clock-frequency = <0>; 26 clock-frequency = <0>;
27 }; 27 };
28 28
29 audio_clk_b: audio_clk_b { 29 audio_clk_b: audio_clk_b {
30 compatible = "fixed-clock"; 30 compatible = "fixed-clock";
31 #clock-cells = <0>; 31 #clock-cells = <0>;
32 clock-frequency = <0>; 32 clock-frequency = <0>;
33 }; 33 };
34 34
35 audio_clk_c: audio_clk_c { 35 audio_clk_c: audio_clk_c {
36 compatible = "fixed-clock"; 36 compatible = "fixed-clock";
37 #clock-cells = <0>; 37 #clock-cells = <0>;
38 clock-frequency = <0>; 38 clock-frequency = <0>;
39 }; 39 };
40 40
41 /* External CAN clock */ 41 /* External CAN clock */
42 can_clk: can { 42 can_clk: can {
43 compatible = "fixed-clock"; 43 compatible = "fixed-clock";
44 #clock-cells = <0>; 44 #clock-cells = <0>;
45 /* This value must be overridd 45 /* This value must be overridden by the board. */
46 clock-frequency = <0>; 46 clock-frequency = <0>;
47 }; 47 };
48 48
49 cpus { 49 cpus {
50 #address-cells = <1>; 50 #address-cells = <1>;
51 #size-cells = <0>; 51 #size-cells = <0>;
52 52
53 cpu0: cpu@0 { 53 cpu0: cpu@0 {
54 device_type = "cpu"; 54 device_type = "cpu";
55 compatible = "arm,cort 55 compatible = "arm,cortex-a15";
56 reg = <0>; 56 reg = <0>;
57 clock-frequency = <150 57 clock-frequency = <1500000000>;
58 clocks = <&cpg CPG_COR 58 clocks = <&cpg CPG_CORE R8A7744_CLK_Z>;
59 clock-latency = <30000 59 clock-latency = <300000>; /* 300 us */
60 power-domains = <&sysc 60 power-domains = <&sysc R8A7744_PD_CA15_CPU0>;
61 enable-method = "renes 61 enable-method = "renesas,apmu";
62 next-level-cache = <&L 62 next-level-cache = <&L2_CA15>;
63 63
64 /* kHz - uV - OPPs unk 64 /* kHz - uV - OPPs unknown yet */
65 operating-points = <15 65 operating-points = <1500000 1000000>,
66 <13 66 <1312500 1000000>,
67 <11 67 <1125000 1000000>,
68 < 9 68 < 937500 1000000>,
69 < 7 69 < 750000 1000000>,
70 < 3 70 < 375000 1000000>;
71 }; 71 };
72 72
73 cpu1: cpu@1 { 73 cpu1: cpu@1 {
74 device_type = "cpu"; 74 device_type = "cpu";
75 compatible = "arm,cort 75 compatible = "arm,cortex-a15";
76 reg = <1>; 76 reg = <1>;
77 clock-frequency = <150 77 clock-frequency = <1500000000>;
78 clocks = <&cpg CPG_COR 78 clocks = <&cpg CPG_CORE R8A7744_CLK_Z>;
79 clock-latency = <30000 79 clock-latency = <300000>; /* 300 us */
80 power-domains = <&sysc 80 power-domains = <&sysc R8A7744_PD_CA15_CPU1>;
81 enable-method = "renes 81 enable-method = "renesas,apmu";
82 next-level-cache = <&L 82 next-level-cache = <&L2_CA15>;
83 83
84 /* kHz - uV - OPPs unk 84 /* kHz - uV - OPPs unknown yet */
85 operating-points = <15 85 operating-points = <1500000 1000000>,
86 <13 86 <1312500 1000000>,
87 <11 87 <1125000 1000000>,
88 < 9 88 < 937500 1000000>,
89 < 7 89 < 750000 1000000>,
90 < 3 90 < 375000 1000000>;
91 }; 91 };
92 92
93 L2_CA15: cache-controller-0 { 93 L2_CA15: cache-controller-0 {
94 compatible = "cache"; 94 compatible = "cache";
95 cache-unified; 95 cache-unified;
96 cache-level = <2>; 96 cache-level = <2>;
97 power-domains = <&sysc 97 power-domains = <&sysc R8A7744_PD_CA15_SCU>;
98 }; 98 };
99 }; 99 };
100 100
101 /* External root clock */ 101 /* External root clock */
102 extal_clk: extal { 102 extal_clk: extal {
103 compatible = "fixed-clock"; 103 compatible = "fixed-clock";
104 #clock-cells = <0>; 104 #clock-cells = <0>;
105 /* This value must be overridd 105 /* This value must be overridden by the board. */
106 clock-frequency = <0>; 106 clock-frequency = <0>;
107 }; 107 };
108 108
109 /* External PCIe clock - can be overri 109 /* External PCIe clock - can be overridden by the board */
110 pcie_bus_clk: pcie_bus { 110 pcie_bus_clk: pcie_bus {
111 compatible = "fixed-clock"; 111 compatible = "fixed-clock";
112 #clock-cells = <0>; 112 #clock-cells = <0>;
113 clock-frequency = <0>; 113 clock-frequency = <0>;
114 }; 114 };
115 115
116 pmu { 116 pmu {
117 compatible = "arm,cortex-a15-p 117 compatible = "arm,cortex-a15-pmu";
118 interrupts-extended = <&gic GI 118 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
119 <&gic GI 119 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
120 interrupt-affinity = <&cpu0>, 120 interrupt-affinity = <&cpu0>, <&cpu1>;
121 }; 121 };
122 122
123 /* External SCIF clock */ 123 /* External SCIF clock */
124 scif_clk: scif { 124 scif_clk: scif {
125 compatible = "fixed-clock"; 125 compatible = "fixed-clock";
126 #clock-cells = <0>; 126 #clock-cells = <0>;
127 /* This value must be overridd 127 /* This value must be overridden by the board. */
128 clock-frequency = <0>; 128 clock-frequency = <0>;
129 }; 129 };
130 130
131 soc { 131 soc {
132 compatible = "simple-bus"; 132 compatible = "simple-bus";
133 interrupt-parent = <&gic>; 133 interrupt-parent = <&gic>;
134 134
135 #address-cells = <2>; 135 #address-cells = <2>;
136 #size-cells = <2>; 136 #size-cells = <2>;
137 ranges; 137 ranges;
138 138
139 rwdt: watchdog@e6020000 { 139 rwdt: watchdog@e6020000 {
140 compatible = "renesas, 140 compatible = "renesas,r8a7744-wdt",
141 "renesas, 141 "renesas,rcar-gen2-wdt";
142 reg = <0 0xe6020000 0 142 reg = <0 0xe6020000 0 0x0c>;
143 interrupts = <GIC_SPI 143 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
144 clocks = <&cpg CPG_MOD 144 clocks = <&cpg CPG_MOD 402>;
145 power-domains = <&sysc 145 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
146 resets = <&cpg 402>; 146 resets = <&cpg 402>;
147 status = "disabled"; 147 status = "disabled";
148 }; 148 };
149 149
150 gpio0: gpio@e6050000 { 150 gpio0: gpio@e6050000 {
151 compatible = "renesas, 151 compatible = "renesas,gpio-r8a7744",
152 "renesas, 152 "renesas,rcar-gen2-gpio";
153 reg = <0 0xe6050000 0 153 reg = <0 0xe6050000 0 0x50>;
154 interrupts = <GIC_SPI 154 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
155 #gpio-cells = <2>; 155 #gpio-cells = <2>;
156 gpio-controller; 156 gpio-controller;
157 gpio-ranges = <&pfc 0 157 gpio-ranges = <&pfc 0 0 32>;
158 #interrupt-cells = <2> 158 #interrupt-cells = <2>;
159 interrupt-controller; 159 interrupt-controller;
160 clocks = <&cpg CPG_MOD 160 clocks = <&cpg CPG_MOD 912>;
161 power-domains = <&sysc 161 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
162 resets = <&cpg 912>; 162 resets = <&cpg 912>;
163 }; 163 };
164 164
165 gpio1: gpio@e6051000 { 165 gpio1: gpio@e6051000 {
166 compatible = "renesas, 166 compatible = "renesas,gpio-r8a7744",
167 "renesas, 167 "renesas,rcar-gen2-gpio";
168 reg = <0 0xe6051000 0 168 reg = <0 0xe6051000 0 0x50>;
169 interrupts = <GIC_SPI 169 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
170 #gpio-cells = <2>; 170 #gpio-cells = <2>;
171 gpio-controller; 171 gpio-controller;
172 gpio-ranges = <&pfc 0 172 gpio-ranges = <&pfc 0 32 26>;
173 #interrupt-cells = <2> 173 #interrupt-cells = <2>;
174 interrupt-controller; 174 interrupt-controller;
175 clocks = <&cpg CPG_MOD 175 clocks = <&cpg CPG_MOD 911>;
176 power-domains = <&sysc 176 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
177 resets = <&cpg 911>; 177 resets = <&cpg 911>;
178 }; 178 };
179 179
180 gpio2: gpio@e6052000 { 180 gpio2: gpio@e6052000 {
181 compatible = "renesas, 181 compatible = "renesas,gpio-r8a7744",
182 "renesas, 182 "renesas,rcar-gen2-gpio";
183 reg = <0 0xe6052000 0 183 reg = <0 0xe6052000 0 0x50>;
184 interrupts = <GIC_SPI 184 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
185 #gpio-cells = <2>; 185 #gpio-cells = <2>;
186 gpio-controller; 186 gpio-controller;
187 gpio-ranges = <&pfc 0 187 gpio-ranges = <&pfc 0 64 32>;
188 #interrupt-cells = <2> 188 #interrupt-cells = <2>;
189 interrupt-controller; 189 interrupt-controller;
190 clocks = <&cpg CPG_MOD 190 clocks = <&cpg CPG_MOD 910>;
191 power-domains = <&sysc 191 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
192 resets = <&cpg 910>; 192 resets = <&cpg 910>;
193 }; 193 };
194 194
195 gpio3: gpio@e6053000 { 195 gpio3: gpio@e6053000 {
196 compatible = "renesas, 196 compatible = "renesas,gpio-r8a7744",
197 "renesas, 197 "renesas,rcar-gen2-gpio";
198 reg = <0 0xe6053000 0 198 reg = <0 0xe6053000 0 0x50>;
199 interrupts = <GIC_SPI 199 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
200 #gpio-cells = <2>; 200 #gpio-cells = <2>;
201 gpio-controller; 201 gpio-controller;
202 gpio-ranges = <&pfc 0 202 gpio-ranges = <&pfc 0 96 32>;
203 #interrupt-cells = <2> 203 #interrupt-cells = <2>;
204 interrupt-controller; 204 interrupt-controller;
205 clocks = <&cpg CPG_MOD 205 clocks = <&cpg CPG_MOD 909>;
206 power-domains = <&sysc 206 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
207 resets = <&cpg 909>; 207 resets = <&cpg 909>;
208 }; 208 };
209 209
210 gpio4: gpio@e6054000 { 210 gpio4: gpio@e6054000 {
211 compatible = "renesas, 211 compatible = "renesas,gpio-r8a7744",
212 "renesas, 212 "renesas,rcar-gen2-gpio";
213 reg = <0 0xe6054000 0 213 reg = <0 0xe6054000 0 0x50>;
214 interrupts = <GIC_SPI 214 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
215 #gpio-cells = <2>; 215 #gpio-cells = <2>;
216 gpio-controller; 216 gpio-controller;
217 gpio-ranges = <&pfc 0 217 gpio-ranges = <&pfc 0 128 32>;
218 #interrupt-cells = <2> 218 #interrupt-cells = <2>;
219 interrupt-controller; 219 interrupt-controller;
220 clocks = <&cpg CPG_MOD 220 clocks = <&cpg CPG_MOD 908>;
221 power-domains = <&sysc 221 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
222 resets = <&cpg 908>; 222 resets = <&cpg 908>;
223 }; 223 };
224 224
225 gpio5: gpio@e6055000 { 225 gpio5: gpio@e6055000 {
226 compatible = "renesas, 226 compatible = "renesas,gpio-r8a7744",
227 "renesas, 227 "renesas,rcar-gen2-gpio";
228 reg = <0 0xe6055000 0 228 reg = <0 0xe6055000 0 0x50>;
229 interrupts = <GIC_SPI 229 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
230 #gpio-cells = <2>; 230 #gpio-cells = <2>;
231 gpio-controller; 231 gpio-controller;
232 gpio-ranges = <&pfc 0 232 gpio-ranges = <&pfc 0 160 32>;
233 #interrupt-cells = <2> 233 #interrupt-cells = <2>;
234 interrupt-controller; 234 interrupt-controller;
235 clocks = <&cpg CPG_MOD 235 clocks = <&cpg CPG_MOD 907>;
236 power-domains = <&sysc 236 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
237 resets = <&cpg 907>; 237 resets = <&cpg 907>;
238 }; 238 };
239 239
240 gpio6: gpio@e6055400 { 240 gpio6: gpio@e6055400 {
241 compatible = "renesas, 241 compatible = "renesas,gpio-r8a7744",
242 "renesas, 242 "renesas,rcar-gen2-gpio";
243 reg = <0 0xe6055400 0 243 reg = <0 0xe6055400 0 0x50>;
244 interrupts = <GIC_SPI 244 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
245 #gpio-cells = <2>; 245 #gpio-cells = <2>;
246 gpio-controller; 246 gpio-controller;
247 gpio-ranges = <&pfc 0 247 gpio-ranges = <&pfc 0 192 32>;
248 #interrupt-cells = <2> 248 #interrupt-cells = <2>;
249 interrupt-controller; 249 interrupt-controller;
250 clocks = <&cpg CPG_MOD 250 clocks = <&cpg CPG_MOD 905>;
251 power-domains = <&sysc 251 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
252 resets = <&cpg 905>; 252 resets = <&cpg 905>;
253 }; 253 };
254 254
255 gpio7: gpio@e6055800 { 255 gpio7: gpio@e6055800 {
256 compatible = "renesas, 256 compatible = "renesas,gpio-r8a7744",
257 "renesas, 257 "renesas,rcar-gen2-gpio";
258 reg = <0 0xe6055800 0 258 reg = <0 0xe6055800 0 0x50>;
259 interrupts = <GIC_SPI 259 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
260 #gpio-cells = <2>; 260 #gpio-cells = <2>;
261 gpio-controller; 261 gpio-controller;
262 gpio-ranges = <&pfc 0 262 gpio-ranges = <&pfc 0 224 26>;
263 #interrupt-cells = <2> 263 #interrupt-cells = <2>;
264 interrupt-controller; 264 interrupt-controller;
265 clocks = <&cpg CPG_MOD 265 clocks = <&cpg CPG_MOD 904>;
266 power-domains = <&sysc 266 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
267 resets = <&cpg 904>; 267 resets = <&cpg 904>;
268 }; 268 };
269 269
270 pfc: pinctrl@e6060000 { 270 pfc: pinctrl@e6060000 {
271 compatible = "renesas, 271 compatible = "renesas,pfc-r8a7744";
272 reg = <0 0xe6060000 0 272 reg = <0 0xe6060000 0 0x250>;
273 }; 273 };
274 274
275 tpu: pwm@e60f0000 { 275 tpu: pwm@e60f0000 {
276 compatible = "renesas, 276 compatible = "renesas,tpu-r8a7744", "renesas,tpu";
277 reg = <0 0xe60f0000 0 277 reg = <0 0xe60f0000 0 0x148>;
278 clocks = <&cpg CPG_MOD 278 clocks = <&cpg CPG_MOD 304>;
279 power-domains = <&sysc 279 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
280 resets = <&cpg 304>; 280 resets = <&cpg 304>;
281 #pwm-cells = <3>; 281 #pwm-cells = <3>;
282 status = "disabled"; 282 status = "disabled";
283 }; 283 };
284 284
285 cpg: clock-controller@e6150000 285 cpg: clock-controller@e6150000 {
286 compatible = "renesas, 286 compatible = "renesas,r8a7744-cpg-mssr";
287 reg = <0 0xe6150000 0 287 reg = <0 0xe6150000 0 0x1000>;
288 clocks = <&extal_clk>, 288 clocks = <&extal_clk>, <&usb_extal_clk>;
289 clock-names = "extal", 289 clock-names = "extal", "usb_extal";
290 #clock-cells = <2>; 290 #clock-cells = <2>;
291 #power-domain-cells = 291 #power-domain-cells = <0>;
292 #reset-cells = <1>; 292 #reset-cells = <1>;
293 }; 293 };
294 294
295 apmu@e6152000 { 295 apmu@e6152000 {
296 compatible = "renesas, 296 compatible = "renesas,r8a7744-apmu", "renesas,apmu";
297 reg = <0 0xe6152000 0 297 reg = <0 0xe6152000 0 0x188>;
298 cpus = <&cpu0>, <&cpu1 298 cpus = <&cpu0>, <&cpu1>;
299 }; 299 };
300 300
301 rst: reset-controller@e6160000 301 rst: reset-controller@e6160000 {
302 compatible = "renesas, 302 compatible = "renesas,r8a7744-rst";
303 reg = <0 0xe6160000 0 303 reg = <0 0xe6160000 0 0x100>;
304 }; 304 };
305 305
306 sysc: system-controller@e61800 306 sysc: system-controller@e6180000 {
307 compatible = "renesas, 307 compatible = "renesas,r8a7744-sysc";
308 reg = <0 0xe6180000 0 308 reg = <0 0xe6180000 0 0x200>;
309 #power-domain-cells = 309 #power-domain-cells = <1>;
310 }; 310 };
311 311
312 irqc: interrupt-controller@e61 312 irqc: interrupt-controller@e61c0000 {
313 compatible = "renesas, 313 compatible = "renesas,irqc-r8a7744", "renesas,irqc";
314 #interrupt-cells = <2> 314 #interrupt-cells = <2>;
315 interrupt-controller; 315 interrupt-controller;
316 reg = <0 0xe61c0000 0 316 reg = <0 0xe61c0000 0 0x200>;
317 interrupts = <GIC_SPI 317 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
318 <GIC_SPI 318 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
319 <GIC_SPI 319 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
320 <GIC_SPI 320 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
321 <GIC_SPI 321 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
322 <GIC_SPI 322 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
323 <GIC_SPI 323 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
324 <GIC_SPI 324 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
325 <GIC_SPI 325 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
326 <GIC_SPI 326 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
327 clocks = <&cpg CPG_MOD 327 clocks = <&cpg CPG_MOD 407>;
328 power-domains = <&sysc 328 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
329 resets = <&cpg 407>; 329 resets = <&cpg 407>;
330 }; 330 };
331 331
332 tmu0: timer@e61e0000 { <<
333 compatible = "renesas, <<
334 reg = <0 0xe61e0000 0 <<
335 interrupts = <GIC_SPI <<
336 <GIC_SPI <<
337 <GIC_SPI <<
338 interrupt-names = "tun <<
339 clocks = <&cpg CPG_MOD <<
340 clock-names = "fck"; <<
341 power-domains = <&sysc <<
342 resets = <&cpg 125>; <<
343 status = "disabled"; <<
344 }; <<
345 <<
346 tmu1: timer@fff60000 { <<
347 compatible = "renesas, <<
348 reg = <0 0xfff60000 0 <<
349 interrupts = <GIC_SPI <<
350 <GIC_SPI <<
351 <GIC_SPI <<
352 <GIC_SPI <<
353 interrupt-names = "tun <<
354 clocks = <&cpg CPG_MOD <<
355 clock-names = "fck"; <<
356 power-domains = <&sysc <<
357 resets = <&cpg 111>; <<
358 status = "disabled"; <<
359 }; <<
360 <<
361 tmu2: timer@fff70000 { <<
362 compatible = "renesas, <<
363 reg = <0 0xfff70000 0 <<
364 interrupts = <GIC_SPI <<
365 <GIC_SPI <<
366 <GIC_SPI <<
367 <GIC_SPI <<
368 interrupt-names = "tun <<
369 clocks = <&cpg CPG_MOD <<
370 clock-names = "fck"; <<
371 power-domains = <&sysc <<
372 resets = <&cpg 122>; <<
373 status = "disabled"; <<
374 }; <<
375 <<
376 tmu3: timer@fff80000 { <<
377 compatible = "renesas, <<
378 reg = <0 0xfff80000 0 <<
379 interrupts = <GIC_SPI <<
380 <GIC_SPI <<
381 <GIC_SPI <<
382 interrupt-names = "tun <<
383 clocks = <&cpg CPG_MOD <<
384 clock-names = "fck"; <<
385 power-domains = <&sysc <<
386 resets = <&cpg 121>; <<
387 status = "disabled"; <<
388 }; <<
389 <<
390 thermal: thermal@e61f0000 { 332 thermal: thermal@e61f0000 {
391 compatible = "renesas, 333 compatible = "renesas,thermal-r8a7744",
392 "renesas, 334 "renesas,rcar-gen2-thermal";
393 reg = <0 0xe61f0000 0 335 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
394 interrupts = <GIC_SPI 336 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
395 clocks = <&cpg CPG_MOD 337 clocks = <&cpg CPG_MOD 522>;
396 power-domains = <&sysc 338 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
397 resets = <&cpg 522>; 339 resets = <&cpg 522>;
398 #thermal-sensor-cells 340 #thermal-sensor-cells = <0>;
399 }; 341 };
400 342
401 ipmmu_sy0: iommu@e6280000 { 343 ipmmu_sy0: iommu@e6280000 {
402 compatible = "renesas, 344 compatible = "renesas,ipmmu-r8a7744",
403 "renesas, 345 "renesas,ipmmu-vmsa";
404 reg = <0 0xe6280000 0 346 reg = <0 0xe6280000 0 0x1000>;
405 interrupts = <GIC_SPI 347 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
406 <GIC_SPI 348 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
407 #iommu-cells = <1>; 349 #iommu-cells = <1>;
408 status = "disabled"; 350 status = "disabled";
409 }; 351 };
410 352
411 ipmmu_sy1: iommu@e6290000 { 353 ipmmu_sy1: iommu@e6290000 {
412 compatible = "renesas, 354 compatible = "renesas,ipmmu-r8a7744",
413 "renesas, 355 "renesas,ipmmu-vmsa";
414 reg = <0 0xe6290000 0 356 reg = <0 0xe6290000 0 0x1000>;
415 interrupts = <GIC_SPI 357 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
416 #iommu-cells = <1>; 358 #iommu-cells = <1>;
417 status = "disabled"; 359 status = "disabled";
418 }; 360 };
419 361
420 ipmmu_ds: iommu@e6740000 { 362 ipmmu_ds: iommu@e6740000 {
421 compatible = "renesas, 363 compatible = "renesas,ipmmu-r8a7744",
422 "renesas, 364 "renesas,ipmmu-vmsa";
423 reg = <0 0xe6740000 0 365 reg = <0 0xe6740000 0 0x1000>;
424 interrupts = <GIC_SPI 366 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
425 <GIC_SPI 367 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
426 #iommu-cells = <1>; 368 #iommu-cells = <1>;
427 status = "disabled"; 369 status = "disabled";
428 }; 370 };
429 371
430 ipmmu_mp: iommu@ec680000 { 372 ipmmu_mp: iommu@ec680000 {
431 compatible = "renesas, 373 compatible = "renesas,ipmmu-r8a7744",
432 "renesas, 374 "renesas,ipmmu-vmsa";
433 reg = <0 0xec680000 0 375 reg = <0 0xec680000 0 0x1000>;
434 interrupts = <GIC_SPI 376 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
435 #iommu-cells = <1>; 377 #iommu-cells = <1>;
436 status = "disabled"; 378 status = "disabled";
437 }; 379 };
438 380
439 ipmmu_mx: iommu@fe951000 { 381 ipmmu_mx: iommu@fe951000 {
440 compatible = "renesas, 382 compatible = "renesas,ipmmu-r8a7744",
441 "renesas, 383 "renesas,ipmmu-vmsa";
442 reg = <0 0xfe951000 0 384 reg = <0 0xfe951000 0 0x1000>;
443 interrupts = <GIC_SPI 385 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
444 <GIC_SPI 386 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
445 #iommu-cells = <1>; 387 #iommu-cells = <1>;
446 status = "disabled"; 388 status = "disabled";
447 }; 389 };
448 390
449 ipmmu_gp: iommu@e62a0000 { 391 ipmmu_gp: iommu@e62a0000 {
450 compatible = "renesas, 392 compatible = "renesas,ipmmu-r8a7744",
451 "renesas, 393 "renesas,ipmmu-vmsa";
452 reg = <0 0xe62a0000 0 394 reg = <0 0xe62a0000 0 0x1000>;
453 interrupts = <GIC_SPI 395 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
454 <GIC_SPI 396 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
455 #iommu-cells = <1>; 397 #iommu-cells = <1>;
456 status = "disabled"; 398 status = "disabled";
457 }; 399 };
458 400
459 icram0: sram@e63a0000 { 401 icram0: sram@e63a0000 {
460 compatible = "mmio-sra 402 compatible = "mmio-sram";
461 reg = <0 0xe63a0000 0 403 reg = <0 0xe63a0000 0 0x12000>;
462 #address-cells = <1>; 404 #address-cells = <1>;
463 #size-cells = <1>; 405 #size-cells = <1>;
464 ranges = <0 0 0xe63a00 406 ranges = <0 0 0xe63a0000 0x12000>;
465 }; 407 };
466 408
467 icram1: sram@e63c0000 { 409 icram1: sram@e63c0000 {
468 compatible = "mmio-sra 410 compatible = "mmio-sram";
469 reg = <0 0xe63c0000 0 411 reg = <0 0xe63c0000 0 0x1000>;
470 #address-cells = <1>; 412 #address-cells = <1>;
471 #size-cells = <1>; 413 #size-cells = <1>;
472 ranges = <0 0 0xe63c00 414 ranges = <0 0 0xe63c0000 0x1000>;
473 415
474 smp-sram@0 { 416 smp-sram@0 {
475 compatible = " 417 compatible = "renesas,smp-sram";
476 reg = <0 0x100 418 reg = <0 0x100>;
477 }; 419 };
478 }; 420 };
479 421
480 icram2: sram@e6300000 { 422 icram2: sram@e6300000 {
481 compatible = "mmio-sra 423 compatible = "mmio-sram";
482 reg = <0 0xe6300000 0 424 reg = <0 0xe6300000 0 0x40000>;
483 #address-cells = <1>; 425 #address-cells = <1>;
484 #size-cells = <1>; 426 #size-cells = <1>;
485 ranges = <0 0 0xe63000 427 ranges = <0 0 0xe6300000 0x40000>;
486 }; 428 };
487 429
488 /* The memory map in the User' 430 /* The memory map in the User's Manual maps the cores to
489 * bus numbers 431 * bus numbers
490 */ 432 */
491 i2c0: i2c@e6508000 { 433 i2c0: i2c@e6508000 {
492 #address-cells = <1>; 434 #address-cells = <1>;
493 #size-cells = <0>; 435 #size-cells = <0>;
494 compatible = "renesas, 436 compatible = "renesas,i2c-r8a7744",
495 "renesas, 437 "renesas,rcar-gen2-i2c";
496 reg = <0 0xe6508000 0 438 reg = <0 0xe6508000 0 0x40>;
497 interrupts = <GIC_SPI 439 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
498 clocks = <&cpg CPG_MOD 440 clocks = <&cpg CPG_MOD 931>;
499 power-domains = <&sysc 441 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
500 resets = <&cpg 931>; 442 resets = <&cpg 931>;
501 i2c-scl-internal-delay 443 i2c-scl-internal-delay-ns = <6>;
502 status = "disabled"; 444 status = "disabled";
503 }; 445 };
504 446
505 i2c1: i2c@e6518000 { 447 i2c1: i2c@e6518000 {
506 #address-cells = <1>; 448 #address-cells = <1>;
507 #size-cells = <0>; 449 #size-cells = <0>;
508 compatible = "renesas, 450 compatible = "renesas,i2c-r8a7744",
509 "renesas, 451 "renesas,rcar-gen2-i2c";
510 reg = <0 0xe6518000 0 452 reg = <0 0xe6518000 0 0x40>;
511 interrupts = <GIC_SPI 453 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
512 clocks = <&cpg CPG_MOD 454 clocks = <&cpg CPG_MOD 930>;
513 power-domains = <&sysc 455 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
514 resets = <&cpg 930>; 456 resets = <&cpg 930>;
515 i2c-scl-internal-delay 457 i2c-scl-internal-delay-ns = <6>;
516 status = "disabled"; 458 status = "disabled";
517 }; 459 };
518 460
519 i2c2: i2c@e6530000 { 461 i2c2: i2c@e6530000 {
520 #address-cells = <1>; 462 #address-cells = <1>;
521 #size-cells = <0>; 463 #size-cells = <0>;
522 compatible = "renesas, 464 compatible = "renesas,i2c-r8a7744",
523 "renesas, 465 "renesas,rcar-gen2-i2c";
524 reg = <0 0xe6530000 0 466 reg = <0 0xe6530000 0 0x40>;
525 interrupts = <GIC_SPI 467 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
526 clocks = <&cpg CPG_MOD 468 clocks = <&cpg CPG_MOD 929>;
527 power-domains = <&sysc 469 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
528 resets = <&cpg 929>; 470 resets = <&cpg 929>;
529 i2c-scl-internal-delay 471 i2c-scl-internal-delay-ns = <6>;
530 status = "disabled"; 472 status = "disabled";
531 }; 473 };
532 474
533 i2c3: i2c@e6540000 { 475 i2c3: i2c@e6540000 {
534 #address-cells = <1>; 476 #address-cells = <1>;
535 #size-cells = <0>; 477 #size-cells = <0>;
536 compatible = "renesas, 478 compatible = "renesas,i2c-r8a7744",
537 "renesas, 479 "renesas,rcar-gen2-i2c";
538 reg = <0 0xe6540000 0 480 reg = <0 0xe6540000 0 0x40>;
539 interrupts = <GIC_SPI 481 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
540 clocks = <&cpg CPG_MOD 482 clocks = <&cpg CPG_MOD 928>;
541 power-domains = <&sysc 483 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
542 resets = <&cpg 928>; 484 resets = <&cpg 928>;
543 i2c-scl-internal-delay 485 i2c-scl-internal-delay-ns = <6>;
544 status = "disabled"; 486 status = "disabled";
545 }; 487 };
546 488
547 i2c4: i2c@e6520000 { 489 i2c4: i2c@e6520000 {
548 #address-cells = <1>; 490 #address-cells = <1>;
549 #size-cells = <0>; 491 #size-cells = <0>;
550 compatible = "renesas, 492 compatible = "renesas,i2c-r8a7744",
551 "renesas, 493 "renesas,rcar-gen2-i2c";
552 reg = <0 0xe6520000 0 494 reg = <0 0xe6520000 0 0x40>;
553 interrupts = <GIC_SPI 495 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
554 clocks = <&cpg CPG_MOD 496 clocks = <&cpg CPG_MOD 927>;
555 power-domains = <&sysc 497 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
556 resets = <&cpg 927>; 498 resets = <&cpg 927>;
557 i2c-scl-internal-delay 499 i2c-scl-internal-delay-ns = <6>;
558 status = "disabled"; 500 status = "disabled";
559 }; 501 };
560 502
561 i2c5: i2c@e6528000 { 503 i2c5: i2c@e6528000 {
562 /* doesn't need pinmux 504 /* doesn't need pinmux */
563 #address-cells = <1>; 505 #address-cells = <1>;
564 #size-cells = <0>; 506 #size-cells = <0>;
565 compatible = "renesas, 507 compatible = "renesas,i2c-r8a7744",
566 "renesas, 508 "renesas,rcar-gen2-i2c";
567 reg = <0 0xe6528000 0 509 reg = <0 0xe6528000 0 0x40>;
568 interrupts = <GIC_SPI 510 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
569 clocks = <&cpg CPG_MOD 511 clocks = <&cpg CPG_MOD 925>;
570 power-domains = <&sysc 512 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
571 resets = <&cpg 925>; 513 resets = <&cpg 925>;
572 i2c-scl-internal-delay 514 i2c-scl-internal-delay-ns = <110>;
573 status = "disabled"; 515 status = "disabled";
574 }; 516 };
575 517
576 iic0: i2c@e6500000 { 518 iic0: i2c@e6500000 {
577 #address-cells = <1>; 519 #address-cells = <1>;
578 #size-cells = <0>; 520 #size-cells = <0>;
579 compatible = "renesas, 521 compatible = "renesas,iic-r8a7744",
580 "renesas, 522 "renesas,rcar-gen2-iic",
581 "renesas, 523 "renesas,rmobile-iic";
582 reg = <0 0xe6500000 0 524 reg = <0 0xe6500000 0 0x425>;
583 interrupts = <GIC_SPI 525 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
584 clocks = <&cpg CPG_MOD 526 clocks = <&cpg CPG_MOD 318>;
585 dmas = <&dmac0 0x61>, 527 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
586 <&dmac1 0x61>, 528 <&dmac1 0x61>, <&dmac1 0x62>;
587 dma-names = "tx", "rx" 529 dma-names = "tx", "rx", "tx", "rx";
588 power-domains = <&sysc 530 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
589 resets = <&cpg 318>; 531 resets = <&cpg 318>;
590 status = "disabled"; 532 status = "disabled";
591 }; 533 };
592 534
593 iic1: i2c@e6510000 { 535 iic1: i2c@e6510000 {
594 #address-cells = <1>; 536 #address-cells = <1>;
595 #size-cells = <0>; 537 #size-cells = <0>;
596 compatible = "renesas, 538 compatible = "renesas,iic-r8a7744",
597 "renesas, 539 "renesas,rcar-gen2-iic",
598 "renesas, 540 "renesas,rmobile-iic";
599 reg = <0 0xe6510000 0 541 reg = <0 0xe6510000 0 0x425>;
600 interrupts = <GIC_SPI 542 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
601 clocks = <&cpg CPG_MOD 543 clocks = <&cpg CPG_MOD 323>;
602 dmas = <&dmac0 0x65>, 544 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
603 <&dmac1 0x65>, 545 <&dmac1 0x65>, <&dmac1 0x66>;
604 dma-names = "tx", "rx" 546 dma-names = "tx", "rx", "tx", "rx";
605 power-domains = <&sysc 547 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
606 resets = <&cpg 323>; 548 resets = <&cpg 323>;
607 status = "disabled"; 549 status = "disabled";
608 }; 550 };
609 551
610 iic3: i2c@e60b0000 { 552 iic3: i2c@e60b0000 {
611 /* doesn't need pinmux 553 /* doesn't need pinmux */
612 #address-cells = <1>; 554 #address-cells = <1>;
613 #size-cells = <0>; 555 #size-cells = <0>;
614 compatible = "renesas, 556 compatible = "renesas,iic-r8a7744",
615 "renesas, 557 "renesas,rcar-gen2-iic",
616 "renesas, 558 "renesas,rmobile-iic";
617 reg = <0 0xe60b0000 0 559 reg = <0 0xe60b0000 0 0x425>;
618 interrupts = <GIC_SPI 560 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
619 clocks = <&cpg CPG_MOD 561 clocks = <&cpg CPG_MOD 926>;
620 dmas = <&dmac0 0x77>, 562 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
621 <&dmac1 0x77>, 563 <&dmac1 0x77>, <&dmac1 0x78>;
622 dma-names = "tx", "rx" 564 dma-names = "tx", "rx", "tx", "rx";
623 power-domains = <&sysc 565 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
624 resets = <&cpg 926>; 566 resets = <&cpg 926>;
625 status = "disabled"; 567 status = "disabled";
626 }; 568 };
627 569
628 hsusb: usb@e6590000 { 570 hsusb: usb@e6590000 {
629 compatible = "renesas, 571 compatible = "renesas,usbhs-r8a7744",
630 "renesas, 572 "renesas,rcar-gen2-usbhs";
631 reg = <0 0xe6590000 0 573 reg = <0 0xe6590000 0 0x100>;
632 interrupts = <GIC_SPI 574 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
633 clocks = <&cpg CPG_MOD 575 clocks = <&cpg CPG_MOD 704>;
634 dmas = <&usb_dmac0 0>, 576 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
635 <&usb_dmac1 0>, 577 <&usb_dmac1 0>, <&usb_dmac1 1>;
636 dma-names = "ch0", "ch 578 dma-names = "ch0", "ch1", "ch2", "ch3";
637 power-domains = <&sysc 579 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
638 resets = <&cpg 704>; 580 resets = <&cpg 704>;
639 renesas,buswait = <4>; 581 renesas,buswait = <4>;
640 phys = <&usb0 1>; 582 phys = <&usb0 1>;
641 phy-names = "usb"; 583 phy-names = "usb";
642 status = "disabled"; 584 status = "disabled";
643 }; 585 };
644 586
645 usbphy: usb-phy-controller@e65 587 usbphy: usb-phy-controller@e6590100 {
646 compatible = "renesas, 588 compatible = "renesas,usb-phy-r8a7744",
647 "renesas, 589 "renesas,rcar-gen2-usb-phy";
648 reg = <0 0xe6590100 0 590 reg = <0 0xe6590100 0 0x100>;
649 #address-cells = <1>; 591 #address-cells = <1>;
650 #size-cells = <0>; 592 #size-cells = <0>;
651 clocks = <&cpg CPG_MOD 593 clocks = <&cpg CPG_MOD 704>;
652 clock-names = "usbhs"; 594 clock-names = "usbhs";
653 power-domains = <&sysc 595 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
654 resets = <&cpg 704>; 596 resets = <&cpg 704>;
655 status = "disabled"; 597 status = "disabled";
656 598
657 usb0: usb-phy@0 { 599 usb0: usb-phy@0 {
658 reg = <0>; 600 reg = <0>;
659 #phy-cells = < 601 #phy-cells = <1>;
660 }; 602 };
661 usb2: usb-phy@2 { 603 usb2: usb-phy@2 {
662 reg = <2>; 604 reg = <2>;
663 #phy-cells = < 605 #phy-cells = <1>;
664 }; 606 };
665 }; 607 };
666 608
667 usb_dmac0: dma-controller@e65a 609 usb_dmac0: dma-controller@e65a0000 {
668 compatible = "renesas, 610 compatible = "renesas,r8a7744-usb-dmac",
669 "renesas, 611 "renesas,usb-dmac";
670 reg = <0 0xe65a0000 0 612 reg = <0 0xe65a0000 0 0x100>;
671 interrupts = <GIC_SPI 613 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
672 <GIC_SPI 614 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
673 interrupt-names = "ch0 615 interrupt-names = "ch0", "ch1";
674 clocks = <&cpg CPG_MOD 616 clocks = <&cpg CPG_MOD 330>;
675 power-domains = <&sysc 617 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
676 resets = <&cpg 330>; 618 resets = <&cpg 330>;
677 #dma-cells = <1>; 619 #dma-cells = <1>;
678 dma-channels = <2>; 620 dma-channels = <2>;
679 }; 621 };
680 622
681 usb_dmac1: dma-controller@e65b 623 usb_dmac1: dma-controller@e65b0000 {
682 compatible = "renesas, 624 compatible = "renesas,r8a7744-usb-dmac",
683 "renesas, 625 "renesas,usb-dmac";
684 reg = <0 0xe65b0000 0 626 reg = <0 0xe65b0000 0 0x100>;
685 interrupts = <GIC_SPI 627 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
686 <GIC_SPI 628 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
687 interrupt-names = "ch0 629 interrupt-names = "ch0", "ch1";
688 clocks = <&cpg CPG_MOD 630 clocks = <&cpg CPG_MOD 331>;
689 power-domains = <&sysc 631 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
690 resets = <&cpg 331>; 632 resets = <&cpg 331>;
691 #dma-cells = <1>; 633 #dma-cells = <1>;
692 dma-channels = <2>; 634 dma-channels = <2>;
693 }; 635 };
694 636
695 dmac0: dma-controller@e6700000 637 dmac0: dma-controller@e6700000 {
696 compatible = "renesas, 638 compatible = "renesas,dmac-r8a7744",
697 "renesas, 639 "renesas,rcar-dmac";
698 reg = <0 0xe6700000 0 640 reg = <0 0xe6700000 0 0x20000>;
699 interrupts = <GIC_SPI 641 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
700 <GIC_SPI 642 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
701 <GIC_SPI 643 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
702 <GIC_SPI 644 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
703 <GIC_SPI 645 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
704 <GIC_SPI 646 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
705 <GIC_SPI 647 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
706 <GIC_SPI 648 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
707 <GIC_SPI 649 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
708 <GIC_SPI 650 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
709 <GIC_SPI 651 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
710 <GIC_SPI 652 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
711 <GIC_SPI 653 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
712 <GIC_SPI 654 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
713 <GIC_SPI 655 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
714 <GIC_SPI 656 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
715 interrupt-names = "err 657 interrupt-names = "error",
716 "ch0 658 "ch0", "ch1", "ch2", "ch3",
717 "ch4 659 "ch4", "ch5", "ch6", "ch7",
718 "ch8 660 "ch8", "ch9", "ch10", "ch11",
719 "ch1 661 "ch12", "ch13", "ch14";
720 clocks = <&cpg CPG_MOD 662 clocks = <&cpg CPG_MOD 219>;
721 clock-names = "fck"; 663 clock-names = "fck";
722 power-domains = <&sysc 664 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
723 resets = <&cpg 219>; 665 resets = <&cpg 219>;
724 #dma-cells = <1>; 666 #dma-cells = <1>;
725 dma-channels = <15>; 667 dma-channels = <15>;
726 }; 668 };
727 669
728 dmac1: dma-controller@e6720000 670 dmac1: dma-controller@e6720000 {
729 compatible = "renesas, 671 compatible = "renesas,dmac-r8a7744",
730 "renesas, 672 "renesas,rcar-dmac";
731 reg = <0 0xe6720000 0 673 reg = <0 0xe6720000 0 0x20000>;
732 interrupts = <GIC_SPI 674 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
733 <GIC_SPI 675 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
734 <GIC_SPI 676 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
735 <GIC_SPI 677 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
736 <GIC_SPI 678 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
737 <GIC_SPI 679 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
738 <GIC_SPI 680 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
739 <GIC_SPI 681 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
740 <GIC_SPI 682 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
741 <GIC_SPI 683 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
742 <GIC_SPI 684 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
743 <GIC_SPI 685 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
744 <GIC_SPI 686 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
745 <GIC_SPI 687 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
746 <GIC_SPI 688 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
747 <GIC_SPI 689 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
748 interrupt-names = "err 690 interrupt-names = "error",
749 "ch0 691 "ch0", "ch1", "ch2", "ch3",
750 "ch4 692 "ch4", "ch5", "ch6", "ch7",
751 "ch8 693 "ch8", "ch9", "ch10", "ch11",
752 "ch1 694 "ch12", "ch13", "ch14";
753 clocks = <&cpg CPG_MOD 695 clocks = <&cpg CPG_MOD 218>;
754 clock-names = "fck"; 696 clock-names = "fck";
755 power-domains = <&sysc 697 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
756 resets = <&cpg 218>; 698 resets = <&cpg 218>;
757 #dma-cells = <1>; 699 #dma-cells = <1>;
758 dma-channels = <15>; 700 dma-channels = <15>;
759 }; 701 };
760 702
761 avb: ethernet@e6800000 { 703 avb: ethernet@e6800000 {
762 compatible = "renesas, 704 compatible = "renesas,etheravb-r8a7744",
763 "renesas, 705 "renesas,etheravb-rcar-gen2";
764 reg = <0 0xe6800000 0 706 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
765 interrupts = <GIC_SPI 707 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
766 clocks = <&cpg CPG_MOD 708 clocks = <&cpg CPG_MOD 812>;
767 clock-names = "fck"; 709 clock-names = "fck";
768 power-domains = <&sysc 710 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
769 resets = <&cpg 812>; 711 resets = <&cpg 812>;
770 #address-cells = <1>; 712 #address-cells = <1>;
771 #size-cells = <0>; 713 #size-cells = <0>;
772 status = "disabled"; 714 status = "disabled";
773 }; 715 };
774 716
775 qspi: spi@e6b10000 { 717 qspi: spi@e6b10000 {
776 compatible = "renesas, 718 compatible = "renesas,qspi-r8a7744", "renesas,qspi";
777 reg = <0 0xe6b10000 0 719 reg = <0 0xe6b10000 0 0x2c>;
778 interrupts = <GIC_SPI 720 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
779 clocks = <&cpg CPG_MOD 721 clocks = <&cpg CPG_MOD 917>;
780 dmas = <&dmac0 0x17>, 722 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
781 <&dmac1 0x17>, 723 <&dmac1 0x17>, <&dmac1 0x18>;
782 dma-names = "tx", "rx" 724 dma-names = "tx", "rx", "tx", "rx";
783 power-domains = <&sysc 725 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
784 num-cs = <1>; 726 num-cs = <1>;
785 #address-cells = <1>; 727 #address-cells = <1>;
786 #size-cells = <0>; 728 #size-cells = <0>;
787 resets = <&cpg 917>; 729 resets = <&cpg 917>;
788 status = "disabled"; 730 status = "disabled";
789 }; 731 };
790 732
791 scifa0: serial@e6c40000 { 733 scifa0: serial@e6c40000 {
792 compatible = "renesas, 734 compatible = "renesas,scifa-r8a7744",
793 "renesas, 735 "renesas,rcar-gen2-scifa", "renesas,scifa";
794 reg = <0 0xe6c40000 0 736 reg = <0 0xe6c40000 0 0x40>;
795 interrupts = <GIC_SPI 737 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
796 clocks = <&cpg CPG_MOD 738 clocks = <&cpg CPG_MOD 204>;
797 clock-names = "fck"; 739 clock-names = "fck";
798 dmas = <&dmac0 0x21>, 740 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
799 <&dmac1 0x21>, 741 <&dmac1 0x21>, <&dmac1 0x22>;
800 dma-names = "tx", "rx" 742 dma-names = "tx", "rx", "tx", "rx";
801 power-domains = <&sysc 743 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
802 resets = <&cpg 204>; 744 resets = <&cpg 204>;
803 status = "disabled"; 745 status = "disabled";
804 }; 746 };
805 747
806 scifa1: serial@e6c50000 { 748 scifa1: serial@e6c50000 {
807 compatible = "renesas, 749 compatible = "renesas,scifa-r8a7744",
808 "renesas, 750 "renesas,rcar-gen2-scifa", "renesas,scifa";
809 reg = <0 0xe6c50000 0 751 reg = <0 0xe6c50000 0 0x40>;
810 interrupts = <GIC_SPI 752 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
811 clocks = <&cpg CPG_MOD 753 clocks = <&cpg CPG_MOD 203>;
812 clock-names = "fck"; 754 clock-names = "fck";
813 dmas = <&dmac0 0x25>, 755 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
814 <&dmac1 0x25>, 756 <&dmac1 0x25>, <&dmac1 0x26>;
815 dma-names = "tx", "rx" 757 dma-names = "tx", "rx", "tx", "rx";
816 power-domains = <&sysc 758 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
817 resets = <&cpg 203>; 759 resets = <&cpg 203>;
818 status = "disabled"; 760 status = "disabled";
819 }; 761 };
820 762
821 scifa2: serial@e6c60000 { 763 scifa2: serial@e6c60000 {
822 compatible = "renesas, 764 compatible = "renesas,scifa-r8a7744",
823 "renesas, 765 "renesas,rcar-gen2-scifa", "renesas,scifa";
824 reg = <0 0xe6c60000 0 766 reg = <0 0xe6c60000 0 0x40>;
825 interrupts = <GIC_SPI 767 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
826 clocks = <&cpg CPG_MOD 768 clocks = <&cpg CPG_MOD 202>;
827 clock-names = "fck"; 769 clock-names = "fck";
828 dmas = <&dmac0 0x27>, 770 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
829 <&dmac1 0x27>, 771 <&dmac1 0x27>, <&dmac1 0x28>;
830 dma-names = "tx", "rx" 772 dma-names = "tx", "rx", "tx", "rx";
831 power-domains = <&sysc 773 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
832 resets = <&cpg 202>; 774 resets = <&cpg 202>;
833 status = "disabled"; 775 status = "disabled";
834 }; 776 };
835 777
836 scifa3: serial@e6c70000 { 778 scifa3: serial@e6c70000 {
837 compatible = "renesas, 779 compatible = "renesas,scifa-r8a7744",
838 "renesas, 780 "renesas,rcar-gen2-scifa", "renesas,scifa";
839 reg = <0 0xe6c70000 0 781 reg = <0 0xe6c70000 0 0x40>;
840 interrupts = <GIC_SPI 782 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
841 clocks = <&cpg CPG_MOD 783 clocks = <&cpg CPG_MOD 1106>;
842 clock-names = "fck"; 784 clock-names = "fck";
843 dmas = <&dmac0 0x1b>, 785 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
844 <&dmac1 0x1b>, 786 <&dmac1 0x1b>, <&dmac1 0x1c>;
845 dma-names = "tx", "rx" 787 dma-names = "tx", "rx", "tx", "rx";
846 power-domains = <&sysc 788 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
847 resets = <&cpg 1106>; 789 resets = <&cpg 1106>;
848 status = "disabled"; 790 status = "disabled";
849 }; 791 };
850 792
851 scifa4: serial@e6c78000 { 793 scifa4: serial@e6c78000 {
852 compatible = "renesas, 794 compatible = "renesas,scifa-r8a7744",
853 "renesas, 795 "renesas,rcar-gen2-scifa", "renesas,scifa";
854 reg = <0 0xe6c78000 0 796 reg = <0 0xe6c78000 0 0x40>;
855 interrupts = <GIC_SPI 797 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
856 clocks = <&cpg CPG_MOD 798 clocks = <&cpg CPG_MOD 1107>;
857 clock-names = "fck"; 799 clock-names = "fck";
858 dmas = <&dmac0 0x1f>, 800 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
859 <&dmac1 0x1f>, 801 <&dmac1 0x1f>, <&dmac1 0x20>;
860 dma-names = "tx", "rx" 802 dma-names = "tx", "rx", "tx", "rx";
861 power-domains = <&sysc 803 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
862 resets = <&cpg 1107>; 804 resets = <&cpg 1107>;
863 status = "disabled"; 805 status = "disabled";
864 }; 806 };
865 807
866 scifa5: serial@e6c80000 { 808 scifa5: serial@e6c80000 {
867 compatible = "renesas, 809 compatible = "renesas,scifa-r8a7744",
868 "renesas, 810 "renesas,rcar-gen2-scifa", "renesas,scifa";
869 reg = <0 0xe6c80000 0 811 reg = <0 0xe6c80000 0 0x40>;
870 interrupts = <GIC_SPI 812 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
871 clocks = <&cpg CPG_MOD 813 clocks = <&cpg CPG_MOD 1108>;
872 clock-names = "fck"; 814 clock-names = "fck";
873 dmas = <&dmac0 0x23>, 815 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
874 <&dmac1 0x23>, 816 <&dmac1 0x23>, <&dmac1 0x24>;
875 dma-names = "tx", "rx" 817 dma-names = "tx", "rx", "tx", "rx";
876 power-domains = <&sysc 818 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
877 resets = <&cpg 1108>; 819 resets = <&cpg 1108>;
878 status = "disabled"; 820 status = "disabled";
879 }; 821 };
880 822
881 scifb0: serial@e6c20000 { 823 scifb0: serial@e6c20000 {
882 compatible = "renesas, 824 compatible = "renesas,scifb-r8a7744",
883 "renesas, 825 "renesas,rcar-gen2-scifb", "renesas,scifb";
884 reg = <0 0xe6c20000 0 826 reg = <0 0xe6c20000 0 0x100>;
885 interrupts = <GIC_SPI 827 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
886 clocks = <&cpg CPG_MOD 828 clocks = <&cpg CPG_MOD 206>;
887 clock-names = "fck"; 829 clock-names = "fck";
888 dmas = <&dmac0 0x3d>, 830 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
889 <&dmac1 0x3d>, 831 <&dmac1 0x3d>, <&dmac1 0x3e>;
890 dma-names = "tx", "rx" 832 dma-names = "tx", "rx", "tx", "rx";
891 power-domains = <&sysc 833 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
892 resets = <&cpg 206>; 834 resets = <&cpg 206>;
893 status = "disabled"; 835 status = "disabled";
894 }; 836 };
895 837
896 scifb1: serial@e6c30000 { 838 scifb1: serial@e6c30000 {
897 compatible = "renesas, 839 compatible = "renesas,scifb-r8a7744",
898 "renesas, 840 "renesas,rcar-gen2-scifb", "renesas,scifb";
899 reg = <0 0xe6c30000 0 841 reg = <0 0xe6c30000 0 0x100>;
900 interrupts = <GIC_SPI 842 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
901 clocks = <&cpg CPG_MOD 843 clocks = <&cpg CPG_MOD 207>;
902 clock-names = "fck"; 844 clock-names = "fck";
903 dmas = <&dmac0 0x19>, 845 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
904 <&dmac1 0x19>, 846 <&dmac1 0x19>, <&dmac1 0x1a>;
905 dma-names = "tx", "rx" 847 dma-names = "tx", "rx", "tx", "rx";
906 power-domains = <&sysc 848 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
907 resets = <&cpg 207>; 849 resets = <&cpg 207>;
908 status = "disabled"; 850 status = "disabled";
909 }; 851 };
910 852
911 scifb2: serial@e6ce0000 { 853 scifb2: serial@e6ce0000 {
912 compatible = "renesas, 854 compatible = "renesas,scifb-r8a7744",
913 "renesas, 855 "renesas,rcar-gen2-scifb", "renesas,scifb";
914 reg = <0 0xe6ce0000 0 856 reg = <0 0xe6ce0000 0 0x100>;
915 interrupts = <GIC_SPI 857 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
916 clocks = <&cpg CPG_MOD 858 clocks = <&cpg CPG_MOD 216>;
917 clock-names = "fck"; 859 clock-names = "fck";
918 dmas = <&dmac0 0x1d>, 860 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
919 <&dmac1 0x1d>, 861 <&dmac1 0x1d>, <&dmac1 0x1e>;
920 dma-names = "tx", "rx" 862 dma-names = "tx", "rx", "tx", "rx";
921 power-domains = <&sysc 863 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
922 resets = <&cpg 216>; 864 resets = <&cpg 216>;
923 status = "disabled"; 865 status = "disabled";
924 }; 866 };
925 867
926 scif0: serial@e6e60000 { 868 scif0: serial@e6e60000 {
927 compatible = "renesas, 869 compatible = "renesas,scif-r8a7744",
928 "renesas, 870 "renesas,rcar-gen2-scif", "renesas,scif";
929 reg = <0 0xe6e60000 0 871 reg = <0 0xe6e60000 0 0x40>;
930 interrupts = <GIC_SPI 872 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
931 clocks = <&cpg CPG_MOD 873 clocks = <&cpg CPG_MOD 721>,
932 <&cpg CPG_COR 874 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
933 clock-names = "fck", " 875 clock-names = "fck", "brg_int", "scif_clk";
934 dmas = <&dmac0 0x29>, 876 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
935 <&dmac1 0x29>, 877 <&dmac1 0x29>, <&dmac1 0x2a>;
936 dma-names = "tx", "rx" 878 dma-names = "tx", "rx", "tx", "rx";
937 power-domains = <&sysc 879 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
938 resets = <&cpg 721>; 880 resets = <&cpg 721>;
939 status = "disabled"; 881 status = "disabled";
940 }; 882 };
941 883
942 scif1: serial@e6e68000 { 884 scif1: serial@e6e68000 {
943 compatible = "renesas, 885 compatible = "renesas,scif-r8a7744",
944 "renesas, 886 "renesas,rcar-gen2-scif", "renesas,scif";
945 reg = <0 0xe6e68000 0 887 reg = <0 0xe6e68000 0 0x40>;
946 interrupts = <GIC_SPI 888 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
947 clocks = <&cpg CPG_MOD 889 clocks = <&cpg CPG_MOD 720>,
948 <&cpg CPG_COR 890 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
949 clock-names = "fck", " 891 clock-names = "fck", "brg_int", "scif_clk";
950 dmas = <&dmac0 0x2d>, 892 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
951 <&dmac1 0x2d>, 893 <&dmac1 0x2d>, <&dmac1 0x2e>;
952 dma-names = "tx", "rx" 894 dma-names = "tx", "rx", "tx", "rx";
953 power-domains = <&sysc 895 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
954 resets = <&cpg 720>; 896 resets = <&cpg 720>;
955 status = "disabled"; 897 status = "disabled";
956 }; 898 };
957 899
958 scif2: serial@e6e58000 { 900 scif2: serial@e6e58000 {
959 compatible = "renesas, 901 compatible = "renesas,scif-r8a7744",
960 "renesas, 902 "renesas,rcar-gen2-scif", "renesas,scif";
961 reg = <0 0xe6e58000 0 903 reg = <0 0xe6e58000 0 0x40>;
962 interrupts = <GIC_SPI 904 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
963 clocks = <&cpg CPG_MOD 905 clocks = <&cpg CPG_MOD 719>,
964 <&cpg CPG_COR 906 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
965 clock-names = "fck", " 907 clock-names = "fck", "brg_int", "scif_clk";
966 dmas = <&dmac0 0x2b>, 908 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
967 <&dmac1 0x2b>, 909 <&dmac1 0x2b>, <&dmac1 0x2c>;
968 dma-names = "tx", "rx" 910 dma-names = "tx", "rx", "tx", "rx";
969 power-domains = <&sysc 911 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
970 resets = <&cpg 719>; 912 resets = <&cpg 719>;
971 status = "disabled"; 913 status = "disabled";
972 }; 914 };
973 915
974 scif3: serial@e6ea8000 { 916 scif3: serial@e6ea8000 {
975 compatible = "renesas, 917 compatible = "renesas,scif-r8a7744",
976 "renesas, 918 "renesas,rcar-gen2-scif", "renesas,scif";
977 reg = <0 0xe6ea8000 0 919 reg = <0 0xe6ea8000 0 0x40>;
978 interrupts = <GIC_SPI 920 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
979 clocks = <&cpg CPG_MOD 921 clocks = <&cpg CPG_MOD 718>,
980 <&cpg CPG_COR 922 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
981 clock-names = "fck", " 923 clock-names = "fck", "brg_int", "scif_clk";
982 dmas = <&dmac0 0x2f>, 924 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
983 <&dmac1 0x2f>, 925 <&dmac1 0x2f>, <&dmac1 0x30>;
984 dma-names = "tx", "rx" 926 dma-names = "tx", "rx", "tx", "rx";
985 power-domains = <&sysc 927 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
986 resets = <&cpg 718>; 928 resets = <&cpg 718>;
987 status = "disabled"; 929 status = "disabled";
988 }; 930 };
989 931
990 scif4: serial@e6ee0000 { 932 scif4: serial@e6ee0000 {
991 compatible = "renesas, 933 compatible = "renesas,scif-r8a7744",
992 "renesas, 934 "renesas,rcar-gen2-scif", "renesas,scif";
993 reg = <0 0xe6ee0000 0 935 reg = <0 0xe6ee0000 0 0x40>;
994 interrupts = <GIC_SPI 936 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
995 clocks = <&cpg CPG_MOD 937 clocks = <&cpg CPG_MOD 715>,
996 <&cpg CPG_COR 938 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
997 clock-names = "fck", " 939 clock-names = "fck", "brg_int", "scif_clk";
998 dmas = <&dmac0 0xfb>, 940 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
999 <&dmac1 0xfb>, 941 <&dmac1 0xfb>, <&dmac1 0xfc>;
1000 dma-names = "tx", "rx 942 dma-names = "tx", "rx", "tx", "rx";
1001 power-domains = <&sys 943 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1002 resets = <&cpg 715>; 944 resets = <&cpg 715>;
1003 status = "disabled"; 945 status = "disabled";
1004 }; 946 };
1005 947
1006 scif5: serial@e6ee8000 { 948 scif5: serial@e6ee8000 {
1007 compatible = "renesas 949 compatible = "renesas,scif-r8a7744",
1008 "renesas 950 "renesas,rcar-gen2-scif", "renesas,scif";
1009 reg = <0 0xe6ee8000 0 951 reg = <0 0xe6ee8000 0 0x40>;
1010 interrupts = <GIC_SPI 952 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1011 clocks = <&cpg CPG_MO 953 clocks = <&cpg CPG_MOD 714>,
1012 <&cpg CPG_CO 954 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
1013 clock-names = "fck", 955 clock-names = "fck", "brg_int", "scif_clk";
1014 dmas = <&dmac0 0xfd>, 956 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
1015 <&dmac1 0xfd>, 957 <&dmac1 0xfd>, <&dmac1 0xfe>;
1016 dma-names = "tx", "rx 958 dma-names = "tx", "rx", "tx", "rx";
1017 power-domains = <&sys 959 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1018 resets = <&cpg 714>; 960 resets = <&cpg 714>;
1019 status = "disabled"; 961 status = "disabled";
1020 }; 962 };
1021 963
1022 hscif0: serial@e62c0000 { 964 hscif0: serial@e62c0000 {
1023 compatible = "renesas 965 compatible = "renesas,hscif-r8a7744",
1024 "renesas 966 "renesas,rcar-gen2-hscif", "renesas,hscif";
1025 reg = <0 0xe62c0000 0 967 reg = <0 0xe62c0000 0 0x60>;
1026 interrupts = <GIC_SPI 968 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
1027 clocks = <&cpg CPG_MO 969 clocks = <&cpg CPG_MOD 717>,
1028 <&cpg CPG_CO 970 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
1029 clock-names = "fck", 971 clock-names = "fck", "brg_int", "scif_clk";
1030 dmas = <&dmac0 0x39>, 972 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
1031 <&dmac1 0x39>, 973 <&dmac1 0x39>, <&dmac1 0x3a>;
1032 dma-names = "tx", "rx 974 dma-names = "tx", "rx", "tx", "rx";
1033 power-domains = <&sys 975 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1034 resets = <&cpg 717>; 976 resets = <&cpg 717>;
1035 status = "disabled"; 977 status = "disabled";
1036 }; 978 };
1037 979
1038 hscif1: serial@e62c8000 { 980 hscif1: serial@e62c8000 {
1039 compatible = "renesas 981 compatible = "renesas,hscif-r8a7744",
1040 "renesas 982 "renesas,rcar-gen2-hscif", "renesas,hscif";
1041 reg = <0 0xe62c8000 0 983 reg = <0 0xe62c8000 0 0x60>;
1042 interrupts = <GIC_SPI 984 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
1043 clocks = <&cpg CPG_MO 985 clocks = <&cpg CPG_MOD 716>,
1044 <&cpg CPG_CO 986 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
1045 clock-names = "fck", 987 clock-names = "fck", "brg_int", "scif_clk";
1046 dmas = <&dmac0 0x4d>, 988 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
1047 <&dmac1 0x4d>, 989 <&dmac1 0x4d>, <&dmac1 0x4e>;
1048 dma-names = "tx", "rx 990 dma-names = "tx", "rx", "tx", "rx";
1049 power-domains = <&sys 991 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1050 resets = <&cpg 716>; 992 resets = <&cpg 716>;
1051 status = "disabled"; 993 status = "disabled";
1052 }; 994 };
1053 995
1054 hscif2: serial@e62d0000 { 996 hscif2: serial@e62d0000 {
1055 compatible = "renesas 997 compatible = "renesas,hscif-r8a7744",
1056 "renesas 998 "renesas,rcar-gen2-hscif", "renesas,hscif";
1057 reg = <0 0xe62d0000 0 999 reg = <0 0xe62d0000 0 0x60>;
1058 interrupts = <GIC_SPI 1000 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1059 clocks = <&cpg CPG_MO 1001 clocks = <&cpg CPG_MOD 713>,
1060 <&cpg CPG_CO 1002 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
1061 clock-names = "fck", 1003 clock-names = "fck", "brg_int", "scif_clk";
1062 dmas = <&dmac0 0x3b>, 1004 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
1063 <&dmac1 0x3b>, 1005 <&dmac1 0x3b>, <&dmac1 0x3c>;
1064 dma-names = "tx", "rx 1006 dma-names = "tx", "rx", "tx", "rx";
1065 power-domains = <&sys 1007 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1066 resets = <&cpg 713>; 1008 resets = <&cpg 713>;
1067 status = "disabled"; 1009 status = "disabled";
1068 }; 1010 };
1069 1011
1070 msiof0: spi@e6e20000 { 1012 msiof0: spi@e6e20000 {
1071 compatible = "renesas 1013 compatible = "renesas,msiof-r8a7744",
1072 "renesas 1014 "renesas,rcar-gen2-msiof";
1073 reg = <0 0xe6e20000 0 1015 reg = <0 0xe6e20000 0 0x0064>;
1074 interrupts = <GIC_SPI 1016 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1075 clocks = <&cpg CPG_MO 1017 clocks = <&cpg CPG_MOD 000>;
1076 dmas = <&dmac0 0x51>, 1018 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1077 <&dmac1 0x51>, 1019 <&dmac1 0x51>, <&dmac1 0x52>;
1078 dma-names = "tx", "rx 1020 dma-names = "tx", "rx", "tx", "rx";
1079 power-domains = <&sys 1021 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1080 #address-cells = <1>; 1022 #address-cells = <1>;
1081 #size-cells = <0>; 1023 #size-cells = <0>;
1082 resets = <&cpg 000>; 1024 resets = <&cpg 000>;
1083 status = "disabled"; 1025 status = "disabled";
1084 }; 1026 };
1085 1027
1086 msiof1: spi@e6e10000 { 1028 msiof1: spi@e6e10000 {
1087 compatible = "renesas 1029 compatible = "renesas,msiof-r8a7744",
1088 "renesas 1030 "renesas,rcar-gen2-msiof";
1089 reg = <0 0xe6e10000 0 1031 reg = <0 0xe6e10000 0 0x0064>;
1090 interrupts = <GIC_SPI 1032 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1091 clocks = <&cpg CPG_MO 1033 clocks = <&cpg CPG_MOD 208>;
1092 dmas = <&dmac0 0x55>, 1034 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1093 <&dmac1 0x55>, 1035 <&dmac1 0x55>, <&dmac1 0x56>;
1094 dma-names = "tx", "rx 1036 dma-names = "tx", "rx", "tx", "rx";
1095 power-domains = <&sys 1037 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1096 #address-cells = <1>; 1038 #address-cells = <1>;
1097 #size-cells = <0>; 1039 #size-cells = <0>;
1098 resets = <&cpg 208>; 1040 resets = <&cpg 208>;
1099 status = "disabled"; 1041 status = "disabled";
1100 }; 1042 };
1101 1043
1102 msiof2: spi@e6e00000 { 1044 msiof2: spi@e6e00000 {
1103 compatible = "renesas 1045 compatible = "renesas,msiof-r8a7744",
1104 "renesas 1046 "renesas,rcar-gen2-msiof";
1105 reg = <0 0xe6e00000 0 1047 reg = <0 0xe6e00000 0 0x0064>;
1106 interrupts = <GIC_SPI 1048 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1107 clocks = <&cpg CPG_MO 1049 clocks = <&cpg CPG_MOD 205>;
1108 dmas = <&dmac0 0x41>, 1050 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1109 <&dmac1 0x41>, 1051 <&dmac1 0x41>, <&dmac1 0x42>;
1110 dma-names = "tx", "rx 1052 dma-names = "tx", "rx", "tx", "rx";
1111 power-domains = <&sys 1053 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1112 #address-cells = <1>; 1054 #address-cells = <1>;
1113 #size-cells = <0>; 1055 #size-cells = <0>;
1114 resets = <&cpg 205>; 1056 resets = <&cpg 205>;
1115 status = "disabled"; 1057 status = "disabled";
1116 }; 1058 };
1117 1059
1118 pwm0: pwm@e6e30000 { 1060 pwm0: pwm@e6e30000 {
1119 compatible = "renesas 1061 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1120 reg = <0 0xe6e30000 0 1062 reg = <0 0xe6e30000 0 0x8>;
1121 clocks = <&cpg CPG_MO 1063 clocks = <&cpg CPG_MOD 523>;
1122 power-domains = <&sys 1064 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1123 resets = <&cpg 523>; 1065 resets = <&cpg 523>;
1124 #pwm-cells = <2>; 1066 #pwm-cells = <2>;
1125 status = "disabled"; 1067 status = "disabled";
1126 }; 1068 };
1127 1069
1128 pwm1: pwm@e6e31000 { 1070 pwm1: pwm@e6e31000 {
1129 compatible = "renesas 1071 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1130 reg = <0 0xe6e31000 0 1072 reg = <0 0xe6e31000 0 0x8>;
1131 clocks = <&cpg CPG_MO 1073 clocks = <&cpg CPG_MOD 523>;
1132 power-domains = <&sys 1074 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1133 resets = <&cpg 523>; 1075 resets = <&cpg 523>;
1134 #pwm-cells = <2>; 1076 #pwm-cells = <2>;
1135 status = "disabled"; 1077 status = "disabled";
1136 }; 1078 };
1137 1079
1138 pwm2: pwm@e6e32000 { 1080 pwm2: pwm@e6e32000 {
1139 compatible = "renesas 1081 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1140 reg = <0 0xe6e32000 0 1082 reg = <0 0xe6e32000 0 0x8>;
1141 clocks = <&cpg CPG_MO 1083 clocks = <&cpg CPG_MOD 523>;
1142 power-domains = <&sys 1084 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1143 resets = <&cpg 523>; 1085 resets = <&cpg 523>;
1144 #pwm-cells = <2>; 1086 #pwm-cells = <2>;
1145 status = "disabled"; 1087 status = "disabled";
1146 }; 1088 };
1147 1089
1148 pwm3: pwm@e6e33000 { 1090 pwm3: pwm@e6e33000 {
1149 compatible = "renesas 1091 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1150 reg = <0 0xe6e33000 0 1092 reg = <0 0xe6e33000 0 0x8>;
1151 clocks = <&cpg CPG_MO 1093 clocks = <&cpg CPG_MOD 523>;
1152 power-domains = <&sys 1094 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1153 resets = <&cpg 523>; 1095 resets = <&cpg 523>;
1154 #pwm-cells = <2>; 1096 #pwm-cells = <2>;
1155 status = "disabled"; 1097 status = "disabled";
1156 }; 1098 };
1157 1099
1158 pwm4: pwm@e6e34000 { 1100 pwm4: pwm@e6e34000 {
1159 compatible = "renesas 1101 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1160 reg = <0 0xe6e34000 0 1102 reg = <0 0xe6e34000 0 0x8>;
1161 clocks = <&cpg CPG_MO 1103 clocks = <&cpg CPG_MOD 523>;
1162 power-domains = <&sys 1104 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1163 resets = <&cpg 523>; 1105 resets = <&cpg 523>;
1164 #pwm-cells = <2>; 1106 #pwm-cells = <2>;
1165 status = "disabled"; 1107 status = "disabled";
1166 }; 1108 };
1167 1109
1168 pwm5: pwm@e6e35000 { 1110 pwm5: pwm@e6e35000 {
1169 compatible = "renesas 1111 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1170 reg = <0 0xe6e35000 0 1112 reg = <0 0xe6e35000 0 0x8>;
1171 clocks = <&cpg CPG_MO 1113 clocks = <&cpg CPG_MOD 523>;
1172 power-domains = <&sys 1114 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1173 resets = <&cpg 523>; 1115 resets = <&cpg 523>;
1174 #pwm-cells = <2>; 1116 #pwm-cells = <2>;
1175 status = "disabled"; 1117 status = "disabled";
1176 }; 1118 };
1177 1119
1178 pwm6: pwm@e6e36000 { 1120 pwm6: pwm@e6e36000 {
1179 compatible = "renesas 1121 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1180 reg = <0 0xe6e36000 0 1122 reg = <0 0xe6e36000 0 0x8>;
1181 clocks = <&cpg CPG_MO 1123 clocks = <&cpg CPG_MOD 523>;
1182 power-domains = <&sys 1124 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1183 resets = <&cpg 523>; 1125 resets = <&cpg 523>;
1184 #pwm-cells = <2>; 1126 #pwm-cells = <2>;
1185 status = "disabled"; 1127 status = "disabled";
1186 }; 1128 };
1187 1129
1188 can0: can@e6e80000 { 1130 can0: can@e6e80000 {
1189 compatible = "renesas 1131 compatible = "renesas,can-r8a7744",
1190 "renesas 1132 "renesas,rcar-gen2-can";
1191 reg = <0 0xe6e80000 0 1133 reg = <0 0xe6e80000 0 0x1000>;
1192 interrupts = <GIC_SPI 1134 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1193 clocks = <&cpg CPG_MO 1135 clocks = <&cpg CPG_MOD 916>,
1194 <&cpg CPG_CO 1136 <&cpg CPG_CORE R8A7744_CLK_RCAN>,
1195 <&can_clk>; 1137 <&can_clk>;
1196 clock-names = "clkp1" 1138 clock-names = "clkp1", "clkp2", "can_clk";
1197 power-domains = <&sys 1139 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1198 resets = <&cpg 916>; 1140 resets = <&cpg 916>;
1199 status = "disabled"; 1141 status = "disabled";
1200 }; 1142 };
1201 1143
1202 can1: can@e6e88000 { 1144 can1: can@e6e88000 {
1203 compatible = "renesas 1145 compatible = "renesas,can-r8a7744",
1204 "renesas 1146 "renesas,rcar-gen2-can";
1205 reg = <0 0xe6e88000 0 1147 reg = <0 0xe6e88000 0 0x1000>;
1206 interrupts = <GIC_SPI 1148 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1207 clocks = <&cpg CPG_MO 1149 clocks = <&cpg CPG_MOD 915>,
1208 <&cpg CPG_CO 1150 <&cpg CPG_CORE R8A7744_CLK_RCAN>,
1209 <&can_clk>; 1151 <&can_clk>;
1210 clock-names = "clkp1" 1152 clock-names = "clkp1", "clkp2", "can_clk";
1211 power-domains = <&sys 1153 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1212 resets = <&cpg 915>; 1154 resets = <&cpg 915>;
1213 status = "disabled"; 1155 status = "disabled";
1214 }; 1156 };
1215 1157
1216 vin0: video@e6ef0000 { 1158 vin0: video@e6ef0000 {
1217 compatible = "renesas 1159 compatible = "renesas,vin-r8a7744",
1218 "renesas 1160 "renesas,rcar-gen2-vin";
1219 reg = <0 0xe6ef0000 0 1161 reg = <0 0xe6ef0000 0 0x1000>;
1220 interrupts = <GIC_SPI 1162 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1221 clocks = <&cpg CPG_MO 1163 clocks = <&cpg CPG_MOD 811>;
1222 power-domains = <&sys 1164 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1223 resets = <&cpg 811>; 1165 resets = <&cpg 811>;
1224 status = "disabled"; 1166 status = "disabled";
1225 }; 1167 };
1226 1168
1227 vin1: video@e6ef1000 { 1169 vin1: video@e6ef1000 {
1228 compatible = "renesas 1170 compatible = "renesas,vin-r8a7744",
1229 "renesas 1171 "renesas,rcar-gen2-vin";
1230 reg = <0 0xe6ef1000 0 1172 reg = <0 0xe6ef1000 0 0x1000>;
1231 interrupts = <GIC_SPI 1173 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1232 clocks = <&cpg CPG_MO 1174 clocks = <&cpg CPG_MOD 810>;
1233 power-domains = <&sys 1175 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1234 resets = <&cpg 810>; 1176 resets = <&cpg 810>;
1235 status = "disabled"; 1177 status = "disabled";
1236 }; 1178 };
1237 1179
1238 vin2: video@e6ef2000 { 1180 vin2: video@e6ef2000 {
1239 compatible = "renesas 1181 compatible = "renesas,vin-r8a7744",
1240 "renesas 1182 "renesas,rcar-gen2-vin";
1241 reg = <0 0xe6ef2000 0 1183 reg = <0 0xe6ef2000 0 0x1000>;
1242 interrupts = <GIC_SPI 1184 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1243 clocks = <&cpg CPG_MO 1185 clocks = <&cpg CPG_MOD 809>;
1244 power-domains = <&sys 1186 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1245 resets = <&cpg 809>; 1187 resets = <&cpg 809>;
1246 status = "disabled"; 1188 status = "disabled";
1247 }; 1189 };
1248 1190
1249 rcar_sound: sound@ec500000 { 1191 rcar_sound: sound@ec500000 {
1250 /* 1192 /*
1251 * #sound-dai-cells i 1193 * #sound-dai-cells is required if simple-card
1252 * 1194 *
1253 * Single DAI : #soun 1195 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1254 * Multi DAI : #soun 1196 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1255 */ 1197 */
1256 compatible = "renesas 1198 compatible = "renesas,rcar_sound-r8a7744",
1257 "renesas 1199 "renesas,rcar_sound-gen2";
1258 reg = <0 0xec500000 0 1200 reg = <0 0xec500000 0 0x1000>, /* SCU */
1259 <0 0xec5a0000 0 1201 <0 0xec5a0000 0 0x100>, /* ADG */
1260 <0 0xec540000 0 1202 <0 0xec540000 0 0x1000>, /* SSIU */
1261 <0 0xec541000 0 1203 <0 0xec541000 0 0x280>, /* SSI */
1262 <0 0xec740000 0 1204 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1263 reg-names = "scu", "a 1205 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1264 1206
1265 clocks = <&cpg CPG_MO 1207 clocks = <&cpg CPG_MOD 1005>,
1266 <&cpg CPG_MO 1208 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1267 <&cpg CPG_MO 1209 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1268 <&cpg CPG_MO 1210 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1269 <&cpg CPG_MO 1211 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1270 <&cpg CPG_MO 1212 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1271 <&cpg CPG_MO 1213 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1272 <&cpg CPG_MO 1214 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1273 <&cpg CPG_MO 1215 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1274 <&cpg CPG_MO 1216 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1275 <&cpg CPG_MO 1217 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1276 <&cpg CPG_MO 1218 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1277 <&cpg CPG_MO 1219 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1278 <&cpg CPG_MO 1220 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1279 <&audio_clk_ 1221 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1280 <&cpg CPG_CO 1222 <&cpg CPG_CORE R8A7744_CLK_M2>;
1281 clock-names = "ssi-al 1223 clock-names = "ssi-all",
1282 "ssi.9" 1224 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1283 "ssi.4" 1225 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1284 "src.9" 1226 "src.9", "src.8", "src.7", "src.6", "src.5",
1285 "src.4" 1227 "src.4", "src.3", "src.2", "src.1", "src.0",
1286 "ctu.0" 1228 "ctu.0", "ctu.1",
1287 "mix.0" 1229 "mix.0", "mix.1",
1288 "dvc.0" 1230 "dvc.0", "dvc.1",
1289 "clk_a" 1231 "clk_a", "clk_b", "clk_c", "clk_i";
1290 power-domains = <&sys 1232 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1291 resets = <&cpg 1005>, 1233 resets = <&cpg 1005>,
1292 <&cpg 1006>, 1234 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1293 <&cpg 1010>, 1235 <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1294 <&cpg 1014>, 1236 <&cpg 1014>, <&cpg 1015>;
1295 reset-names = "ssi-al 1237 reset-names = "ssi-all",
1296 "ssi.9" 1238 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1297 "ssi.4" 1239 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1298 status = "disabled"; 1240 status = "disabled";
1299 1241
1300 rcar_sound,dvc { 1242 rcar_sound,dvc {
1301 dvc0: dvc-0 { 1243 dvc0: dvc-0 {
1302 dmas 1244 dmas = <&audma1 0xbc>;
1303 dma-n 1245 dma-names = "tx";
1304 }; 1246 };
1305 dvc1: dvc-1 { 1247 dvc1: dvc-1 {
1306 dmas 1248 dmas = <&audma1 0xbe>;
1307 dma-n 1249 dma-names = "tx";
1308 }; 1250 };
1309 }; 1251 };
1310 1252
1311 rcar_sound,mix { 1253 rcar_sound,mix {
1312 mix0: mix-0 { 1254 mix0: mix-0 { };
1313 mix1: mix-1 { 1255 mix1: mix-1 { };
1314 }; 1256 };
1315 1257
1316 rcar_sound,ctu { 1258 rcar_sound,ctu {
1317 ctu00: ctu-0 1259 ctu00: ctu-0 { };
1318 ctu01: ctu-1 1260 ctu01: ctu-1 { };
1319 ctu02: ctu-2 1261 ctu02: ctu-2 { };
1320 ctu03: ctu-3 1262 ctu03: ctu-3 { };
1321 ctu10: ctu-4 1263 ctu10: ctu-4 { };
1322 ctu11: ctu-5 1264 ctu11: ctu-5 { };
1323 ctu12: ctu-6 1265 ctu12: ctu-6 { };
1324 ctu13: ctu-7 1266 ctu13: ctu-7 { };
1325 }; 1267 };
1326 1268
1327 rcar_sound,src { 1269 rcar_sound,src {
1328 src0: src-0 { 1270 src0: src-0 {
1329 inter 1271 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1330 dmas 1272 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1331 dma-n 1273 dma-names = "rx", "tx";
1332 }; 1274 };
1333 src1: src-1 { 1275 src1: src-1 {
1334 inter 1276 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1335 dmas 1277 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1336 dma-n 1278 dma-names = "rx", "tx";
1337 }; 1279 };
1338 src2: src-2 { 1280 src2: src-2 {
1339 inter 1281 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1340 dmas 1282 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1341 dma-n 1283 dma-names = "rx", "tx";
1342 }; 1284 };
1343 src3: src-3 { 1285 src3: src-3 {
1344 inter 1286 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1345 dmas 1287 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1346 dma-n 1288 dma-names = "rx", "tx";
1347 }; 1289 };
1348 src4: src-4 { 1290 src4: src-4 {
1349 inter 1291 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1350 dmas 1292 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1351 dma-n 1293 dma-names = "rx", "tx";
1352 }; 1294 };
1353 src5: src-5 { 1295 src5: src-5 {
1354 inter 1296 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1355 dmas 1297 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1356 dma-n 1298 dma-names = "rx", "tx";
1357 }; 1299 };
1358 src6: src-6 { 1300 src6: src-6 {
1359 inter 1301 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1360 dmas 1302 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1361 dma-n 1303 dma-names = "rx", "tx";
1362 }; 1304 };
1363 src7: src-7 { 1305 src7: src-7 {
1364 inter 1306 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1365 dmas 1307 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1366 dma-n 1308 dma-names = "rx", "tx";
1367 }; 1309 };
1368 src8: src-8 { 1310 src8: src-8 {
1369 inter 1311 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1370 dmas 1312 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1371 dma-n 1313 dma-names = "rx", "tx";
1372 }; 1314 };
1373 src9: src-9 { 1315 src9: src-9 {
1374 inter 1316 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1375 dmas 1317 dmas = <&audma0 0x97>, <&audma1 0xba>;
1376 dma-n 1318 dma-names = "rx", "tx";
1377 }; 1319 };
1378 }; 1320 };
1379 1321
1380 rcar_sound,ssi { 1322 rcar_sound,ssi {
1381 ssi0: ssi-0 { 1323 ssi0: ssi-0 {
1382 inter 1324 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1383 dmas 1325 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1384 dma-n 1326 dma-names = "rx", "tx", "rxu", "txu";
1385 }; 1327 };
1386 ssi1: ssi-1 { 1328 ssi1: ssi-1 {
1387 inter 1329 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1388 dmas 1330 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1389 dma-n 1331 dma-names = "rx", "tx", "rxu", "txu";
1390 }; 1332 };
1391 ssi2: ssi-2 { 1333 ssi2: ssi-2 {
1392 inter 1334 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1393 dmas 1335 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1394 dma-n 1336 dma-names = "rx", "tx", "rxu", "txu";
1395 }; 1337 };
1396 ssi3: ssi-3 { 1338 ssi3: ssi-3 {
1397 inter 1339 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1398 dmas 1340 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1399 dma-n 1341 dma-names = "rx", "tx", "rxu", "txu";
1400 }; 1342 };
1401 ssi4: ssi-4 { 1343 ssi4: ssi-4 {
1402 inter 1344 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1403 dmas 1345 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1404 dma-n 1346 dma-names = "rx", "tx", "rxu", "txu";
1405 }; 1347 };
1406 ssi5: ssi-5 { 1348 ssi5: ssi-5 {
1407 inter 1349 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1408 dmas 1350 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1409 dma-n 1351 dma-names = "rx", "tx", "rxu", "txu";
1410 }; 1352 };
1411 ssi6: ssi-6 { 1353 ssi6: ssi-6 {
1412 inter 1354 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1413 dmas 1355 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1414 dma-n 1356 dma-names = "rx", "tx", "rxu", "txu";
1415 }; 1357 };
1416 ssi7: ssi-7 { 1358 ssi7: ssi-7 {
1417 inter 1359 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1418 dmas 1360 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1419 dma-n 1361 dma-names = "rx", "tx", "rxu", "txu";
1420 }; 1362 };
1421 ssi8: ssi-8 { 1363 ssi8: ssi-8 {
1422 inter 1364 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1423 dmas 1365 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1424 dma-n 1366 dma-names = "rx", "tx", "rxu", "txu";
1425 }; 1367 };
1426 ssi9: ssi-9 { 1368 ssi9: ssi-9 {
1427 inter 1369 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1428 dmas 1370 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1429 dma-n 1371 dma-names = "rx", "tx", "rxu", "txu";
1430 }; 1372 };
1431 }; 1373 };
1432 }; 1374 };
1433 1375
1434 audma0: dma-controller@ec7000 1376 audma0: dma-controller@ec700000 {
1435 compatible = "renesas 1377 compatible = "renesas,dmac-r8a7744",
1436 "renesas 1378 "renesas,rcar-dmac";
1437 reg = <0 0xec700000 0 1379 reg = <0 0xec700000 0 0x10000>;
1438 interrupts = <GIC_SPI 1380 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1439 <GIC_SPI 1381 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1440 <GIC_SPI 1382 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1441 <GIC_SPI 1383 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1442 <GIC_SPI 1384 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1443 <GIC_SPI 1385 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1444 <GIC_SPI 1386 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1445 <GIC_SPI 1387 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1446 <GIC_SPI 1388 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1447 <GIC_SPI 1389 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1448 <GIC_SPI 1390 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1449 <GIC_SPI 1391 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1450 <GIC_SPI 1392 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1451 <GIC_SPI 1393 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1452 interrupt-names = "er 1394 interrupt-names = "error",
1453 "ch 1395 "ch0", "ch1", "ch2", "ch3",
1454 "ch 1396 "ch4", "ch5", "ch6", "ch7",
1455 "ch 1397 "ch8", "ch9", "ch10", "ch11",
1456 "ch 1398 "ch12";
1457 clocks = <&cpg CPG_MO 1399 clocks = <&cpg CPG_MOD 502>;
1458 clock-names = "fck"; 1400 clock-names = "fck";
1459 power-domains = <&sys 1401 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1460 resets = <&cpg 502>; 1402 resets = <&cpg 502>;
1461 #dma-cells = <1>; 1403 #dma-cells = <1>;
1462 dma-channels = <13>; 1404 dma-channels = <13>;
1463 }; 1405 };
1464 1406
1465 audma1: dma-controller@ec7200 1407 audma1: dma-controller@ec720000 {
1466 compatible = "renesas 1408 compatible = "renesas,dmac-r8a7744",
1467 "renesas 1409 "renesas,rcar-dmac";
1468 reg = <0 0xec720000 0 1410 reg = <0 0xec720000 0 0x10000>;
1469 interrupts = <GIC_SPI 1411 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1470 <GIC_SPI 1412 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1471 <GIC_SPI 1413 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1472 <GIC_SPI 1414 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1473 <GIC_SPI 1415 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1474 <GIC_SPI 1416 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1475 <GIC_SPI 1417 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1476 <GIC_SPI 1418 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1477 <GIC_SPI 1419 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1478 <GIC_SPI 1420 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1479 <GIC_SPI 1421 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1480 <GIC_SPI 1422 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1481 <GIC_SPI 1423 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1482 <GIC_SPI 1424 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1483 interrupt-names = "er 1425 interrupt-names = "error",
1484 "ch 1426 "ch0", "ch1", "ch2", "ch3",
1485 "ch 1427 "ch4", "ch5", "ch6", "ch7",
1486 "ch 1428 "ch8", "ch9", "ch10", "ch11",
1487 "ch 1429 "ch12";
1488 clocks = <&cpg CPG_MO 1430 clocks = <&cpg CPG_MOD 501>;
1489 clock-names = "fck"; 1431 clock-names = "fck";
1490 power-domains = <&sys 1432 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1491 resets = <&cpg 501>; 1433 resets = <&cpg 501>;
1492 #dma-cells = <1>; 1434 #dma-cells = <1>;
1493 dma-channels = <13>; 1435 dma-channels = <13>;
1494 }; 1436 };
1495 1437
1496 /* 1438 /*
1497 * pci1 and xhci share the sa 1439 * pci1 and xhci share the same phy, therefore only one of them
1498 * can be active at any one t 1440 * can be active at any one time. If both of them are enabled,
1499 * a race condition will dete 1441 * a race condition will determine who'll control the phy.
1500 * A firmware file is needed 1442 * A firmware file is needed by the xhci driver in order for
1501 * USB 3.0 to work properly. 1443 * USB 3.0 to work properly.
1502 */ 1444 */
1503 xhci: usb@ee000000 { 1445 xhci: usb@ee000000 {
1504 compatible = "renesas 1446 compatible = "renesas,xhci-r8a7744",
1505 "renesas 1447 "renesas,rcar-gen2-xhci";
1506 reg = <0 0xee000000 0 1448 reg = <0 0xee000000 0 0xc00>;
1507 interrupts = <GIC_SPI 1449 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1508 clocks = <&cpg CPG_MO 1450 clocks = <&cpg CPG_MOD 328>;
1509 power-domains = <&sys 1451 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1510 resets = <&cpg 328>; 1452 resets = <&cpg 328>;
1511 phys = <&usb2 1>; 1453 phys = <&usb2 1>;
1512 phy-names = "usb"; 1454 phy-names = "usb";
1513 status = "disabled"; 1455 status = "disabled";
1514 }; 1456 };
1515 1457
1516 pci0: pci@ee090000 { 1458 pci0: pci@ee090000 {
1517 compatible = "renesas 1459 compatible = "renesas,pci-r8a7744",
1518 "renesas 1460 "renesas,pci-rcar-gen2";
1519 device_type = "pci"; 1461 device_type = "pci";
1520 reg = <0 0xee090000 0 1462 reg = <0 0xee090000 0 0xc00>,
1521 <0 0xee080000 0 1463 <0 0xee080000 0 0x1100>;
1522 interrupts = <GIC_SPI 1464 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1523 clocks = <&cpg CPG_MO 1465 clocks = <&cpg CPG_MOD 703>;
1524 power-domains = <&sys 1466 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1525 resets = <&cpg 703>; 1467 resets = <&cpg 703>;
1526 status = "disabled"; 1468 status = "disabled";
1527 1469
1528 bus-range = <0 0>; 1470 bus-range = <0 0>;
1529 #address-cells = <3>; 1471 #address-cells = <3>;
1530 #size-cells = <2>; 1472 #size-cells = <2>;
1531 #interrupt-cells = <1 1473 #interrupt-cells = <1>;
1532 ranges = <0x02000000 1474 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1533 interrupt-map-mask = 1475 interrupt-map-mask = <0xf800 0 0 0x7>;
1534 interrupt-map = <0x00 1476 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1535 <0x08 1477 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1536 <0x10 1478 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1537 1479
1538 usb@1,0 { 1480 usb@1,0 {
1539 reg = <0x800 1481 reg = <0x800 0 0 0 0>;
1540 phys = <&usb0 1482 phys = <&usb0 0>;
1541 phy-names = " 1483 phy-names = "usb";
1542 }; 1484 };
1543 1485
1544 usb@2,0 { 1486 usb@2,0 {
1545 reg = <0x1000 1487 reg = <0x1000 0 0 0 0>;
1546 phys = <&usb0 1488 phys = <&usb0 0>;
1547 phy-names = " 1489 phy-names = "usb";
1548 }; 1490 };
1549 }; 1491 };
1550 1492
1551 pci1: pci@ee0d0000 { 1493 pci1: pci@ee0d0000 {
1552 compatible = "renesas 1494 compatible = "renesas,pci-r8a7744",
1553 "renesas 1495 "renesas,pci-rcar-gen2";
1554 device_type = "pci"; 1496 device_type = "pci";
1555 reg = <0 0xee0d0000 0 1497 reg = <0 0xee0d0000 0 0xc00>,
1556 <0 0xee0c0000 0 1498 <0 0xee0c0000 0 0x1100>;
1557 interrupts = <GIC_SPI 1499 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1558 clocks = <&cpg CPG_MO 1500 clocks = <&cpg CPG_MOD 703>;
1559 power-domains = <&sys 1501 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1560 resets = <&cpg 703>; 1502 resets = <&cpg 703>;
1561 status = "disabled"; 1503 status = "disabled";
1562 1504
1563 bus-range = <1 1>; 1505 bus-range = <1 1>;
1564 #address-cells = <3>; 1506 #address-cells = <3>;
1565 #size-cells = <2>; 1507 #size-cells = <2>;
1566 #interrupt-cells = <1 1508 #interrupt-cells = <1>;
1567 ranges = <0x02000000 1509 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1568 interrupt-map-mask = 1510 interrupt-map-mask = <0xf800 0 0 0x7>;
1569 interrupt-map = <0x00 1511 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1570 <0x08 1512 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1571 <0x10 1513 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1572 1514
1573 usb@1,0 { 1515 usb@1,0 {
1574 reg = <0x1080 1516 reg = <0x10800 0 0 0 0>;
1575 phys = <&usb2 1517 phys = <&usb2 0>;
1576 phy-names = " 1518 phy-names = "usb";
1577 }; 1519 };
1578 1520
1579 usb@2,0 { 1521 usb@2,0 {
1580 reg = <0x1100 1522 reg = <0x11000 0 0 0 0>;
1581 phys = <&usb2 1523 phys = <&usb2 0>;
1582 phy-names = " 1524 phy-names = "usb";
1583 }; 1525 };
1584 }; 1526 };
1585 1527
1586 sdhi0: mmc@ee100000 { 1528 sdhi0: mmc@ee100000 {
1587 compatible = "renesas 1529 compatible = "renesas,sdhi-r8a7744",
1588 "renesas 1530 "renesas,rcar-gen2-sdhi";
1589 reg = <0 0xee100000 0 1531 reg = <0 0xee100000 0 0x328>;
1590 interrupts = <GIC_SPI 1532 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1591 clocks = <&cpg CPG_MO 1533 clocks = <&cpg CPG_MOD 314>;
1592 dmas = <&dmac0 0xcd>, 1534 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1593 <&dmac1 0xcd>, 1535 <&dmac1 0xcd>, <&dmac1 0xce>;
1594 dma-names = "tx", "rx 1536 dma-names = "tx", "rx", "tx", "rx";
1595 max-frequency = <1950 1537 max-frequency = <195000000>;
1596 power-domains = <&sys 1538 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1597 resets = <&cpg 314>; 1539 resets = <&cpg 314>;
1598 status = "disabled"; 1540 status = "disabled";
1599 }; 1541 };
1600 1542
1601 sdhi1: mmc@ee140000 { 1543 sdhi1: mmc@ee140000 {
1602 compatible = "renesas 1544 compatible = "renesas,sdhi-r8a7744",
1603 "renesas 1545 "renesas,rcar-gen2-sdhi";
1604 reg = <0 0xee140000 0 1546 reg = <0 0xee140000 0 0x100>;
1605 interrupts = <GIC_SPI 1547 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1606 clocks = <&cpg CPG_MO 1548 clocks = <&cpg CPG_MOD 312>;
1607 dmas = <&dmac0 0xc1>, 1549 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1608 <&dmac1 0xc1>, 1550 <&dmac1 0xc1>, <&dmac1 0xc2>;
1609 dma-names = "tx", "rx 1551 dma-names = "tx", "rx", "tx", "rx";
1610 max-frequency = <9750 1552 max-frequency = <97500000>;
1611 power-domains = <&sys 1553 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1612 resets = <&cpg 312>; 1554 resets = <&cpg 312>;
1613 status = "disabled"; 1555 status = "disabled";
1614 }; 1556 };
1615 1557
1616 sdhi2: mmc@ee160000 { 1558 sdhi2: mmc@ee160000 {
1617 compatible = "renesas 1559 compatible = "renesas,sdhi-r8a7744",
1618 "renesas 1560 "renesas,rcar-gen2-sdhi";
1619 reg = <0 0xee160000 0 1561 reg = <0 0xee160000 0 0x100>;
1620 interrupts = <GIC_SPI 1562 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1621 clocks = <&cpg CPG_MO 1563 clocks = <&cpg CPG_MOD 311>;
1622 dmas = <&dmac0 0xd3>, 1564 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1623 <&dmac1 0xd3>, 1565 <&dmac1 0xd3>, <&dmac1 0xd4>;
1624 dma-names = "tx", "rx 1566 dma-names = "tx", "rx", "tx", "rx";
1625 max-frequency = <9750 1567 max-frequency = <97500000>;
1626 power-domains = <&sys 1568 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1627 resets = <&cpg 311>; 1569 resets = <&cpg 311>;
1628 status = "disabled"; 1570 status = "disabled";
1629 }; 1571 };
1630 1572
1631 mmcif0: mmc@ee200000 { 1573 mmcif0: mmc@ee200000 {
1632 compatible = "renesas 1574 compatible = "renesas,mmcif-r8a7744",
1633 "renesas 1575 "renesas,sh-mmcif";
1634 reg = <0 0xee200000 0 1576 reg = <0 0xee200000 0 0x80>;
1635 interrupts = <GIC_SPI 1577 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1636 clocks = <&cpg CPG_MO 1578 clocks = <&cpg CPG_MOD 315>;
1637 dmas = <&dmac0 0xd1>, 1579 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1638 <&dmac1 0xd1>, 1580 <&dmac1 0xd1>, <&dmac1 0xd2>;
1639 dma-names = "tx", "rx 1581 dma-names = "tx", "rx", "tx", "rx";
1640 power-domains = <&sys 1582 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1641 resets = <&cpg 315>; 1583 resets = <&cpg 315>;
1642 reg-io-width = <4>; 1584 reg-io-width = <4>;
1643 max-frequency = <9750 1585 max-frequency = <97500000>;
1644 status = "disabled"; 1586 status = "disabled";
1645 }; 1587 };
1646 1588
1647 gic: interrupt-controller@f10 1589 gic: interrupt-controller@f1001000 {
1648 compatible = "arm,gic 1590 compatible = "arm,gic-400";
1649 #interrupt-cells = <3 1591 #interrupt-cells = <3>;
1650 #address-cells = <0>; 1592 #address-cells = <0>;
1651 interrupt-controller; 1593 interrupt-controller;
1652 reg = <0 0xf1001000 0 1594 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1653 <0 0xf1004000 0 1595 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1654 interrupts = <GIC_PPI 1596 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1655 clocks = <&cpg CPG_MO 1597 clocks = <&cpg CPG_MOD 408>;
1656 clock-names = "clk"; 1598 clock-names = "clk";
1657 power-domains = <&sys 1599 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1658 resets = <&cpg 408>; 1600 resets = <&cpg 408>;
1659 }; 1601 };
1660 1602
1661 pciec: pcie@fe000000 { 1603 pciec: pcie@fe000000 {
1662 compatible = "renesas 1604 compatible = "renesas,pcie-r8a7744",
1663 "renesas 1605 "renesas,pcie-rcar-gen2";
1664 reg = <0 0xfe000000 0 1606 reg = <0 0xfe000000 0 0x80000>;
1665 #address-cells = <3>; 1607 #address-cells = <3>;
1666 #size-cells = <2>; 1608 #size-cells = <2>;
1667 bus-range = <0x00 0xf 1609 bus-range = <0x00 0xff>;
1668 device_type = "pci"; 1610 device_type = "pci";
1669 ranges = <0x01000000 1611 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1670 <0x02000000 1612 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1671 <0x02000000 1613 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1672 <0x42000000 1614 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1673 /* Map all possible D 1615 /* Map all possible DDR as inbound ranges */
1674 dma-ranges = <0x42000 1616 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
1675 <0x43000 1617 <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1676 interrupts = <GIC_SPI 1618 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1677 <GIC_SPI 1619 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1678 <GIC_SPI 1620 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1679 #interrupt-cells = <1 1621 #interrupt-cells = <1>;
1680 interrupt-map-mask = 1622 interrupt-map-mask = <0 0 0 0>;
1681 interrupt-map = <0 0 1623 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1682 clocks = <&cpg CPG_MO 1624 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1683 clock-names = "pcie", 1625 clock-names = "pcie", "pcie_bus";
1684 power-domains = <&sys 1626 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1685 resets = <&cpg 319>; 1627 resets = <&cpg 319>;
1686 status = "disabled"; 1628 status = "disabled";
1687 }; 1629 };
1688 1630
1689 vsp@fe928000 { 1631 vsp@fe928000 {
1690 compatible = "renesas 1632 compatible = "renesas,vsp1";
1691 reg = <0 0xfe928000 0 1633 reg = <0 0xfe928000 0 0x8000>;
1692 interrupts = <GIC_SPI 1634 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1693 clocks = <&cpg CPG_MO 1635 clocks = <&cpg CPG_MOD 131>;
1694 power-domains = <&sys 1636 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1695 resets = <&cpg 131>; 1637 resets = <&cpg 131>;
1696 }; 1638 };
1697 1639
1698 vsp@fe930000 { 1640 vsp@fe930000 {
1699 compatible = "renesas 1641 compatible = "renesas,vsp1";
1700 reg = <0 0xfe930000 0 1642 reg = <0 0xfe930000 0 0x8000>;
1701 interrupts = <GIC_SPI 1643 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1702 clocks = <&cpg CPG_MO 1644 clocks = <&cpg CPG_MOD 128>;
1703 power-domains = <&sys 1645 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1704 resets = <&cpg 128>; 1646 resets = <&cpg 128>;
1705 }; 1647 };
1706 1648
1707 vsp@fe938000 { 1649 vsp@fe938000 {
1708 compatible = "renesas 1650 compatible = "renesas,vsp1";
1709 reg = <0 0xfe938000 0 1651 reg = <0 0xfe938000 0 0x8000>;
1710 interrupts = <GIC_SPI 1652 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1711 clocks = <&cpg CPG_MO 1653 clocks = <&cpg CPG_MOD 127>;
1712 power-domains = <&sys 1654 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1713 resets = <&cpg 127>; 1655 resets = <&cpg 127>;
1714 }; 1656 };
1715 1657
1716 du: display@feb00000 { 1658 du: display@feb00000 {
1717 compatible = "renesas 1659 compatible = "renesas,du-r8a7744";
1718 reg = <0 0xfeb00000 0 1660 reg = <0 0xfeb00000 0 0x40000>;
1719 interrupts = <GIC_SPI 1661 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1720 <GIC_SPI 1662 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1721 clocks = <&cpg CPG_MO 1663 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1722 clock-names = "du.0", 1664 clock-names = "du.0", "du.1";
1723 resets = <&cpg 724>; 1665 resets = <&cpg 724>;
1724 reset-names = "du.0"; 1666 reset-names = "du.0";
1725 status = "disabled"; 1667 status = "disabled";
1726 1668
1727 ports { 1669 ports {
1728 #address-cell 1670 #address-cells = <1>;
1729 #size-cells = 1671 #size-cells = <0>;
1730 1672
1731 port@0 { 1673 port@0 {
1732 reg = 1674 reg = <0>;
1733 du_ou 1675 du_out_rgb: endpoint {
1734 }; 1676 };
1735 }; 1677 };
1736 port@1 { 1678 port@1 {
1737 reg = 1679 reg = <1>;
1738 du_ou 1680 du_out_lvds0: endpoint {
1739 1681 remote-endpoint = <&lvds0_in>;
1740 }; 1682 };
1741 }; 1683 };
1742 }; 1684 };
1743 }; 1685 };
1744 1686
1745 lvds0: lvds@feb90000 { 1687 lvds0: lvds@feb90000 {
1746 compatible = "renesas 1688 compatible = "renesas,r8a7744-lvds";
1747 reg = <0 0xfeb90000 0 1689 reg = <0 0xfeb90000 0 0x1c>;
1748 clocks = <&cpg CPG_MO 1690 clocks = <&cpg CPG_MOD 726>;
1749 power-domains = <&sys 1691 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1750 resets = <&cpg 726>; 1692 resets = <&cpg 726>;
1751 status = "disabled"; 1693 status = "disabled";
1752 1694
1753 ports { 1695 ports {
1754 #address-cell 1696 #address-cells = <1>;
1755 #size-cells = 1697 #size-cells = <0>;
1756 1698
1757 port@0 { 1699 port@0 {
1758 reg = 1700 reg = <0>;
1759 lvds0 1701 lvds0_in: endpoint {
1760 1702 remote-endpoint = <&du_out_lvds0>;
1761 }; 1703 };
1762 }; 1704 };
1763 port@1 { 1705 port@1 {
1764 reg = 1706 reg = <1>;
1765 lvds0 1707 lvds0_out: endpoint {
1766 }; 1708 };
1767 }; 1709 };
1768 }; 1710 };
1769 }; 1711 };
1770 1712
1771 prr: chipid@ff000044 { 1713 prr: chipid@ff000044 {
1772 compatible = "renesas 1714 compatible = "renesas,prr";
1773 reg = <0 0xff000044 0 1715 reg = <0 0xff000044 0 4>;
1774 }; 1716 };
1775 1717
1776 cmt0: timer@ffca0000 { 1718 cmt0: timer@ffca0000 {
1777 compatible = "renesas 1719 compatible = "renesas,r8a7744-cmt0",
1778 "renesas 1720 "renesas,rcar-gen2-cmt0";
1779 reg = <0 0xffca0000 0 1721 reg = <0 0xffca0000 0 0x1004>;
1780 interrupts = <GIC_SPI 1722 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1781 <GIC_SPI 1723 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1782 clocks = <&cpg CPG_MO 1724 clocks = <&cpg CPG_MOD 124>;
1783 clock-names = "fck"; 1725 clock-names = "fck";
1784 power-domains = <&sys 1726 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1785 resets = <&cpg 124>; 1727 resets = <&cpg 124>;
1786 status = "disabled"; 1728 status = "disabled";
1787 }; 1729 };
1788 1730
1789 cmt1: timer@e6130000 { 1731 cmt1: timer@e6130000 {
1790 compatible = "renesas 1732 compatible = "renesas,r8a7744-cmt1",
1791 "renesas 1733 "renesas,rcar-gen2-cmt1";
1792 reg = <0 0xe6130000 0 1734 reg = <0 0xe6130000 0 0x1004>;
1793 interrupts = <GIC_SPI 1735 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1794 <GIC_SPI 1736 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1795 <GIC_SPI 1737 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1796 <GIC_SPI 1738 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1797 <GIC_SPI 1739 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1798 <GIC_SPI 1740 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1799 <GIC_SPI 1741 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1800 <GIC_SPI 1742 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1801 clocks = <&cpg CPG_MO 1743 clocks = <&cpg CPG_MOD 329>;
1802 clock-names = "fck"; 1744 clock-names = "fck";
1803 power-domains = <&sys 1745 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1804 resets = <&cpg 329>; 1746 resets = <&cpg 329>;
1805 status = "disabled"; 1747 status = "disabled";
1806 }; 1748 };
1807 }; 1749 };
1808 1750
1809 thermal-zones { 1751 thermal-zones {
1810 cpu_thermal: cpu-thermal { 1752 cpu_thermal: cpu-thermal {
1811 polling-delay-passive 1753 polling-delay-passive = <0>;
1812 polling-delay = <0>; 1754 polling-delay = <0>;
1813 1755
1814 thermal-sensors = <&t 1756 thermal-sensors = <&thermal>;
1815 1757
1816 trips { 1758 trips {
1817 cpu-crit { 1759 cpu-crit {
1818 tempe 1760 temperature = <95000>;
1819 hyste 1761 hysteresis = <0>;
1820 type 1762 type = "critical";
1821 }; 1763 };
1822 }; 1764 };
1823 1765
1824 cooling-maps { 1766 cooling-maps {
1825 }; 1767 };
1826 }; 1768 };
1827 }; 1769 };
1828 1770
1829 timer { 1771 timer {
1830 compatible = "arm,armv7-timer 1772 compatible = "arm,armv7-timer";
1831 interrupts-extended = <&gic G 1773 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1832 <&gic G 1774 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1833 <&gic G 1775 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1834 <&gic G 1776 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1835 interrupt-names = "sec-phys", <<
1836 }; 1777 };
1837 1778
1838 /* External USB clock - can be overri 1779 /* External USB clock - can be overridden by the board */
1839 usb_extal_clk: usb_extal { 1780 usb_extal_clk: usb_extal {
1840 compatible = "fixed-clock"; 1781 compatible = "fixed-clock";
1841 #clock-cells = <0>; 1782 #clock-cells = <0>;
1842 clock-frequency = <48000000>; 1783 clock-frequency = <48000000>;
1843 }; 1784 };
1844 }; 1785 };
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