1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the Wheat board
4 *
5 * Copyright (C) 2016 Renesas Electronics Corp
6 * Copyright (C) 2016 Cogent Embedded, Inc.
7 */
8
9 /dts-v1/;
10 #include "r8a7792.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13
14 / {
15 model = "Wheat";
16 compatible = "renesas,wheat", "renesas
17
18 aliases {
19 serial0 = &scif0;
20 };
21
22 chosen {
23 bootargs = "ignore_loglevel rw
24 stdout-path = "serial0:115200n
25 };
26
27 memory@40000000 {
28 device_type = "memory";
29 reg = <0 0x40000000 0 0x400000
30 };
31
32 d1_8v: regulator-1v8 {
33 compatible = "regulator-fixed"
34 regulator-name = "D1.8V";
35 regulator-min-microvolt = <180
36 regulator-max-microvolt = <180
37 regulator-boot-on;
38 regulator-always-on;
39 };
40
41 d3_3v: regulator-3v3 {
42 compatible = "regulator-fixed"
43 regulator-name = "D3.3V";
44 regulator-min-microvolt = <330
45 regulator-max-microvolt = <330
46 regulator-boot-on;
47 regulator-always-on;
48 };
49
50 keyboard {
51 compatible = "gpio-keys";
52
53 key-a {
54 linux,code = <KEY_A>;
55 label = "SW2";
56 wakeup-source;
57 debounce-interval = <2
58 gpios = <&gpio3 20 GPI
59 };
60 key-b {
61 linux,code = <KEY_B>;
62 label = "SW3";
63 wakeup-source;
64 debounce-interval = <2
65 gpios = <&gpio11 2 GPI
66 };
67 };
68
69 vcc_sdhi0: regulator-vcc-sdhi0 {
70 compatible = "regulator-fixed"
71
72 regulator-name = "SDHI0 Vcc";
73 regulator-min-microvolt = <330
74 regulator-max-microvolt = <330
75
76 gpio = <&gpio11 12 GPIO_ACTIVE
77 enable-active-high;
78 };
79
80 hdmi-out0 {
81 compatible = "hdmi-connector";
82 type = "a";
83
84 port {
85 hdmi_con0: endpoint {
86 remote-endpoin
87 };
88 };
89 };
90
91 hdmi-out1 {
92 compatible = "hdmi-connector";
93 type = "a";
94
95 port {
96 hdmi_con1: endpoint {
97 remote-endpoin
98 };
99 };
100 };
101
102 osc2_clk: osc2 {
103 compatible = "fixed-clock";
104 #clock-cells = <0>;
105 clock-frequency = <74250000>;
106 };
107 };
108
109 &extal_clk {
110 clock-frequency = <20000000>;
111 };
112
113 &lbsc {
114 ethernet@18000000 {
115 compatible = "smsc,lan89218",
116 reg = <0x18000000 0x100>;
117 phy-mode = "mii";
118 interrupt-parent = <&irqc>;
119 interrupts = <0 IRQ_TYPE_EDGE_
120 smsc,irq-push-pull;
121 smsc,save-mac-address;
122 reg-io-width = <4>;
123 vddvario-supply = <&d3_3v>;
124 vdd33a-supply = <&d3_3v>;
125
126 pinctrl-0 = <&lan89218_pins>;
127 pinctrl-names = "default";
128 };
129 };
130
131 &pfc {
132 scif0_pins: scif0 {
133 groups = "scif0_data";
134 function = "scif0";
135 };
136
137 lan89218_pins: lan89218 {
138 intc {
139 groups = "intc_irq0";
140 function = "intc";
141 };
142 lbsc {
143 groups = "lbsc_ex_cs0"
144 function = "lbsc";
145 };
146 };
147
148 can0_pins: can0 {
149 groups = "can0_data";
150 function = "can0";
151 };
152
153 can1_pins: can1 {
154 groups = "can1_data";
155 function = "can1";
156 };
157
158 sdhi0_pins: sdhi0 {
159 groups = "sdhi0_data4", "sdhi0
160 function = "sdhi0";
161 };
162
163 qspi_pins: qspi {
164 groups = "qspi_ctrl", "qspi_da
165 function = "qspi";
166 };
167
168 du0_pins: du0 {
169 groups = "du0_rgb888", "du0_sy
170 function = "du0";
171 };
172
173 du1_pins: du1 {
174 groups = "du1_rgb666", "du1_sy
175 function = "du1";
176 };
177 };
178
179 &rwdt {
180 timeout-sec = <60>;
181 status = "okay";
182 };
183
184 &scif0 {
185 pinctrl-0 = <&scif0_pins>;
186 pinctrl-names = "default";
187
188 status = "okay";
189 };
190
191 &can0 {
192 pinctrl-0 = <&can0_pins>;
193 pinctrl-names = "default";
194
195 status = "okay";
196 };
197
198 &can1 {
199 pinctrl-0 = <&can1_pins>;
200 pinctrl-names = "default";
201
202 status = "okay";
203 };
204
205 &sdhi0 {
206 pinctrl-0 = <&sdhi0_pins>;
207 pinctrl-names = "default";
208
209 vmmc-supply = <&vcc_sdhi0>;
210 cd-gpios = <&gpio11 11 GPIO_ACTIVE_LOW
211 status = "okay";
212 };
213
214 &qspi {
215 pinctrl-0 = <&qspi_pins>;
216 pinctrl-names = "default";
217 status = "okay";
218
219 flash@0 {
220 compatible = "spansion,s25fl51
221 reg = <0>;
222 spi-max-frequency = <30000000>
223 spi-tx-bus-width = <4>;
224 spi-rx-bus-width = <4>;
225 spi-cpol;
226 spi-cpha;
227 m25p,fast-read;
228
229 partitions {
230 compatible = "fixed-pa
231 #address-cells = <1>;
232 #size-cells = <1>;
233
234 partition@0 {
235 label = "loade
236 reg = <0x00000
237 read-only;
238 };
239 partition@40000 {
240 label = "user"
241 reg = <0x00040
242 read-only;
243 };
244 partition@440000 {
245 label = "flash
246 reg = <0x00440
247 };
248 };
249 };
250 };
251
252 &i2c4 {
253 status = "okay";
254 clock-frequency = <400000>;
255
256 /*
257 * The adv75xx resets its addresses to
258 * Because we have two ADV7513 devices
259 * both of them away from the defaults
260 */
261 hdmi@3d {
262 compatible = "adi,adv7513";
263 reg = <0x3d>, <0x4d>, <0x2d>,
264 reg-names = "main", "edid", "c
265
266 avdd-supply = <&d1_8v>;
267 dvdd-supply = <&d1_8v>;
268 pvdd-supply = <&d1_8v>;
269 dvdd-3v-supply = <&d3_3v>;
270 bgvdd-supply = <&d1_8v>;
271
272 adi,input-depth = <8>;
273 adi,input-colorspace = "rgb";
274 adi,input-clock = "1x";
275
276 ports {
277 #address-cells = <1>;
278 #size-cells = <0>;
279
280 port@0 {
281 reg = <0>;
282 adv7513_0_in:
283 remote
284 };
285 };
286
287 port@1 {
288 reg = <1>;
289 adv7513_0_out:
290 remote
291 };
292 };
293 };
294 };
295
296 hdmi@39 {
297 compatible = "adi,adv7513";
298 reg = <0x39>, <0x49>, <0x29>,
299 reg-names = "main", "edid", "c
300
301 avdd-supply = <&d1_8v>;
302 dvdd-supply = <&d1_8v>;
303 pvdd-supply = <&d1_8v>;
304 dvdd-3v-supply = <&d3_3v>;
305 bgvdd-supply = <&d1_8v>;
306
307 adi,input-depth = <8>;
308 adi,input-colorspace = "rgb";
309 adi,input-clock = "1x";
310
311 ports {
312 #address-cells = <1>;
313 #size-cells = <0>;
314
315 port@0 {
316 reg = <0>;
317 adv7513_1_in:
318 remote
319 };
320 };
321
322 port@1 {
323 reg = <1>;
324 adv7513_1_out:
325 remote
326 };
327 };
328 };
329 };
330 };
331
332 &du {
333 pinctrl-0 = <&du0_pins>, <&du1_pins>;
334 pinctrl-names = "default";
335
336 clocks = <&cpg CPG_MOD 724>, <&cpg CPG
337 clock-names = "du.0", "du.1", "dclkin.
338 status = "okay";
339
340 ports {
341 port@0 {
342 endpoint {
343 remote-endpoin
344 };
345 };
346 port@1 {
347 endpoint {
348 remote-endpoin
349 };
350 };
351 };
352 };
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