1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3 /dts-v1/;
4
5 #include "rk3036.dtsi"
6
7 / {
8 model = "Rockchip RK3036 KylinBoard";
9 compatible = "rockchip,rk3036-kylin",
10
11 chosen {
12 stdout-path = "serial2:115200n
13 };
14
15 memory@60000000 {
16 device_type = "memory";
17 reg = <0x60000000 0x20000000>;
18 };
19
20 hdmi_con: hdmi-con {
21 compatible = "hdmi-connector";
22 type = "a";
23
24 port {
25 hdmi_con_in: endpoint
26 remote-endpoin
27 };
28 };
29 };
30
31 leds: gpio-leds {
32 compatible = "gpio-leds";
33
34 work_led: led-0 {
35 gpios = <&gpio2 RK_PD6
36 label = "kylin:red:led
37 pinctrl-names = "defau
38 pinctrl-0 = <&led_ctl>
39 };
40 };
41
42 sdio_pwrseq: sdio-pwrseq {
43 compatible = "mmc-pwrseq-simpl
44 pinctrl-names = "default";
45 pinctrl-0 = <&bt_wake_h>;
46
47 /*
48 * On the module itself this i
49 * on the actual card populate
50 * - SDIO_RESET_L_WL_REG_ON
51 * - SDIO_RESET_L_WL_RST
52 * - SDIO_RESET_L_BT_EN
53 */
54 reset-gpios = <&gpio0 RK_PD2 G
55 <&gpio0 RK_PD3 G
56 <&gpio2 RK_PB1 G
57 };
58
59 sound {
60 compatible = "simple-audio-car
61 simple-audio-card,format = "i2
62 simple-audio-card,name = "rock
63 simple-audio-card,mclk-fs = <5
64 simple-audio-card,widgets =
65 "Microphone", "Microph
66 "Headphone", "Headphon
67 simple-audio-card,routing =
68 "MIC1", "Microphone Ja
69 "MIC2", "Microphone Ja
70 "Microphone Jack", "mi
71 "Headphone Jack", "HPO
72 "Headphone Jack", "HPO
73
74 simple-audio-card,cpu {
75 sound-dai = <&i2s>;
76 };
77
78 simple-audio-card,codec {
79 sound-dai = <&rt5616>;
80 };
81 };
82
83 vcc_sys: vsys-regulator {
84 compatible = "regulator-fixed"
85 regulator-name = "vcc_sys";
86 regulator-min-microvolt = <500
87 regulator-max-microvolt = <500
88 regulator-always-on;
89 regulator-boot-on;
90 };
91 };
92
93 &acodec {
94 status = "okay";
95 };
96
97 &emac {
98 phy = <&phy0>;
99 phy-reset-duration = <10>; /* millisec
100 phy-reset-gpios = <&gpio2 RK_PC6 GPIO_
101 pinctrl-names = "default";
102 pinctrl-0 = <&emac_xfer>, <&emac_mdio>
103 status = "okay";
104
105 mdio {
106 #address-cells = <1>;
107 #size-cells = <0>;
108
109 phy0: ethernet-phy@0 {
110 reg = <0>;
111 };
112 };
113 };
114
115 &emmc {
116 status = "okay";
117 };
118
119 &gpu {
120 mali-supply = <&vdd_gpu>;
121 status = "okay";
122 };
123
124 &hdmi {
125 status = "okay";
126 };
127
128 &hdmi_out {
129 hdmi_out_con: endpoint {
130 remote-endpoint = <&hdmi_con_i
131 };
132 };
133
134 &i2c1 {
135 clock-frequency = <400000>;
136
137 status = "okay";
138
139 rk808: pmic@1b {
140 compatible = "rockchip,rk808";
141 reg = <0x1b>;
142 interrupt-parent = <&gpio2>;
143 interrupts = <RK_PA2 IRQ_TYPE_
144 pinctrl-names = "default";
145 pinctrl-0 = <&pmic_int &global
146 rockchip,system-power-controll
147 wakeup-source;
148 #clock-cells = <1>;
149 clock-output-names = "xin32k",
150
151 vcc1-supply = <&vcc_sys>;
152 vcc2-supply = <&vcc_sys>;
153 vcc3-supply = <&vcc_sys>;
154 vcc4-supply = <&vcc_sys>;
155 vcc6-supply = <&vcc_sys>;
156 vcc7-supply = <&vcc_sys>;
157 vcc8-supply = <&vcc_18>;
158 vcc9-supply = <&vcc_io>;
159 vcc10-supply = <&vcc_io>;
160 vcc11-supply = <&vcc_sys>;
161 vcc12-supply = <&vcc_io>;
162 vddio-supply = <&vccio_pmu>;
163
164 regulators {
165 vdd_cpu: DCDC_REG1 {
166 regulator-alwa
167 regulator-boot
168 regulator-min-
169 regulator-max-
170 regulator-name
171 regulator-stat
172 regula
173 };
174 };
175
176 vdd_gpu: DCDC_REG2 {
177 regulator-alwa
178 regulator-boot
179 regulator-min-
180 regulator-max-
181 regulator-name
182 regulator-stat
183 regula
184 regula
185 };
186 };
187
188 vcc_ddr: DCDC_REG3 {
189 regulator-alwa
190 regulator-boot
191 regulator-name
192 regulator-stat
193 regula
194 };
195 };
196
197 vcc_io: DCDC_REG4 {
198 regulator-alwa
199 regulator-boot
200 regulator-min-
201 regulator-max-
202 regulator-name
203 regulator-stat
204 regula
205 regula
206 };
207 };
208
209 vccio_pmu: LDO_REG1 {
210 regulator-alwa
211 regulator-boot
212 regulator-min-
213 regulator-max-
214 regulator-name
215 regulator-stat
216 regula
217 regula
218 };
219 };
220
221 vcc_tp: LDO_REG2 {
222 regulator-alwa
223 regulator-boot
224 regulator-min-
225 regulator-max-
226 regulator-name
227 regulator-stat
228 regula
229 };
230 };
231
232 vdd_10: LDO_REG3 {
233 regulator-alwa
234 regulator-boot
235 regulator-min-
236 regulator-max-
237 regulator-name
238 regulator-stat
239 regula
240 regula
241 };
242 };
243
244 vcc18_lcd: LDO_REG4 {
245 regulator-alwa
246 regulator-boot
247 regulator-min-
248 regulator-max-
249 regulator-name
250 regulator-stat
251 regula
252 regula
253 };
254 };
255
256 vccio_sd: LDO_REG5 {
257 regulator-alwa
258 regulator-boot
259 regulator-min-
260 regulator-max-
261 regulator-name
262 regulator-stat
263 regula
264 regula
265 };
266 };
267
268 vout5: LDO_REG6 {
269 regulator-alwa
270 regulator-boot
271 regulator-min-
272 regulator-max-
273 regulator-name
274 regulator-stat
275 regula
276 regula
277 };
278 };
279
280 vcc_18: LDO_REG7 {
281 regulator-alwa
282 regulator-boot
283 regulator-min-
284 regulator-max-
285 regulator-name
286 regulator-stat
287 regula
288 regula
289 };
290 };
291
292 vcca_codec: LDO_REG8 {
293 regulator-alwa
294 regulator-boot
295 regulator-min-
296 regulator-max-
297 regulator-name
298 regulator-stat
299 regula
300 regula
301 };
302 };
303
304 vcc_wl: SWITCH_REG1 {
305 regulator-alwa
306 regulator-boot
307 regulator-name
308 regulator-stat
309 regula
310 };
311 };
312
313 vcc_lcd: SWITCH_REG2 {
314 regulator-alwa
315 regulator-boot
316 regulator-name
317 regulator-stat
318 regula
319 };
320 };
321 };
322 };
323 };
324
325 &i2c2 {
326 status = "okay";
327
328 rt5616: audio-codec@1b {
329 compatible = "realtek,rt5616";
330 reg = <0x1b>;
331 clocks = <&cru SCLK_I2S_OUT>;
332 clock-names = "mclk";
333 #sound-dai-cells = <0>;
334 };
335 };
336
337 &i2s {
338 status = "okay";
339 };
340
341 &sdio {
342 status = "okay";
343
344 bus-width = <4>;
345 cap-sd-highspeed;
346 cap-sdio-irq;
347 rockchip,default-sample-phase = <90>;
348 keep-power-in-suspend;
349 mmc-pwrseq = <&sdio_pwrseq>;
350 non-removable;
351 pinctrl-names = "default";
352 pinctrl-0 = <&sdio_clk &sdio_cmd &sdio
353 sd-uhs-sdr12;
354 sd-uhs-sdr25;
355 sd-uhs-sdr50;
356 sd-uhs-sdr104;
357 };
358
359 &sdmmc {
360 bus-width = <4>;
361 cap-mmc-highspeed;
362 cap-sd-highspeed;
363 card-detect-delay = <200>;
364 disable-wp;
365 pinctrl-names = "default";
366 pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>
367 };
368
369 &uart0 {
370 status = "okay";
371 };
372
373 &uart2 {
374 status = "okay";
375 };
376
377 &usb_host {
378 status = "okay";
379 };
380
381 &usb_otg {
382 status = "okay";
383 };
384
385 &vop {
386 status = "okay";
387 };
388
389 &vop_mmu {
390 status = "okay";
391 };
392
393 &pinctrl {
394 leds {
395 led_ctl: led-ctl {
396 rockchip,pins = <2 RK_
397 };
398 };
399
400 pmic {
401 pmic_int: pmic-int {
402 rockchip,pins = <2 RK_
403 };
404 };
405
406 sdio {
407 bt_wake_h: bt-wake-h {
408 rockchip,pins = <2 RK_
409 };
410 };
411
412 sdmmc {
413 sdmmc_pwr: sdmmc-pwr {
414 rockchip,pins = <2 RK_
415 };
416 };
417
418 suspend {
419 global_pwroff: global-pwroff {
420 rockchip,pins = <2 RK_
421 };
422 };
423 };
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