1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2017 Rockchip Electronics Co.
4 */
5
6 /dts-v1/;
7
8 #include "rk3128.dtsi"
9
10 / {
11 model = "Rockchip RK3128 Evaluation bo
12 compatible = "rockchip,rk3128-evb", "r
13
14 aliases {
15 mmc0 = &emmc;
16 };
17
18 chosen {
19 stdout-path = &uart2;
20 };
21
22 memory@60000000 {
23 device_type = "memory";
24 reg = <0x60000000 0x40000000>;
25 };
26
27 vcc5v0_otg: vcc5v0-otg-regulator {
28 compatible = "regulator-fixed"
29 gpio = <&gpio0 26 GPIO_ACTIVE_
30 pinctrl-names = "default";
31 pinctrl-0 = <&otg_vbus_drv>;
32 regulator-name = "vcc5v0_otg";
33 regulator-min-microvolt = <500
34 regulator-max-microvolt = <500
35 };
36
37 vcc5v0_host: vcc5v0-host-regulator {
38 compatible = "regulator-fixed"
39 gpio = <&gpio2 23 GPIO_ACTIVE_
40 pinctrl-names = "default";
41 pinctrl-0 = <&host_vbus_drv>;
42 regulator-name = "vcc5v0_host"
43 regulator-always-on;
44 regulator-min-microvolt = <500
45 regulator-max-microvolt = <500
46 };
47 };
48
49 &emmc {
50 bus-width = <8>;
51 pinctrl-names = "default";
52 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc
53 status = "okay";
54 };
55
56 &i2c1 {
57 status = "okay";
58
59 hym8563: rtc@51 {
60 compatible = "haoyu,hym8563";
61 reg = <0x51>;
62 #clock-cells = <0>;
63 clock-output-names = "xin32k";
64 };
65 };
66
67 &usb2phy {
68 status = "okay";
69 };
70
71 &usb2phy_host {
72 status = "okay";
73 };
74
75 &usb2phy_otg {
76 status = "okay";
77 };
78
79 &usb_host_ehci {
80 status = "okay";
81 };
82
83 &usb_host_ohci {
84 status = "okay";
85 };
86
87 &usb_otg {
88 vbus-supply = <&vcc5v0_otg>;
89 status = "okay";
90 };
91
92 &pinctrl {
93 usb-host {
94 host_vbus_drv: host-vbus-drv {
95 rockchip,pins = <2 RK_
96 };
97 };
98
99 usb-otg {
100 otg_vbus_drv: otg-vbus-drv {
101 rockchip,pins = <0 RK_
102 };
103 };
104 };
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