1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2015 Heiko Stuebner <heiko@snt
4 */
5
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/pwm/pwm.h>
9 #include "rk3288.dtsi"
10
11 / {
12 model = "Netxeon R89";
13 compatible = "netxeon,r89", "rockchip,
14
15 memory@0 {
16 device_type = "memory";
17 reg = <0x0 0x0 0x0 0x80000000>
18 };
19
20 ext_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 clock-frequency = <125000000>;
23 clock-output-names = "ext_gmac
24 #clock-cells = <0>;
25 };
26
27 gpio-keys {
28 compatible = "gpio-keys";
29 autorepeat;
30
31 pinctrl-names = "default";
32 pinctrl-0 = <&pwrbtn>;
33
34 key-power {
35 gpios = <&gpio0 RK_PA5
36 linux,code = <KEY_POWE
37 label = "GPIO Key Powe
38 linux,input-type = <1>
39 wakeup-source;
40 debounce-interval = <1
41 };
42 };
43
44 ir: ir-receiver {
45 compatible = "gpio-ir-receiver
46 gpios = <&gpio7 RK_PA0 GPIO_AC
47 pinctrl-names = "default";
48 pinctrl-0 = <&ir_int>;
49 };
50
51 vcc_host: vcc-host-regulator {
52 compatible = "regulator-fixed"
53 enable-active-high;
54 gpio = <&gpio0 RK_PB6 GPIO_ACT
55 pinctrl-names = "default";
56 pinctrl-0 = <&host_vbus_drv>;
57 regulator-name = "vcc_host";
58 regulator-always-on;
59 regulator-boot-on;
60 };
61
62 vcc_otg: vcc-otg-regulator {
63 compatible = "regulator-fixed"
64 enable-active-high;
65 gpio = <&gpio0 RK_PB4 GPIO_ACT
66 pinctrl-names = "default";
67 pinctrl-0 = <&otg_vbus_drv>;
68 regulator-name = "vcc_otg";
69 regulator-always-on;
70 regulator-boot-on;
71 };
72
73 vcc_sdmmc: sdmmc-regulator {
74 compatible = "regulator-fixed"
75 regulator-name = "sdmmc-supply
76 regulator-min-microvolt = <330
77 regulator-max-microvolt = <330
78 gpio = <&gpio7 RK_PB3 GPIO_ACT
79 startup-delay-us = <100000>;
80 vin-supply = <&vcc_io>;
81 };
82
83 vcc_sys: sys-regulator {
84 compatible = "regulator-fixed"
85 regulator-name = "sys-supply";
86 regulator-min-microvolt = <500
87 regulator-max-microvolt = <500
88 regulator-always-on;
89 regulator-boot-on;
90 };
91 };
92
93 &cpu0 {
94 cpu-supply = <&vdd_cpu>;
95 };
96
97 &cpu1 {
98 cpu-supply = <&vdd_cpu>;
99 };
100
101 &cpu2 {
102 cpu-supply = <&vdd_cpu>;
103 };
104
105 &cpu3 {
106 cpu-supply = <&vdd_cpu>;
107 };
108
109 &gmac {
110 phy-supply = <&vcc_lan>;
111 phy-mode = "rgmii";
112 clock_in_out = "input";
113 snps,reset-gpio = <&gpio4 RK_PA7 GPIO_
114 snps,reset-active-low;
115 snps,reset-delays-us = <0 10000 100000
116 assigned-clocks = <&cru SCLK_MAC>;
117 assigned-clock-parents = <&ext_gmac>;
118 pinctrl-names = "default";
119 pinctrl-0 = <&rgmii_pins>;
120 tx_delay = <0x30>;
121 rx_delay = <0x10>;
122 status = "okay";
123 };
124
125 &hdmi {
126 status = "okay";
127 };
128
129 &i2c0 {
130 status = "okay";
131
132 vdd_cpu: pmic@40 {
133 compatible = "silergy,syr827";
134 reg = <0x40>;
135 fcs,suspend-voltage-selector =
136 regulator-name = "VDD_CPU";
137 regulator-enable-ramp-delay =
138 regulator-min-microvolt = <850
139 regulator-max-microvolt = <135
140 regulator-ramp-delay = <8000>;
141 regulator-always-on;
142 regulator-boot-on;
143 vin-supply = <&vcc_sys>;
144 };
145
146 vdd_gpu: pmic@41 {
147 compatible = "silergy,syr828";
148 reg = <0x41>;
149 fcs,suspend-voltage-selector =
150 regulator-name = "VDD_GPU";
151 regulator-enable-ramp-delay =
152 regulator-min-microvolt = <850
153 regulator-max-microvolt = <135
154 regulator-ramp-delay = <8000>;
155 regulator-always-on;
156 regulator-boot-on;
157 vin-supply = <&vcc_sys>;
158 };
159
160 rtc@51 {
161 compatible = "haoyu,hym8563";
162 reg = <0x51>;
163 #clock-cells = <0>;
164 clock-output-names = "xin32k";
165 interrupt-parent = <&gpio0>;
166 interrupts = <RK_PA4 IRQ_TYPE_
167 pinctrl-names = "default";
168 pinctrl-0 = <&pmic_int>;
169 };
170
171 act8846: pmic@5a {
172 compatible = "active-semi,act8
173 reg = <0x5a>;
174 pinctrl-names = "default";
175 pinctrl-0 = <&pmic_vsel>, <&pw
176 system-power-controller;
177
178 regulators {
179 vcc_ddr: REG1 {
180 regulator-name
181 regulator-min-
182 regulator-max-
183 regulator-alwa
184 };
185
186 vcc_io: REG2 {
187 regulator-name
188 regulator-min-
189 regulator-max-
190 regulator-alwa
191 };
192
193 vdd_log: REG3 {
194 regulator-name
195 regulator-min-
196 regulator-max-
197 regulator-alwa
198 };
199
200 vcc_20: REG4 {
201 regulator-name
202 regulator-min-
203 regulator-max-
204 regulator-alwa
205 };
206
207 vccio_sd: REG5 {
208 regulator-name
209 regulator-min-
210 regulator-max-
211 regulator-alwa
212 };
213
214 vdd10_lcd: REG6 {
215 regulator-name
216 regulator-min-
217 regulator-max-
218 regulator-alwa
219 };
220
221 vcc_wl: REG7 {
222 regulator-name
223 regulator-min-
224 regulator-max-
225 regulator-alwa
226 };
227
228 vcca_33: REG8 {
229 regulator-name
230 regulator-min-
231 regulator-max-
232 regulator-alwa
233 };
234
235 vcc_lan: REG9 {
236 regulator-name
237 regulator-min-
238 regulator-max-
239 regulator-alwa
240 };
241
242 vdd_10: REG10 {
243 regulator-name
244 regulator-min-
245 regulator-max-
246 regulator-alwa
247 };
248
249 vcc_18: REG11 {
250 regulator-name
251 regulator-min-
252 regulator-max-
253 regulator-alwa
254 };
255
256 vcc18_lcd: REG12 {
257 regulator-name
258 regulator-min-
259 regulator-max-
260 regulator-alwa
261 };
262 };
263 };
264 };
265
266 &i2c5 {
267 status = "okay";
268 };
269
270 &pinctrl {
271 pcfg_output_high: pcfg-output-high {
272 output-high;
273 };
274
275 pcfg_output_low: pcfg-output-low {
276 output-low;
277 };
278
279 act8846 {
280 pmic_vsel: pmic-vsel {
281 rockchip,pins = <7 RK_
282 };
283
284 pwr_hold: pwr-hold {
285 rockchip,pins = <0 RK_
286 };
287 };
288
289 buttons {
290 pwrbtn: pwrbtn {
291 rockchip,pins = <0 RK_
292 };
293 };
294
295 ir {
296 ir_int: ir-int {
297 rockchip,pins = <7 RK_
298 };
299 };
300
301 pmic {
302 pmic_int: pmic-int {
303 rockchip,pins = <0 RK_
304 };
305 };
306
307 usb {
308 host_vbus_drv: host-vbus-drv {
309 rockchip,pins = <0 RK_
310 };
311
312 otg_vbus_drv: otg-vbus-drv {
313 rockchip,pins = <0 RK_
314 };
315 };
316 };
317
318 &pwm0 {
319 status = "okay";
320 };
321
322 &saradc {
323 vref-supply = <&vcc_18>;
324 status = "okay";
325 };
326
327 &sdmmc {
328 bus-width = <4>;
329 cap-mmc-highspeed;
330 cap-sd-highspeed;
331 card-detect-delay = <200>;
332 disable-wp;
333 pinctrl-names = "default";
334 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sd
335 vmmc-supply = <&vcc_sdmmc>;
336 vqmmc-supply = <&vccio_sd>;
337 status = "okay";
338 };
339
340 &tsadc {
341 rockchip,hw-tshut-mode = <0>;
342 rockchip,hw-tshut-polarity = <0>;
343 status = "okay";
344 };
345
346 &uart0 {
347 status = "okay";
348 };
349
350 &uart1 {
351 status = "okay";
352 };
353
354 &uart2 {
355 status = "okay";
356 };
357
358 &uart3 {
359 status = "okay";
360 };
361
362 &uart4 {
363 status = "okay";
364 };
365
366 &usb_host0_ehci {
367 status = "okay";
368 };
369
370 &usb_host1 {
371 status = "okay";
372 };
373
374 &usb_otg {
375 status = "okay";
376 };
377
378 &usbphy {
379 status = "okay";
380 };
381
382 &vopb {
383 status = "okay";
384 };
385
386 &vopb_mmu {
387 status = "okay";
388 };
389
390 &vopl {
391 status = "okay";
392 };
393
394 &vopl_mmu {
395 status = "okay";
396 };
397
398 &wdt {
399 status = "okay";
400 };
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