1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Google Veyron Minnie Rev 0+ board device tr 3 * Google Veyron Minnie Rev 0+ board device tree source
4 * 4 *
5 * Copyright 2015 Google, Inc 5 * Copyright 2015 Google, Inc
6 */ 6 */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi" 9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "rk3288-veyron-broadcom-bluetooth.dts 10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
11 11
12 / { 12 / {
13 model = "Google Minnie"; 13 model = "Google Minnie";
14 compatible = "google,veyron-minnie-rev 14 compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
15 "google,veyron-minnie-rev 15 "google,veyron-minnie-rev2", "google,veyron-minnie-rev1",
16 "google,veyron-minnie-rev 16 "google,veyron-minnie-rev0", "google,veyron-minnie",
17 "google,veyron", "rockchi 17 "google,veyron", "rockchip,rk3288";
18 18
19 volume_buttons: volume-buttons { 19 volume_buttons: volume-buttons {
20 compatible = "gpio-keys"; 20 compatible = "gpio-keys";
21 pinctrl-names = "default"; 21 pinctrl-names = "default";
22 pinctrl-0 = <&volum_down_l &vo 22 pinctrl-0 = <&volum_down_l &volum_up_l>;
23 23
24 key-volum-down { 24 key-volum-down {
25 label = "Volum_down"; 25 label = "Volum_down";
26 gpios = <&gpio5 RK_PB3 26 gpios = <&gpio5 RK_PB3 GPIO_ACTIVE_LOW>;
27 linux,code = <KEY_VOLU 27 linux,code = <KEY_VOLUMEDOWN>;
28 debounce-interval = <1 28 debounce-interval = <100>;
29 }; 29 };
30 30
31 key-volum-up { 31 key-volum-up {
32 label = "Volum_up"; 32 label = "Volum_up";
33 gpios = <&gpio5 RK_PB2 33 gpios = <&gpio5 RK_PB2 GPIO_ACTIVE_LOW>;
34 linux,code = <KEY_VOLU 34 linux,code = <KEY_VOLUMEUP>;
35 debounce-interval = <1 35 debounce-interval = <100>;
36 }; 36 };
37 }; 37 };
38 }; 38 };
39 39
40 &backlight { 40 &backlight {
41 /* Minnie panel PWM must be >= 1%, so 41 /* Minnie panel PWM must be >= 1%, so start non-zero brightness at 3 */
42 brightness-levels = <3 255>; 42 brightness-levels = <3 255>;
43 num-interpolated-steps = <252>; 43 num-interpolated-steps = <252>;
44 }; 44 };
45 45
46 &i2c_tunnel { 46 &i2c_tunnel {
47 battery: bq27500@55 { 47 battery: bq27500@55 {
48 compatible = "ti,bq27500"; 48 compatible = "ti,bq27500";
49 reg = <0x55>; 49 reg = <0x55>;
50 }; 50 };
51 }; 51 };
52 52
53 &i2c3 { 53 &i2c3 {
54 status = "okay"; 54 status = "okay";
55 55
56 clock-frequency = <400000>; 56 clock-frequency = <400000>;
57 i2c-scl-falling-time-ns = <50>; 57 i2c-scl-falling-time-ns = <50>;
58 i2c-scl-rising-time-ns = <300>; 58 i2c-scl-rising-time-ns = <300>;
59 59
60 touchscreen@10 { 60 touchscreen@10 {
61 compatible = "elan,ekth3500"; 61 compatible = "elan,ekth3500";
62 reg = <0x10>; 62 reg = <0x10>;
63 interrupt-parent = <&gpio2>; 63 interrupt-parent = <&gpio2>;
64 interrupts = <RK_PB6 IRQ_TYPE_ 64 interrupts = <RK_PB6 IRQ_TYPE_EDGE_FALLING>;
65 pinctrl-names = "default"; 65 pinctrl-names = "default";
66 pinctrl-0 = <&touch_int &touch 66 pinctrl-0 = <&touch_int &touch_rst>;
67 reset-gpios = <&gpio2 RK_PB7 G 67 reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
68 vcc33-supply = <&vcc33_touch>; 68 vcc33-supply = <&vcc33_touch>;
69 vccio-supply = <&vcc33_touch>; 69 vccio-supply = <&vcc33_touch>;
70 }; 70 };
71 }; 71 };
72 72
73 &panel { 73 &panel {
74 compatible = "auo,b101ean01"; 74 compatible = "auo,b101ean01";
75 75
76 /delete-node/ panel-timing; 76 /delete-node/ panel-timing;
77 77
78 panel-timing { 78 panel-timing {
79 clock-frequency = <66666667>; 79 clock-frequency = <66666667>;
80 hactive = <1280>; 80 hactive = <1280>;
81 hfront-porch = <18>; 81 hfront-porch = <18>;
82 hback-porch = <21>; 82 hback-porch = <21>;
83 hsync-len = <32>; 83 hsync-len = <32>;
84 vactive = <800>; 84 vactive = <800>;
85 vfront-porch = <4>; 85 vfront-porch = <4>;
86 vback-porch = <8>; 86 vback-porch = <8>;
87 vsync-len = <18>; 87 vsync-len = <18>;
88 }; 88 };
89 }; 89 };
90 90
91 &rk808 { 91 &rk808 {
92 pinctrl-names = "default"; 92 pinctrl-names = "default";
93 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2 93 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
94 94
95 regulators { 95 regulators {
96 vcc33_touch: LDO_REG2 { 96 vcc33_touch: LDO_REG2 {
97 regulator-min-microvol 97 regulator-min-microvolt = <3300000>;
98 regulator-max-microvol 98 regulator-max-microvolt = <3300000>;
99 regulator-name = "vcc3 99 regulator-name = "vcc33_touch";
100 regulator-state-mem { 100 regulator-state-mem {
101 regulator-off- 101 regulator-off-in-suspend;
102 }; 102 };
103 }; 103 };
104 104
105 vcc5v_touch: SWITCH_REG2 { 105 vcc5v_touch: SWITCH_REG2 {
106 regulator-name = "vcc5 106 regulator-name = "vcc5v_touch";
107 regulator-state-mem { 107 regulator-state-mem {
108 regulator-off- 108 regulator-off-in-suspend;
109 }; 109 };
110 }; 110 };
111 }; 111 };
112 }; 112 };
113 113
114 &sdmmc { 114 &sdmmc {
115 disable-wp; 115 disable-wp;
116 pinctrl-names = "default"; 116 pinctrl-names = "default";
117 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sd 117 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
118 &sdmmc_bus4>; 118 &sdmmc_bus4>;
119 }; 119 };
120 120
121 &vcc_5v { 121 &vcc_5v {
122 enable-active-high; 122 enable-active-high;
123 gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH 123 gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
124 pinctrl-names = "default"; 124 pinctrl-names = "default";
125 pinctrl-0 = <&drv_5v>; 125 pinctrl-0 = <&drv_5v>;
126 }; 126 };
127 127
128 &vcc50_hdmi { 128 &vcc50_hdmi {
129 enable-active-high; 129 enable-active-high;
130 gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH 130 gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
131 pinctrl-names = "default"; 131 pinctrl-names = "default";
132 pinctrl-0 = <&vcc50_hdmi_en>; 132 pinctrl-0 = <&vcc50_hdmi_en>;
133 }; 133 };
134 134
135 &gpio0 { 135 &gpio0 {
136 gpio-line-names = "PMIC_SLEEP_AP", 136 gpio-line-names = "PMIC_SLEEP_AP",
137 "DDRIO_PWROFF", 137 "DDRIO_PWROFF",
138 "DDRIO_RETEN", 138 "DDRIO_RETEN",
139 "TS3A227E_INT_L", 139 "TS3A227E_INT_L",
140 "PMIC_INT_L", 140 "PMIC_INT_L",
141 "PWR_KEY_L", 141 "PWR_KEY_L",
142 "AP_LID_INT_L", 142 "AP_LID_INT_L",
143 "EC_IN_RW", 143 "EC_IN_RW",
144 144
145 "AC_PRESENT_AP", 145 "AC_PRESENT_AP",
146 /* 146 /*
147 * RECOVERY_SW_L is 147 * RECOVERY_SW_L is Chrome OS ABI. Schematics call
148 * it REC_MODE_L. 148 * it REC_MODE_L.
149 */ 149 */
150 "RECOVERY_SW_L", 150 "RECOVERY_SW_L",
151 "OTP_OUT", 151 "OTP_OUT",
152 "HOST1_PWR_EN", 152 "HOST1_PWR_EN",
153 "USBOTG_PWREN_H", 153 "USBOTG_PWREN_H",
154 "AP_WARM_RESET_H", 154 "AP_WARM_RESET_H",
155 "nFALUT2", 155 "nFALUT2",
156 "I2C0_SDA_PMIC", 156 "I2C0_SDA_PMIC",
157 157
158 "I2C0_SCL_PMIC", 158 "I2C0_SCL_PMIC",
159 "SUSPEND_L", 159 "SUSPEND_L",
160 "USB_INT"; 160 "USB_INT";
161 }; 161 };
162 162
163 &gpio2 { 163 &gpio2 {
164 gpio-line-names = "CONFIG0", 164 gpio-line-names = "CONFIG0",
165 "CONFIG1", 165 "CONFIG1",
166 "CONFIG2", 166 "CONFIG2",
167 "", 167 "",
168 "", 168 "",
169 "", 169 "",
170 "", 170 "",
171 "CONFIG3", 171 "CONFIG3",
172 172
173 "PROCHOT#", 173 "PROCHOT#",
174 "EMMC_RST_L", 174 "EMMC_RST_L",
175 "", 175 "",
176 "", 176 "",
177 "BL_PWR_EN", 177 "BL_PWR_EN",
178 "AVDD_1V8_DISP_EN", 178 "AVDD_1V8_DISP_EN",
179 "TOUCH_INT", 179 "TOUCH_INT",
180 "TOUCH_RST", 180 "TOUCH_RST",
181 181
182 "I2C3_SCL_TP", 182 "I2C3_SCL_TP",
183 "I2C3_SDA_TP"; 183 "I2C3_SDA_TP";
184 }; 184 };
185 185
186 &gpio3 { 186 &gpio3 {
187 gpio-line-names = "FLASH0_D0", 187 gpio-line-names = "FLASH0_D0",
188 "FLASH0_D1", 188 "FLASH0_D1",
189 "FLASH0_D2", 189 "FLASH0_D2",
190 "FLASH0_D3", 190 "FLASH0_D3",
191 "FLASH0_D4", 191 "FLASH0_D4",
192 "FLASH0_D5", 192 "FLASH0_D5",
193 "FLASH0_D6", 193 "FLASH0_D6",
194 "FLASH0_D7", 194 "FLASH0_D7",
195 195
196 "", 196 "",
197 "", 197 "",
198 "", 198 "",
199 "", 199 "",
200 "", 200 "",
201 "", 201 "",
202 "", 202 "",
203 "", 203 "",
204 204
205 "FLASH0_CS2/EMMC_CMD 205 "FLASH0_CS2/EMMC_CMD",
206 "", 206 "",
207 "FLASH0_DQS/EMMC_CLK 207 "FLASH0_DQS/EMMC_CLKO";
208 }; 208 };
209 209
210 &gpio4 { 210 &gpio4 {
211 gpio-line-names = "", 211 gpio-line-names = "",
212 "", 212 "",
213 "", 213 "",
214 "", 214 "",
215 "", 215 "",
216 "", 216 "",
217 "", 217 "",
218 "", 218 "",
219 219
220 "", 220 "",
221 "", 221 "",
222 "", 222 "",
223 "", 223 "",
224 "", 224 "",
225 "", 225 "",
226 "", 226 "",
227 "", 227 "",
228 228
229 "UART0_RXD", 229 "UART0_RXD",
230 "UART0_TXD", 230 "UART0_TXD",
231 "UART0_CTS", 231 "UART0_CTS",
232 "UART0_RTS", 232 "UART0_RTS",
233 "SDIO0_D0", 233 "SDIO0_D0",
234 "SDIO0_D1", 234 "SDIO0_D1",
235 "SDIO0_D2", 235 "SDIO0_D2",
236 "SDIO0_D3", 236 "SDIO0_D3",
237 237
238 "SDIO0_CMD", 238 "SDIO0_CMD",
239 "SDIO0_CLK", 239 "SDIO0_CLK",
240 "dev_wake", 240 "dev_wake",
241 "", 241 "",
242 "WIFI_ENABLE_H", 242 "WIFI_ENABLE_H",
243 "BT_ENABLE_L", 243 "BT_ENABLE_L",
244 "WIFI_HOST_WAKE", 244 "WIFI_HOST_WAKE",
245 "BT_HOST_WAKE"; 245 "BT_HOST_WAKE";
246 }; 246 };
247 247
248 &gpio5 { 248 &gpio5 {
249 gpio-line-names = "", 249 gpio-line-names = "",
250 "", 250 "",
251 "", 251 "",
252 "", 252 "",
253 "", 253 "",
254 "", 254 "",
255 "", 255 "",
256 "", 256 "",
257 257
258 "", 258 "",
259 "", 259 "",
260 "Volum_Up#", 260 "Volum_Up#",
261 "Volum_Down#", 261 "Volum_Down#",
262 "SPI0_CLK", 262 "SPI0_CLK",
263 "SPI0_CS0", 263 "SPI0_CS0",
264 "SPI0_TXD", 264 "SPI0_TXD",
265 "SPI0_RXD", 265 "SPI0_RXD",
266 266
267 "", 267 "",
268 "", 268 "",
269 "", 269 "",
270 "VCC50_HDMI_EN"; 270 "VCC50_HDMI_EN";
271 }; 271 };
272 272
273 &gpio6 { 273 &gpio6 {
274 gpio-line-names = "I2S0_SCLK", 274 gpio-line-names = "I2S0_SCLK",
275 "I2S0_LRCK_RX", 275 "I2S0_LRCK_RX",
276 "I2S0_LRCK_TX", 276 "I2S0_LRCK_TX",
277 "I2S0_SDI", 277 "I2S0_SDI",
278 "I2S0_SDO0", 278 "I2S0_SDO0",
279 "HP_DET_H", 279 "HP_DET_H",
280 "", 280 "",
281 "INT_CODEC", 281 "INT_CODEC",
282 282
283 "I2S0_CLK", 283 "I2S0_CLK",
284 "I2C2_SDA", 284 "I2C2_SDA",
285 "I2C2_SCL", 285 "I2C2_SCL",
286 "MICDET", 286 "MICDET",
287 "", 287 "",
288 "", 288 "",
289 "", 289 "",
290 "", 290 "",
291 291
292 "SDMMC_D0", 292 "SDMMC_D0",
293 "SDMMC_D1", 293 "SDMMC_D1",
294 "SDMMC_D2", 294 "SDMMC_D2",
295 "SDMMC_D3", 295 "SDMMC_D3",
296 "SDMMC_CLK", 296 "SDMMC_CLK",
297 "SDMMC_CMD"; 297 "SDMMC_CMD";
298 }; 298 };
299 299
300 &gpio7 { 300 &gpio7 {
301 gpio-line-names = "LCDC_BL", 301 gpio-line-names = "LCDC_BL",
302 "PWM_LOG", 302 "PWM_LOG",
303 "BL_EN", 303 "BL_EN",
304 "TRACKPAD_INT", 304 "TRACKPAD_INT",
305 "TPM_INT_H", 305 "TPM_INT_H",
306 "SDMMC_DET_L", 306 "SDMMC_DET_L",
307 /* 307 /*
308 * AP_FLASH_WP_L is 308 * AP_FLASH_WP_L is Chrome OS ABI. Schematics call
309 * it FW_WP_AP. 309 * it FW_WP_AP.
310 */ 310 */
311 "AP_FLASH_WP_L", 311 "AP_FLASH_WP_L",
312 "EC_INT", 312 "EC_INT",
313 313
314 "CPU_NMI", 314 "CPU_NMI",
315 "DVS_OK", 315 "DVS_OK",
316 "SDMMC_WP", 316 "SDMMC_WP",
317 "EDP_HPD", 317 "EDP_HPD",
318 "DVS1", 318 "DVS1",
319 "nFALUT1", 319 "nFALUT1",
320 "LCD_EN", 320 "LCD_EN",
321 "DVS2", 321 "DVS2",
322 322
323 "VCC5V_GOOD_H", 323 "VCC5V_GOOD_H",
324 "I2C4_SDA_TP", 324 "I2C4_SDA_TP",
325 "I2C4_SCL_TP", 325 "I2C4_SCL_TP",
326 "I2C5_SDA_HDMI", 326 "I2C5_SDA_HDMI",
327 "I2C5_SCL_HDMI", 327 "I2C5_SCL_HDMI",
328 "5V_DRV", 328 "5V_DRV",
329 "UART2_RXD", 329 "UART2_RXD",
330 "UART2_TXD"; 330 "UART2_TXD";
331 }; 331 };
332 332
333 &gpio8 { 333 &gpio8 {
334 gpio-line-names = "RAM_ID0", 334 gpio-line-names = "RAM_ID0",
335 "RAM_ID1", 335 "RAM_ID1",
336 "RAM_ID2", 336 "RAM_ID2",
337 "RAM_ID3", 337 "RAM_ID3",
338 "I2C1_SDA_TPM", 338 "I2C1_SDA_TPM",
339 "I2C1_SCL_TPM", 339 "I2C1_SCL_TPM",
340 "SPI2_CLK", 340 "SPI2_CLK",
341 "SPI2_CS0", 341 "SPI2_CS0",
342 342
343 "SPI2_RXD", 343 "SPI2_RXD",
344 "SPI2_TXD"; 344 "SPI2_TXD";
345 }; 345 };
346 346
347 &pinctrl { 347 &pinctrl {
348 pinctrl-names = "default", "sleep"; 348 pinctrl-names = "default", "sleep";
349 pinctrl-0 = < 349 pinctrl-0 = <
350 /* Common for sleep and wake, 350 /* Common for sleep and wake, but no owners */
351 &ddr0_retention 351 &ddr0_retention
352 &ddrio_pwroff 352 &ddrio_pwroff
353 &global_pwroff 353 &global_pwroff
354 354
355 /* Wake only */ 355 /* Wake only */
356 &suspend_l_wake 356 &suspend_l_wake
357 >; 357 >;
358 pinctrl-1 = < 358 pinctrl-1 = <
359 /* Common for sleep and wake, 359 /* Common for sleep and wake, but no owners */
360 &ddr0_retention 360 &ddr0_retention
361 &ddrio_pwroff 361 &ddrio_pwroff
362 &global_pwroff 362 &global_pwroff
363 363
364 /* Sleep only */ 364 /* Sleep only */
365 &suspend_l_sleep 365 &suspend_l_sleep
366 >; 366 >;
367 367
368 buck-5v { 368 buck-5v {
369 drv_5v: drv-5v { 369 drv_5v: drv-5v {
370 rockchip,pins = <7 RK_ 370 rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
371 }; 371 };
372 }; 372 };
373 373
374 buttons { 374 buttons {
375 volum_down_l: volum-down-l { 375 volum_down_l: volum-down-l {
376 rockchip,pins = <5 RK_ 376 rockchip,pins = <5 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
377 }; 377 };
378 378
379 volum_up_l: volum-up-l { 379 volum_up_l: volum-up-l {
380 rockchip,pins = <5 RK_ 380 rockchip,pins = <5 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
381 }; 381 };
382 }; 382 };
383 383
384 hdmi { 384 hdmi {
385 vcc50_hdmi_en: vcc50-hdmi-en { 385 vcc50_hdmi_en: vcc50-hdmi-en {
386 rockchip,pins = <5 RK_ 386 rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
387 }; 387 };
388 }; 388 };
389 389
390 pmic { 390 pmic {
391 dvs_1: dvs-1 { 391 dvs_1: dvs-1 {
392 rockchip,pins = <7 RK_ 392 rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
393 }; 393 };
394 394
395 dvs_2: dvs-2 { 395 dvs_2: dvs-2 {
396 rockchip,pins = <7 RK_ 396 rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
397 }; 397 };
398 }; 398 };
399 399
400 prochot { 400 prochot {
401 gpio_prochot: gpio-prochot { 401 gpio_prochot: gpio-prochot {
402 rockchip,pins = <2 RK_ 402 rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
403 }; 403 };
404 }; 404 };
405 405
406 touchscreen { 406 touchscreen {
407 touch_int: touch-int { 407 touch_int: touch-int {
408 rockchip,pins = <2 RK_ 408 rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
409 }; 409 };
410 410
411 touch_rst: touch-rst { 411 touch_rst: touch-rst {
412 rockchip,pins = <2 RK_ 412 rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
413 }; 413 };
414 }; 414 };
415 }; 415 };
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