1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Samsung's Exynos3250 based Rinato board dev
4 *
5 * Copyright (c) 2014 Samsung Electronics Co.,
6 * http://www.samsung.com
7 *
8 * Device tree source file for Samsung's Rinat
9 * Samsung Exynos3250 SoC.
10 */
11
12 /dts-v1/;
13 #include "exynos3250.dtsi"
14 #include "exynos4412-ppmu-common.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/samsung,s2mps11.h>
18
19 / {
20 model = "Samsung Rinato board";
21 compatible = "samsung,rinato", "samsun
22 chassis-type = "watch";
23
24 aliases {
25 i2c7 = &i2c_max77836;
26 mmc0 = &mshc_0;
27 mmc1 = &mshc_1;
28 };
29
30 chosen {
31 stdout-path = &serial_1;
32 };
33
34 memory@40000000 {
35 device_type = "memory";
36 reg = <0x40000000 0x1ff00000>;
37 };
38
39 firmware@205f000 {
40 compatible = "samsung,secure-f
41 reg = <0x0205f000 0x1000>;
42 };
43
44 gpio-keys {
45 compatible = "gpio-keys";
46
47 power-key {
48 gpios = <&gpx2 7 GPIO_
49 linux,code = <KEY_POWE
50 label = "power key";
51 debounce-interval = <1
52 wakeup-source;
53 };
54 };
55
56 wlan_pwrseq: mshc1-pwrseq {
57 compatible = "mmc-pwrseq-simpl
58 reset-gpios = <&gpe0 4 GPIO_AC
59 };
60
61 i2c_max77836: i2c-gpio-0 {
62 compatible = "i2c-gpio";
63 sda-gpios = <&gpd0 2 (GPIO_ACT
64 scl-gpios = <&gpd0 3 (GPIO_ACT
65 #address-cells = <1>;
66 #size-cells = <0>;
67
68 max77836: pmic@25 {
69 compatible = "maxim,ma
70 interrupt-parent = <&g
71 interrupts = <5 IRQ_TY
72 reg = <0x25>;
73 wakeup-source;
74
75 extcon {
76 compatible = "
77 };
78
79 regulators {
80 compatible = "
81 safeout_reg: S
82 regula
83 };
84
85 charger_reg: C
86 regula
87 regula
88 regula
89 regula
90 };
91
92 motor_reg: LDO
93 regula
94 regula
95 regula
96 };
97
98 LDO2 {
99 regula
100 regula
101 regula
102 };
103 };
104
105 charger {
106 compatible = "
107
108 maxim,constant
109 maxim,fast-cha
110 maxim,eoc-uamp
111 maxim,ovp-uvol
112 };
113 };
114 };
115
116 haptics {
117 compatible = "regulator-haptic
118 haptic-supply = <&motor_reg>;
119 min-microvolt = <1100000>;
120 max-microvolt = <2700000>;
121 };
122
123 thermal-zones {
124 cpu_thermal: cpu-thermal {
125 cooling-maps {
126 map0 {
127 /* Cor
128 coolin
129
130 };
131 map1 {
132 /* Cor
133 coolin
134
135 };
136 };
137 };
138 };
139 };
140
141 &adc {
142 vdd-supply = <&ldo3_reg>;
143 status = "okay";
144 assigned-clocks = <&cmu CLK_SCLK_TSADC
145 assigned-clock-rates = <6000000>;
146
147 thermistor-ap {
148 compatible = "murata,ncp15wb47
149 pullup-uv = <1800000>;
150 pullup-ohm = <100000>;
151 pulldown-ohm = <100000>;
152 io-channels = <&adc 0>;
153 };
154
155 thermistor-battery {
156 compatible = "murata,ncp15wb47
157 pullup-uv = <1800000>;
158 pullup-ohm = <100000>;
159 pulldown-ohm = <100000>;
160 io-channels = <&adc 1>;
161 };
162 };
163
164 &bus_dmc {
165 devfreq-events = <&ppmu_dmc0_3>, <&ppm
166 vdd-supply = <&buck1_reg>;
167 status = "okay";
168 };
169
170 &bus_leftbus {
171 devfreq-events = <&ppmu_leftbus_3>, <&
172 vdd-supply = <&buck3_reg>;
173 status = "okay";
174 };
175
176 &bus_rightbus {
177 devfreq = <&bus_leftbus>;
178 status = "okay";
179 };
180
181 &bus_lcd0 {
182 devfreq = <&bus_leftbus>;
183 status = "okay";
184 };
185
186 &bus_fsys {
187 devfreq = <&bus_leftbus>;
188 status = "okay";
189 };
190
191 &bus_mcuisp {
192 devfreq = <&bus_leftbus>;
193 status = "okay";
194 };
195
196 &bus_isp {
197 devfreq = <&bus_leftbus>;
198 status = "okay";
199 };
200
201 &bus_peril {
202 devfreq = <&bus_leftbus>;
203 status = "okay";
204 };
205
206 &bus_mfc {
207 devfreq = <&bus_leftbus>;
208 status = "okay";
209 };
210
211 &cmu {
212 clocks = <&xusbxti>;
213 };
214
215 &cpu0 {
216 cpu0-supply = <&buck2_reg>;
217 };
218
219 &exynos_usbphy {
220 status = "okay";
221 vbus-supply = <&safeout_reg>;
222 };
223
224 &hsotg {
225 vusb_d-supply = <&ldo15_reg>;
226 vusb_a-supply = <&ldo12_reg>;
227 dr_mode = "peripheral";
228 status = "okay";
229 };
230
231 &dsi_0 {
232 vddcore-supply = <&ldo6_reg>;
233 vddio-supply = <&ldo6_reg>;
234 samsung,burst-clock-frequency = <25000
235 samsung,esc-clock-frequency = <2000000
236 samsung,pll-clock-frequency = <2400000
237 status = "okay";
238
239 panel@0 {
240 compatible = "samsung,s6e63j0x
241 reg = <0>;
242 vdd3-supply = <&ldo16_reg>;
243 vci-supply = <&ldo20_reg>;
244 reset-gpios = <&gpe0 1 GPIO_AC
245 te-gpios = <&gpx0 6 GPIO_ACTIV
246 };
247 };
248
249 &fimd {
250 status = "okay";
251
252 i80-if-timings {
253 cs-setup = <0>;
254 wr-setup = <0>;
255 wr-active = <1>;
256 wr-hold = <0>;
257 };
258 };
259
260 &gpu {
261 mali-supply = <&buck3_reg>;
262 status = "okay";
263 };
264
265 &i2c_0 {
266 #address-cells = <1>;
267 #size-cells = <0>;
268 samsung,i2c-sda-delay = <100>;
269 samsung,i2c-slave-addr = <0x10>;
270 samsung,i2c-max-bus-freq = <100000>;
271 status = "okay";
272
273 pmic@66 {
274 compatible = "samsung,s2mps14-
275 interrupt-parent = <&gpx0>;
276 interrupts = <7 IRQ_TYPE_LEVEL
277 reg = <0x66>;
278 wakeup-source;
279
280 s2mps14_osc: clocks {
281 compatible = "samsung,
282 #clock-cells = <1>;
283 clock-output-names = "
284 "s2mps14_bt";
285 };
286
287 regulators {
288 ldo1_reg: LDO1 {
289 regulator-name
290 regulator-min-
291 regulator-max-
292 regulator-alwa
293
294 regulator-stat
295 regula
296 };
297 };
298
299 ldo2_reg: LDO2 {
300 regulator-name
301 regulator-min-
302 regulator-max-
303 regulator-alwa
304
305 regulator-stat
306 regula
307 };
308 };
309
310 ldo3_reg: LDO3 {
311 regulator-name
312 regulator-min-
313 regulator-max-
314 regulator-alwa
315
316 regulator-stat
317 regula
318 };
319 };
320
321 ldo4_reg: LDO4 {
322 regulator-name
323 regulator-min-
324 regulator-max-
325 regulator-alwa
326
327 regulator-stat
328 regula
329 };
330 };
331
332 ldo5_reg: LDO5 {
333 regulator-name
334 regulator-min-
335 regulator-max-
336 regulator-alwa
337
338 regulator-stat
339 regula
340 };
341 };
342
343 ldo6_reg: LDO6 {
344 regulator-name
345 regulator-min-
346 regulator-max-
347 regulator-alwa
348
349 regulator-stat
350 regula
351 };
352 };
353
354 ldo7_reg: LDO7 {
355 regulator-name
356 regulator-min-
357 regulator-max-
358 regulator-alwa
359
360 regulator-stat
361 regula
362 };
363 };
364
365 ldo8_reg: LDO8 {
366 regulator-name
367 regulator-min-
368 regulator-max-
369 regulator-alwa
370
371 regulator-stat
372 regula
373 };
374 };
375
376 ldo9_reg: LDO9 {
377 regulator-name
378 regulator-min-
379 regulator-max-
380 regulator-alwa
381
382 regulator-stat
383 regula
384 };
385 };
386
387 ldo10_reg: LDO10 {
388 regulator-name
389 regulator-min-
390 regulator-max-
391
392 regulator-stat
393 regula
394 };
395 };
396
397 ldo11_reg: LDO11 {
398 regulator-name
399 regulator-min-
400 regulator-max-
401 samsung,ext-co
402 };
403
404 ldo12_reg: LDO12 {
405 regulator-name
406 regulator-min-
407 regulator-max-
408 samsung,ext-co
409 };
410
411 ldo13_reg: LDO13 {
412 regulator-name
413 regulator-min-
414 regulator-max-
415
416 regulator-stat
417 regula
418 };
419 };
420
421 ldo14_reg: LDO14 {
422 regulator-name
423 regulator-min-
424 regulator-max-
425
426 regulator-stat
427 regula
428 };
429 };
430
431 ldo15_reg: LDO15 {
432 regulator-name
433 regulator-min-
434 regulator-max-
435
436 regulator-stat
437 regula
438 };
439 };
440
441 ldo16_reg: LDO16 {
442 regulator-name
443 regulator-min-
444 regulator-max-
445
446 regulator-stat
447 regula
448 };
449 };
450
451 ldo17_reg: LDO17 {
452 regulator-name
453 regulator-min-
454 regulator-max-
455
456 regulator-stat
457 regula
458 };
459 };
460
461 ldo18_reg: LDO18 {
462 regulator-name
463 regulator-min-
464 regulator-max-
465
466 regulator-stat
467 regula
468 };
469 };
470
471 ldo19_reg: LDO19 {
472 regulator-name
473 regulator-min-
474 regulator-max-
475
476 regulator-stat
477 regula
478 };
479 };
480
481 ldo20_reg: LDO20 {
482 regulator-name
483 regulator-min-
484 regulator-max-
485
486 regulator-stat
487 regula
488 };
489 };
490
491 ldo21_reg: LDO21 {
492 regulator-name
493 regulator-min-
494 regulator-max-
495
496 regulator-stat
497 regula
498 };
499 };
500
501 ldo22_reg: LDO22 {
502 regulator-name
503 regulator-min-
504 regulator-max-
505
506 regulator-stat
507 regula
508 };
509 };
510
511 ldo23_reg: LDO23 {
512 regulator-name
513 regulator-min-
514 regulator-max-
515 regulator-alwa
516 };
517
518 ldo24_reg: LDO24 {
519 regulator-name
520 regulator-min-
521 regulator-max-
522
523 regulator-stat
524 regula
525 };
526 };
527
528 ldo25_reg: LDO25 {
529 regulator-name
530 regulator-min-
531 regulator-max-
532
533 regulator-stat
534 regula
535 };
536 };
537
538 buck1_reg: BUCK1 {
539 regulator-name
540 regulator-min-
541 regulator-max-
542 regulator-alwa
543
544 regulator-stat
545 regula
546 };
547 };
548
549 buck2_reg: BUCK2 {
550 regulator-name
551 regulator-min-
552 regulator-max-
553 regulator-alwa
554
555 regulator-stat
556 regula
557 };
558 };
559
560 buck3_reg: BUCK3 {
561 regulator-name
562 regulator-min-
563 regulator-max-
564 regulator-alwa
565
566 regulator-stat
567 regula
568 };
569 };
570
571 buck4_reg: BUCK4 {
572 regulator-name
573 regulator-min-
574 regulator-max-
575 regulator-alwa
576
577 regulator-stat
578 regula
579 };
580 };
581
582 buck5_reg: BUCK5 {
583 regulator-name
584 regulator-min-
585 regulator-max-
586 regulator-alwa
587
588 regulator-stat
589 regula
590 };
591 };
592 };
593 };
594 };
595
596 &i2c_1 {
597 #address-cells = <1>;
598 #size-cells = <0>;
599 samsung,i2c-sda-delay = <100>;
600 samsung,i2c-slave-addr = <0x10>;
601 samsung,i2c-max-bus-freq = <400000>;
602 status = "okay";
603
604 fuelgauge@36 {
605 compatible = "maxim,max77836-b
606 interrupt-parent = <&gpx1>;
607 interrupts = <2 IRQ_TYPE_LEVEL
608 reg = <0x36>;
609 };
610 };
611
612 &i2s2 {
613 status = "okay";
614 };
615
616 &jpeg {
617 status = "okay";
618 };
619
620 &mshc_0 {
621 broken-cd;
622 non-removable;
623 cap-mmc-highspeed;
624 mmc-hs200-1_8v;
625 card-detect-delay = <200>;
626 vmmc-supply = <&ldo12_reg>;
627 clock-frequency = <100000000>;
628 max-frequency = <100000000>;
629 mmc-ddr-1_8v;
630 samsung,dw-mshc-ciu-div = <1>;
631 samsung,dw-mshc-sdr-timing = <0 1>;
632 samsung,dw-mshc-ddr-timing = <1 2>;
633 pinctrl-names = "default";
634 pinctrl-0 = <&sd0_cmd &sd0_bus1 &sd0_b
635 bus-width = <8>;
636 status = "okay";
637 };
638
639 &mshc_1 {
640 status = "okay";
641
642 #address-cells = <1>;
643 #size-cells = <0>;
644
645 non-removable;
646 cap-sd-highspeed;
647 cap-sdio-irq;
648 keep-power-in-suspend;
649 samsung,dw-mshc-ciu-div = <1>;
650 samsung,dw-mshc-sdr-timing = <0 1>;
651 samsung,dw-mshc-ddr-timing = <1 2>;
652 pinctrl-names = "default";
653 pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bu
654 bus-width = <4>;
655
656 mmc-pwrseq = <&wlan_pwrseq>;
657
658 brcmf: wifi@1 {
659 compatible = "brcm,bcm4334-fma
660 reg = <1>;
661
662 interrupt-parent = <&gpx1>;
663 interrupts = <1 IRQ_TYPE_LEVEL
664 interrupt-names = "host-wake";
665 };
666 };
667
668 &serial_0 {
669 assigned-clocks = <&cmu CLK_SCLK_UART0
670 assigned-clock-rates = <100000000>;
671 status = "okay";
672
673 bluetooth {
674 compatible = "brcm,bcm4330-bt"
675 max-speed = <3000000>;
676 shutdown-gpios = <&gpe0 0 GPIO
677 device-wakeup-gpios = <&gpx3 1
678 host-wakeup-gpios = <&gpx2 6 G
679 clocks = <&s2mps14_osc S2MPS11
680 };
681 };
682
683 &serial_1 {
684 status = "okay";
685 };
686
687 &tmu {
688 vtmu-supply = <&ldo7_reg>;
689 status = "okay";
690 };
691
692 &rtc {
693 clocks = <&cmu CLK_RTC>, <&s2mps14_osc
694 clock-names = "rtc", "rtc_src";
695 status = "okay";
696 };
697
698 &xusbxti {
699 clock-frequency = <24000000>;
700 };
701
702 &pinctrl_0 {
703 pinctrl-names = "default";
704 pinctrl-0 = <&initial0 &sleep0>;
705
706 initial0: initial-state {
707 PIN_IN(gpa1-4, DOWN, LV1);
708 PIN_IN(gpa1-5, DOWN, LV1);
709
710 PIN_IN(gpc0-0, DOWN, LV1);
711 PIN_IN(gpc0-1, DOWN, LV1);
712 PIN_IN(gpc0-2, DOWN, LV1);
713 PIN_IN(gpc0-3, DOWN, LV1);
714 PIN_IN(gpc0-4, DOWN, LV1);
715
716 PIN_IN(gpd0-0, DOWN, LV1);
717 PIN_IN(gpd0-1, DOWN, LV1);
718 };
719
720 sleep0: sleep-state {
721 PIN_SLP(gpa0-0, INPUT, DOWN);
722 PIN_SLP(gpa0-1, INPUT, DOWN);
723 PIN_SLP(gpa0-2, INPUT, DOWN);
724 PIN_SLP(gpa0-3, INPUT, DOWN);
725 PIN_SLP(gpa0-4, INPUT, DOWN);
726 PIN_SLP(gpa0-5, INPUT, DOWN);
727 PIN_SLP(gpa0-6, INPUT, DOWN);
728 PIN_SLP(gpa0-7, INPUT, DOWN);
729
730 PIN_SLP(gpa1-0, INPUT, DOWN);
731 PIN_SLP(gpa1-1, INPUT, DOWN);
732 PIN_SLP(gpa1-2, INPUT, DOWN);
733 PIN_SLP(gpa1-3, INPUT, DOWN);
734 PIN_SLP(gpa1-4, INPUT, DOWN);
735 PIN_SLP(gpa1-5, INPUT, DOWN);
736
737 PIN_SLP(gpb-0, PREV, NONE);
738 PIN_SLP(gpb-1, PREV, NONE);
739 PIN_SLP(gpb-2, PREV, NONE);
740 PIN_SLP(gpb-3, PREV, NONE);
741 PIN_SLP(gpb-4, INPUT, DOWN);
742 PIN_SLP(gpb-5, INPUT, DOWN);
743 PIN_SLP(gpb-6, INPUT, DOWN);
744 PIN_SLP(gpb-7, INPUT, DOWN);
745
746 PIN_SLP(gpc0-0, INPUT, DOWN);
747 PIN_SLP(gpc0-1, INPUT, DOWN);
748 PIN_SLP(gpc0-2, INPUT, DOWN);
749 PIN_SLP(gpc0-3, INPUT, DOWN);
750 PIN_SLP(gpc0-4, INPUT, DOWN);
751
752 PIN_SLP(gpc1-0, INPUT, DOWN);
753 PIN_SLP(gpc1-1, INPUT, DOWN);
754 PIN_SLP(gpc1-2, INPUT, DOWN);
755 PIN_SLP(gpc1-3, INPUT, DOWN);
756 PIN_SLP(gpc1-4, INPUT, DOWN);
757
758 PIN_SLP(gpd0-0, INPUT, DOWN);
759 PIN_SLP(gpd0-1, INPUT, DOWN);
760 PIN_SLP(gpd0-2, INPUT, NONE);
761 PIN_SLP(gpd0-3, INPUT, NONE);
762
763 PIN_SLP(gpd1-0, INPUT, NONE);
764 PIN_SLP(gpd1-1, INPUT, NONE);
765 PIN_SLP(gpd1-2, INPUT, NONE);
766 PIN_SLP(gpd1-3, INPUT, NONE);
767 };
768 };
769
770 &pinctrl_1 {
771 pinctrl-names = "default";
772 pinctrl-0 = <&initial1 &sleep1>;
773
774 initial1: initial-state {
775 PIN_IN(gpe0-6, DOWN, LV1);
776 PIN_IN(gpe0-7, DOWN, LV1);
777
778 PIN_IN(gpe1-0, DOWN, LV1);
779 PIN_IN(gpe1-3, DOWN, LV1);
780 PIN_IN(gpe1-4, DOWN, LV1);
781 PIN_IN(gpe1-5, DOWN, LV1);
782 PIN_IN(gpe1-6, DOWN, LV1);
783
784 PIN_IN(gpk2-0, DOWN, LV1);
785 PIN_IN(gpk2-1, DOWN, LV1);
786 PIN_IN(gpk2-2, DOWN, LV1);
787 PIN_IN(gpk2-3, DOWN, LV1);
788 PIN_IN(gpk2-4, DOWN, LV1);
789 PIN_IN(gpk2-5, DOWN, LV1);
790 PIN_IN(gpk2-6, DOWN, LV1);
791
792 PIN_IN(gpm0-0, DOWN, LV1);
793 PIN_IN(gpm0-1, DOWN, LV1);
794 PIN_IN(gpm0-2, DOWN, LV1);
795 PIN_IN(gpm0-3, DOWN, LV1);
796 PIN_IN(gpm0-4, DOWN, LV1);
797 PIN_IN(gpm0-5, DOWN, LV1);
798 PIN_IN(gpm0-6, DOWN, LV1);
799 PIN_IN(gpm0-7, DOWN, LV1);
800
801 PIN_IN(gpm1-0, DOWN, LV1);
802 PIN_IN(gpm1-1, DOWN, LV1);
803 PIN_IN(gpm1-2, DOWN, LV1);
804 PIN_IN(gpm1-3, DOWN, LV1);
805 PIN_IN(gpm1-4, DOWN, LV1);
806 PIN_IN(gpm1-5, DOWN, LV1);
807 PIN_IN(gpm1-6, DOWN, LV1);
808
809 PIN_IN(gpm2-0, DOWN, LV1);
810 PIN_IN(gpm2-1, DOWN, LV1);
811
812 PIN_IN(gpm3-0, DOWN, LV1);
813 PIN_IN(gpm3-1, DOWN, LV1);
814 PIN_IN(gpm3-2, DOWN, LV1);
815 PIN_IN(gpm3-3, DOWN, LV1);
816 PIN_IN(gpm3-4, DOWN, LV1);
817
818 PIN_IN(gpm4-1, DOWN, LV1);
819 PIN_IN(gpm4-2, DOWN, LV1);
820 PIN_IN(gpm4-3, DOWN, LV1);
821 PIN_IN(gpm4-4, DOWN, LV1);
822 PIN_IN(gpm4-5, DOWN, LV1);
823 PIN_IN(gpm4-6, DOWN, LV1);
824 PIN_IN(gpm4-7, DOWN, LV1);
825 };
826
827 sleep1: sleep-state {
828 PIN_SLP(gpe0-0, PREV, NONE);
829 PIN_SLP(gpe0-1, PREV, NONE);
830 PIN_SLP(gpe0-2, INPUT, DOWN);
831 PIN_SLP(gpe0-3, INPUT, UP);
832 PIN_SLP(gpe0-4, INPUT, DOWN);
833 PIN_SLP(gpe0-5, INPUT, DOWN);
834 PIN_SLP(gpe0-6, INPUT, DOWN);
835 PIN_SLP(gpe0-7, INPUT, DOWN);
836
837 PIN_SLP(gpe1-0, INPUT, DOWN);
838 PIN_SLP(gpe1-1, PREV, NONE);
839 PIN_SLP(gpe1-2, INPUT, DOWN);
840 PIN_SLP(gpe1-3, INPUT, DOWN);
841 PIN_SLP(gpe1-4, INPUT, DOWN);
842 PIN_SLP(gpe1-5, INPUT, DOWN);
843 PIN_SLP(gpe1-6, INPUT, DOWN);
844 PIN_SLP(gpe1-7, INPUT, NONE);
845
846 PIN_SLP(gpe2-0, INPUT, NONE);
847 PIN_SLP(gpe2-1, INPUT, NONE);
848 PIN_SLP(gpe2-2, INPUT, NONE);
849
850 PIN_SLP(gpk0-0, INPUT, DOWN);
851 PIN_SLP(gpk0-1, INPUT, DOWN);
852 PIN_SLP(gpk0-2, OUT0, NONE);
853 PIN_SLP(gpk0-3, INPUT, DOWN);
854 PIN_SLP(gpk0-4, INPUT, DOWN);
855 PIN_SLP(gpk0-5, INPUT, DOWN);
856 PIN_SLP(gpk0-6, INPUT, DOWN);
857 PIN_SLP(gpk0-7, INPUT, DOWN);
858
859 PIN_SLP(gpk1-0, INPUT, DOWN);
860 PIN_SLP(gpk1-1, INPUT, DOWN);
861 PIN_SLP(gpk1-2, INPUT, DOWN);
862 PIN_SLP(gpk1-3, INPUT, DOWN);
863 PIN_SLP(gpk1-4, INPUT, DOWN);
864 PIN_SLP(gpk1-5, INPUT, DOWN);
865 PIN_SLP(gpk1-6, INPUT, DOWN);
866
867 PIN_SLP(gpk2-0, INPUT, DOWN);
868 PIN_SLP(gpk2-1, INPUT, DOWN);
869 PIN_SLP(gpk2-2, INPUT, DOWN);
870 PIN_SLP(gpk2-3, INPUT, DOWN);
871 PIN_SLP(gpk2-4, INPUT, DOWN);
872 PIN_SLP(gpk2-5, INPUT, DOWN);
873 PIN_SLP(gpk2-6, INPUT, DOWN);
874
875 PIN_SLP(gpl0-0, INPUT, DOWN);
876 PIN_SLP(gpl0-1, INPUT, DOWN);
877 PIN_SLP(gpl0-2, INPUT, DOWN);
878 PIN_SLP(gpl0-3, INPUT, DOWN);
879
880 PIN_SLP(gpm0-0, INPUT, DOWN);
881 PIN_SLP(gpm0-1, INPUT, DOWN);
882 PIN_SLP(gpm0-2, INPUT, DOWN);
883 PIN_SLP(gpm0-3, INPUT, DOWN);
884 PIN_SLP(gpm0-4, INPUT, DOWN);
885 PIN_SLP(gpm0-5, INPUT, DOWN);
886 PIN_SLP(gpm0-6, INPUT, DOWN);
887 PIN_SLP(gpm0-7, INPUT, DOWN);
888
889 PIN_SLP(gpm1-0, INPUT, DOWN);
890 PIN_SLP(gpm1-1, INPUT, DOWN);
891 PIN_SLP(gpm1-2, INPUT, DOWN);
892 PIN_SLP(gpm1-3, INPUT, DOWN);
893 PIN_SLP(gpm1-4, INPUT, DOWN);
894 PIN_SLP(gpm1-5, INPUT, DOWN);
895 PIN_SLP(gpm1-6, INPUT, DOWN);
896
897 PIN_SLP(gpm2-0, INPUT, DOWN);
898 PIN_SLP(gpm2-1, INPUT, DOWN);
899 PIN_SLP(gpm2-2, INPUT, DOWN);
900 PIN_SLP(gpm2-3, INPUT, DOWN);
901 PIN_SLP(gpm2-4, INPUT, DOWN);
902
903 PIN_SLP(gpm3-0, INPUT, DOWN);
904 PIN_SLP(gpm3-1, INPUT, DOWN);
905 PIN_SLP(gpm3-2, INPUT, DOWN);
906 PIN_SLP(gpm3-3, INPUT, DOWN);
907 PIN_SLP(gpm3-4, INPUT, DOWN);
908 PIN_SLP(gpm3-5, INPUT, DOWN);
909 PIN_SLP(gpm3-6, INPUT, DOWN);
910 PIN_SLP(gpm3-7, INPUT, DOWN);
911
912 PIN_SLP(gpm4-0, INPUT, DOWN);
913 PIN_SLP(gpm4-1, INPUT, DOWN);
914 PIN_SLP(gpm4-2, INPUT, DOWN);
915 PIN_SLP(gpm4-3, INPUT, DOWN);
916 PIN_SLP(gpm4-4, INPUT, DOWN);
917 PIN_SLP(gpm4-5, INPUT, DOWN);
918 PIN_SLP(gpm4-6, INPUT, DOWN);
919 PIN_SLP(gpm4-7, INPUT, DOWN);
920 };
921 };
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