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Linux/scripts/dtc/include-prefixes/arm/samsung/exynos4212.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm/samsung/exynos4212.dtsi (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm/samsung/exynos4212.dtsi (Version linux-5.8.18)


  1 // SPDX-License-Identifier: GPL-2.0               
  2 /*                                                
  3  * Samsung's Exynos4212 SoC device tree source    
  4  *                                                
  5  * Copyright (c) 2012 Samsung Electronics Co.,    
  6  *              http://www.samsung.com            
  7  *                                                
  8  * Samsung's Exynos4212 SoC device nodes are l    
  9  * based board files can include this file and    
 10  * bindings.                                      
 11  *                                                
 12  * Note: This file does not include device nod    
 13  * Exynos4212 SoC. As device tree coverage for    
 14  * nodes can be added to this file.               
 15  */                                               
 16                                                   
 17 #include "exynos4x12.dtsi"                        
 18                                                   
 19 / {                                               
 20         compatible = "samsung,exynos4212", "sa    
 21                                                   
 22         cpus {                                    
 23                 #address-cells = <1>;             
 24                 #size-cells = <0>;                
 25                                                   
 26                 cpu-map {                         
 27                         cluster0 {                
 28                                 core0 {           
 29                                         cpu =     
 30                                 };                
 31                                 core1 {           
 32                                         cpu =     
 33                                 };                
 34                         };                        
 35                 };                                
 36                                                   
 37                 cpu0: cpu@a00 {                   
 38                         device_type = "cpu";      
 39                         compatible = "arm,cort    
 40                         reg = <0xa00>;            
 41                         clocks = <&clock CLK_A    
 42                         clock-names = "cpu";      
 43                         operating-points-v2 =     
 44                         #cooling-cells = <2>;     
 45                 };                                
 46                                                   
 47                 cpu1: cpu@a01 {                   
 48                         device_type = "cpu";      
 49                         compatible = "arm,cort    
 50                         reg = <0xa01>;            
 51                         clocks = <&clock CLK_A    
 52                         clock-names = "cpu";      
 53                         operating-points-v2 =     
 54                         #cooling-cells = <2>;     
 55                 };                                
 56         };                                        
 57                                                   
 58         cpu0_opp_table: opp-table-0 {             
 59                 compatible = "operating-points    
 60                 opp-shared;                       
 61                                                   
 62                 opp-200000000 {                   
 63                         opp-hz = /bits/ 64 <20    
 64                         opp-microvolt = <90000    
 65                         clock-latency-ns = <20    
 66                 };                                
 67                 opp-300000000 {                   
 68                         opp-hz = /bits/ 64 <30    
 69                         opp-microvolt = <90000    
 70                         clock-latency-ns = <20    
 71                 };                                
 72                 opp-400000000 {                   
 73                         opp-hz = /bits/ 64 <40    
 74                         opp-microvolt = <92500    
 75                         clock-latency-ns = <20    
 76                 };                                
 77                 opp-500000000 {                   
 78                         opp-hz = /bits/ 64 <50    
 79                         opp-microvolt = <95000    
 80                         clock-latency-ns = <20    
 81                 };                                
 82                 opp-600000000 {                   
 83                         opp-hz = /bits/ 64 <60    
 84                         opp-microvolt = <97500    
 85                         clock-latency-ns = <20    
 86                 };                                
 87                 opp-700000000 {                   
 88                         opp-hz = /bits/ 64 <70    
 89                         opp-microvolt = <98750    
 90                         clock-latency-ns = <20    
 91                 };                                
 92                 opp-800000000 {                   
 93                         opp-hz = /bits/ 64 <80    
 94                         opp-microvolt = <10000    
 95                         clock-latency-ns = <20    
 96                         opp-suspend;              
 97                 };                                
 98                 opp-900000000 {                   
 99                         opp-hz = /bits/ 64 <90    
100                         opp-microvolt = <10375    
101                         clock-latency-ns = <20    
102                 };                                
103                 opp-1000000000 {                  
104                         opp-hz = /bits/ 64 <10    
105                         opp-microvolt = <10875    
106                         clock-latency-ns = <20    
107                 };                                
108                 opp-1100000000 {                  
109                         opp-hz = /bits/ 64 <11    
110                         opp-microvolt = <11375    
111                         clock-latency-ns = <20    
112                 };                                
113                 opp-1200000000 {                  
114                         opp-hz = /bits/ 64 <12    
115                         opp-microvolt = <11875    
116                         clock-latency-ns = <20    
117                 };                                
118                 opp-1300000000 {                  
119                         opp-hz = /bits/ 64 <13    
120                         opp-microvolt = <12500    
121                         clock-latency-ns = <20    
122                 };                                
123                 opp-1400000000 {                  
124                         opp-hz = /bits/ 64 <14    
125                         opp-microvolt = <12875    
126                         clock-latency-ns = <20    
127                 };                                
128                 cpu0_opp_1500: opp-1500000000     
129                         opp-hz = /bits/ 64 <15    
130                         opp-microvolt = <13500    
131                         clock-latency-ns = <20    
132                         turbo-mode;               
133                 };                                
134         };                                        
135 };                                                
136                                                   
137 &clock {                                          
138         compatible = "samsung,exynos4212-clock    
139 };                                                
140                                                   
141 &combiner {                                       
142         samsung,combiner-nr = <18>;               
143 };                                                
144                                                   
145 &gic {                                            
146         cpu-offset = <0x8000>;                    
147 };                                                
148                                                   
149 &pmu {                                            
150         interrupts = <2 2>, <3 2>;                
151         interrupt-affinity = <&cpu0>, <&cpu1>;    
152         status = "okay";                          
153 };                                                
154                                                   
155 &pmu_system_controller {                          
156         compatible = "samsung,exynos4212-pmu",    
157 };                                                
                                                      

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