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Linux/scripts/dtc/include-prefixes/arm/samsung/exynos4412-prime.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm/samsung/exynos4412-prime.dtsi (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm/samsung/exynos4412-prime.dtsi (Version linux-6.6.60)


  1 // SPDX-License-Identifier: GPL-2.0                 1 // SPDX-License-Identifier: GPL-2.0
  2 /*                                                  2 /*
  3  * Samsung's Exynos4412 Prime SoC device tree       3  * Samsung's Exynos4412 Prime SoC device tree source
  4  *                                                  4  *
  5  * Copyright (c) 2016 Samsung Electronics Co.,      5  * Copyright (c) 2016 Samsung Electronics Co., Ltd.
  6  *              http://www.samsung.com              6  *              http://www.samsung.com
  7  */                                                 7  */
  8                                                     8 
  9 /*                                                  9 /*
 10  * Exynos4412 Prime SoC revision supports high     10  * Exynos4412 Prime SoC revision supports higher CPU frequencies than
 11  * non-Prime version.  Therefore we need to up     11  * non-Prime version.  Therefore we need to update OPPs table and
 12  * thermal maps accordingly.                       12  * thermal maps accordingly.
 13  */                                                13  */
 14                                                    14 
 15 &cpu0_opp_1500 {                                   15 &cpu0_opp_1500 {
 16         /delete-property/turbo-mode;               16         /delete-property/turbo-mode;
 17 };                                                 17 };
 18                                                    18 
 19 &cpu0_opp_table {                                  19 &cpu0_opp_table {
 20         opp-1600000000 {                           20         opp-1600000000 {
 21                 opp-hz = /bits/ 64 <1600000000     21                 opp-hz = /bits/ 64 <1600000000>;
 22                 opp-microvolt = <1350000>;         22                 opp-microvolt = <1350000>;
 23                 clock-latency-ns = <200000>;       23                 clock-latency-ns = <200000>;
 24         };                                         24         };
 25         opp-1704000000 {                           25         opp-1704000000 {
 26                 opp-hz = /bits/ 64 <1704000000     26                 opp-hz = /bits/ 64 <1704000000>;
 27                 opp-microvolt = <1350000>;         27                 opp-microvolt = <1350000>;
 28                 clock-latency-ns = <200000>;       28                 clock-latency-ns = <200000>;
 29         };                                         29         };
 30 };                                                 30 };
 31                                                    31 
 32 &cooling_map0 {                                    32 &cooling_map0 {
 33         cooling-device = <&cpu0 9 9>, <&cpu1 9     33         cooling-device = <&cpu0 9 9>, <&cpu1 9 9>,
 34                          <&cpu2 9 9>, <&cpu3 9     34                          <&cpu2 9 9>, <&cpu3 9 9>;
 35 };                                                 35 };
 36                                                    36 
 37 &cooling_map1 {                                    37 &cooling_map1 {
 38         cooling-device = <&cpu0 15 15>, <&cpu1     38         cooling-device = <&cpu0 15 15>, <&cpu1 15 15>,
 39                          <&cpu2 15 15>, <&cpu3     39                          <&cpu2 15 15>, <&cpu3 15 15>;
 40 };                                                 40 };
 41                                                    41 
 42 &gpu_opp_table {                                   42 &gpu_opp_table {
 43         opp-533000000 {                            43         opp-533000000 {
 44                 opp-hz = /bits/ 64 <533000000>     44                 opp-hz = /bits/ 64 <533000000>;
 45                 opp-microvolt = <1075000>;         45                 opp-microvolt = <1075000>;
 46         };                                         46         };
 47 };                                                 47 };
                                                      

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