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Linux/scripts/dtc/include-prefixes/arm/samsung/exynos5.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm/samsung/exynos5.dtsi (Architecture i386) and /scripts/dtc/include-prefixes/arm/samsung/exynos5.dtsi (Architecture ppc)


  1 // SPDX-License-Identifier: GPL-2.0                 1 // SPDX-License-Identifier: GPL-2.0
  2 /*                                                  2 /*
  3  * Samsung's Exynos5 SoC series common device       3  * Samsung's Exynos5 SoC series common device tree source
  4  *                                                  4  *
  5  * Copyright (c) 2012-2013 Samsung Electronics      5  * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
  6  *              http://www.samsung.com              6  *              http://www.samsung.com
  7  *                                                  7  *
  8  * Samsung's Exynos5 SoC series device nodes a      8  * Samsung's Exynos5 SoC series device nodes are listed in this file. Particular
  9  * SoCs from Exynos5 series can include this f      9  * SoCs from Exynos5 series can include this file and provide values for SoCs
 10  * specific bindings.                              10  * specific bindings.
 11  */                                                11  */
 12                                                    12 
 13 #include <dt-bindings/interrupt-controller/arm     13 #include <dt-bindings/interrupt-controller/arm-gic.h>
 14 #include <dt-bindings/interrupt-controller/irq     14 #include <dt-bindings/interrupt-controller/irq.h>
 15                                                    15 
 16 / {                                                16 / {
 17         interrupt-parent = <&gic>;                 17         interrupt-parent = <&gic>;
 18         #address-cells = <1>;                      18         #address-cells = <1>;
 19         #size-cells = <1>;                         19         #size-cells = <1>;
 20                                                    20 
 21         aliases {                                  21         aliases {
 22                 i2c0 = &i2c_0;                     22                 i2c0 = &i2c_0;
 23                 i2c1 = &i2c_1;                     23                 i2c1 = &i2c_1;
 24                 i2c2 = &i2c_2;                     24                 i2c2 = &i2c_2;
 25                 i2c3 = &i2c_3;                     25                 i2c3 = &i2c_3;
 26                 serial0 = &serial_0;               26                 serial0 = &serial_0;
 27                 serial1 = &serial_1;               27                 serial1 = &serial_1;
 28                 serial2 = &serial_2;               28                 serial2 = &serial_2;
 29                 serial3 = &serial_3;               29                 serial3 = &serial_3;
 30         };                                         30         };
 31                                                    31 
 32         soc: soc {                                 32         soc: soc {
 33                 compatible = "simple-bus";         33                 compatible = "simple-bus";
 34                 #address-cells = <1>;              34                 #address-cells = <1>;
 35                 #size-cells = <1>;                 35                 #size-cells = <1>;
 36                 ranges;                            36                 ranges;
 37                                                    37 
 38                 chipid: chipid@10000000 {          38                 chipid: chipid@10000000 {
 39                         compatible = "samsung,     39                         compatible = "samsung,exynos4210-chipid";
 40                         reg = <0x10000000 0x10     40                         reg = <0x10000000 0x100>;
 41                 };                                 41                 };
 42                                                    42 
 43                 sromc: memory-controller@12250     43                 sromc: memory-controller@12250000 {
 44                         compatible = "samsung,     44                         compatible = "samsung,exynos4210-srom";
 45                         reg = <0x12250000 0x14     45                         reg = <0x12250000 0x14>;
 46                 };                                 46                 };
 47                                                    47 
 48                 combiner: interrupt-controller     48                 combiner: interrupt-controller@10440000 {
 49                         compatible = "samsung,     49                         compatible = "samsung,exynos4210-combiner";
 50                         #interrupt-cells = <2>     50                         #interrupt-cells = <2>;
 51                         interrupt-controller;      51                         interrupt-controller;
 52                         samsung,combiner-nr =      52                         samsung,combiner-nr = <32>;
 53                         reg = <0x10440000 0x10     53                         reg = <0x10440000 0x1000>;
 54                         interrupts = <GIC_SPI      54                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 55                                      <GIC_SPI      55                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 56                                      <GIC_SPI      56                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 57                                      <GIC_SPI      57                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 58                                      <GIC_SPI      58                                      <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
 59                                      <GIC_SPI      59                                      <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
 60                                      <GIC_SPI      60                                      <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
 61                                      <GIC_SPI      61                                      <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
 62                                      <GIC_SPI      62                                      <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
 63                                      <GIC_SPI      63                                      <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
 64                                      <GIC_SPI      64                                      <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
 65                                      <GIC_SPI      65                                      <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
 66                                      <GIC_SPI      66                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 67                                      <GIC_SPI      67                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 68                                      <GIC_SPI      68                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 69                                      <GIC_SPI      69                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 70                                      <GIC_SPI      70                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 71                                      <GIC_SPI      71                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
 72                                      <GIC_SPI      72                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 73                                      <GIC_SPI      73                                      <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
 74                                      <GIC_SPI      74                                      <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
 75                                      <GIC_SPI      75                                      <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
 76                                      <GIC_SPI      76                                      <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
 77                                      <GIC_SPI      77                                      <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
 78                                      <GIC_SPI      78                                      <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
 79                                      <GIC_SPI      79                                      <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
 80                                      <GIC_SPI      80                                      <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
 81                                      <GIC_SPI      81                                      <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
 82                                      <GIC_SPI      82                                      <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
 83                                      <GIC_SPI      83                                      <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 84                                      <GIC_SPI      84                                      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
 85                                      <GIC_SPI      85                                      <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 86                 };                                 86                 };
 87                                                    87 
 88                 gic: interrupt-controller@1048     88                 gic: interrupt-controller@10481000 {
 89                         compatible = "arm,gic-     89                         compatible = "arm,gic-400", "arm,cortex-a15-gic";
 90                         #interrupt-cells = <3>     90                         #interrupt-cells = <3>;
 91                         interrupt-controller;      91                         interrupt-controller;
 92                         reg = <0x10481000 0x10     92                         reg = <0x10481000 0x1000>,
 93                                 <0x10482000 0x     93                                 <0x10482000 0x2000>,
 94                                 <0x10484000 0x     94                                 <0x10484000 0x2000>,
 95                                 <0x10486000 0x     95                                 <0x10486000 0x2000>;
 96                         interrupts = <GIC_PPI      96                         interrupts = <GIC_PPI 9
 97                                         (GIC_C     97                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 98                 };                                 98                 };
 99                                                    99 
100                 sysreg_system_controller: sysc    100                 sysreg_system_controller: syscon@10050000 {
101                         compatible = "samsung,    101                         compatible = "samsung,exynos5-sysreg", "syscon";
102                         reg = <0x10050000 0x50    102                         reg = <0x10050000 0x5000>;
103                 };                                103                 };
104                                                   104 
105                 serial_0: serial@12c00000 {       105                 serial_0: serial@12c00000 {
106                         compatible = "samsung,    106                         compatible = "samsung,exynos4210-uart";
107                         reg = <0x12c00000 0x10    107                         reg = <0x12c00000 0x100>;
108                         interrupts = <GIC_SPI     108                         interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
109                 };                                109                 };
110                                                   110 
111                 serial_1: serial@12c10000 {       111                 serial_1: serial@12c10000 {
112                         compatible = "samsung,    112                         compatible = "samsung,exynos4210-uart";
113                         reg = <0x12c10000 0x10    113                         reg = <0x12c10000 0x100>;
114                         interrupts = <GIC_SPI     114                         interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
115                 };                                115                 };
116                                                   116 
117                 serial_2: serial@12c20000 {       117                 serial_2: serial@12c20000 {
118                         compatible = "samsung,    118                         compatible = "samsung,exynos4210-uart";
119                         reg = <0x12c20000 0x10    119                         reg = <0x12c20000 0x100>;
120                         interrupts = <GIC_SPI     120                         interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
121                 };                                121                 };
122                                                   122 
123                 serial_3: serial@12c30000 {       123                 serial_3: serial@12c30000 {
124                         compatible = "samsung,    124                         compatible = "samsung,exynos4210-uart";
125                         reg = <0x12c30000 0x10    125                         reg = <0x12c30000 0x100>;
126                         interrupts = <GIC_SPI     126                         interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
127                 };                                127                 };
128                                                   128 
129                 i2c_0: i2c@12c60000 {             129                 i2c_0: i2c@12c60000 {
130                         compatible = "samsung,    130                         compatible = "samsung,s3c2440-i2c";
131                         reg = <0x12c60000 0x10    131                         reg = <0x12c60000 0x100>;
132                         interrupts = <GIC_SPI     132                         interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
133                         #address-cells = <1>;     133                         #address-cells = <1>;
134                         #size-cells = <0>;        134                         #size-cells = <0>;
135                         samsung,sysreg-phandle    135                         samsung,sysreg-phandle = <&sysreg_system_controller>;
136                         status = "disabled";      136                         status = "disabled";
137                 };                                137                 };
138                                                   138 
139                 i2c_1: i2c@12c70000 {             139                 i2c_1: i2c@12c70000 {
140                         compatible = "samsung,    140                         compatible = "samsung,s3c2440-i2c";
141                         reg = <0x12c70000 0x10    141                         reg = <0x12c70000 0x100>;
142                         interrupts = <GIC_SPI     142                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
143                         #address-cells = <1>;     143                         #address-cells = <1>;
144                         #size-cells = <0>;        144                         #size-cells = <0>;
145                         samsung,sysreg-phandle    145                         samsung,sysreg-phandle = <&sysreg_system_controller>;
146                         status = "disabled";      146                         status = "disabled";
147                 };                                147                 };
148                                                   148 
149                 i2c_2: i2c@12c80000 {             149                 i2c_2: i2c@12c80000 {
150                         compatible = "samsung,    150                         compatible = "samsung,s3c2440-i2c";
151                         reg = <0x12c80000 0x10    151                         reg = <0x12c80000 0x100>;
152                         interrupts = <GIC_SPI     152                         interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
153                         #address-cells = <1>;     153                         #address-cells = <1>;
154                         #size-cells = <0>;        154                         #size-cells = <0>;
155                         samsung,sysreg-phandle    155                         samsung,sysreg-phandle = <&sysreg_system_controller>;
156                         status = "disabled";      156                         status = "disabled";
157                 };                                157                 };
158                                                   158 
159                 i2c_3: i2c@12c90000 {             159                 i2c_3: i2c@12c90000 {
160                         compatible = "samsung,    160                         compatible = "samsung,s3c2440-i2c";
161                         reg = <0x12c90000 0x10    161                         reg = <0x12c90000 0x100>;
162                         interrupts = <GIC_SPI     162                         interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
163                         #address-cells = <1>;     163                         #address-cells = <1>;
164                         #size-cells = <0>;        164                         #size-cells = <0>;
165                         samsung,sysreg-phandle    165                         samsung,sysreg-phandle = <&sysreg_system_controller>;
166                         status = "disabled";      166                         status = "disabled";
167                 };                                167                 };
168                                                   168 
169                 pwm: pwm@12dd0000 {               169                 pwm: pwm@12dd0000 {
170                         compatible = "samsung,    170                         compatible = "samsung,exynos4210-pwm";
171                         reg = <0x12dd0000 0x10    171                         reg = <0x12dd0000 0x100>;
172                         interrupts = <GIC_SPI     172                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
173                                      <GIC_SPI     173                                      <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
174                                      <GIC_SPI     174                                      <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
175                                      <GIC_SPI     175                                      <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
176                                      <GIC_SPI     176                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
177                         samsung,pwm-outputs =     177                         samsung,pwm-outputs = <0>, <1>, <2>, <3>;
178                         #pwm-cells = <3>;         178                         #pwm-cells = <3>;
179                 };                                179                 };
180                                                   180 
181                 rtc: rtc@101e0000 {               181                 rtc: rtc@101e0000 {
182                         compatible = "samsung,    182                         compatible = "samsung,s3c6410-rtc";
183                         reg = <0x101e0000 0x10    183                         reg = <0x101e0000 0x100>;
184                         interrupts = <GIC_SPI     184                         interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
185                                      <GIC_SPI     185                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
186                         status = "disabled";      186                         status = "disabled";
187                 };                                187                 };
188                                                   188 
189                 fimd: fimd@14400000 {             189                 fimd: fimd@14400000 {
190                         compatible = "samsung,    190                         compatible = "samsung,exynos5250-fimd";
191                         interrupt-parent = <&c    191                         interrupt-parent = <&combiner>;
192                         reg = <0x14400000 0x40    192                         reg = <0x14400000 0x40000>;
193                         interrupt-names = "fif    193                         interrupt-names = "fifo", "vsync", "lcd_sys";
194                         interrupts = <18 4>, <    194                         interrupts = <18 4>, <18 5>, <18 6>;
195                         samsung,sysreg = <&sys    195                         samsung,sysreg = <&sysreg_system_controller>;
196                         status = "disabled";      196                         status = "disabled";
197                 };                                197                 };
198                                                   198 
199                 dp: dp-controller@145b0000 {      199                 dp: dp-controller@145b0000 {
200                         compatible = "samsung,    200                         compatible = "samsung,exynos5-dp";
201                         reg = <0x145b0000 0x10    201                         reg = <0x145b0000 0x1000>;
202                         interrupts = <10 3>;      202                         interrupts = <10 3>;
203                         interrupt-parent = <&c    203                         interrupt-parent = <&combiner>;
204                         status = "disabled";      204                         status = "disabled";
205                 };                                205                 };
206                                                   206 
207                 sss: sss@10830000 {               207                 sss: sss@10830000 {
208                         compatible = "samsung,    208                         compatible = "samsung,exynos4210-secss";
209                         reg = <0x10830000 0x30    209                         reg = <0x10830000 0x300>;
210                         interrupts = <GIC_SPI     210                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
211                 };                                211                 };
212                                                   212 
213                 prng: rng@10830400 {              213                 prng: rng@10830400 {
214                         compatible = "samsung,    214                         compatible = "samsung,exynos5250-prng";
215                         reg = <0x10830400 0x20    215                         reg = <0x10830400 0x200>;
216                 };                                216                 };
217                                                   217 
218                 trng: rng@10830600 {              218                 trng: rng@10830600 {
219                         compatible = "samsung,    219                         compatible = "samsung,exynos5250-trng";
220                         reg = <0x10830600 0x10    220                         reg = <0x10830600 0x100>;
221                 };                                221                 };
222                                                   222 
223                 g2d: g2d@10850000 {               223                 g2d: g2d@10850000 {
224                         compatible = "samsung,    224                         compatible = "samsung,exynos5250-g2d";
225                         reg = <0x10850000 0x10    225                         reg = <0x10850000 0x1000>;
226                         interrupts = <GIC_SPI     226                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
227                         status = "disabled";      227                         status = "disabled";
228                 };                                228                 };
229         };                                        229         };
230 };                                                230 };
                                                      

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