1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Google Peach Pit Rev 6+ board device tree s
4 *
5 * Copyright (c) 2014 Google, Inc
6 */
7
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802
14 #include <dt-bindings/sound/samsung-i2s.h>
15 #include "exynos5420.dtsi"
16 #include "exynos5420-cpus.dtsi"
17
18 / {
19 model = "Google Peach Pit Rev 6+";
20
21 compatible = "google,pit-rev16",
22 "google,pit-rev15", "google,pi
23 "google,pit-rev13", "google,pi
24 "google,pit-rev11", "google,pi
25 "google,pit-rev9", "google,pit
26 "google,pit-rev7", "google,pit
27 "google,pit", "google,peach","
28 "samsung,exynos5";
29 chassis-type = "laptop";
30
31 aliases {
32 /* Assign 20 so we don't get c
33 i2c20 = &i2c_tunnel;
34 mmc0 = &mmc_0; /* eMMC */
35 mmc1 = &mmc_2; /* uSD */
36 mmc2 = &mmc_1; /* WiFi */
37 };
38
39 backlight: backlight {
40 compatible = "pwm-backlight";
41 pwms = <&pwm 0 1000000 0>;
42 brightness-levels = <0 100 500
43 default-brightness-level = <7>
44 power-supply = <&tps65090_fet1
45 pinctrl-0 = <&pwm0_out>;
46 pinctrl-names = "default";
47 };
48
49 chosen {
50 stdout-path = "serial3:115200n
51 };
52
53 fixed-rate-clocks {
54 oscclk {
55 compatible = "samsung,
56 clock-frequency = <240
57 };
58 };
59
60 gpio-keys {
61 compatible = "gpio-keys";
62
63 pinctrl-names = "default";
64 pinctrl-0 = <&power_key_irq &l
65
66 power-key {
67 label = "Power";
68 gpios = <&gpx1 2 GPIO_
69 linux,code = <KEY_POWE
70 wakeup-source;
71 };
72
73 lid-switch {
74 label = "Lid";
75 gpios = <&gpx3 4 GPIO_
76 linux,input-type = <5>
77 linux,code = <0>; /* S
78 debounce-interval = <1
79 wakeup-source;
80 };
81 };
82
83 memory@20000000 {
84 device_type = "memory";
85 reg = <0x20000000 0x80000000>;
86 };
87
88 sound {
89 compatible = "google,snow-audi
90
91 samsung,model = "Peach-Pit-I2S
92 samsung,i2s-controller = <&i2s
93 samsung,audio-codec = <&max980
94
95 cpu {
96 sound-dai = <&i2s0 0>;
97 };
98
99 codec {
100 sound-dai = <&max98090
101 };
102 };
103
104 usb300_vbus_reg: regulator-usb300 {
105 compatible = "regulator-fixed"
106 regulator-name = "P5.0V_USB3CO
107 regulator-min-microvolt = <500
108 regulator-max-microvolt = <500
109 gpio = <&gph0 0 GPIO_ACTIVE_HI
110 pinctrl-names = "default";
111 pinctrl-0 = <&usb300_vbus_en>;
112 enable-active-high;
113 };
114
115 usb301_vbus_reg: regulator-usb301 {
116 compatible = "regulator-fixed"
117 regulator-name = "P5.0V_USB3CO
118 regulator-min-microvolt = <500
119 regulator-max-microvolt = <500
120 gpio = <&gph0 1 GPIO_ACTIVE_HI
121 pinctrl-names = "default";
122 pinctrl-0 = <&usb301_vbus_en>;
123 enable-active-high;
124 };
125
126 vbat: fixed-regulator {
127 compatible = "regulator-fixed"
128 regulator-name = "vbat-supply"
129 regulator-boot-on;
130 regulator-always-on;
131 };
132
133 panel: panel {
134 compatible = "auo,b116xw03";
135 power-supply = <&tps65090_fet6
136 backlight = <&backlight>;
137
138 port {
139 panel_in: endpoint {
140 remote-endpoin
141 };
142 };
143 };
144
145 mmc1_pwrseq: mmc1-pwrseq {
146 compatible = "mmc-pwrseq-simpl
147 reset-gpios = <&gpx0 0 GPIO_AC
148 clocks = <&max77802 MAX77802_C
149 clock-names = "ext_clock";
150 };
151 };
152
153 &adc {
154 status = "okay";
155 vdd-supply = <&ldo9_reg>;
156 };
157
158 &clock_audss {
159 assigned-clocks = <&clock_audss EXYNOS
160 assigned-clock-parents = <&clock CLK_M
161 };
162
163 &cpu0 {
164 cpu-supply = <&buck2_reg>;
165 };
166
167 &cpu4 {
168 cpu-supply = <&buck6_reg>;
169 };
170
171 &dp {
172 status = "okay";
173 pinctrl-names = "default";
174 pinctrl-0 = <&dp_hpd_gpio>;
175 samsung,color-space = <0>;
176 samsung,color-depth = <1>;
177 samsung,link-rate = <0x06>;
178 samsung,lane-count = <2>;
179 hpd-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>
180
181 ports {
182 port {
183 dp_out: endpoint {
184 remote-endpoin
185 };
186 };
187 };
188 };
189
190 &fimd {
191 status = "okay";
192 samsung,invert-vclk;
193 };
194
195 &hdmi {
196 status = "okay";
197 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>
198 pinctrl-names = "default";
199 pinctrl-0 = <&hdmi_hpd_irq>;
200 ddc = <&i2c_2>;
201
202 hdmi-en-supply = <&tps65090_fet7>;
203 vdd-supply = <&ldo8_reg>;
204 vdd_osc-supply = <&ldo10_reg>;
205 vdd_pll-supply = <&ldo8_reg>;
206 };
207
208 &hsi2c_4 {
209 status = "okay";
210 clock-frequency = <400000>;
211
212 max77802: pmic@9 {
213 compatible = "maxim,max77802";
214 interrupt-parent = <&gpx3>;
215 interrupts = <1 IRQ_TYPE_NONE>
216 pinctrl-names = "default";
217 pinctrl-0 = <&max77802_irq>, <
218 <&pmic_dvs_1>, <&p
219 wakeup-source;
220 reg = <0x9>;
221 #clock-cells = <1>;
222
223 inb1-supply = <&tps65090_dcdc2
224 inb2-supply = <&tps65090_dcdc1
225 inb3-supply = <&tps65090_dcdc2
226 inb4-supply = <&tps65090_dcdc2
227 inb5-supply = <&tps65090_dcdc1
228 inb6-supply = <&tps65090_dcdc2
229 inb7-supply = <&tps65090_dcdc1
230 inb8-supply = <&tps65090_dcdc1
231 inb9-supply = <&tps65090_dcdc1
232 inb10-supply = <&tps65090_dcdc
233
234 inl1-supply = <&buck5_reg>;
235 inl2-supply = <&buck7_reg>;
236 inl3-supply = <&buck9_reg>;
237 inl4-supply = <&buck9_reg>;
238 inl5-supply = <&buck9_reg>;
239 inl6-supply = <&tps65090_dcdc2
240 inl7-supply = <&buck9_reg>;
241 inl9-supply = <&tps65090_dcdc2
242 inl10-supply = <&buck7_reg>;
243
244 regulators {
245 buck1_reg: BUCK1 {
246 regulator-name
247 regulator-min-
248 regulator-max-
249 regulator-alwa
250 regulator-boot
251 regulator-ramp
252 regulator-stat
253 regula
254 };
255 };
256
257 buck2_reg: BUCK2 {
258 regulator-name
259 regulator-min-
260 regulator-max-
261 regulator-alwa
262 regulator-boot
263 regulator-ramp
264 regulator-stat
265 regula
266 };
267 };
268
269 buck3_reg: BUCK3 {
270 regulator-name
271 regulator-min-
272 regulator-max-
273 regulator-alwa
274 regulator-boot
275 regulator-ramp
276 regulator-stat
277 regula
278 };
279 };
280
281 buck4_reg: BUCK4 {
282 regulator-name
283 regulator-min-
284 regulator-max-
285 regulator-alwa
286 regulator-boot
287 regulator-ramp
288 regulator-stat
289 regula
290 };
291 };
292
293 buck5_reg: BUCK5 {
294 regulator-name
295 regulator-min-
296 regulator-max-
297 regulator-boot
298 regulator-stat
299 regula
300 };
301 };
302
303 buck6_reg: BUCK6 {
304 regulator-name
305 regulator-min-
306 regulator-max-
307 regulator-alwa
308 regulator-boot
309 regulator-ramp
310 regulator-stat
311 regula
312 };
313 };
314
315 buck7_reg: BUCK7 {
316 regulator-name
317 regulator-min-
318 regulator-max-
319 regulator-alwa
320 regulator-boot
321 regulator-stat
322 regula
323 };
324 };
325
326 buck8_reg: BUCK8 {
327 regulator-name
328 regulator-min-
329 regulator-max-
330 regulator-alwa
331 regulator-boot
332 regulator-stat
333 regula
334 };
335 };
336
337 buck9_reg: BUCK9 {
338 regulator-name
339 regulator-min-
340 regulator-max-
341 regulator-alwa
342 regulator-boot
343 regulator-stat
344 regula
345 };
346 };
347
348 buck10_reg: BUCK10 {
349 regulator-name
350 regulator-min-
351 regulator-max-
352 regulator-alwa
353 regulator-boot
354 regulator-stat
355 regula
356 };
357 };
358
359 ldo1_reg: LDO1 {
360 regulator-name
361 regulator-min-
362 regulator-max-
363 regulator-alwa
364 regulator-stat
365 regula
366 regula
367 };
368 };
369
370 ldo2_reg: LDO2 {
371 regulator-name
372 regulator-min-
373 regulator-max-
374 };
375
376 ldo3_reg: LDO3 {
377 regulator-name
378 regulator-min-
379 regulator-max-
380 regulator-alwa
381 regulator-stat
382 regula
383 regula
384 };
385 };
386
387 vqmmc_sdcard: ldo4_reg
388 regulator-name
389 regulator-min-
390 regulator-max-
391 regulator-alwa
392 regulator-stat
393 regula
394 };
395 };
396
397 ldo5_reg: LDO5 {
398 regulator-name
399 regulator-min-
400 regulator-max-
401 regulator-alwa
402 regulator-stat
403 regula
404 };
405 };
406
407 ldo6_reg: LDO6 {
408 regulator-name
409 regulator-min-
410 regulator-max-
411 regulator-alwa
412 regulator-stat
413 regula
414 };
415 };
416
417 ldo7_reg: LDO7 {
418 regulator-name
419 regulator-min-
420 regulator-max-
421 };
422
423 ldo8_reg: LDO8 {
424 regulator-name
425 regulator-min-
426 regulator-max-
427 regulator-alwa
428 regulator-stat
429 regula
430 };
431 };
432
433 ldo9_reg: LDO9 {
434 regulator-name
435 regulator-min-
436 regulator-max-
437 regulator-stat
438 regula
439 regula
440 };
441 };
442
443 ldo10_reg: LDO10 {
444 regulator-name
445 regulator-min-
446 regulator-max-
447 regulator-alwa
448 regulator-stat
449 regula
450 };
451 };
452
453 ldo11_reg: LDO11 {
454 regulator-name
455 regulator-min-
456 regulator-max-
457 regulator-alwa
458 regulator-stat
459 regula
460 regula
461 };
462 };
463
464 ldo12_reg: LDO12 {
465 regulator-name
466 regulator-min-
467 regulator-max-
468 regulator-alwa
469 regulator-stat
470 regula
471 };
472 };
473
474 ldo13_reg: LDO13 {
475 regulator-name
476 regulator-min-
477 regulator-max-
478 regulator-alwa
479 regulator-stat
480 regula
481 regula
482 };
483 };
484
485 ldo14_reg: LDO14 {
486 regulator-name
487 regulator-min-
488 regulator-max-
489 regulator-alwa
490 regulator-stat
491 regula
492 };
493 };
494
495 ldo15_reg: LDO15 {
496 regulator-name
497 regulator-min-
498 regulator-max-
499 regulator-alwa
500 regulator-stat
501 regula
502 };
503 };
504
505 ldo17_reg: LDO17 {
506 regulator-name
507 regulator-min-
508 regulator-max-
509 regulator-alwa
510 regulator-stat
511 regula
512 };
513 };
514
515 ldo18_reg: LDO18 {
516 regulator-name
517 regulator-min-
518 regulator-max-
519 };
520
521 ldo19_reg: LDO19 {
522 regulator-name
523 regulator-min-
524 regulator-max-
525 };
526
527 ldo20_reg: LDO20 {
528 regulator-name
529 regulator-min-
530 regulator-max-
531 regulator-alwa
532 };
533
534 ldo21_reg: LDO21 {
535 regulator-name
536 regulator-min-
537 regulator-max-
538 };
539
540 ldo23_reg: LDO23 {
541 regulator-name
542 regulator-min-
543 regulator-max-
544 };
545 ldo24_reg: LDO24 {
546 regulator-name
547 regulator-min-
548 regulator-max-
549 };
550
551 ldo25_reg: LDO25 {
552 regulator-name
553 regulator-min-
554 regulator-max-
555 };
556
557 ldo26_reg: LDO26 {
558 regulator-name
559 regulator-min-
560 regulator-max-
561 };
562
563 ldo27_reg: LDO27 {
564 regulator-name
565 regulator-min-
566 regulator-max-
567 };
568
569 ldo28_reg: LDO28 {
570 regulator-name
571 regulator-min-
572 regulator-max-
573 };
574
575 ldo29_reg: LDO29 {
576 regulator-name
577 regulator-min-
578 regulator-max-
579 };
580
581 ldo30_reg: LDO30 {
582 regulator-name
583 regulator-min-
584 regulator-max-
585 regulator-alwa
586 regulator-stat
587 regula
588 };
589 };
590
591 ldo32_reg: LDO32 {
592 regulator-name
593 regulator-min-
594 regulator-max-
595 };
596
597 ldo33_reg: LDO33 {
598 regulator-name
599 regulator-min-
600 regulator-max-
601 };
602
603 ldo34_reg: LDO34 {
604 regulator-name
605 regulator-min-
606 regulator-max-
607 };
608
609 ldo35_reg: LDO35 {
610 regulator-name
611 regulator-min-
612 regulator-max-
613 };
614 };
615 };
616 };
617
618 &hsi2c_7 {
619 status = "okay";
620 clock-frequency = <400000>;
621
622 max98090: audio-codec@10 {
623 compatible = "maxim,max98090";
624 reg = <0x10>;
625 interrupts = <2 IRQ_TYPE_NONE>
626 interrupt-parent = <&gpx0>;
627 pinctrl-names = "default";
628 pinctrl-0 = <&max98090_irq>;
629 clocks = <&pmu_system_controll
630 clock-names = "mclk";
631 #sound-dai-cells = <0>;
632 };
633
634 light-sensor@44 {
635 compatible = "isil,isl29018";
636 reg = <0x44>;
637 vcc-supply = <&tps65090_fet5>;
638 };
639
640 ps8625: lvds-bridge@48 {
641 compatible = "parade,ps8625";
642 reg = <0x48>;
643 sleep-gpios = <&gpx3 5 GPIO_AC
644 reset-gpios = <&gpy7 7 GPIO_AC
645 lane-count = <2>;
646 use-external-pwm;
647
648 ports {
649 #address-cells = <1>;
650 #size-cells = <0>;
651
652 port@0 {
653 reg = <0>;
654
655 bridge_out: en
656 remote
657 };
658 };
659
660 port@1 {
661 reg = <1>;
662
663 bridge_in: end
664 remote
665 };
666 };
667 };
668
669 };
670 };
671
672 &hsi2c_8 {
673 status = "okay";
674 clock-frequency = <333000>;
675
676 /* Atmel mXT336S */
677 trackpad@4b {
678 compatible = "atmel,maxtouch";
679 reg = <0x4b>;
680 interrupt-parent = <&gpx1>;
681 interrupts = <1 IRQ_TYPE_EDGE_
682 wakeup-source;
683 pinctrl-names = "default";
684 pinctrl-0 = <&trackpad_irq>;
685 linux,gpio-keymap = <KEY_RESER
686 KEY_RESER
687 KEY_RESER
688 KEY_RESER
689 KEY_RESER
690 BTN_LEFT>
691 };
692 };
693
694 &hsi2c_9 {
695 status = "okay";
696 clock-frequency = <400000>;
697
698 tpm@20 {
699 compatible = "infineon,slb9645
700 reg = <0x20>;
701
702 /* Unused irq; but still need
703 pinctrl-names = "default";
704 pinctrl-0 = <&tpm_irq>;
705 };
706 };
707
708 &i2c_2 {
709 status = "okay";
710 samsung,i2c-sda-delay = <100>;
711 samsung,i2c-max-bus-freq = <66000>;
712 samsung,i2c-slave-addr = <0x50>;
713 };
714
715 &i2s0 {
716 assigned-clocks = <&i2s0 CLK_I2S_RCLK_
717 assigned-clock-parents = <&clock_audss
718 status = "okay";
719 };
720
721 &mixer {
722 status = "okay";
723 };
724
725 /* eMMC flash */
726 &mmc_0 {
727 status = "okay";
728 mmc-ddr-1_8v;
729 mmc-hs200-1_8v;
730 cap-mmc-highspeed;
731 non-removable;
732 clock-frequency = <400000000>;
733 samsung,dw-mshc-ciu-div = <3>;
734 samsung,dw-mshc-sdr-timing = <0 4>;
735 samsung,dw-mshc-ddr-timing = <0 2>;
736 samsung,dw-mshc-hs400-timing = <0 2>;
737 samsung,read-strobe-delay = <90>;
738 pinctrl-names = "default";
739 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bu
740 bus-width = <8>;
741 };
742
743 /* WiFi SDIO module */
744 &mmc_1 {
745 status = "okay";
746 non-removable;
747 cap-sdio-irq;
748 keep-power-in-suspend;
749 clock-frequency = <400000000>;
750 samsung,dw-mshc-ciu-div = <1>;
751 samsung,dw-mshc-sdr-timing = <0 1>;
752 samsung,dw-mshc-ddr-timing = <0 2>;
753 pinctrl-names = "default";
754 pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, <&
755 <&sd1_bus4>, <&sd1_bus8>,
756 bus-width = <4>;
757 cap-sd-highspeed;
758 mmc-pwrseq = <&mmc1_pwrseq>;
759 vqmmc-supply = <&buck10_reg>;
760 };
761
762 /* uSD card */
763 &mmc_2 {
764 status = "okay";
765 cap-sd-highspeed;
766 card-detect-delay = <200>;
767 clock-frequency = <400000000>;
768 samsung,dw-mshc-ciu-div = <3>;
769 samsung,dw-mshc-sdr-timing = <2 3>;
770 samsung,dw-mshc-ddr-timing = <1 2>;
771 pinctrl-names = "default";
772 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd
773 bus-width = <4>;
774 };
775
776
777 &pinctrl_0 {
778 pinctrl-names = "default";
779 pinctrl-0 = <&mask_tpm_reset>;
780
781 wifi_en: wifi-en-pins {
782 samsung,pins = "gpx0-0";
783 samsung,pin-function = <EXYNOS
784 samsung,pin-pud = <EXYNOS_PIN_
785 samsung,pin-drv = <EXYNOS5420_
786 };
787
788 max98090_irq: max98090-irq-pins {
789 samsung,pins = "gpx0-2";
790 samsung,pin-function = <EXYNOS
791 samsung,pin-pud = <EXYNOS_PIN_
792 samsung,pin-drv = <EXYNOS5420_
793 };
794
795 /* We need GPX0_6 to be low at sleep t
796 mask_tpm_reset: mask-tpm-reset-pins {
797 samsung,pins = "gpx0-6";
798 samsung,pin-function = <EXYNOS
799 samsung,pin-pud = <EXYNOS_PIN_
800 samsung,pin-drv = <EXYNOS5420_
801 samsung,pin-val = <0>;
802 };
803
804 tpm_irq: tpm-irq-pins {
805 samsung,pins = "gpx1-0";
806 samsung,pin-function = <EXYNOS
807 samsung,pin-pud = <EXYNOS_PIN_
808 samsung,pin-drv = <EXYNOS5420_
809 };
810
811 trackpad_irq: trackpad-irq-pins {
812 samsung,pins = "gpx1-1";
813 samsung,pin-function = <EXYNOS
814 samsung,pin-pud = <EXYNOS_PIN_
815 samsung,pin-drv = <EXYNOS5420_
816 };
817
818 power_key_irq: power-key-irq-pins {
819 samsung,pins = "gpx1-2";
820 samsung,pin-function = <EXYNOS
821 samsung,pin-pud = <EXYNOS_PIN_
822 samsung,pin-drv = <EXYNOS5420_
823 };
824
825 ec_irq: ec-irq-pins {
826 samsung,pins = "gpx1-5";
827 samsung,pin-function = <EXYNOS
828 samsung,pin-pud = <EXYNOS_PIN_
829 samsung,pin-drv = <EXYNOS5420_
830 };
831
832 tps65090_irq: tps65090-irq-pins {
833 samsung,pins = "gpx2-5";
834 samsung,pin-function = <EXYNOS
835 samsung,pin-pud = <EXYNOS_PIN_
836 samsung,pin-drv = <EXYNOS5420_
837 };
838
839 dp_hpd_gpio: dp-hpd-gpio-pins {
840 samsung,pins = "gpx2-6";
841 samsung,pin-function = <EXYNOS
842 samsung,pin-pud = <EXYNOS_PIN_
843 samsung,pin-drv = <EXYNOS5420_
844 };
845
846 max77802_irq: max77802-irq-pins {
847 samsung,pins = "gpx3-1";
848 samsung,pin-function = <EXYNOS
849 samsung,pin-pud = <EXYNOS_PIN_
850 samsung,pin-drv = <EXYNOS5420_
851 };
852
853 lid_irq: lid-irq-pins {
854 samsung,pins = "gpx3-4";
855 samsung,pin-function = <EXYNOS
856 samsung,pin-pud = <EXYNOS_PIN_
857 samsung,pin-drv = <EXYNOS5420_
858 };
859
860 hdmi_hpd_irq: hdmi-hpd-irq-pins {
861 samsung,pins = "gpx3-7";
862 samsung,pin-function = <EXYNOS
863 samsung,pin-pud = <EXYNOS_PIN_
864 samsung,pin-drv = <EXYNOS5420_
865 };
866
867 pmic_dvs_1: pmic-dvs-1-pins {
868 samsung,pins = "gpy7-6";
869 samsung,pin-function = <EXYNOS
870 samsung,pin-pud = <EXYNOS_PIN_
871 samsung,pin-drv = <EXYNOS5420_
872 };
873 };
874
875 /* pinctrl_1 */
876 /* Adjust WiFi drive strengths lower for EMI *
877 &sd1_bus1 {
878 samsung,pin-drv = <EXYNOS5420_PIN_DRV_
879 };
880
881 &sd1_bus4 {
882 samsung,pin-drv = <EXYNOS5420_PIN_DRV_
883 };
884
885 &sd1_bus8 {
886 samsung,pin-drv = <EXYNOS5420_PIN_DRV_
887 };
888
889 &sd1_clk {
890 samsung,pin-drv = <EXYNOS5420_PIN_DRV_
891 };
892
893 &sd1_cmd {
894 samsung,pin-drv = <EXYNOS5420_PIN_DRV_
895 };
896
897 &pinctrl_2 {
898 pmic_dvs_2: pmic-dvs-2-pins {
899 samsung,pins = "gpj4-2", "gpj4
900 samsung,pin-function = <EXYNOS
901 samsung,pin-pud = <EXYNOS_PIN_
902 samsung,pin-drv = <EXYNOS5420_
903 };
904 };
905
906 /* pinctrl_3*/
907 /* Drive SPI lines at x2 for better integrity
908 &spi2_bus {
909 samsung,pin-drv = <EXYNOS5420_PIN_DRV_
910 };
911
912 &pinctrl_3 {
913 /* Drive SPI chip select at x2 for bet
914 ec_spi_cs: ec-spi-cs-pins {
915 samsung,pins = "gpb1-2";
916 samsung,pin-function = <EXYNOS
917 samsung,pin-pud = <EXYNOS_PIN_
918 samsung,pin-drv = <EXYNOS5420_
919 };
920
921 usb300_vbus_en: usb300-vbus-en-pins {
922 samsung,pins = "gph0-0";
923 samsung,pin-function = <EXYNOS
924 samsung,pin-pud = <EXYNOS_PIN_
925 samsung,pin-drv = <EXYNOS5420_
926 };
927
928 usb301_vbus_en: usb301-vbus-en-pins {
929 samsung,pins = "gph0-1";
930 samsung,pin-function = <EXYNOS
931 samsung,pin-pud = <EXYNOS_PIN_
932 samsung,pin-drv = <EXYNOS5420_
933 };
934
935 pmic_selb: pmic-selb-pins {
936 samsung,pins = "gph0-2", "gph0
937 "gph0-6";
938 samsung,pin-function = <EXYNOS
939 samsung,pin-pud = <EXYNOS_PIN_
940 samsung,pin-drv = <EXYNOS5420_
941 };
942 };
943
944 &pmu_system_controller {
945 assigned-clocks = <&pmu_system_control
946 assigned-clock-parents = <&clock CLK_F
947 };
948
949 &rtc {
950 status = "okay";
951 clocks = <&clock CLK_RTC>, <&max77802
952 clock-names = "rtc", "rtc_src";
953 };
954
955 &spi_2 {
956 status = "okay";
957 num-cs = <1>;
958 samsung,spi-src-clk = <0>;
959 cs-gpios = <&gpb1 2 GPIO_ACTIVE_HIGH>;
960
961 cros_ec: cros-ec@0 {
962 compatible = "google,cros-ec-s
963 interrupt-parent = <&gpx1>;
964 interrupts = <5 IRQ_TYPE_NONE>
965 pinctrl-names = "default";
966 pinctrl-0 = <&ec_spi_cs &ec_ir
967 reg = <0>;
968 spi-max-frequency = <3125000>;
969 google,has-vbc-nvram;
970 wakeup-source;
971
972 controller-data {
973 samsung,spi-feedback-d
974 };
975
976 i2c_tunnel: i2c-tunnel {
977 compatible = "google,c
978 #address-cells = <1>;
979 #size-cells = <0>;
980 google,remote-bus = <0
981
982 battery: sbs-battery@b
983 compatible = "
984 reg = <0xb>;
985 sbs,poll-retry
986 sbs,i2c-retry-
987 };
988
989 power-regulator@48 {
990 compatible = "
991 reg = <0x48>;
992
993 /*
994 * Config irq
995 * even though
996 */
997 pinctrl-names
998 pinctrl-0 = <&
999
1000 vsys1-supply
1001 vsys2-supply
1002 vsys3-supply
1003 infet1-supply
1004 infet2-supply
1005 infet3-supply
1006 infet4-supply
1007 infet5-supply
1008 infet6-supply
1009 infet7-supply
1010 vsys-l1-suppl
1011 vsys-l2-suppl
1012
1013 regulators {
1014 tps65
1015
1016 };
1017 tps65
1018
1019 };
1020 tps65
1021
1022 };
1023 tps65
1024
1025 };
1026 tps65
1027
1028
1029 };
1030 tps65
1031
1032
1033 };
1034 tps65
1035
1036
1037 };
1038 tps65
1039
1040
1041 };
1042 tps65
1043
1044 };
1045 tps65
1046
1047
1048 };
1049 tps65
1050 };
1051 tps65
1052 };
1053 };
1054
1055 charger {
1056 compa
1057 };
1058 };
1059 };
1060 };
1061 };
1062
1063 &serial_3 {
1064 status = "okay";
1065 };
1066
1067 &timer {
1068 arm,cpu-registers-not-fw-configured;
1069 };
1070
1071 &tmu_cpu0 {
1072 vtmu-supply = <&ldo10_reg>;
1073 };
1074
1075 &tmu_cpu1 {
1076 vtmu-supply = <&ldo10_reg>;
1077 };
1078
1079 &tmu_cpu2 {
1080 vtmu-supply = <&ldo10_reg>;
1081 };
1082
1083 &tmu_cpu3 {
1084 vtmu-supply = <&ldo10_reg>;
1085 };
1086
1087 &tmu_gpu {
1088 vtmu-supply = <&ldo10_reg>;
1089 };
1090
1091 &usbdrd3_0 {
1092 vdd10-supply = <&ldo15_reg>;
1093 vdd33-supply = <&ldo12_reg>;
1094 };
1095
1096 &usbdrd3_1 {
1097 vdd10-supply = <&ldo15_reg>;
1098 vdd33-supply = <&ldo12_reg>;
1099 };
1100
1101 &usbdrd_dwc3_0 {
1102 dr_mode = "host";
1103 };
1104
1105 &usbdrd_dwc3_1 {
1106 dr_mode = "host";
1107 };
1108
1109 &usbdrd_phy0 {
1110 vbus-supply = <&usb300_vbus_reg>;
1111 };
1112
1113 &usbdrd_phy1 {
1114 vbus-supply = <&usb301_vbus_reg>;
1115 };
1116
1117 /*
1118 * Use longest HW watchdog in SoC (32 seconds
1119 * watchdog provides no debugging information
1120 * lockup detectors) and so should be last re
1121 */
1122 &watchdog {
1123 timeout-sec = <32>;
1124 };
1125
1126 #include "../cros-ec-keyboard.dtsi"
1127 #include "../cros-adc-thermistors.dtsi"
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