1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Samsung SMDK5420 board device tree source
4 *
5 * Copyright (c) 2013 Samsung Electronics Co.,
6 * http://www.samsung.com
7 */
8
9 /dts-v1/;
10 #include "exynos5420.dtsi"
11 #include "exynos5420-cpus.dtsi"
12 #include <dt-bindings/clock/samsung,s2mps11.h>
13 #include <dt-bindings/gpio/gpio.h>
14
15 / {
16 model = "Samsung SMDK5420 board based
17 compatible = "samsung,smdk5420", "sams
18
19 memory@20000000 {
20 device_type = "memory";
21 reg = <0x20000000 0x80000000>;
22 };
23
24 aliases {
25 mmc0 = &mmc_0;
26 mmc1 = &mmc_2;
27 };
28
29 chosen {
30 bootargs = "init=/linuxrc";
31 stdout-path = "serial2:115200n
32 };
33
34 fixed-rate-clocks {
35 oscclk {
36 compatible = "samsung,
37 clock-frequency = <240
38 };
39 };
40
41 vdd: regulator-0 {
42 compatible = "regulator-fixed"
43 regulator-name = "vdd-supply";
44 regulator-min-microvolt = <180
45 regulator-max-microvolt = <180
46 regulator-always-on;
47 };
48
49 dbvdd: regulator-1 {
50 compatible = "regulator-fixed"
51 regulator-name = "dbvdd-supply
52 regulator-min-microvolt = <330
53 regulator-max-microvolt = <330
54 regulator-always-on;
55 };
56
57 spkvdd: regulator-2 {
58 compatible = "regulator-fixed"
59 regulator-name = "spkvdd-suppl
60 regulator-min-microvolt = <500
61 regulator-max-microvolt = <500
62 regulator-always-on;
63 };
64
65 usb300_vbus_reg: regulator-3 {
66 compatible = "regulator-fixed"
67 regulator-name = "VBUS0";
68 regulator-min-microvolt = <500
69 regulator-max-microvolt = <500
70 gpio = <&gpg0 5 GPIO_ACTIVE_HI
71 pinctrl-names = "default";
72 pinctrl-0 = <&usb300_vbus_en>;
73 enable-active-high;
74 };
75
76 usb301_vbus_reg: regulator-4 {
77 compatible = "regulator-fixed"
78 regulator-name = "VBUS1";
79 regulator-min-microvolt = <500
80 regulator-max-microvolt = <500
81 gpio = <&gpg1 4 GPIO_ACTIVE_HI
82 pinctrl-names = "default";
83 pinctrl-0 = <&usb301_vbus_en>;
84 enable-active-high;
85 };
86
87 };
88
89 &cpu0 {
90 cpu-supply = <&buck2_reg>;
91 };
92
93 &cpu4 {
94 cpu-supply = <&buck6_reg>;
95 };
96
97 &dp {
98 pinctrl-names = "default";
99 pinctrl-0 = <&dp_hpd>;
100 samsung,color-space = <0>;
101 samsung,color-depth = <1>;
102 samsung,link-rate = <0x0a>;
103 samsung,lane-count = <4>;
104 status = "okay";
105
106 display-timings {
107 native-mode = <&timing0>;
108 timing0: timing {
109 clock-frequency = <500
110 hactive = <2560>;
111 vactive = <1600>;
112 hfront-porch = <48>;
113 hback-porch = <80>;
114 hsync-len = <32>;
115 vback-porch = <16>;
116 vfront-porch = <8>;
117 vsync-len = <6>;
118 };
119 };
120 };
121
122 &fimd {
123 status = "okay";
124 };
125
126 &hdmi {
127 status = "okay";
128 ddc = <&i2c_2>;
129 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>
130 pinctrl-names = "default";
131 pinctrl-0 = <&hdmi_hpd_irq>;
132 vdd-supply = <&ldo6_reg>;
133 vdd_osc-supply = <&ldo7_reg>;
134 vdd_pll-supply = <&ldo6_reg>;
135 };
136
137 &hsi2c_4 {
138 status = "okay";
139
140 pmic@66 {
141 compatible = "samsung,s2mps11-
142 reg = <0x66>;
143 wakeup-source;
144
145 s2mps11_osc: clocks {
146 compatible = "samsung,
147 #clock-cells = <1>;
148 clock-output-names = "
149 "s2mps
150 };
151
152 regulators {
153 ldo1_reg: LDO1 {
154 regulator-name
155 regulator-min-
156 regulator-max-
157 regulator-alwa
158 };
159
160 ldo3_reg: LDO3 {
161 regulator-name
162 regulator-min-
163 regulator-max-
164 regulator-alwa
165 };
166
167 ldo5_reg: LDO5 {
168 regulator-name
169 regulator-min-
170 regulator-max-
171 regulator-alwa
172 };
173
174 ldo6_reg: LDO6 {
175 regulator-name
176 regulator-min-
177 regulator-max-
178 regulator-alwa
179 };
180
181 ldo7_reg: LDO7 {
182 regulator-name
183 regulator-min-
184 regulator-max-
185 regulator-alwa
186 };
187
188 ldo8_reg: LDO8 {
189 regulator-name
190 regulator-min-
191 regulator-max-
192 regulator-alwa
193 };
194
195 ldo9_reg: LDO9 {
196 regulator-name
197 regulator-min-
198 regulator-max-
199 regulator-alwa
200 };
201
202 ldo10_reg: LDO10 {
203 regulator-name
204 regulator-min-
205 regulator-max-
206 regulator-alwa
207 };
208
209 ldo11_reg: LDO11 {
210 regulator-name
211 regulator-min-
212 regulator-max-
213 regulator-alwa
214 };
215
216 ldo12_reg: LDO12 {
217 regulator-name
218 regulator-min-
219 regulator-max-
220 regulator-alwa
221 };
222
223 ldo13_reg: LDO13 {
224 regulator-name
225 regulator-min-
226 regulator-max-
227 regulator-alwa
228 };
229
230 ldo15_reg: LDO15 {
231 regulator-name
232 regulator-min-
233 regulator-max-
234 regulator-alwa
235 };
236
237 ldo16_reg: LDO16 {
238 regulator-name
239 regulator-min-
240 regulator-max-
241 regulator-alwa
242 };
243
244 ldo17_reg: LDO17 {
245 regulator-name
246 regulator-min-
247 regulator-max-
248 regulator-alwa
249 };
250
251 ldo19_reg: LDO19 {
252 regulator-name
253 regulator-min-
254 regulator-max-
255 regulator-alwa
256 };
257
258 ldo24_reg: LDO24 {
259 regulator-name
260 regulator-min-
261 regulator-max-
262 regulator-alwa
263 };
264
265 buck1_reg: BUCK1 {
266 regulator-name
267 regulator-min-
268 regulator-max-
269 regulator-alwa
270 regulator-boot
271 };
272
273 buck2_reg: BUCK2 {
274 regulator-name
275 regulator-min-
276 regulator-max-
277 regulator-alwa
278 regulator-boot
279 };
280
281 buck3_reg: BUCK3 {
282 regulator-name
283 regulator-min-
284 regulator-max-
285 regulator-alwa
286 regulator-boot
287 };
288
289 buck4_reg: BUCK4 {
290 regulator-name
291 regulator-min-
292 regulator-max-
293 regulator-alwa
294 regulator-boot
295 };
296
297 buck5_reg: BUCK5 {
298 regulator-name
299 regulator-min-
300 regulator-max-
301 regulator-alwa
302 regulator-boot
303 };
304
305 buck6_reg: BUCK6 {
306 regulator-name
307 regulator-min-
308 regulator-max-
309 regulator-alwa
310 regulator-boot
311 };
312
313 buck7_reg: BUCK7 {
314 regulator-name
315 regulator-min-
316 regulator-max-
317 regulator-alwa
318 regulator-boot
319 };
320
321 buck8_reg: BUCK8 {
322 regulator-name
323 regulator-min-
324 regulator-max-
325 regulator-alwa
326 regulator-boot
327 };
328
329 buck9_reg: BUCK9 {
330 regulator-name
331 regulator-min-
332 regulator-max-
333 regulator-alwa
334 regulator-boot
335 };
336
337 buck10_reg: BUCK10 {
338 regulator-name
339 regulator-min-
340 regulator-max-
341 regulator-alwa
342 regulator-boot
343 };
344 };
345 };
346 };
347
348 &i2c_2 {
349 samsung,i2c-sda-delay = <100>;
350 samsung,i2c-max-bus-freq = <66000>;
351 /* used by HDMI DDC */
352 status = "okay";
353 };
354
355 &mixer {
356 status = "okay";
357 };
358
359 &mmc_0 {
360 status = "okay";
361 broken-cd;
362 card-detect-delay = <200>;
363 mmc-ddr-1_8v;
364 samsung,dw-mshc-ciu-div = <3>;
365 samsung,dw-mshc-sdr-timing = <0 4>;
366 samsung,dw-mshc-ddr-timing = <0 2>;
367 samsung,dw-mshc-hs400-timing = <0 2>;
368 samsung,read-strobe-delay = <90>;
369 pinctrl-names = "default";
370 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bu
371 &sd0_rclk>;
372 bus-width = <8>;
373 cap-mmc-highspeed;
374 };
375
376 &mmc_2 {
377 status = "okay";
378 card-detect-delay = <200>;
379 samsung,dw-mshc-ciu-div = <3>;
380 samsung,dw-mshc-sdr-timing = <2 3>;
381 samsung,dw-mshc-ddr-timing = <1 2>;
382 pinctrl-names = "default";
383 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd
384 bus-width = <4>;
385 cap-sd-highspeed;
386 };
387
388 &pinctrl_0 {
389 hdmi_hpd_irq: hdmi-hpd-irq-pins {
390 samsung,pins = "gpx3-7";
391 samsung,pin-function = <EXYNOS
392 samsung,pin-pud = <EXYNOS_PIN_
393 samsung,pin-drv = <EXYNOS5420_
394 };
395 };
396
397 &pinctrl_2 {
398 usb300_vbus_en: usb300-vbus-en-pins {
399 samsung,pins = "gpg0-5";
400 samsung,pin-function = <EXYNOS
401 samsung,pin-pud = <EXYNOS_PIN_
402 samsung,pin-drv = <EXYNOS5420_
403 };
404
405 usb301_vbus_en: usb301-vbus-en-pins {
406 samsung,pins = "gpg1-4";
407 samsung,pin-function = <EXYNOS
408 samsung,pin-pud = <EXYNOS_PIN_
409 samsung,pin-drv = <EXYNOS5420_
410 };
411 };
412
413 &rtc {
414 status = "okay";
415 clocks = <&clock CLK_RTC>, <&s2mps11_o
416 clock-names = "rtc", "rtc_src";
417 };
418
419 &usbdrd3_0 {
420 vdd10-supply = <&ldo11_reg>;
421 vdd33-supply = <&ldo9_reg>;
422 };
423
424 &usbdrd3_1 {
425 vdd10-supply = <&ldo11_reg>;
426 vdd33-supply = <&ldo9_reg>;
427 };
428
429 &usbdrd_phy0 {
430 vbus-supply = <&usb300_vbus_reg>;
431 };
432
433 &usbdrd_phy1 {
434 vbus-supply = <&usb301_vbus_reg>;
435 };
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