1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Google Peach Pi Rev 10+ board device tree s
4 *
5 * Copyright (c) 2014 Google, Inc
6 */
7
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802
14 #include <dt-bindings/sound/samsung-i2s.h>
15 #include "exynos5800.dtsi"
16 #include "exynos5420-cpus.dtsi"
17
18 / {
19 model = "Google Peach Pi Rev 10+";
20
21 compatible = "google,pi-rev16",
22 "google,pi-rev15", "google,pi-
23 "google,pi-rev13", "google,pi-
24 "google,pi-rev11", "google,pi-
25 "google,pi", "google,peach", "
26 "samsung,exynos5";
27 chassis-type = "laptop";
28
29 aliases {
30 /* Assign 20 so we don't get c
31 i2c20 = &i2c_tunnel;
32 mmc0 = &mmc_0; /* eMMC */
33 mmc1 = &mmc_2; /* SD */
34 mmc2 = &mmc_1; /* WiFi */
35 };
36
37 backlight: backlight {
38 compatible = "pwm-backlight";
39 pwms = <&pwm 0 1000000 0>;
40 brightness-levels = <0 100 500
41 default-brightness-level = <7>
42 enable-gpios = <&gpx2 2 GPIO_A
43 power-supply = <&tps65090_fet1
44 pinctrl-0 = <&pwm0_out>;
45 pinctrl-names = "default";
46 };
47
48 chosen {
49 stdout-path = "serial3:115200n
50 };
51
52 fixed-rate-clocks {
53 oscclk {
54 compatible = "samsung,
55 clock-frequency = <240
56 };
57 };
58
59 gpio-keys {
60 compatible = "gpio-keys";
61
62 pinctrl-names = "default";
63 pinctrl-0 = <&power_key_irq &l
64
65 power-key {
66 label = "Power";
67 gpios = <&gpx1 2 GPIO_
68 linux,code = <KEY_POWE
69 wakeup-source;
70 };
71
72 lid-switch {
73 label = "Lid";
74 gpios = <&gpx3 4 GPIO_
75 linux,input-type = <5>
76 linux,code = <0>; /* S
77 debounce-interval = <1
78 wakeup-source;
79 };
80
81 };
82
83 memory@20000000 {
84 device_type = "memory";
85 reg = <0x20000000 0x80000000>;
86 };
87
88 sound {
89 compatible = "google,snow-audi
90
91 samsung,model = "Peach-Pi-I2S-
92 samsung,i2s-controller = <&i2s
93 samsung,audio-codec = <&max980
94
95 cpu {
96 sound-dai = <&i2s0 0>;
97 };
98
99 codec {
100 sound-dai = <&max98091
101 };
102 };
103
104 usb300_vbus_reg: regulator-usb300 {
105 compatible = "regulator-fixed"
106 regulator-name = "P5.0V_USB3CO
107 regulator-min-microvolt = <500
108 regulator-max-microvolt = <500
109 gpio = <&gph0 0 GPIO_ACTIVE_HI
110 pinctrl-names = "default";
111 pinctrl-0 = <&usb300_vbus_en>;
112 enable-active-high;
113 };
114
115 usb301_vbus_reg: regulator-usb301 {
116 compatible = "regulator-fixed"
117 regulator-name = "P5.0V_USB3CO
118 regulator-min-microvolt = <500
119 regulator-max-microvolt = <500
120 gpio = <&gph0 1 GPIO_ACTIVE_HI
121 pinctrl-names = "default";
122 pinctrl-0 = <&usb301_vbus_en>;
123 enable-active-high;
124 };
125
126 vbat: fixed-regulator {
127 compatible = "regulator-fixed"
128 regulator-name = "vbat-supply"
129 regulator-boot-on;
130 regulator-always-on;
131 };
132
133 panel: panel {
134 compatible = "auo,b133htn01";
135 power-supply = <&tps65090_fet6
136 backlight = <&backlight>;
137
138 port {
139 panel_in: endpoint {
140 remote-endpoin
141 };
142 };
143 };
144
145 mmc1_pwrseq: mmc1-pwrseq {
146 compatible = "mmc-pwrseq-simpl
147 reset-gpios = <&gpx0 0 GPIO_AC
148 clocks = <&max77802 MAX77802_C
149 clock-names = "ext_clock";
150 };
151 };
152
153 &adc {
154 status = "okay";
155 vdd-supply = <&ldo9_reg>;
156 };
157
158 &clock_audss {
159 assigned-clocks = <&clock_audss EXYNOS
160 assigned-clock-parents = <&clock CLK_M
161 };
162
163 /*
164 * Peach Pi board uses SoC revision with lower
165 * (1.3 GHz instead of 1.4 GHz) than Odroid XU
166 * update A7 OPPs table accordingly.
167 */
168 &cluster_a7_opp_table {
169 /delete-node/opp-1400000000;
170 };
171
172 &cpu0 {
173 cpu-supply = <&buck2_reg>;
174 };
175
176 &cpu4 {
177 cpu-supply = <&buck6_reg>;
178 };
179
180 &dp {
181 status = "okay";
182 pinctrl-names = "default";
183 pinctrl-0 = <&dp_hpd_gpio>;
184 samsung,color-space = <0>;
185 samsung,color-depth = <1>;
186 samsung,link-rate = <0x0a>;
187 samsung,lane-count = <2>;
188 hpd-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>
189
190 ports {
191 port {
192 dp_out: endpoint {
193 remote-endpoin
194 };
195 };
196 };
197 };
198
199 &fimd {
200 status = "okay";
201 samsung,invert-vclk;
202 };
203
204 &hdmi {
205 status = "okay";
206 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>
207 pinctrl-names = "default";
208 pinctrl-0 = <&hdmi_hpd_irq>;
209 ddc = <&i2c_2>;
210
211 hdmi-en-supply = <&tps65090_fet7>;
212 vdd-supply = <&ldo8_reg>;
213 vdd_osc-supply = <&ldo10_reg>;
214 vdd_pll-supply = <&ldo8_reg>;
215 };
216
217 &hsi2c_4 {
218 status = "okay";
219 clock-frequency = <400000>;
220
221 max77802: pmic@9 {
222 compatible = "maxim,max77802";
223 interrupt-parent = <&gpx3>;
224 interrupts = <1 IRQ_TYPE_NONE>
225 pinctrl-names = "default";
226 pinctrl-0 = <&max77802_irq>, <
227 <&pmic_dvs_1>, <&p
228 wakeup-source;
229 reg = <0x9>;
230 #clock-cells = <1>;
231
232 inb1-supply = <&tps65090_dcdc2
233 inb2-supply = <&tps65090_dcdc1
234 inb3-supply = <&tps65090_dcdc2
235 inb4-supply = <&tps65090_dcdc2
236 inb5-supply = <&tps65090_dcdc1
237 inb6-supply = <&tps65090_dcdc2
238 inb7-supply = <&tps65090_dcdc1
239 inb8-supply = <&tps65090_dcdc1
240 inb9-supply = <&tps65090_dcdc1
241 inb10-supply = <&tps65090_dcdc
242
243 inl1-supply = <&buck5_reg>;
244 inl2-supply = <&buck7_reg>;
245 inl3-supply = <&buck9_reg>;
246 inl4-supply = <&buck9_reg>;
247 inl5-supply = <&buck9_reg>;
248 inl6-supply = <&tps65090_dcdc2
249 inl7-supply = <&buck9_reg>;
250 inl9-supply = <&tps65090_dcdc2
251 inl10-supply = <&buck7_reg>;
252
253 regulators {
254 buck1_reg: BUCK1 {
255 regulator-name
256 regulator-min-
257 regulator-max-
258 regulator-alwa
259 regulator-boot
260 regulator-ramp
261 regulator-stat
262 regula
263 };
264 };
265
266 buck2_reg: BUCK2 {
267 regulator-name
268 regulator-min-
269 regulator-max-
270 regulator-alwa
271 regulator-boot
272 regulator-ramp
273 regulator-coup
274 regulator-coup
275 regulator-stat
276 regula
277 };
278 };
279
280 buck3_reg: BUCK3 {
281 regulator-name
282 regulator-min-
283 regulator-max-
284 regulator-alwa
285 regulator-boot
286 regulator-ramp
287 regulator-coup
288 regulator-coup
289 regulator-stat
290 regula
291 };
292 };
293
294 buck4_reg: BUCK4 {
295 regulator-name
296 regulator-min-
297 regulator-max-
298 regulator-alwa
299 regulator-boot
300 regulator-ramp
301 regulator-stat
302 regula
303 };
304 };
305
306 buck5_reg: BUCK5 {
307 regulator-name
308 regulator-min-
309 regulator-max-
310 regulator-boot
311 regulator-stat
312 regula
313 };
314 };
315
316 buck6_reg: BUCK6 {
317 regulator-name
318 regulator-min-
319 regulator-max-
320 regulator-alwa
321 regulator-boot
322 regulator-ramp
323 regulator-stat
324 regula
325 };
326 };
327
328 buck7_reg: BUCK7 {
329 regulator-name
330 regulator-min-
331 regulator-max-
332 regulator-alwa
333 regulator-boot
334 regulator-stat
335 regula
336 };
337 };
338
339 buck8_reg: BUCK8 {
340 regulator-name
341 regulator-min-
342 regulator-max-
343 regulator-alwa
344 regulator-boot
345 regulator-stat
346 regula
347 };
348 };
349
350 buck9_reg: BUCK9 {
351 regulator-name
352 regulator-min-
353 regulator-max-
354 regulator-alwa
355 regulator-boot
356 regulator-stat
357 regula
358 };
359 };
360
361 buck10_reg: BUCK10 {
362 regulator-name
363 regulator-min-
364 regulator-max-
365 regulator-alwa
366 regulator-boot
367 regulator-stat
368 regula
369 };
370 };
371
372 ldo1_reg: LDO1 {
373 regulator-name
374 regulator-min-
375 regulator-max-
376 regulator-alwa
377 regulator-stat
378 regula
379 regula
380 };
381 };
382
383 ldo2_reg: LDO2 {
384 regulator-name
385 regulator-min-
386 regulator-max-
387 };
388
389 ldo3_reg: LDO3 {
390 regulator-name
391 regulator-min-
392 regulator-max-
393 regulator-alwa
394 regulator-stat
395 regula
396 regula
397 };
398 };
399
400 vqmmc_sdcard: ldo4_reg
401 regulator-name
402 regulator-min-
403 regulator-max-
404 regulator-alwa
405 regulator-stat
406 regula
407 };
408 };
409
410 ldo5_reg: LDO5 {
411 regulator-name
412 regulator-min-
413 regulator-max-
414 regulator-alwa
415 regulator-stat
416 regula
417 };
418 };
419
420 ldo6_reg: LDO6 {
421 regulator-name
422 regulator-min-
423 regulator-max-
424 regulator-alwa
425 regulator-stat
426 regula
427 };
428 };
429
430 ldo7_reg: LDO7 {
431 regulator-name
432 regulator-min-
433 regulator-max-
434 };
435
436 ldo8_reg: LDO8 {
437 regulator-name
438 regulator-min-
439 regulator-max-
440 regulator-alwa
441 regulator-stat
442 regula
443 };
444 };
445
446 ldo9_reg: LDO9 {
447 regulator-name
448 regulator-min-
449 regulator-max-
450 regulator-stat
451 regula
452 regula
453 };
454 };
455
456 ldo10_reg: LDO10 {
457 regulator-name
458 regulator-min-
459 regulator-max-
460 regulator-alwa
461 regulator-stat
462 regula
463 };
464 };
465
466 ldo11_reg: LDO11 {
467 regulator-name
468 regulator-min-
469 regulator-max-
470 regulator-alwa
471 regulator-stat
472 regula
473 regula
474 };
475 };
476
477 ldo12_reg: LDO12 {
478 regulator-name
479 regulator-min-
480 regulator-max-
481 regulator-alwa
482 regulator-stat
483 regula
484 };
485 };
486
487 ldo13_reg: LDO13 {
488 regulator-name
489 regulator-min-
490 regulator-max-
491 regulator-alwa
492 regulator-stat
493 regula
494 regula
495 };
496 };
497
498 ldo14_reg: LDO14 {
499 regulator-name
500 regulator-min-
501 regulator-max-
502 regulator-alwa
503 regulator-stat
504 regula
505 };
506 };
507
508 ldo15_reg: LDO15 {
509 regulator-name
510 regulator-min-
511 regulator-max-
512 regulator-alwa
513 regulator-stat
514 regula
515 };
516 };
517
518 ldo17_reg: LDO17 {
519 regulator-name
520 regulator-min-
521 regulator-max-
522 regulator-alwa
523 regulator-stat
524 regula
525 };
526 };
527
528 ldo18_reg: LDO18 {
529 regulator-name
530 regulator-min-
531 regulator-max-
532 };
533
534 ldo19_reg: LDO19 {
535 regulator-name
536 regulator-min-
537 regulator-max-
538 };
539
540 ldo20_reg: LDO20 {
541 regulator-name
542 regulator-min-
543 regulator-max-
544 regulator-alwa
545 };
546
547 ldo21_reg: LDO21 {
548 regulator-name
549 regulator-min-
550 regulator-max-
551 };
552
553 ldo23_reg: LDO23 {
554 regulator-name
555 regulator-min-
556 regulator-max-
557 };
558 ldo24_reg: LDO24 {
559 regulator-name
560 regulator-min-
561 regulator-max-
562 };
563
564 ldo25_reg: LDO25 {
565 regulator-name
566 regulator-min-
567 regulator-max-
568 };
569
570 ldo26_reg: LDO26 {
571 regulator-name
572 regulator-min-
573 regulator-max-
574 };
575
576 ldo27_reg: LDO27 {
577 regulator-name
578 regulator-min-
579 regulator-max-
580 };
581
582 ldo28_reg: LDO28 {
583 regulator-name
584 regulator-min-
585 regulator-max-
586 };
587
588 ldo29_reg: LDO29 {
589 regulator-name
590 regulator-min-
591 regulator-max-
592 };
593
594 ldo30_reg: LDO30 {
595 regulator-name
596 regulator-min-
597 regulator-max-
598 regulator-alwa
599 regulator-stat
600 regula
601 };
602 };
603
604 ldo32_reg: LDO32 {
605 regulator-name
606 regulator-min-
607 regulator-max-
608 };
609
610 ldo33_reg: LDO33 {
611 regulator-name
612 regulator-min-
613 regulator-max-
614 };
615
616 ldo34_reg: LDO34 {
617 regulator-name
618 regulator-min-
619 regulator-max-
620 };
621
622 ldo35_reg: LDO35 {
623 regulator-name
624 regulator-min-
625 regulator-max-
626 };
627 };
628 };
629 };
630
631 &hsi2c_7 {
632 status = "okay";
633 clock-frequency = <400000>;
634
635 max98091: codec@10 {
636 compatible = "maxim,max98091";
637 reg = <0x10>;
638 interrupts = <2 IRQ_TYPE_NONE>
639 interrupt-parent = <&gpx0>;
640 pinctrl-names = "default";
641 pinctrl-0 = <&max98091_irq>;
642 clocks = <&pmu_system_controll
643 clock-names = "mclk";
644 #sound-dai-cells = <0>;
645 };
646
647 light-sensor@44 {
648 compatible = "isil,isl29018";
649 reg = <0x44>;
650 vcc-supply = <&tps65090_fet5>;
651 };
652 };
653
654 &hsi2c_8 {
655 status = "okay";
656 clock-frequency = <333000>;
657 /* Atmel mXT540S */
658 trackpad@4b {
659 compatible = "atmel,maxtouch";
660 reg = <0x4b>;
661 interrupt-parent = <&gpx1>;
662 interrupts = <1 IRQ_TYPE_EDGE_
663 wakeup-source;
664 pinctrl-names = "default";
665 pinctrl-0 = <&trackpad_irq>;
666 linux,gpio-keymap = <KEY_RESER
667 KEY_RESER
668 KEY_RESER
669 KEY_RESER
670 BTN_LEFT
671 KEY_RESER
672 };
673 };
674
675 &hsi2c_9 {
676 status = "okay";
677 clock-frequency = <400000>;
678
679 tpm@20 {
680 compatible = "infineon,slb9645
681 reg = <0x20>;
682
683 /* Unused irq; but still need
684 pinctrl-names = "default";
685 pinctrl-0 = <&tpm_irq>;
686 };
687 };
688
689 &i2c_2 {
690 status = "okay";
691 samsung,i2c-sda-delay = <100>;
692 samsung,i2c-max-bus-freq = <66000>;
693 samsung,i2c-slave-addr = <0x50>;
694 };
695
696 &i2s0 {
697 assigned-clocks = <&i2s0 CLK_I2S_RCLK_
698 assigned-clock-parents = <&clock_audss
699 status = "okay";
700 };
701
702 &mixer {
703 status = "okay";
704 };
705
706 /* eMMC flash */
707 &mmc_0 {
708 status = "okay";
709 mmc-ddr-1_8v;
710 mmc-hs200-1_8v;
711 mmc-hs400-1_8v;
712 cap-mmc-highspeed;
713 non-removable;
714 clock-frequency = <800000000>;
715 samsung,dw-mshc-ciu-div = <3>;
716 samsung,dw-mshc-sdr-timing = <0 4>;
717 samsung,dw-mshc-ddr-timing = <0 2>;
718 samsung,dw-mshc-hs400-timing = <0 2>;
719 samsung,read-strobe-delay = <90>;
720 pinctrl-names = "default";
721 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bu
722 bus-width = <8>;
723 };
724
725 /* WiFi SDIO module */
726 &mmc_1 {
727 status = "okay";
728 non-removable;
729 cap-sdio-irq;
730 keep-power-in-suspend;
731 clock-frequency = <400000000>;
732 samsung,dw-mshc-ciu-div = <1>;
733 samsung,dw-mshc-sdr-timing = <0 1>;
734 samsung,dw-mshc-ddr-timing = <0 2>;
735 pinctrl-names = "default";
736 pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, <&
737 <&sd1_bus4>, <&sd1_bus8>,
738 bus-width = <4>;
739 cap-sd-highspeed;
740 mmc-pwrseq = <&mmc1_pwrseq>;
741 vqmmc-supply = <&buck10_reg>;
742 };
743
744 /* uSD card */
745 &mmc_2 {
746 status = "okay";
747 cap-sd-highspeed;
748 card-detect-delay = <200>;
749 clock-frequency = <400000000>;
750 samsung,dw-mshc-ciu-div = <3>;
751 samsung,dw-mshc-sdr-timing = <2 3>;
752 samsung,dw-mshc-ddr-timing = <1 2>;
753 pinctrl-names = "default";
754 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd
755 bus-width = <4>;
756 };
757
758
759 &pinctrl_0 {
760 pinctrl-names = "default";
761 pinctrl-0 = <&mask_tpm_reset>;
762
763 wifi_en: wifi-en-pins {
764 samsung,pins = "gpx0-0";
765 samsung,pin-function = <EXYNOS
766 samsung,pin-pud = <EXYNOS_PIN_
767 samsung,pin-drv = <EXYNOS5420_
768 };
769
770 max98091_irq: max98091-irq-pins {
771 samsung,pins = "gpx0-2";
772 samsung,pin-function = <EXYNOS
773 samsung,pin-pud = <EXYNOS_PIN_
774 samsung,pin-drv = <EXYNOS5420_
775 };
776
777 /* We need GPX0_6 to be low at sleep t
778 mask_tpm_reset: mask-tpm-reset-pins {
779 samsung,pins = "gpx0-6";
780 samsung,pin-function = <EXYNOS
781 samsung,pin-pud = <EXYNOS_PIN_
782 samsung,pin-drv = <EXYNOS5420_
783 samsung,pin-val = <0>;
784 };
785
786 tpm_irq: tpm-irq-pins {
787 samsung,pins = "gpx1-0";
788 samsung,pin-function = <EXYNOS
789 samsung,pin-pud = <EXYNOS_PIN_
790 samsung,pin-drv = <EXYNOS5420_
791 };
792
793 trackpad_irq: trackpad-irq-pins {
794 samsung,pins = "gpx1-1";
795 samsung,pin-function = <EXYNOS
796 samsung,pin-pud = <EXYNOS_PIN_
797 samsung,pin-drv = <EXYNOS5420_
798 };
799
800 power_key_irq: power-key-irq-pins {
801 samsung,pins = "gpx1-2";
802 samsung,pin-function = <EXYNOS
803 samsung,pin-pud = <EXYNOS_PIN_
804 samsung,pin-drv = <EXYNOS5420_
805 };
806
807 ec_irq: ec-irq-pins {
808 samsung,pins = "gpx1-5";
809 samsung,pin-function = <EXYNOS
810 samsung,pin-pud = <EXYNOS_PIN_
811 samsung,pin-drv = <EXYNOS5420_
812 };
813
814 tps65090_irq: tps65090-irq-pins {
815 samsung,pins = "gpx2-5";
816 samsung,pin-function = <EXYNOS
817 samsung,pin-pud = <EXYNOS_PIN_
818 samsung,pin-drv = <EXYNOS5420_
819 };
820
821 dp_hpd_gpio: dp-hpd-gpio-pins {
822 samsung,pins = "gpx2-6";
823 samsung,pin-function = <EXYNOS
824 samsung,pin-pud = <EXYNOS_PIN_
825 samsung,pin-drv = <EXYNOS5420_
826 };
827
828 max77802_irq: max77802-irq-pins {
829 samsung,pins = "gpx3-1";
830 samsung,pin-function = <EXYNOS
831 samsung,pin-pud = <EXYNOS_PIN_
832 samsung,pin-drv = <EXYNOS5420_
833 };
834
835 lid_irq: lid-irq-pins {
836 samsung,pins = "gpx3-4";
837 samsung,pin-function = <EXYNOS
838 samsung,pin-pud = <EXYNOS_PIN_
839 samsung,pin-drv = <EXYNOS5420_
840 };
841
842 hdmi_hpd_irq: hdmi-hpd-irq-pins {
843 samsung,pins = "gpx3-7";
844 samsung,pin-function = <EXYNOS
845 samsung,pin-pud = <EXYNOS_PIN_
846 samsung,pin-drv = <EXYNOS5420_
847 };
848
849 pmic_dvs_1: pmic-dvs-1-pins {
850 samsung,pins = "gpy7-6";
851 samsung,pin-function = <EXYNOS
852 samsung,pin-pud = <EXYNOS_PIN_
853 samsung,pin-drv = <EXYNOS5420_
854 };
855 };
856
857 /* pinctrl_1 */
858 /* Adjust WiFi drive strengths lower for EMI *
859 &sd1_bus1 {
860 samsung,pin-drv = <EXYNOS5420_PIN_DRV_
861 };
862
863 &sd1_bus4 {
864 samsung,pin-drv = <EXYNOS5420_PIN_DRV_
865 };
866
867 &sd1_bus8 {
868 samsung,pin-drv = <EXYNOS5420_PIN_DRV_
869 };
870
871 &sd1_clk {
872 samsung,pin-drv = <EXYNOS5420_PIN_DRV_
873 };
874
875 &sd1_cmd {
876 samsung,pin-drv = <EXYNOS5420_PIN_DRV_
877 };
878
879 &pinctrl_2 {
880 pmic_dvs_2: pmic-dvs-2-pins {
881 samsung,pins = "gpj4-2", "gpj4
882 samsung,pin-function = <EXYNOS
883 samsung,pin-pud = <EXYNOS_PIN_
884 samsung,pin-drv = <EXYNOS5420_
885 };
886 };
887
888 /* pinctrl_3*/
889 /* Drive SPI lines at x2 for better integrity
890 &spi2_bus {
891 samsung,pin-drv = <EXYNOS5420_PIN_DRV_
892 };
893
894 &pinctrl_3 {
895 /* Drive SPI chip select at x2 for bet
896 ec_spi_cs: ec-spi-cs-pins {
897 samsung,pins = "gpb1-2";
898 samsung,pin-function = <EXYNOS
899 samsung,pin-pud = <EXYNOS_PIN_
900 samsung,pin-drv = <EXYNOS5420_
901 };
902
903 usb300_vbus_en: usb300-vbus-en-pins {
904 samsung,pins = "gph0-0";
905 samsung,pin-function = <EXYNOS
906 samsung,pin-pud = <EXYNOS_PIN_
907 samsung,pin-drv = <EXYNOS5420_
908 };
909
910 usb301_vbus_en: usb301-vbus-en-pins {
911 samsung,pins = "gph0-1";
912 samsung,pin-function = <EXYNOS
913 samsung,pin-pud = <EXYNOS_PIN_
914 samsung,pin-drv = <EXYNOS5420_
915 };
916
917 pmic_selb: pmic-selb-pins {
918 samsung,pins = "gph0-2", "gph0
919 "gph0-6";
920 samsung,pin-function = <EXYNOS
921 samsung,pin-pud = <EXYNOS_PIN_
922 samsung,pin-drv = <EXYNOS5420_
923 };
924 };
925
926 &pmu_system_controller {
927 assigned-clocks = <&pmu_system_control
928 assigned-clock-parents = <&clock CLK_F
929 };
930
931 &rtc {
932 status = "okay";
933 clocks = <&clock CLK_RTC>, <&max77802
934 clock-names = "rtc", "rtc_src";
935 };
936
937 &spi_2 {
938 status = "okay";
939 num-cs = <1>;
940 samsung,spi-src-clk = <0>;
941 cs-gpios = <&gpb1 2 GPIO_ACTIVE_HIGH>;
942
943 cros_ec: cros-ec@0 {
944 compatible = "google,cros-ec-s
945 interrupt-parent = <&gpx1>;
946 interrupts = <5 IRQ_TYPE_NONE>
947 pinctrl-names = "default";
948 pinctrl-0 = <&ec_spi_cs &ec_ir
949 reg = <0>;
950 spi-max-frequency = <3125000>;
951 google,has-vbc-nvram;
952 wakeup-source;
953
954 controller-data {
955 samsung,spi-feedback-d
956 };
957
958 i2c_tunnel: i2c-tunnel {
959 compatible = "google,c
960 #address-cells = <1>;
961 #size-cells = <0>;
962 google,remote-bus = <0
963
964 battery: sbs-battery@b
965 compatible = "
966 reg = <0xb>;
967 sbs,poll-retry
968 sbs,i2c-retry-
969 };
970
971 power-regulator@48 {
972 compatible = "
973 reg = <0x48>;
974
975 /*
976 * Config irq
977 * even though
978 */
979 pinctrl-names
980 pinctrl-0 = <&
981
982 vsys1-supply =
983 vsys2-supply =
984 vsys3-supply =
985 infet1-supply
986 infet2-supply
987 infet3-supply
988 infet4-supply
989 infet5-supply
990 infet6-supply
991 infet7-supply
992 vsys-l1-supply
993 vsys-l2-supply
994
995 regulators {
996 tps650
997
998 };
999 tps650
1000
1001 };
1002 tps65
1003
1004 };
1005 tps65
1006
1007 };
1008 tps65
1009
1010
1011 };
1012 tps65
1013
1014
1015 };
1016 tps65
1017
1018
1019 };
1020 tps65
1021
1022
1023 };
1024 tps65
1025
1026 };
1027 tps65
1028
1029
1030 };
1031 tps65
1032 };
1033 tps65
1034 };
1035 };
1036
1037 charger {
1038 compa
1039 };
1040 };
1041 };
1042 };
1043 };
1044
1045 &serial_3 {
1046 status = "okay";
1047 };
1048
1049 &timer {
1050 arm,cpu-registers-not-fw-configured;
1051 };
1052
1053 &tmu_cpu0 {
1054 vtmu-supply = <&ldo10_reg>;
1055 };
1056
1057 &tmu_cpu1 {
1058 vtmu-supply = <&ldo10_reg>;
1059 };
1060
1061 &tmu_cpu2 {
1062 vtmu-supply = <&ldo10_reg>;
1063 };
1064
1065 &tmu_cpu3 {
1066 vtmu-supply = <&ldo10_reg>;
1067 };
1068
1069 &tmu_gpu {
1070 vtmu-supply = <&ldo10_reg>;
1071 };
1072
1073 &usbdrd3_0 {
1074 vdd10-supply = <&ldo15_reg>;
1075 vdd33-supply = <&ldo12_reg>;
1076 };
1077
1078 &usbdrd3_1 {
1079 vdd10-supply = <&ldo15_reg>;
1080 vdd33-supply = <&ldo12_reg>;
1081 };
1082
1083 &usbdrd_dwc3_0 {
1084 dr_mode = "host";
1085 };
1086
1087 &usbdrd_dwc3_1 {
1088 dr_mode = "host";
1089 };
1090
1091 &usbdrd_phy0 {
1092 vbus-supply = <&usb300_vbus_reg>;
1093 };
1094
1095 &usbdrd_phy1 {
1096 vbus-supply = <&usb301_vbus_reg>;
1097 };
1098
1099 /*
1100 * Use longest HW watchdog in SoC (32 seconds
1101 * watchdog provides no debugging information
1102 * lockup detectors) and so should be last re
1103 */
1104 &watchdog {
1105 timeout-sec = <32>;
1106 };
1107
1108 #include "../cros-ec-keyboard.dtsi"
1109 #include "../cros-adc-thermistors.dtsi"
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