1 // SPDX-License-Identifier: GPL-2.0-or-later 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* 2 /*
3 * DTS file for all SPEAr1340 SoCs 3 * DTS file for all SPEAr1340 SoCs
4 * 4 *
5 * Copyright 2012 Viresh Kumar <vireshk@kernel. 5 * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
6 */ 6 */
7 7
8 /include/ "spear13xx.dtsi" 8 /include/ "spear13xx.dtsi"
9 9
10 / { 10 / {
11 compatible = "st,spear1340"; 11 compatible = "st,spear1340";
12 12
13 ahb { 13 ahb {
14 14
15 spics: spics@e0700000 { 15 spics: spics@e0700000 {
16 compatible = "st,spear 16 compatible = "st,spear-spics-gpio";
17 reg = <0xe0700000 0x10 17 reg = <0xe0700000 0x1000>;
18 st-spics,peripcfg-reg 18 st-spics,peripcfg-reg = <0x42c>;
19 st-spics,sw-enable-bit 19 st-spics,sw-enable-bit = <21>;
20 st-spics,cs-value-bit 20 st-spics,cs-value-bit = <20>;
21 st-spics,cs-enable-mas 21 st-spics,cs-enable-mask = <3>;
22 st-spics,cs-enable-shi 22 st-spics,cs-enable-shift = <18>;
23 gpio-controller; 23 gpio-controller;
24 #gpio-cells = <2>; 24 #gpio-cells = <2>;
25 status = "disabled"; 25 status = "disabled";
26 }; 26 };
27 27
28 miphy0: miphy@eb800000 { 28 miphy0: miphy@eb800000 {
29 compatible = "st,spear 29 compatible = "st,spear1340-miphy";
30 reg = <0xeb800000 0x40 30 reg = <0xeb800000 0x4000>;
31 misc = <&misc>; 31 misc = <&misc>;
32 #phy-cells = <1>; 32 #phy-cells = <1>;
33 status = "disabled"; 33 status = "disabled";
34 }; 34 };
35 35
36 ahci0: ahci@b1000000 { 36 ahci0: ahci@b1000000 {
37 compatible = "snps,spe 37 compatible = "snps,spear-ahci";
38 reg = <0xb1000000 0x10 38 reg = <0xb1000000 0x10000>;
39 interrupts = <0 72 0x4 39 interrupts = <0 72 0x4>;
40 phys = <&miphy0 0>; 40 phys = <&miphy0 0>;
41 phy-names = "sata-phy" 41 phy-names = "sata-phy";
42 status = "disabled"; 42 status = "disabled";
43 }; 43 };
44 44
45 pcie0: pcie@b1000000 { 45 pcie0: pcie@b1000000 {
46 compatible = "st,spear 46 compatible = "st,spear1340-pcie", "snps,dw-pcie";
47 reg = <0xb1000000 0x40 47 reg = <0xb1000000 0x4000>, <0x80000000 0x20000>;
48 reg-names = "dbi", "co 48 reg-names = "dbi", "config";
49 interrupts = <0 68 0x4 49 interrupts = <0 68 0x4>;
50 num-lanes = <1>; 50 num-lanes = <1>;
51 phys = <&miphy0 1>; 51 phys = <&miphy0 1>;
52 phy-names = "pcie-phy" 52 phy-names = "pcie-phy";
53 #address-cells = <3>; 53 #address-cells = <3>;
54 #size-cells = <2>; 54 #size-cells = <2>;
55 device_type = "pci"; 55 device_type = "pci";
56 ranges = <0x81000000 0 56 ranges = <0x81000000 0 0 0x80020000 0 0x00010000 /* downstream I/O */
57 0x82000000 0 0 57 0x82000000 0 0x80030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */
58 bus-range = <0x00 0xff 58 bus-range = <0x00 0xff>;
59 status = "disabled"; 59 status = "disabled";
60 }; 60 };
61 61
62 i2s-play@b2400000 { 62 i2s-play@b2400000 {
63 compatible = "snps,des 63 compatible = "snps,designware-i2s";
64 reg = <0xb2400000 0x10 64 reg = <0xb2400000 0x10000>;
65 interrupt-names = "pla 65 interrupt-names = "play_irq";
66 interrupts = <0 98 0x4 66 interrupts = <0 98 0x4>,
67 <0 99 0x4 67 <0 99 0x4>;
68 play; 68 play;
69 channel = <8>; 69 channel = <8>;
70 status = "disabled"; 70 status = "disabled";
71 }; 71 };
72 72
73 i2s-rec@b2000000 { 73 i2s-rec@b2000000 {
74 compatible = "snps,des 74 compatible = "snps,designware-i2s";
75 reg = <0xb2000000 0x10 75 reg = <0xb2000000 0x10000>;
76 interrupt-names = "rec 76 interrupt-names = "record_irq";
77 interrupts = <0 100 0x 77 interrupts = <0 100 0x4>,
78 <0 101 0x 78 <0 101 0x4>;
79 record; 79 record;
80 channel = <8>; 80 channel = <8>;
81 status = "disabled"; 81 status = "disabled";
82 }; 82 };
83 83
84 pinmux: pinmux@e0700000 { 84 pinmux: pinmux@e0700000 {
85 compatible = "st,spear 85 compatible = "st,spear1340-pinmux";
86 reg = <0xe0700000 0x10 86 reg = <0xe0700000 0x1000>;
87 #gpio-range-cells = <3 87 #gpio-range-cells = <3>;
88 }; 88 };
89 89
90 pwm: pwm@e0180000 { 90 pwm: pwm@e0180000 {
91 compatible = "st,spear 91 compatible = "st,spear13xx-pwm";
92 reg = <0xe0180000 0x10 92 reg = <0xe0180000 0x1000>;
93 #pwm-cells = <2>; 93 #pwm-cells = <2>;
94 status = "disabled"; 94 status = "disabled";
95 }; 95 };
96 96
97 spdif-in@d0100000 { 97 spdif-in@d0100000 {
98 compatible = "st,spdif 98 compatible = "st,spdif-in";
99 reg = < 0xd0100000 0x2 99 reg = < 0xd0100000 0x20000
100 0xd0110000 0x1 100 0xd0110000 0x10000 >;
101 interrupts = <0 84 0x4 101 interrupts = <0 84 0x4>;
102 status = "disabled"; 102 status = "disabled";
103 }; 103 };
104 104
105 spdif-out@d0000000 { 105 spdif-out@d0000000 {
106 compatible = "st,spdif 106 compatible = "st,spdif-out";
107 reg = <0xd0000000 0x20 107 reg = <0xd0000000 0x20000>;
108 interrupts = <0 85 0x4 108 interrupts = <0 85 0x4>;
109 status = "disabled"; 109 status = "disabled";
110 }; 110 };
111 111
112 spi1: spi@5d400000 { 112 spi1: spi@5d400000 {
113 compatible = "arm,pl02 113 compatible = "arm,pl022", "arm,primecell";
114 reg = <0x5d400000 0x10 114 reg = <0x5d400000 0x1000>;
115 #address-cells = <1>; 115 #address-cells = <1>;
116 #size-cells = <0>; 116 #size-cells = <0>;
117 interrupts = <0 99 0x4 117 interrupts = <0 99 0x4>;
118 status = "disabled"; 118 status = "disabled";
119 }; 119 };
120 120
121 apb { 121 apb {
122 i2c1: i2c@b4000000 { 122 i2c1: i2c@b4000000 {
123 #address-cells 123 #address-cells = <1>;
124 #size-cells = 124 #size-cells = <0>;
125 compatible = " 125 compatible = "snps,designware-i2c";
126 reg = <0xb4000 126 reg = <0xb4000000 0x1000>;
127 interrupts = < 127 interrupts = <0 104 0x4>;
128 write-16bit; 128 write-16bit;
129 status = "disa 129 status = "disabled";
130 }; 130 };
131 131
132 serial@b4100000 { 132 serial@b4100000 {
133 compatible = " 133 compatible = "arm,pl011", "arm,primecell";
134 reg = <0xb4100 134 reg = <0xb4100000 0x1000>;
135 interrupts = < 135 interrupts = <0 105 0x4>;
136 status = "disa 136 status = "disabled";
137 dmas = <&dwdma 137 dmas = <&dwdma0 13 0 1>,
138 <&dwdm 138 <&dwdma0 12 1 0>;
139 dma-names = "r 139 dma-names = "rx", "tx";
140 }; 140 };
141 141
142 thermal@e07008c4 { 142 thermal@e07008c4 {
143 st,thermal-fla 143 st,thermal-flags = <0x2a00>;
144 }; 144 };
145 145
146 gpiopinctrl: gpio@e280 146 gpiopinctrl: gpio@e2800000 {
147 compatible = " 147 compatible = "st,spear-plgpio";
148 reg = <0xe2800 148 reg = <0xe2800000 0x1000>;
149 interrupts = < 149 interrupts = <0 107 0x4>;
150 #interrupt-cel 150 #interrupt-cells = <1>;
151 interrupt-cont 151 interrupt-controller;
152 gpio-controlle 152 gpio-controller;
153 #gpio-cells = 153 #gpio-cells = <2>;
154 gpio-ranges = 154 gpio-ranges = <&pinmux 0 0 252>;
155 status = "disa 155 status = "disabled";
156 156
157 st-plgpio,ngpi 157 st-plgpio,ngpio = <250>;
158 st-plgpio,wdat 158 st-plgpio,wdata-reg = <0x40>;
159 st-plgpio,dir- 159 st-plgpio,dir-reg = <0x00>;
160 st-plgpio,ie-r 160 st-plgpio,ie-reg = <0x80>;
161 st-plgpio,rdat 161 st-plgpio,rdata-reg = <0x20>;
162 st-plgpio,mis- 162 st-plgpio,mis-reg = <0xa0>;
163 st-plgpio,eit- 163 st-plgpio,eit-reg = <0x60>;
164 }; 164 };
165 }; 165 };
166 }; 166 };
167 }; 167 };
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