1 // SPDX-License-Identifier: GPL-2.0-or-later 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* 2 /*
3 * DTS file for SPEAr300 SoC 3 * DTS file for SPEAr300 SoC
4 * 4 *
5 * Copyright 2012 Viresh Kumar <vireshk@kernel. 5 * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
6 */ 6 */
7 7
8 /include/ "spear3xx.dtsi" 8 /include/ "spear3xx.dtsi"
9 9
10 / { 10 / {
11 ahb { 11 ahb {
12 #address-cells = <1>; 12 #address-cells = <1>;
13 #size-cells = <1>; 13 #size-cells = <1>;
14 compatible = "simple-bus"; 14 compatible = "simple-bus";
15 ranges = <0x60000000 0x6000000 15 ranges = <0x60000000 0x60000000 0x50000000
16 0xd0000000 0xd000000 16 0xd0000000 0xd0000000 0x30000000>;
17 17
18 pinmux@99000000 { 18 pinmux@99000000 {
19 compatible = "st,spear 19 compatible = "st,spear300-pinmux";
20 reg = <0x99000000 0x10 20 reg = <0x99000000 0x1000>;
21 }; 21 };
22 22
23 clcd@60000000 { 23 clcd@60000000 {
24 compatible = "arm,pl11 24 compatible = "arm,pl110", "arm,primecell";
25 reg = <0x60000000 0x10 25 reg = <0x60000000 0x1000>;
26 interrupts = <30>; 26 interrupts = <30>;
27 status = "disabled"; 27 status = "disabled";
28 }; 28 };
29 29
30 fsmc: flash@94000000 { 30 fsmc: flash@94000000 {
31 compatible = "st,spear 31 compatible = "st,spear600-fsmc-nand";
32 #address-cells = <1>; 32 #address-cells = <1>;
33 #size-cells = <1>; 33 #size-cells = <1>;
34 reg = <0x94000000 0x10 34 reg = <0x94000000 0x1000 /* FSMC Register */
35 0x80000000 0x00 35 0x80000000 0x0010 /* NAND Base DATA */
36 0x80020000 0x00 36 0x80020000 0x0010 /* NAND Base ADDR */
37 0x80010000 0x00 37 0x80010000 0x0010>; /* NAND Base CMD */
38 reg-names = "fsmc_regs 38 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
39 status = "disabled"; 39 status = "disabled";
40 }; 40 };
41 41
42 sdhci@70000000 { 42 sdhci@70000000 {
43 compatible = "st,sdhci 43 compatible = "st,sdhci-spear";
44 reg = <0x70000000 0x10 44 reg = <0x70000000 0x100>;
45 interrupts = <1>; 45 interrupts = <1>;
46 status = "disabled"; 46 status = "disabled";
47 }; 47 };
48 48
49 shirq: interrupt-controller@50 49 shirq: interrupt-controller@50000000 {
50 compatible = "st,spear 50 compatible = "st,spear300-shirq";
51 reg = <0x50000000 0x10 51 reg = <0x50000000 0x1000>;
52 interrupts = <28>; 52 interrupts = <28>;
53 #interrupt-cells = <1> 53 #interrupt-cells = <1>;
54 interrupt-controller; 54 interrupt-controller;
55 }; 55 };
56 56
57 apb { 57 apb {
58 #address-cells = <1>; 58 #address-cells = <1>;
59 #size-cells = <1>; 59 #size-cells = <1>;
60 compatible = "simple-b 60 compatible = "simple-bus";
61 ranges = <0xa0000000 0 61 ranges = <0xa0000000 0xa0000000 0x10000000
62 0xd0000000 0 62 0xd0000000 0xd0000000 0x30000000>;
63 63
64 gpio1: gpio@a9000000 { 64 gpio1: gpio@a9000000 {
65 #gpio-cells = 65 #gpio-cells = <2>;
66 compatible = " 66 compatible = "arm,pl061", "arm,primecell";
67 gpio-controlle 67 gpio-controller;
68 reg = <0xa9000 68 reg = <0xa9000000 0x1000>;
69 interrupts = < 69 interrupts = <8>;
70 interrupt-pare 70 interrupt-parent = <&shirq>;
71 status = "disa 71 status = "disabled";
72 }; 72 };
73 73
74 kbd@a0000000 { 74 kbd@a0000000 {
75 compatible = " 75 compatible = "st,spear300-kbd";
76 reg = <0xa0000 76 reg = <0xa0000000 0x1000>;
77 interrupts = < 77 interrupts = <7>;
78 interrupt-pare 78 interrupt-parent = <&shirq>;
79 status = "disa 79 status = "disabled";
80 }; 80 };
81 }; 81 };
82 }; 82 };
83 }; 83 };
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