1 // SPDX-License-Identifier: GPL-2.0-or-later 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* 2 /*
3 * Copyright 2014 Linaro Ltd. 3 * Copyright 2014 Linaro Ltd.
4 */ 4 */
5 5
6 #include "ste-ab8500.dtsi" 6 #include "ste-ab8500.dtsi"
7 7
8 / { 8 / {
9 soc { 9 soc {
10 prcmu@80157000 { 10 prcmu@80157000 {
11 ab8500 { 11 ab8500 {
12 phy { <<
13 pinctr <<
14 pinctr <<
15 pinctr <<
16 }; <<
17 <<
18 regulator { <<
19 ab8500 <<
20 <<
21 }; <<
22 <<
23 ab8500 <<
24 <<
25 }; <<
26 <<
27 ab8500 <<
28 <<
29 }; <<
30 <<
31 ab8500 <<
32 <<
33 }; <<
34 <<
35 ab8500 <<
36 <<
37 }; <<
38 <<
39 ab8500 <<
40 <<
41 }; <<
42 <<
43 ab8500 <<
44 <<
45 }; <<
46 <<
47 ab8500 <<
48 <<
49 }; <<
50 <<
51 ab8500 <<
52 <<
53 }; <<
54 <<
55 ab8500 <<
56 <<
57 }; <<
58 }; <<
59 <<
60 gpio { 12 gpio {
61 /* Hog 13 /* Hog a few default settings */
62 pinctr 14 pinctrl-names = "default";
63 pinctr 15 pinctrl-0 = <&gpio2_default_mode>,
64 16 <&gpio4_default_mode>,
65 17 <&gpio10_default_mode>,
66 18 <&gpio11_default_mode>,
67 19 <&gpio12_default_mode>,
68 20 <&gpio13_default_mode>,
69 21 <&gpio16_default_mode>,
70 22 <&gpio24_default_mode>,
71 23 <&gpio25_default_mode>,
72 24 <&gpio36_default_mode>,
73 25 <&gpio37_default_mode>,
74 26 <&gpio38_default_mode>,
75 27 <&gpio39_default_mode>,
76 28 <&gpio42_default_mode>,
77 29 <&gpio26_default_mode>,
78 30 <&gpio35_default_mode>,
79 31 <&ycbcr_default_mode>,
80 32 <&pwm_default_mode>,
81 33 <&adi1_default_mode>,
82 34 <&usbuicc_default_mode>,
83 35 <&dmic_default_mode>,
84 36 <&extcpena_default_mode>,
85 37 <&modsclsda_default_mode>;
86 38
87 /* 39 /*
88 * Pin 40 * Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42
89 * are 41 * are muxed in as GPIO, and configured as INPUT PULL DOWN
90 */ 42 */
91 gpio2 43 gpio2 {
92 44 gpio2_default_mode: gpio2_default {
93 45 default_mux {
94 46 function = "gpio";
95 47 groups = "gpio2_a_1";
96 48 };
97 49 default_cfg {
98 50 pins = "GPIO2_T9";
99 51 input-enable;
100 52 bias-pull-down;
101 53 };
102 54 };
103 }; 55 };
104 gpio4 56 gpio4 {
105 57 gpio4_default_mode: gpio4_default {
106 58 default_mux {
107 59 function = "gpio";
108 60 groups = "gpio4_a_1";
109 61 };
110 62 default_cfg {
111 63 pins = "GPIO4_W2";
112 64 input-enable;
113 65 bias-pull-down;
114 66 };
115 67 };
116 }; 68 };
117 gpio10 69 gpio10 {
118 70 gpio10_default_mode: gpio10_default {
119 71 default_mux {
120 72 function = "gpio";
121 73 groups = "gpio10_d_1";
122 74 };
123 75 default_cfg {
124 76 pins = "GPIO10_U17";
125 77 input-enable;
126 78 bias-pull-down;
127 79 };
128 80 };
129 }; 81 };
130 gpio11 82 gpio11 {
131 83 gpio11_default_mode: gpio11_default {
132 84 default_mux {
133 85 function = "gpio";
134 86 groups = "gpio11_d_1";
135 87 };
136 88 default_cfg {
137 89 pins = "GPIO11_AA18";
138 90 input-enable;
139 91 bias-pull-down;
140 92 };
141 93 };
142 }; 94 };
143 gpio12 95 gpio12 {
144 96 gpio12_default_mode: gpio12_default {
145 97 default_mux {
146 98 function = "gpio";
147 99 groups = "gpio12_d_1";
148 100 };
149 101 default_cfg {
150 102 pins = "GPIO12_U16";
151 103 input-enable;
152 104 bias-pull-down;
153 105 };
154 106 };
155 }; 107 };
156 gpio13 108 gpio13 {
157 109 gpio13_default_mode: gpio13_default {
158 110 default_mux {
159 111 function = "gpio";
160 112 groups = "gpio13_d_1";
161 113 };
162 114 default_cfg {
163 115 pins = "GPIO13_W17";
164 116 input-enable;
165 117 bias-pull-down;
166 118 };
167 119 };
168 }; 120 };
169 gpio16 121 gpio16 {
170 122 gpio16_default_mode: gpio16_default {
171 123 default_mux {
172 124 function = "gpio";
173 125 groups = "gpio16_a_1";
174 126 };
175 127 default_cfg {
176 128 pins = "GPIO16_F15";
177 129 input-enable;
178 130 bias-pull-down;
179 131 };
180 132 };
181 }; 133 };
182 gpio24 134 gpio24 {
183 135 gpio24_default_mode: gpio24_default {
184 136 default_mux {
185 137 function = "gpio";
186 138 groups = "gpio24_a_1";
187 139 };
188 140 default_cfg {
189 141 pins = "GPIO24_T14";
190 142 input-enable;
191 143 bias-pull-down;
192 144 };
193 145 };
194 }; 146 };
195 gpio25 147 gpio25 {
196 148 gpio25_default_mode: gpio25_default {
197 149 default_mux {
198 150 function = "gpio";
199 151 groups = "gpio25_a_1";
200 152 };
201 153 default_cfg {
202 154 pins = "GPIO25_R16";
203 155 input-enable;
204 156 bias-pull-down;
205 157 };
206 158 };
207 }; 159 };
208 gpio36 160 gpio36 {
209 161 gpio36_default_mode: gpio36_default {
210 162 default_mux {
211 163 function = "gpio";
212 164 groups = "gpio36_a_1";
213 165 };
214 166 default_cfg {
215 167 pins = "GPIO36_A17";
216 168 input-enable;
217 169 bias-pull-down;
218 170 };
219 171 };
220 }; 172 };
221 gpio37 173 gpio37 {
222 174 gpio37_default_mode: gpio37_default {
223 175 default_mux {
224 176 function = "gpio";
225 177 groups = "gpio37_a_1";
226 178 };
227 179 default_cfg {
228 180 pins = "GPIO37_E15";
229 181 input-enable;
230 182 bias-pull-down;
231 183 };
232 184 };
233 }; 185 };
234 gpio38 186 gpio38 {
235 187 gpio38_default_mode: gpio38_default {
236 188 default_mux {
237 189 function = "gpio";
238 190 groups = "gpio38_a_1";
239 191 };
240 192 default_cfg {
241 193 pins = "GPIO38_C17";
242 194 input-enable;
243 195 bias-pull-down;
244 196 };
245 197 };
246 }; 198 };
247 gpio39 199 gpio39 {
248 200 gpio39_default_mode: gpio39_default {
249 201 default_mux {
250 202 function = "gpio";
251 203 groups = "gpio39_a_1";
252 204 };
253 205 default_cfg {
254 206 pins = "GPIO39_E16";
255 207 input-enable;
256 208 bias-pull-down;
257 209 };
258 210 };
259 }; 211 };
260 gpio42 212 gpio42 {
261 213 gpio42_default_mode: gpio42_default {
262 214 default_mux {
263 215 function = "gpio";
264 216 groups = "gpio42_a_1";
265 217 };
266 218 default_cfg {
267 219 pins = "GPIO42_U2";
268 220 input-enable;
269 221 bias-pull-down;
270 222 };
271 223 };
272 }; 224 };
273 /* 225 /*
274 * Pin 226 * Pins 26 and 35 muxed in as GPIO, and configured as OUTPUT LOW
275 */ 227 */
276 gpio26 228 gpio26 {
277 229 gpio26_default_mode: gpio26_default {
278 230 default_mux {
279 231 function = "gpio";
280 232 groups = "gpio26_d_1";
281 233 };
282 234 default_cfg {
283 235 pins = "GPIO26_M16";
284 236 output-low;
285 237 };
286 238 };
287 }; 239 };
288 gpio35 240 gpio35 {
289 241 gpio35_default_mode: gpio35_default {
290 242 default_mux {
291 243 function = "gpio";
292 244 groups = "gpio35_d_1";
293 245 };
294 246 default_cfg {
295 247 pins = "GPIO35_W15";
296 248 output-low;
297 249 };
298 250 };
299 }; 251 };
300 /* 252 /*
301 * Thi 253 * This sets up the YCBCR connector pins, i.e. analog video out.
302 * Set 254 * Set as input with no bias.
303 */ 255 */
304 ycbcr 256 ycbcr {
305 257 ycbcr_default_mode: ycbcr_default {
306 258 default_mux {
307 259 function = "ycbcr";
308 260 groups = "ycbcr0123_d_1";
309 261 };
310 262 default_cfg {
311 263 pins = "GPIO6_Y18",
312 264 "GPIO7_AA20",
313 265 "GPIO8_W18",
314 266 "GPIO9_AA19";
315 267 input-enable;
316 268 bias-disable;
317 269 };
318 270 };
319 }; 271 };
320 /* Thi 272 /* This sets up the PWM pins 14 and 15 */
321 pwm { 273 pwm {
322 274 pwm_default_mode: pwm_default {
323 275 default_mux {
324 276 function = "pwmout";
325 277 groups = "pwmout1_d_1", "pwmout2_d_1";
326 278 };
327 279 default_cfg {
328 280 pins = "GPIO14_F14",
329 281 "GPIO15_B17";
330 282 input-enable;
331 283 bias-pull-down;
332 284 };
333 285 };
334 }; 286 };
335 /* Thi 287 /* This sets up audio interface 1 */
336 adi1 { 288 adi1 {
337 289 adi1_default_mode: adi1_default {
338 290 default_mux {
339 291 function = "adi1";
340 292 groups = "adi1_d_1";
341 293 };
342 294 default_cfg {
343 295 pins = "GPIO17_P5",
344 296 "GPIO18_R5",
345 297 "GPIO19_U5",
346 298 "GPIO20_T5";
347 299 input-enable;
348 300 bias-pull-down;
349 301 };
350 302 };
351 }; 303 };
352 /* Thi 304 /* This sets up the USB UICC pins */
353 usbuic 305 usbuicc {
354 306 usbuicc_default_mode: usbuicc_default {
355 307 default_mux {
356 308 function = "usbuicc";
357 309 groups = "usbuicc_d_1";
358 310 };
359 311 default_cfg {
360 312 pins = "GPIO21_H19",
361 313 "GPIO22_G20",
362 314 "GPIO23_G19";
363 315 input-enable;
364 316 bias-pull-down;
365 317 };
366 318 };
367 }; 319 };
368 /* Thi 320 /* This sets up the microphone pins */
369 dmic { 321 dmic {
370 322 dmic_default_mode: dmic_default {
371 323 default_mux {
372 324 function = "dmic";
373 325 groups = "dmic12_d_1",
374 326 "dmic34_d_1",
375 327 "dmic56_d_1";
376 328 };
377 329 default_cfg {
378 330 pins = "GPIO27_J6",
379 331 "GPIO28_K6",
380 332 "GPIO29_G6",
381 333 "GPIO30_H6",
382 334 "GPIO31_F5",
383 335 "GPIO32_G5";
384 336 input-enable;
385 337 bias-pull-down;
386 338 };
387 339 };
388 }; 340 };
389 extcpe 341 extcpena {
390 342 extcpena_default_mode: extcpena_default {
391 343 default_mux {
392 344 function = "extcpena";
393 345 groups = "extcpena_d_1";
394 346 };
395 347 default_cfg {
396 348 pins = "GPIO34_R17";
397 349 input-enable;
398 350 bias-pull-down;
399 351 };
400 352 };
401 }; 353 };
402 /* Mod 354 /* Modem I2C setup (SCL and SDA pins) */
403 modscl 355 modsclsda {
404 356 modsclsda_default_mode: modsclsda_default {
405 357 default_mux {
406 358 function = "modsclsda";
407 359 groups = "modsclsda_d_1";
408 360 };
409 361 default_cfg {
410 362 pins = "GPIO40_T19",
411 363 "GPIO41_U19";
412 364 input-enable;
413 365 bias-pull-down;
414 366 };
415 367 };
416 }; 368 };
417 /* 369 /*
418 * Clo 370 * Clock output pins associated with regulators.
419 */ 371 */
420 sysclk 372 sysclkreq2 {
421 373 sysclkreq2_default_mode: sysclkreq2_default {
422 374 default_mux {
423 375 function = "sysclkreq";
424 376 groups = "sysclkreq2_d_1";
425 377 };
426 378 default_cfg {
427 379 pins = "GPIO1_T10";
428 380 input-enable;
429 381 bias-disable;
430 382 };
431 383 };
432 384 sysclkreq2_sleep_mode: sysclkreq2_sleep {
433 385 default_mux {
434 386 function = "gpio";
435 387 groups = "gpio1_a_1";
436 388 };
437 389 default_cfg {
438 390 pins = "GPIO1_T10";
439 391 input-enable;
440 392 bias-pull-down;
441 393 };
442 394 };
443 }; 395 };
444 sysclk 396 sysclkreq4 {
445 397 sysclkreq4_default_mode: sysclkreq4_default {
446 398 default_mux {
447 399 function = "sysclkreq";
448 400 groups = "sysclkreq4_d_1";
449 401 };
450 402 default_cfg {
451 403 pins = "GPIO3_U9";
452 404 input-enable;
453 405 bias-disable;
454 406 };
455 407 };
456 408 sysclkreq4_sleep_mode: sysclkreq4_sleep {
457 409 default_mux {
458 410 function = "gpio";
459 411 groups = "gpio3_a_1";
460 412 };
461 413 default_cfg {
462 414 pins = "GPIO3_U9";
463 415 input-enable;
464 416 bias-pull-down;
465 417 };
466 418 };
467 }; 419 };
468 }; 420 };
469 /* 421 /*
470 * Charging is 422 * Charging is not working on the HREF unless an actual battery is
471 * mounted, mo 423 * mounted, most HREFs have a DC cable in to the "battery power"
472 * which means 424 * which means this will only be cofusing. So do not enable charging
473 * of the HREF 425 * of the HREFs.
474 */ 426 */
475 ab8500_fg { 427 ab8500_fg {
476 status 428 status = "disabled";
477 }; 429 };
478 ab8500_btemp { 430 ab8500_btemp {
479 status 431 status = "disabled";
480 }; 432 };
481 ab8500_charger 433 ab8500_charger {
482 status 434 status = "disabled";
483 }; 435 };
484 ab8500_chargal 436 ab8500_chargalg {
485 status 437 status = "disabled";
486 }; 438 };
487 }; 439 };
488 }; 440 };
489 }; 441 };
490 }; 442 };
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