1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /* 2 /*
3 * Copyright (C) STMicroelectronics 2021 - All 3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@f 4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 */ 5 */
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h> 6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
7 7
8 &pinctrl { 8 &pinctrl {
9 /omit-if-no-ref/ 9 /omit-if-no-ref/
10 adc1_pins_a: adc1-pins-0 { 10 adc1_pins_a: adc1-pins-0 {
11 pins { 11 pins {
12 pinmux = <STM32_PINMUX 12 pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */
13 }; 13 };
14 }; 14 };
15 15
16 /omit-if-no-ref/ 16 /omit-if-no-ref/
17 adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 17 adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 {
18 pins { 18 pins {
19 pinmux = <STM32_PINMUX 19 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
20 <STM32_PINMUX 20 <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */
21 }; 21 };
22 }; 22 };
23 23
24 /omit-if-no-ref/ 24 /omit-if-no-ref/
25 adc1_usb_cc_pins_b: adc1-usb-cc-pins-1 25 adc1_usb_cc_pins_b: adc1-usb-cc-pins-1 {
26 pins { 26 pins {
27 pinmux = <STM32_PINMUX 27 pinmux = <STM32_PINMUX('A', 5, ANALOG)>, /* ADC1_INP2 */
28 <STM32_PINMUX 28 <STM32_PINMUX('F', 13, ANALOG)>; /* ADC1_INP11 */
29 }; 29 };
30 }; 30 };
31 31
32 /omit-if-no-ref/ 32 /omit-if-no-ref/
33 dcmipp_pins_a: dcmi-0 { 33 dcmipp_pins_a: dcmi-0 {
34 pins1 { 34 pins1 {
35 pinmux = <STM32_PINMUX 35 pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
36 <STM32_PINMUX 36 <STM32_PINMUX('G', 9, AF13)>,/* DCMI_VSYNC */
37 <STM32_PINMUX 37 <STM32_PINMUX('B', 7, AF14)>,/* DCMI_PIXCLK */
38 <STM32_PINMUX 38 <STM32_PINMUX('A', 9, AF13)>,/* DCMI_D0 */
39 <STM32_PINMUX 39 <STM32_PINMUX('D', 0, AF13)>,/* DCMI_D1 */
40 <STM32_PINMUX 40 <STM32_PINMUX('G', 10, AF13)>,/* DCMI_D2 */
41 <STM32_PINMUX 41 <STM32_PINMUX('E', 4, AF13)>,/* DCMI_D3 */
42 <STM32_PINMUX 42 <STM32_PINMUX('D', 11, AF14)>,/* DCMI_D4 */
43 <STM32_PINMUX 43 <STM32_PINMUX('D', 3, AF13)>,/* DCMI_D5 */
44 <STM32_PINMUX 44 <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */
45 <STM32_PINMUX 45 <STM32_PINMUX('E', 14, AF13)>;/* DCMI_D7 */
46 bias-disable; 46 bias-disable;
47 }; 47 };
48 }; 48 };
49 49
50 /omit-if-no-ref/ 50 /omit-if-no-ref/
51 dcmipp_sleep_pins_a: dcmi-sleep-0 { 51 dcmipp_sleep_pins_a: dcmi-sleep-0 {
52 pins1 { 52 pins1 {
53 pinmux = <STM32_PINMUX 53 pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
54 <STM32_PINMUX 54 <STM32_PINMUX('G', 9, ANALOG)>,/* DCMI_VSYNC */
55 <STM32_PINMUX 55 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_PIXCLK */
56 <STM32_PINMUX 56 <STM32_PINMUX('A', 9, ANALOG)>,/* DCMI_D0 */
57 <STM32_PINMUX 57 <STM32_PINMUX('D', 0, ANALOG)>,/* DCMI_D1 */
58 <STM32_PINMUX 58 <STM32_PINMUX('G', 10, ANALOG)>,/* DCMI_D2 */
59 <STM32_PINMUX 59 <STM32_PINMUX('E', 4, ANALOG)>,/* DCMI_D3 */
60 <STM32_PINMUX 60 <STM32_PINMUX('D', 11, ANALOG)>,/* DCMI_D4 */
61 <STM32_PINMUX 61 <STM32_PINMUX('D', 3, ANALOG)>,/* DCMI_D5 */
62 <STM32_PINMUX 62 <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */
63 <STM32_PINMUX 63 <STM32_PINMUX('E', 14, ANALOG)>;/* DCMI_D7 */
64 }; 64 };
65 }; 65 };
66 66
67 /omit-if-no-ref/ 67 /omit-if-no-ref/
68 eth1_rgmii_pins_a: eth1-rgmii-0 { 68 eth1_rgmii_pins_a: eth1-rgmii-0 {
69 pins1 { 69 pins1 {
70 pinmux = <STM32_PINMUX 70 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
71 <STM32_PINMUX 71 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
72 <STM32_PINMUX 72 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
73 <STM32_PINMUX 73 <STM32_PINMUX('E', 5, AF10)>, /* ETH_RGMII_TXD3 */
74 <STM32_PINMUX 74 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
75 <STM32_PINMUX 75 <STM32_PINMUX('C', 1, AF11)>, /* ETH_RGMII_GTX_CLK */
76 <STM32_PINMUX 76 <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
77 <STM32_PINMUX 77 <STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */
78 bias-disable; 78 bias-disable;
79 drive-push-pull; 79 drive-push-pull;
80 slew-rate = <2>; 80 slew-rate = <2>;
81 }; 81 };
82 82
83 pins2 { 83 pins2 {
84 pinmux = <STM32_PINMUX 84 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
85 <STM32_PINMUX 85 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
86 <STM32_PINMUX 86 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
87 <STM32_PINMUX 87 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
88 <STM32_PINMUX 88 <STM32_PINMUX('A', 7, AF11)>, /* ETH_RGMII_RX_CTL */
89 <STM32_PINMUX 89 <STM32_PINMUX('D', 7, AF10)>; /* ETH_RGMII_RX_CLK */
90 bias-disable; 90 bias-disable;
91 }; 91 };
92 }; 92 };
93 93
94 /omit-if-no-ref/ 94 /omit-if-no-ref/
95 eth1_rgmii_sleep_pins_a: eth1-rgmii-sl 95 eth1_rgmii_sleep_pins_a: eth1-rgmii-sleep-0 {
96 pins1 { 96 pins1 {
97 pinmux = <STM32_PINMUX <<
98 <STM32_PINMUX <<
99 bias-disable; <<
100 drive-push-pull; <<
101 slew-rate = <2>; <<
102 }; <<
103 <<
104 pins2 { <<
105 pinmux = <STM32_PINMUX 97 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
106 <STM32_PINMUX 98 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
107 <STM32_PINMUX 99 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
108 <STM32_PINMUX 100 <STM32_PINMUX('E', 5, ANALOG)>, /* ETH_RGMII_TXD3 */
109 <STM32_PINMUX 101 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
110 <STM32_PINMUX 102 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_RGMII_GTX_CLK */
>> 103 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
>> 104 <STM32_PINMUX('G', 2, ANALOG)>, /* ETH_MDC */
111 <STM32_PINMUX 105 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
112 <STM32_PINMUX 106 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
113 <STM32_PINMUX 107 <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD1 */
114 <STM32_PINMUX 108 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD1 */
115 <STM32_PINMUX 109 <STM32_PINMUX('A', 7, ANALOG)>, /* ETH_RGMII_RX_CTL */
116 <STM32_PINMUX 110 <STM32_PINMUX('D', 7, ANALOG)>; /* ETH_RGMII_RX_CLK */
117 }; 111 };
118 }; 112 };
119 113
120 /omit-if-no-ref/ 114 /omit-if-no-ref/
121 eth1_rmii_pins_a: eth1-rmii-0 { 115 eth1_rmii_pins_a: eth1-rmii-0 {
122 pins1 { 116 pins1 {
123 pinmux = <STM32_PINMUX 117 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_RMII_TXD0 */
124 <STM32_PINMUX 118 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RMII_TXD1 */
125 <STM32_PINMUX 119 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RMII_TX_EN */
126 <STM32_PINMUX 120 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RMII_REF_CLK */
127 <STM32_PINMUX 121 <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
128 <STM32_PINMUX 122 <STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */
129 bias-disable; 123 bias-disable;
130 drive-push-pull; 124 drive-push-pull;
131 slew-rate = <1>; 125 slew-rate = <1>;
132 }; 126 };
133 127
134 pins2 { 128 pins2 {
135 pinmux = <STM32_PINMUX 129 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RMII_RXD0 */
136 <STM32_PINMUX 130 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RMII_RXD1 */
137 <STM32_PINMUX 131 <STM32_PINMUX('C', 1, AF10)>; /* ETH_RMII_CRS_DV */
138 bias-disable; 132 bias-disable;
139 }; 133 };
140 }; 134 };
141 135
142 /omit-if-no-ref/ 136 /omit-if-no-ref/
143 eth1_rmii_sleep_pins_a: eth1-rmii-slee 137 eth1_rmii_sleep_pins_a: eth1-rmii-sleep-0 {
144 pins1 { 138 pins1 {
145 pinmux = <STM32_PINMUX 139 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RMII_TXD0 */
146 <STM32_PINMUX 140 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RMII_TXD1 */
147 <STM32_PINMUX 141 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RMII_TX_EN */
148 <STM32_PINMUX 142 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RMII_REF_CLK */
149 <STM32_PINMUX 143 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
150 <STM32_PINMUX 144 <STM32_PINMUX('G', 2, ANALOG)>, /* ETH_MDC */
151 <STM32_PINMUX 145 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RMII_RXD0 */
152 <STM32_PINMUX 146 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RMII_RXD1 */
153 <STM32_PINMUX 147 <STM32_PINMUX('C', 1, ANALOG)>; /* ETH_RMII_CRS_DV */
154 }; 148 };
155 }; 149 };
156 150
157 /omit-if-no-ref/ 151 /omit-if-no-ref/
158 eth2_rgmii_pins_a: eth2-rgmii-0 { 152 eth2_rgmii_pins_a: eth2-rgmii-0 {
159 pins1 { 153 pins1 {
160 pinmux = <STM32_PINMUX 154 pinmux = <STM32_PINMUX('F', 7, AF11)>, /* ETH_RGMII_TXD0 */
161 <STM32_PINMUX 155 <STM32_PINMUX('G', 11, AF10)>, /* ETH_RGMII_TXD1 */
162 <STM32_PINMUX 156 <STM32_PINMUX('G', 1, AF10)>, /* ETH_RGMII_TXD2 */
163 <STM32_PINMUX 157 <STM32_PINMUX('E', 6, AF11)>, /* ETH_RGMII_TXD3 */
164 <STM32_PINMUX 158 <STM32_PINMUX('F', 6, AF11)>, /* ETH_RGMII_TX_CTL */
165 <STM32_PINMUX 159 <STM32_PINMUX('G', 3, AF10)>, /* ETH_RGMII_GTX_CLK */
166 <STM32_PINMUX 160 <STM32_PINMUX('B', 6, AF11)>, /* ETH_MDIO */
167 <STM32_PINMUX 161 <STM32_PINMUX('G', 5, AF10)>; /* ETH_MDC */
168 bias-disable; 162 bias-disable;
169 drive-push-pull; 163 drive-push-pull;
170 slew-rate = <2>; 164 slew-rate = <2>;
171 }; 165 };
172 166
173 pins2 { 167 pins2 {
174 pinmux = <STM32_PINMUX 168 pinmux = <STM32_PINMUX('F', 4, AF11)>, /* ETH_RGMII_RXD0 */
175 <STM32_PINMUX 169 <STM32_PINMUX('E', 2, AF10)>, /* ETH_RGMII_RXD1 */
176 <STM32_PINMUX 170 <STM32_PINMUX('H', 6, AF12)>, /* ETH_RGMII_RXD2 */
177 <STM32_PINMUX 171 <STM32_PINMUX('A', 8, AF11)>, /* ETH_RGMII_RXD3 */
178 <STM32_PINMUX 172 <STM32_PINMUX('A', 12, AF11)>, /* ETH_RGMII_RX_CTL */
179 <STM32_PINMUX 173 <STM32_PINMUX('H', 11, AF11)>; /* ETH_RGMII_RX_CLK */
180 bias-disable; 174 bias-disable;
181 }; 175 };
182 }; 176 };
183 177
184 /omit-if-no-ref/ 178 /omit-if-no-ref/
185 eth2_rgmii_sleep_pins_a: eth2-rgmii-sl 179 eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 {
186 pins1 { 180 pins1 {
187 pinmux = <STM32_PINMUX <<
188 <STM32_PINMUX <<
189 bias-disable; <<
190 drive-push-pull; <<
191 slew-rate = <2>; <<
192 }; <<
193 <<
194 pins2 { <<
195 pinmux = <STM32_PINMUX 181 pinmux = <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RGMII_TXD0 */
196 <STM32_PINMUX 182 <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TXD1 */
197 <STM32_PINMUX 183 <STM32_PINMUX('G', 1, ANALOG)>, /* ETH_RGMII_TXD2 */
198 <STM32_PINMUX 184 <STM32_PINMUX('E', 6, ANALOG)>, /* ETH_RGMII_TXD3 */
199 <STM32_PINMUX 185 <STM32_PINMUX('F', 6, ANALOG)>, /* ETH_RGMII_TX_CTL */
200 <STM32_PINMUX 186 <STM32_PINMUX('G', 3, ANALOG)>, /* ETH_RGMII_GTX_CLK */
>> 187 <STM32_PINMUX('B', 6, ANALOG)>, /* ETH_MDIO */
>> 188 <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_MDC */
201 <STM32_PINMUX 189 <STM32_PINMUX('F', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
202 <STM32_PINMUX 190 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_RXD1 */
203 <STM32_PINMUX 191 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
204 <STM32_PINMUX 192 <STM32_PINMUX('A', 8, ANALOG)>, /* ETH_RGMII_RXD3 */
205 <STM32_PINMUX 193 <STM32_PINMUX('A', 12, ANALOG)>, /* ETH_RGMII_RX_CTL */
206 <STM32_PINMUX 194 <STM32_PINMUX('H', 11, ANALOG)>; /* ETH_RGMII_RX_CLK */
207 }; 195 };
208 }; 196 };
209 197
210 /omit-if-no-ref/ 198 /omit-if-no-ref/
211 eth2_rmii_pins_a: eth2-rmii-0 { 199 eth2_rmii_pins_a: eth2-rmii-0 {
212 pins1 { 200 pins1 {
213 pinmux = <STM32_PINMUX 201 pinmux = <STM32_PINMUX('F', 7, AF11)>, /* ETH_RMII_TXD0 */
214 <STM32_PINMUX 202 <STM32_PINMUX('G', 11, AF10)>, /* ETH_RMII_TXD1 */
215 <STM32_PINMUX 203 <STM32_PINMUX('G', 8, AF13)>, /* ETH_RMII_ETHCK */
216 <STM32_PINMUX 204 <STM32_PINMUX('F', 6, AF11)>, /* ETH_RMII_TX_EN */
217 <STM32_PINMUX 205 <STM32_PINMUX('B', 2, AF11)>, /* ETH_MDIO */
218 <STM32_PINMUX 206 <STM32_PINMUX('G', 5, AF10)>; /* ETH_MDC */
219 bias-disable; 207 bias-disable;
220 drive-push-pull; 208 drive-push-pull;
221 slew-rate = <1>; 209 slew-rate = <1>;
222 }; 210 };
223 211
224 pins2 { 212 pins2 {
225 pinmux = <STM32_PINMUX 213 pinmux = <STM32_PINMUX('F', 4, AF11)>, /* ETH_RMII_RXD0 */
226 <STM32_PINMUX 214 <STM32_PINMUX('E', 2, AF10)>, /* ETH_RMII_RXD1 */
227 <STM32_PINMUX 215 <STM32_PINMUX('A', 12, AF11)>; /* ETH_RMII_CRS_DV */
228 bias-disable; 216 bias-disable;
229 }; 217 };
230 }; 218 };
231 219
232 /omit-if-no-ref/ 220 /omit-if-no-ref/
233 eth2_rmii_sleep_pins_a: eth2-rmii-slee 221 eth2_rmii_sleep_pins_a: eth2-rmii-sleep-0 {
234 pins1 { 222 pins1 {
235 pinmux = <STM32_PINMUX 223 pinmux = <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RMII_TXD0 */
236 <STM32_PINMUX 224 <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RMII_TXD1 */
237 <STM32_PINMUX 225 <STM32_PINMUX('G', 8, ANALOG)>, /* ETH_RMII_ETHCK */
238 <STM32_PINMUX 226 <STM32_PINMUX('F', 6, ANALOG)>, /* ETH_RMII_TX_EN */
239 <STM32_PINMUX 227 <STM32_PINMUX('B', 2, ANALOG)>, /* ETH_MDIO */
240 <STM32_PINMUX 228 <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_MDC */
241 <STM32_PINMUX 229 <STM32_PINMUX('F', 4, ANALOG)>, /* ETH_RMII_RXD0 */
242 <STM32_PINMUX 230 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RMII_RXD1 */
243 <STM32_PINMUX 231 <STM32_PINMUX('A', 12, ANALOG)>; /* ETH_RMII_CRS_DV */
244 }; 232 };
245 }; 233 };
246 234
247 /omit-if-no-ref/ 235 /omit-if-no-ref/
248 goodix_pins_a: goodix-0 { 236 goodix_pins_a: goodix-0 {
249 /* 237 /*
250 * touchscreen reset needs to 238 * touchscreen reset needs to be configured
251 * via the pinctrl not the dri 239 * via the pinctrl not the driver (a pull-down resistor
252 * has been soldered onto the 240 * has been soldered onto the reset line which forces
253 * the touchscreen to reset st 241 * the touchscreen to reset state).
254 */ 242 */
255 pins1 { 243 pins1 {
256 pinmux = <STM32_PINMUX 244 pinmux = <STM32_PINMUX('H', 2, GPIO)>;
257 output-high; 245 output-high;
258 bias-pull-up; 246 bias-pull-up;
259 }; 247 };
260 /* 248 /*
261 * Interrupt line must have a 249 * Interrupt line must have a pull-down resistor
262 * in order to freeze the i2c 250 * in order to freeze the i2c address at 0x5D
263 */ 251 */
264 pins2 { 252 pins2 {
265 pinmux = <STM32_PINMUX 253 pinmux = <STM32_PINMUX('F', 5, GPIO)>;
266 bias-pull-down; 254 bias-pull-down;
267 }; 255 };
268 }; 256 };
269 257
270 /omit-if-no-ref/ 258 /omit-if-no-ref/
271 i2c1_pins_a: i2c1-0 { 259 i2c1_pins_a: i2c1-0 {
272 pins { 260 pins {
273 pinmux = <STM32_PINMUX 261 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
274 <STM32_PINMUX 262 <STM32_PINMUX('E', 8, AF5)>; /* I2C1_SDA */
275 bias-disable; 263 bias-disable;
276 drive-open-drain; 264 drive-open-drain;
277 slew-rate = <0>; 265 slew-rate = <0>;
278 }; 266 };
279 }; 267 };
280 268
281 /omit-if-no-ref/ 269 /omit-if-no-ref/
282 i2c1_sleep_pins_a: i2c1-sleep-0 { 270 i2c1_sleep_pins_a: i2c1-sleep-0 {
283 pins { 271 pins {
284 pinmux = <STM32_PINMUX 272 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
285 <STM32_PINMUX 273 <STM32_PINMUX('E', 8, ANALOG)>; /* I2C1_SDA */
286 }; 274 };
287 }; 275 };
288 276
289 /omit-if-no-ref/ 277 /omit-if-no-ref/
290 i2c5_pins_a: i2c5-0 { 278 i2c5_pins_a: i2c5-0 {
291 pins { 279 pins {
292 pinmux = <STM32_PINMUX 280 pinmux = <STM32_PINMUX('D', 1, AF4)>, /* I2C5_SCL */
293 <STM32_PINMUX 281 <STM32_PINMUX('H', 6, AF4)>; /* I2C5_SDA */
294 bias-disable; 282 bias-disable;
295 drive-open-drain; 283 drive-open-drain;
296 slew-rate = <0>; 284 slew-rate = <0>;
297 }; 285 };
298 }; 286 };
299 287
300 /omit-if-no-ref/ 288 /omit-if-no-ref/
301 i2c5_sleep_pins_a: i2c5-sleep-0 { 289 i2c5_sleep_pins_a: i2c5-sleep-0 {
302 pins { 290 pins {
303 pinmux = <STM32_PINMUX 291 pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* I2C5_SCL */
304 <STM32_PINMUX 292 <STM32_PINMUX('H', 6, ANALOG)>; /* I2C5_SDA */
305 }; 293 };
306 }; 294 };
307 295
308 /omit-if-no-ref/ 296 /omit-if-no-ref/
309 i2c5_pins_b: i2c5-1 { 297 i2c5_pins_b: i2c5-1 {
310 pins { 298 pins {
311 pinmux = <STM32_PINMUX 299 pinmux = <STM32_PINMUX('D', 1, AF4)>, /* I2C5_SCL */
312 <STM32_PINMUX 300 <STM32_PINMUX('E', 13, AF4)>; /* I2C5_SDA */
313 bias-disable; 301 bias-disable;
314 drive-open-drain; 302 drive-open-drain;
315 slew-rate = <0>; 303 slew-rate = <0>;
316 }; 304 };
317 }; 305 };
318 306
319 /omit-if-no-ref/ 307 /omit-if-no-ref/
320 i2c5_sleep_pins_b: i2c5-sleep-1 { 308 i2c5_sleep_pins_b: i2c5-sleep-1 {
321 pins { 309 pins {
322 pinmux = <STM32_PINMUX 310 pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* I2C5_SCL */
323 <STM32_PINMUX 311 <STM32_PINMUX('E', 13, ANALOG)>; /* I2C5_SDA */
324 }; 312 };
325 }; 313 };
326 314
327 /omit-if-no-ref/ 315 /omit-if-no-ref/
328 ltdc_pins_a: ltdc-0 { 316 ltdc_pins_a: ltdc-0 {
329 pins { 317 pins {
330 pinmux = <STM32_PINMUX 318 pinmux = <STM32_PINMUX('D', 9, AF13)>, /* LCD_CLK */
331 <STM32_PINMUX 319 <STM32_PINMUX('C', 6, AF14)>, /* LCD_HSYNC */
332 <STM32_PINMUX 320 <STM32_PINMUX('G', 4, AF11)>, /* LCD_VSYNC */
333 <STM32_PINMUX 321 <STM32_PINMUX('H', 9, AF11)>, /* LCD_DE */
334 <STM32_PINMUX 322 <STM32_PINMUX('G', 7, AF14)>, /* LCD_R2 */
335 <STM32_PINMUX 323 <STM32_PINMUX('B', 12, AF13)>, /* LCD_R3 */
336 <STM32_PINMUX 324 <STM32_PINMUX('D', 14, AF14)>, /* LCD_R4 */
337 <STM32_PINMUX 325 <STM32_PINMUX('E', 7, AF14)>, /* LCD_R5 */
338 <STM32_PINMUX 326 <STM32_PINMUX('E', 13, AF14)>, /* LCD_R6 */
339 <STM32_PINMUX 327 <STM32_PINMUX('E', 9, AF14)>, /* LCD_R7 */
340 <STM32_PINMUX 328 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
341 <STM32_PINMUX 329 <STM32_PINMUX('F', 3, AF14)>, /* LCD_G3 */
342 <STM32_PINMUX 330 <STM32_PINMUX('D', 5, AF14)>, /* LCD_G4 */
343 <STM32_PINMUX 331 <STM32_PINMUX('G', 0, AF14)>, /* LCD_G5 */
344 <STM32_PINMUX 332 <STM32_PINMUX('C', 7, AF14)>, /* LCD_G6 */
345 <STM32_PINMUX 333 <STM32_PINMUX('A', 15, AF11)>, /* LCD_G7 */
346 <STM32_PINMUX 334 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B2 */
347 <STM32_PINMUX 335 <STM32_PINMUX('F', 2, AF14)>, /* LCD_B3 */
348 <STM32_PINMUX 336 <STM32_PINMUX('H', 14, AF11)>, /* LCD_B4 */
349 <STM32_PINMUX 337 <STM32_PINMUX('E', 0, AF14)>, /* LCD_B5 */
350 <STM32_PINMUX 338 <STM32_PINMUX('B', 6, AF7)>, /* LCD_B6 */
351 <STM32_PINMUX 339 <STM32_PINMUX('F', 1, AF13)>; /* LCD_B7 */
352 bias-disable; 340 bias-disable;
353 drive-push-pull; 341 drive-push-pull;
354 slew-rate = <0>; 342 slew-rate = <0>;
355 }; 343 };
356 }; 344 };
357 345
358 /omit-if-no-ref/ 346 /omit-if-no-ref/
359 ltdc_sleep_pins_a: ltdc-sleep-0 { 347 ltdc_sleep_pins_a: ltdc-sleep-0 {
360 pins { 348 pins {
361 pinmux = <STM32_PINMUX 349 pinmux = <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_CLK */
362 <STM32_PINMUX 350 <STM32_PINMUX('C', 6, ANALOG)>, /* LCD_HSYNC */
363 <STM32_PINMUX 351 <STM32_PINMUX('G', 4, ANALOG)>, /* LCD_VSYNC */
364 <STM32_PINMUX 352 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_DE */
365 <STM32_PINMUX 353 <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_R2 */
366 <STM32_PINMUX 354 <STM32_PINMUX('B', 12, ANALOG)>, /* LCD_R3 */
367 <STM32_PINMUX 355 <STM32_PINMUX('D', 14, ANALOG)>, /* LCD_R4 */
368 <STM32_PINMUX 356 <STM32_PINMUX('E', 7, ANALOG)>, /* LCD_R5 */
369 <STM32_PINMUX 357 <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_R6 */
370 <STM32_PINMUX 358 <STM32_PINMUX('E', 9, ANALOG)>, /* LCD_R7 */
371 <STM32_PINMUX 359 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
372 <STM32_PINMUX 360 <STM32_PINMUX('F', 3, ANALOG)>, /* LCD_G3 */
373 <STM32_PINMUX 361 <STM32_PINMUX('D', 5, ANALOG)>, /* LCD_G4 */
374 <STM32_PINMUX 362 <STM32_PINMUX('G', 0, ANALOG)>, /* LCD_G5 */
375 <STM32_PINMUX 363 <STM32_PINMUX('C', 7, ANALOG)>, /* LCD_G6 */
376 <STM32_PINMUX 364 <STM32_PINMUX('A', 15, ANALOG)>, /* LCD_G7 */
377 <STM32_PINMUX 365 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B2 */
378 <STM32_PINMUX 366 <STM32_PINMUX('F', 2, ANALOG)>, /* LCD_B3 */
379 <STM32_PINMUX 367 <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_B4 */
380 <STM32_PINMUX 368 <STM32_PINMUX('E', 0, ANALOG)>, /* LCD_B5 */
381 <STM32_PINMUX 369 <STM32_PINMUX('B', 6, ANALOG)>, /* LCD_B6 */
382 <STM32_PINMUX 370 <STM32_PINMUX('F', 1, ANALOG)>; /* LCD_B7 */
383 }; 371 };
384 }; 372 };
385 373
386 /omit-if-no-ref/ 374 /omit-if-no-ref/
387 m_can1_pins_a: m-can1-0 { 375 m_can1_pins_a: m-can1-0 {
388 pins1 { 376 pins1 {
389 pinmux = <STM32_PINMUX 377 pinmux = <STM32_PINMUX('G', 10, AF9)>; /* CAN1_TX */
390 slew-rate = <1>; 378 slew-rate = <1>;
391 drive-push-pull; 379 drive-push-pull;
392 bias-disable; 380 bias-disable;
393 }; 381 };
394 pins2 { 382 pins2 {
395 pinmux = <STM32_PINMUX 383 pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */
396 bias-disable; 384 bias-disable;
397 }; 385 };
398 }; 386 };
399 387
400 /omit-if-no-ref/ 388 /omit-if-no-ref/
401 m_can1_sleep_pins_a: m_can1-sleep-0 { 389 m_can1_sleep_pins_a: m_can1-sleep-0 {
402 pins { 390 pins {
403 pinmux = <STM32_PINMUX 391 pinmux = <STM32_PINMUX('G', 10, ANALOG)>, /* CAN1_TX */
404 <STM32_PINMUX 392 <STM32_PINMUX('D', 0, ANALOG)>; /* CAN1_RX */
405 }; 393 };
406 }; 394 };
407 395
408 /omit-if-no-ref/ 396 /omit-if-no-ref/
409 m_can2_pins_a: m-can2-0 { 397 m_can2_pins_a: m-can2-0 {
410 pins1 { 398 pins1 {
411 pinmux = <STM32_PINMUX 399 pinmux = <STM32_PINMUX('G', 0, AF9)>; /* CAN2_TX */
412 slew-rate = <1>; 400 slew-rate = <1>;
413 drive-push-pull; 401 drive-push-pull;
414 bias-disable; 402 bias-disable;
415 }; 403 };
416 pins2 { 404 pins2 {
417 pinmux = <STM32_PINMUX 405 pinmux = <STM32_PINMUX('E', 0, AF9)>; /* CAN2_RX */
418 bias-disable; 406 bias-disable;
419 }; 407 };
420 }; 408 };
421 409
422 /omit-if-no-ref/ 410 /omit-if-no-ref/
423 m_can2_sleep_pins_a: m_can2-sleep-0 { 411 m_can2_sleep_pins_a: m_can2-sleep-0 {
424 pins { 412 pins {
425 pinmux = <STM32_PINMUX 413 pinmux = <STM32_PINMUX('G', 0, ANALOG)>, /* CAN2_TX */
426 <STM32_PINMUX 414 <STM32_PINMUX('E', 0, ANALOG)>; /* CAN2_RX */
427 }; 415 };
428 }; 416 };
429 417
430 /omit-if-no-ref/ 418 /omit-if-no-ref/
431 mcp23017_pins_a: mcp23017-0 { 419 mcp23017_pins_a: mcp23017-0 {
432 pins { 420 pins {
433 pinmux = <STM32_PINMUX 421 pinmux = <STM32_PINMUX('G', 12, GPIO)>;
434 bias-pull-up; 422 bias-pull-up;
435 }; 423 };
436 }; 424 };
437 425
438 /omit-if-no-ref/ 426 /omit-if-no-ref/
439 pwm3_pins_a: pwm3-0 { 427 pwm3_pins_a: pwm3-0 {
440 pins { 428 pins {
441 pinmux = <STM32_PINMUX 429 pinmux = <STM32_PINMUX('B', 1, AF2)>; /* TIM3_CH4 */
442 bias-pull-down; 430 bias-pull-down;
443 drive-push-pull; 431 drive-push-pull;
444 slew-rate = <0>; 432 slew-rate = <0>;
445 }; 433 };
446 }; 434 };
447 435
448 /omit-if-no-ref/ 436 /omit-if-no-ref/
449 pwm3_sleep_pins_a: pwm3-sleep-0 { 437 pwm3_sleep_pins_a: pwm3-sleep-0 {
450 pins { 438 pins {
451 pinmux = <STM32_PINMUX 439 pinmux = <STM32_PINMUX('B', 1, ANALOG)>; /* TIM3_CH4 */
452 }; 440 };
453 }; 441 };
454 442
455 /omit-if-no-ref/ 443 /omit-if-no-ref/
456 pwm4_pins_a: pwm4-0 { 444 pwm4_pins_a: pwm4-0 {
457 pins { 445 pins {
458 pinmux = <STM32_PINMUX 446 pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
459 bias-pull-down; 447 bias-pull-down;
460 drive-push-pull; 448 drive-push-pull;
461 slew-rate = <0>; 449 slew-rate = <0>;
462 }; 450 };
463 }; 451 };
464 452
465 /omit-if-no-ref/ 453 /omit-if-no-ref/
466 pwm4_sleep_pins_a: pwm4-sleep-0 { 454 pwm4_sleep_pins_a: pwm4-sleep-0 {
467 pins { 455 pins {
468 pinmux = <STM32_PINMUX 456 pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
469 }; 457 };
470 }; 458 };
471 459
472 /omit-if-no-ref/ 460 /omit-if-no-ref/
473 pwm5_pins_a: pwm5-0 { 461 pwm5_pins_a: pwm5-0 {
474 pins { 462 pins {
475 pinmux = <STM32_PINMUX 463 pinmux = <STM32_PINMUX('H', 12, AF2)>; /* TIM5_CH3 */
476 bias-pull-down; 464 bias-pull-down;
477 drive-push-pull; 465 drive-push-pull;
478 slew-rate = <0>; 466 slew-rate = <0>;
479 }; 467 };
480 }; 468 };
481 469
482 /omit-if-no-ref/ 470 /omit-if-no-ref/
483 pwm5_sleep_pins_a: pwm5-sleep-0 { 471 pwm5_sleep_pins_a: pwm5-sleep-0 {
484 pins { 472 pins {
485 pinmux = <STM32_PINMUX 473 pinmux = <STM32_PINMUX('H', 12, ANALOG)>; /* TIM5_CH3 */
486 }; 474 };
487 }; 475 };
488 476
489 /omit-if-no-ref/ 477 /omit-if-no-ref/
490 pwm8_pins_a: pwm8-0 { 478 pwm8_pins_a: pwm8-0 {
491 pins { 479 pins {
492 pinmux = <STM32_PINMUX 480 pinmux = <STM32_PINMUX('E', 5, AF3)>; /* TIM8_CH3 */
493 bias-pull-down; 481 bias-pull-down;
494 drive-push-pull; 482 drive-push-pull;
495 slew-rate = <0>; 483 slew-rate = <0>;
496 }; 484 };
497 }; 485 };
498 486
499 /omit-if-no-ref/ 487 /omit-if-no-ref/
500 pwm8_sleep_pins_a: pwm8-sleep-0 { 488 pwm8_sleep_pins_a: pwm8-sleep-0 {
501 pins { 489 pins {
502 pinmux = <STM32_PINMUX 490 pinmux = <STM32_PINMUX('E', 5, ANALOG)>; /* TIM8_CH3 */
503 }; 491 };
504 }; 492 };
505 493
506 /omit-if-no-ref/ 494 /omit-if-no-ref/
507 pwm13_pins_a: pwm13-0 { 495 pwm13_pins_a: pwm13-0 {
508 pins { 496 pins {
509 pinmux = <STM32_PINMUX 497 pinmux = <STM32_PINMUX('A', 6, AF9)>; /* TIM13_CH1 */
510 bias-pull-down; 498 bias-pull-down;
511 drive-push-pull; 499 drive-push-pull;
512 slew-rate = <0>; 500 slew-rate = <0>;
513 }; 501 };
514 }; 502 };
515 503
516 /omit-if-no-ref/ 504 /omit-if-no-ref/
517 pwm13_sleep_pins_a: pwm13-sleep-0 { 505 pwm13_sleep_pins_a: pwm13-sleep-0 {
518 pins { 506 pins {
519 pinmux = <STM32_PINMUX 507 pinmux = <STM32_PINMUX('A', 6, ANALOG)>; /* TIM13_CH1 */
520 }; 508 };
521 }; 509 };
522 510
523 /omit-if-no-ref/ 511 /omit-if-no-ref/
524 pwm14_pins_a: pwm14-0 { 512 pwm14_pins_a: pwm14-0 {
525 pins { 513 pins {
526 pinmux = <STM32_PINMUX 514 pinmux = <STM32_PINMUX('F', 9, AF9)>; /* TIM14_CH1 */
527 bias-pull-down; 515 bias-pull-down;
528 drive-push-pull; 516 drive-push-pull;
529 slew-rate = <0>; 517 slew-rate = <0>;
530 }; 518 };
531 }; 519 };
532 520
533 /omit-if-no-ref/ 521 /omit-if-no-ref/
534 pwm14_sleep_pins_a: pwm14-sleep-0 { 522 pwm14_sleep_pins_a: pwm14-sleep-0 {
535 pins { 523 pins {
536 pinmux = <STM32_PINMUX 524 pinmux = <STM32_PINMUX('F', 9, ANALOG)>; /* TIM14_CH1 */
537 }; 525 };
538 }; 526 };
539 527
540 /omit-if-no-ref/ 528 /omit-if-no-ref/
541 qspi_clk_pins_a: qspi-clk-0 { 529 qspi_clk_pins_a: qspi-clk-0 {
542 pins { 530 pins {
543 pinmux = <STM32_PINMUX 531 pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
544 bias-disable; 532 bias-disable;
545 drive-push-pull; 533 drive-push-pull;
546 slew-rate = <3>; 534 slew-rate = <3>;
547 }; 535 };
548 }; 536 };
549 537
550 /omit-if-no-ref/ 538 /omit-if-no-ref/
551 qspi_clk_sleep_pins_a: qspi-clk-sleep- 539 qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
552 pins { 540 pins {
553 pinmux = <STM32_PINMUX 541 pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
554 }; 542 };
555 }; 543 };
556 544
557 /omit-if-no-ref/ 545 /omit-if-no-ref/
558 qspi_bk1_pins_a: qspi-bk1-0 { 546 qspi_bk1_pins_a: qspi-bk1-0 {
559 pins { 547 pins {
560 pinmux = <STM32_PINMUX 548 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
561 <STM32_PINMUX 549 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
562 <STM32_PINMUX 550 <STM32_PINMUX('D', 11, AF9)>, /* QSPI_BK1_IO2 */
563 <STM32_PINMUX 551 <STM32_PINMUX('H', 7, AF13)>; /* QSPI_BK1_IO3 */
564 bias-disable; 552 bias-disable;
565 drive-push-pull; 553 drive-push-pull;
566 slew-rate = <1>; 554 slew-rate = <1>;
567 }; 555 };
568 }; 556 };
569 557
570 /omit-if-no-ref/ 558 /omit-if-no-ref/
571 qspi_bk1_sleep_pins_a: qspi-bk1-sleep- 559 qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
572 pins { 560 pins {
573 pinmux = <STM32_PINMUX 561 pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
574 <STM32_PINMUX 562 <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
575 <STM32_PINMUX 563 <STM32_PINMUX('D', 11, ANALOG)>, /* QSPI_BK1_IO2 */
576 <STM32_PINMUX 564 <STM32_PINMUX('H', 7, ANALOG)>; /* QSPI_BK1_IO3 */
577 }; 565 };
578 }; 566 };
579 567
580 /omit-if-no-ref/ 568 /omit-if-no-ref/
581 qspi_cs1_pins_a: qspi-cs1-0 { 569 qspi_cs1_pins_a: qspi-cs1-0 {
582 pins { 570 pins {
583 pinmux = <STM32_PINMUX 571 pinmux = <STM32_PINMUX('B', 2, AF9)>; /* QSPI_BK1_NCS */
584 bias-pull-up; 572 bias-pull-up;
585 drive-push-pull; 573 drive-push-pull;
586 slew-rate = <1>; 574 slew-rate = <1>;
587 }; 575 };
588 }; 576 };
589 577
590 /omit-if-no-ref/ 578 /omit-if-no-ref/
591 qspi_cs1_sleep_pins_a: qspi-cs1-sleep- 579 qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 {
592 pins { 580 pins {
593 pinmux = <STM32_PINMUX 581 pinmux = <STM32_PINMUX('B', 2, ANALOG)>; /* QSPI_BK1_NCS */
594 }; 582 };
595 }; 583 };
596 584
597 /omit-if-no-ref/ 585 /omit-if-no-ref/
598 sai1a_pins_a: sai1a-0 { 586 sai1a_pins_a: sai1a-0 {
599 pins { 587 pins {
600 pinmux = <STM32_PINMUX 588 pinmux = <STM32_PINMUX('A', 4, AF12)>, /* SAI1_SCK_A */
601 <STM32_PINMUX 589 <STM32_PINMUX('D', 6, AF6)>, /* SAI1_SD_A */
602 <STM32_PINMUX 590 <STM32_PINMUX('E', 11, AF6)>; /* SAI1_FS_A */
603 slew-rate = <0>; 591 slew-rate = <0>;
604 drive-push-pull; 592 drive-push-pull;
605 bias-disable; 593 bias-disable;
606 }; 594 };
607 }; 595 };
608 596
609 /omit-if-no-ref/ 597 /omit-if-no-ref/
610 sai1a_sleep_pins_a: sai1a-sleep-0 { 598 sai1a_sleep_pins_a: sai1a-sleep-0 {
611 pins { 599 pins {
612 pinmux = <STM32_PINMUX 600 pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* SAI1_SCK_A */
613 <STM32_PINMUX 601 <STM32_PINMUX('D', 6, ANALOG)>, /* SAI1_SD_A */
614 <STM32_PINMUX 602 <STM32_PINMUX('E', 11, ANALOG)>; /* SAI1_FS_A */
615 }; 603 };
616 }; 604 };
617 605
618 /omit-if-no-ref/ 606 /omit-if-no-ref/
619 sai1b_pins_a: sai1b-0 { 607 sai1b_pins_a: sai1b-0 {
620 pins { 608 pins {
621 pinmux = <STM32_PINMUX 609 pinmux = <STM32_PINMUX('A', 0, AF6)>; /* SAI1_SD_B */
622 bias-disable; 610 bias-disable;
623 }; 611 };
624 }; 612 };
625 613
626 /omit-if-no-ref/ 614 /omit-if-no-ref/
627 sai1b_sleep_pins_a: sai1b-sleep-0 { 615 sai1b_sleep_pins_a: sai1b-sleep-0 {
628 pins { 616 pins {
629 pinmux = <STM32_PINMUX 617 pinmux = <STM32_PINMUX('A', 0, ANALOG)>; /* SAI1_SD_B */
630 }; 618 };
631 }; 619 };
632 620
633 /omit-if-no-ref/ 621 /omit-if-no-ref/
634 sdmmc1_b4_pins_a: sdmmc1-b4-0 { 622 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
635 pins { 623 pins {
636 pinmux = <STM32_PINMUX 624 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
637 <STM32_PINMUX 625 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
638 <STM32_PINMUX 626 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
639 <STM32_PINMUX 627 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
640 <STM32_PINMUX 628 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
641 slew-rate = <1>; 629 slew-rate = <1>;
642 drive-push-pull; 630 drive-push-pull;
643 bias-disable; 631 bias-disable;
644 }; 632 };
645 }; 633 };
646 634
647 /omit-if-no-ref/ 635 /omit-if-no-ref/
648 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { 636 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
649 pins1 { 637 pins1 {
650 pinmux = <STM32_PINMUX 638 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
651 <STM32_PINMUX 639 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
652 <STM32_PINMUX 640 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
653 <STM32_PINMUX 641 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
654 slew-rate = <1>; 642 slew-rate = <1>;
655 drive-push-pull; 643 drive-push-pull;
656 bias-disable; 644 bias-disable;
657 }; 645 };
658 pins2 { 646 pins2 {
659 pinmux = <STM32_PINMUX 647 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
660 slew-rate = <1>; 648 slew-rate = <1>;
661 drive-open-drain; 649 drive-open-drain;
662 bias-disable; 650 bias-disable;
663 }; 651 };
664 }; 652 };
665 653
666 /omit-if-no-ref/ 654 /omit-if-no-ref/
667 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-slee 655 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
668 pins { 656 pins {
669 pinmux = <STM32_PINMUX 657 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
670 <STM32_PINMUX 658 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
671 <STM32_PINMUX 659 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
672 <STM32_PINMUX 660 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
673 <STM32_PINMUX 661 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
674 <STM32_PINMUX 662 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
675 }; 663 };
676 }; 664 };
677 665
678 /omit-if-no-ref/ 666 /omit-if-no-ref/
679 sdmmc1_clk_pins_a: sdmmc1-clk-0 { 667 sdmmc1_clk_pins_a: sdmmc1-clk-0 {
680 pins { 668 pins {
681 pinmux = <STM32_PINMUX 669 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
682 slew-rate = <1>; 670 slew-rate = <1>;
683 drive-push-pull; 671 drive-push-pull;
684 bias-disable; 672 bias-disable;
685 }; 673 };
686 }; 674 };
687 675
688 /omit-if-no-ref/ 676 /omit-if-no-ref/
689 sdmmc2_b4_pins_a: sdmmc2-b4-0 { 677 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
690 pins { 678 pins {
691 pinmux = <STM32_PINMUX 679 pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
692 <STM32_PINMUX 680 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
693 <STM32_PINMUX 681 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
694 <STM32_PINMUX 682 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */
695 <STM32_PINMUX 683 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
696 slew-rate = <1>; 684 slew-rate = <1>;
697 drive-push-pull; 685 drive-push-pull;
698 bias-pull-up; 686 bias-pull-up;
699 }; 687 };
700 }; 688 };
701 689
702 /omit-if-no-ref/ 690 /omit-if-no-ref/
703 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { 691 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
704 pins1 { 692 pins1 {
705 pinmux = <STM32_PINMUX 693 pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
706 <STM32_PINMUX 694 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
707 <STM32_PINMUX 695 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
708 <STM32_PINMUX 696 <STM32_PINMUX('B', 4, AF10)>; /* SDMMC2_D3 */
709 slew-rate = <1>; 697 slew-rate = <1>;
710 drive-push-pull; 698 drive-push-pull;
711 bias-pull-up; 699 bias-pull-up;
712 }; 700 };
713 pins2 { 701 pins2 {
714 pinmux = <STM32_PINMUX 702 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
715 slew-rate = <1>; 703 slew-rate = <1>;
716 drive-open-drain; 704 drive-open-drain;
717 bias-pull-up; 705 bias-pull-up;
718 }; 706 };
719 }; 707 };
720 708
721 /omit-if-no-ref/ 709 /omit-if-no-ref/
722 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-slee 710 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
723 pins { 711 pins {
724 pinmux = <STM32_PINMUX 712 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
725 <STM32_PINMUX 713 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
726 <STM32_PINMUX 714 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
727 <STM32_PINMUX 715 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
728 <STM32_PINMUX 716 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
729 <STM32_PINMUX 717 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
730 }; 718 };
731 }; 719 };
732 720
733 /omit-if-no-ref/ 721 /omit-if-no-ref/
734 sdmmc2_clk_pins_a: sdmmc2-clk-0 { 722 sdmmc2_clk_pins_a: sdmmc2-clk-0 {
735 pins { 723 pins {
736 pinmux = <STM32_PINMUX 724 pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */
737 slew-rate = <1>; 725 slew-rate = <1>;
738 drive-push-pull; 726 drive-push-pull;
739 bias-pull-up; 727 bias-pull-up;
740 }; 728 };
741 }; 729 };
742 730
743 /omit-if-no-ref/ 731 /omit-if-no-ref/
744 sdmmc2_d47_pins_a: sdmmc2-d47-0 { 732 sdmmc2_d47_pins_a: sdmmc2-d47-0 {
745 pins { 733 pins {
746 pinmux = <STM32_PINMUX 734 pinmux = <STM32_PINMUX('F', 0, AF10)>, /* SDMMC2_D4 */
747 <STM32_PINMUX 735 <STM32_PINMUX('B', 9, AF10)>, /* SDMMC2_D5 */
748 <STM32_PINMUX 736 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
749 <STM32_PINMUX 737 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
750 slew-rate = <1>; 738 slew-rate = <1>;
751 drive-push-pull; 739 drive-push-pull;
752 bias-pull-up; 740 bias-pull-up;
753 }; 741 };
754 }; 742 };
755 743
756 /omit-if-no-ref/ 744 /omit-if-no-ref/
757 sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sl 745 sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
758 pins { 746 pins {
759 pinmux = <STM32_PINMUX 747 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC2_D4 */
760 <STM32_PINMUX 748 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC2_D5 */
761 <STM32_PINMUX 749 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
762 <STM32_PINMUX 750 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
763 }; 751 };
764 }; 752 };
765 753
766 /omit-if-no-ref/ 754 /omit-if-no-ref/
767 spi2_pins_a: spi2-0 { 755 spi2_pins_a: spi2-0 {
768 pins1 { 756 pins1 {
769 pinmux = <STM32_PINMUX 757 pinmux = <STM32_PINMUX('B', 10, AF6)>, /* SPI2_SCK */
770 <STM32_PINMUX 758 <STM32_PINMUX('H', 10, AF6)>; /* SPI2_MOSI */
771 bias-disable; 759 bias-disable;
772 drive-push-pull; 760 drive-push-pull;
773 slew-rate = <1>; 761 slew-rate = <1>;
774 }; 762 };
775 763
776 pins2 { 764 pins2 {
777 pinmux = <STM32_PINMUX 765 pinmux = <STM32_PINMUX('B', 5, AF5)>; /* SPI2_MISO */
778 bias-disable; 766 bias-disable;
779 }; 767 };
780 }; 768 };
781 769
782 /omit-if-no-ref/ 770 /omit-if-no-ref/
783 spi2_sleep_pins_a: spi2-sleep-0 { 771 spi2_sleep_pins_a: spi2-sleep-0 {
784 pins { 772 pins {
785 pinmux = <STM32_PINMUX 773 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* SPI2_SCK */
786 <STM32_PINMUX 774 <STM32_PINMUX('B', 5, ANALOG)>, /* SPI2_MISO */
787 <STM32_PINMUX 775 <STM32_PINMUX('H', 10, ANALOG)>; /* SPI2_MOSI */
788 }; 776 };
789 }; 777 };
790 778
791 /omit-if-no-ref/ 779 /omit-if-no-ref/
792 spi3_pins_a: spi3-0 { 780 spi3_pins_a: spi3-0 {
793 pins1 { 781 pins1 {
794 pinmux = <STM32_PINMUX 782 pinmux = <STM32_PINMUX('H', 13, AF6)>, /* SPI3_SCK */
795 <STM32_PINMUX 783 <STM32_PINMUX('F', 1, AF5)>; /* SPI3_MOSI */
796 bias-disable; 784 bias-disable;
797 drive-push-pull; 785 drive-push-pull;
798 slew-rate = <1>; 786 slew-rate = <1>;
799 }; 787 };
800 788
801 pins2 { 789 pins2 {
802 pinmux = <STM32_PINMUX 790 pinmux = <STM32_PINMUX('D', 4, AF5)>; /* SPI3_MISO */
803 bias-disable; 791 bias-disable;
804 }; 792 };
805 }; 793 };
806 794
807 /omit-if-no-ref/ 795 /omit-if-no-ref/
808 spi3_sleep_pins_a: spi3-sleep-0 { 796 spi3_sleep_pins_a: spi3-sleep-0 {
809 pins { 797 pins {
810 pinmux = <STM32_PINMUX 798 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* SPI3_SCK */
811 <STM32_PINMUX 799 <STM32_PINMUX('D', 4, ANALOG)>, /* SPI3_MISO */
812 <STM32_PINMUX 800 <STM32_PINMUX('F', 1, ANALOG)>; /* SPI3_MOSI */
813 }; 801 };
814 }; 802 };
815 803
816 /omit-if-no-ref/ 804 /omit-if-no-ref/
817 spi5_pins_a: spi5-0 { 805 spi5_pins_a: spi5-0 {
818 pins1 { 806 pins1 {
819 pinmux = <STM32_PINMUX 807 pinmux = <STM32_PINMUX('H', 7, AF6)>, /* SPI5_SCK */
820 <STM32_PINMUX 808 <STM32_PINMUX('H', 3, AF5)>; /* SPI5_MOSI */
821 bias-disable; 809 bias-disable;
822 drive-push-pull; 810 drive-push-pull;
823 slew-rate = <1>; 811 slew-rate = <1>;
824 }; 812 };
825 813
826 pins2 { 814 pins2 {
827 pinmux = <STM32_PINMUX 815 pinmux = <STM32_PINMUX('A', 8, AF5)>; /* SPI5_MISO */
828 bias-disable; 816 bias-disable;
829 }; 817 };
830 }; 818 };
831 819
832 /omit-if-no-ref/ 820 /omit-if-no-ref/
833 spi5_sleep_pins_a: spi5-sleep-0 { 821 spi5_sleep_pins_a: spi5-sleep-0 {
834 pins { 822 pins {
835 pinmux = <STM32_PINMUX 823 pinmux = <STM32_PINMUX('H', 7, ANALOG)>, /* SPI5_SCK */
836 <STM32_PINMUX 824 <STM32_PINMUX('A', 8, ANALOG)>, /* SPI5_MISO */
837 <STM32_PINMUX 825 <STM32_PINMUX('H', 3, ANALOG)>; /* SPI5_MOSI */
838 }; 826 };
839 }; 827 };
840 828
841 /omit-if-no-ref/ 829 /omit-if-no-ref/
842 stm32g0_intn_pins_a: stm32g0-intn-0 { 830 stm32g0_intn_pins_a: stm32g0-intn-0 {
843 pins { 831 pins {
844 pinmux = <STM32_PINMUX 832 pinmux = <STM32_PINMUX('I', 2, GPIO)>;
845 bias-pull-up; 833 bias-pull-up;
846 }; 834 };
847 }; 835 };
848 836
849 /omit-if-no-ref/ 837 /omit-if-no-ref/
850 uart4_pins_a: uart4-0 { 838 uart4_pins_a: uart4-0 {
851 pins1 { 839 pins1 {
852 pinmux = <STM32_PINMUX 840 pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
853 bias-disable; 841 bias-disable;
854 drive-push-pull; 842 drive-push-pull;
855 slew-rate = <0>; 843 slew-rate = <0>;
856 }; 844 };
857 pins2 { 845 pins2 {
858 pinmux = <STM32_PINMUX 846 pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
859 bias-disable; 847 bias-disable;
860 }; 848 };
861 }; 849 };
862 850
863 /omit-if-no-ref/ 851 /omit-if-no-ref/
864 uart4_idle_pins_a: uart4-idle-0 { 852 uart4_idle_pins_a: uart4-idle-0 {
865 pins1 { 853 pins1 {
866 pinmux = <STM32_PINMUX 854 pinmux = <STM32_PINMUX('D', 6, ANALOG)>; /* UART4_TX */
867 }; 855 };
868 pins2 { 856 pins2 {
869 pinmux = <STM32_PINMUX 857 pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
870 bias-disable; 858 bias-disable;
871 }; 859 };
872 }; 860 };
873 861
874 /omit-if-no-ref/ 862 /omit-if-no-ref/
875 uart4_sleep_pins_a: uart4-sleep-0 { 863 uart4_sleep_pins_a: uart4-sleep-0 {
876 pins { 864 pins {
877 pinmux = <STM32_PINMUX 865 pinmux = <STM32_PINMUX('D', 6, ANALOG)>, /* UART4_TX */
878 <STM32_PINMUX 866 <STM32_PINMUX('D', 8, ANALOG)>; /* UART4_RX */
879 }; 867 };
880 }; 868 };
881 869
882 /omit-if-no-ref/ 870 /omit-if-no-ref/
883 uart4_pins_b: uart4-1 { 871 uart4_pins_b: uart4-1 {
884 pins1 { 872 pins1 {
885 pinmux = <STM32_PINMUX 873 pinmux = <STM32_PINMUX('A', 9, AF8)>; /* UART4_TX */
886 bias-disable; 874 bias-disable;
887 drive-push-pull; 875 drive-push-pull;
888 slew-rate = <0>; 876 slew-rate = <0>;
889 }; 877 };
890 pins2 { 878 pins2 {
891 pinmux = <STM32_PINMUX 879 pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
892 bias-pull-up; 880 bias-pull-up;
893 }; 881 };
894 }; 882 };
895 883
896 /omit-if-no-ref/ 884 /omit-if-no-ref/
897 uart4_idle_pins_b: uart4-idle-1 { 885 uart4_idle_pins_b: uart4-idle-1 {
898 pins1 { 886 pins1 {
899 pinmux = <STM32_PINMUX 887 pinmux = <STM32_PINMUX('A', 9, ANALOG)>; /* UART4_TX */
900 }; 888 };
901 pins2 { 889 pins2 {
902 pinmux = <STM32_PINMUX 890 pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
903 bias-pull-up; 891 bias-pull-up;
904 }; 892 };
905 }; 893 };
906 894
907 /omit-if-no-ref/ 895 /omit-if-no-ref/
908 uart4_sleep_pins_b: uart4-sleep-1 { 896 uart4_sleep_pins_b: uart4-sleep-1 {
909 pins { 897 pins {
910 pinmux = <STM32_PINMUX 898 pinmux = <STM32_PINMUX('A', 9, ANALOG)>, /* UART4_TX */
911 <STM32_PINMUX 899 <STM32_PINMUX('D', 8, ANALOG)>; /* UART4_RX */
912 }; 900 };
913 }; 901 };
914 902
915 /omit-if-no-ref/ 903 /omit-if-no-ref/
916 uart7_pins_a: uart7-0 { 904 uart7_pins_a: uart7-0 {
917 pins1 { 905 pins1 {
918 pinmux = <STM32_PINMUX 906 pinmux = <STM32_PINMUX('H', 2, AF8)>, /* UART7_TX */
919 <STM32_PINMUX 907 <STM32_PINMUX('B', 12, AF7)>; /* UART7_RTS */
920 bias-disable; 908 bias-disable;
921 drive-push-pull; 909 drive-push-pull;
922 slew-rate = <0>; 910 slew-rate = <0>;
923 }; 911 };
924 pins2 { 912 pins2 {
925 pinmux = <STM32_PINMUX 913 pinmux = <STM32_PINMUX('E', 10, AF7)>, /* UART7_RX */
926 <STM32_PINMUX 914 <STM32_PINMUX('G', 7, AF8)>; /* UART7_CTS_NSS */
927 bias-disable; 915 bias-disable;
928 }; 916 };
929 }; 917 };
930 918
931 /omit-if-no-ref/ 919 /omit-if-no-ref/
932 uart7_idle_pins_a: uart7-idle-0 { 920 uart7_idle_pins_a: uart7-idle-0 {
933 pins1 { 921 pins1 {
934 pinmux = <STM32_PINMUX 922 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* UART7_TX */
935 <STM32_PINMUX 923 <STM32_PINMUX('G', 7, ANALOG)>; /* UART7_CTS_NSS */
936 }; 924 };
937 pins2 { 925 pins2 {
938 pinmux = <STM32_PINMUX 926 pinmux = <STM32_PINMUX('B', 12, AF7)>; /* UART7_RTS */
939 bias-disable; 927 bias-disable;
940 drive-push-pull; 928 drive-push-pull;
941 slew-rate = <0>; 929 slew-rate = <0>;
942 }; 930 };
943 pins3 { 931 pins3 {
944 pinmux = <STM32_PINMUX 932 pinmux = <STM32_PINMUX('E', 10, AF7)>; /* UART7_RX */
945 bias-disable; 933 bias-disable;
946 }; 934 };
947 }; 935 };
948 936
949 /omit-if-no-ref/ 937 /omit-if-no-ref/
950 uart7_sleep_pins_a: uart7-sleep-0 { 938 uart7_sleep_pins_a: uart7-sleep-0 {
951 pins { 939 pins {
952 pinmux = <STM32_PINMUX 940 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* UART7_TX */
953 <STM32_PINMUX 941 <STM32_PINMUX('B', 12, ANALOG)>, /* UART7_RTS */
954 <STM32_PINMUX 942 <STM32_PINMUX('E', 10, ANALOG)>, /* UART7_RX */
955 <STM32_PINMUX 943 <STM32_PINMUX('G', 7, ANALOG)>; /* UART7_CTS_NSS */
956 }; 944 };
957 }; 945 };
958 946
959 /omit-if-no-ref/ 947 /omit-if-no-ref/
960 uart8_pins_a: uart8-0 { 948 uart8_pins_a: uart8-0 {
961 pins1 { 949 pins1 {
962 pinmux = <STM32_PINMUX 950 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
963 bias-disable; 951 bias-disable;
964 drive-push-pull; 952 drive-push-pull;
965 slew-rate = <0>; 953 slew-rate = <0>;
966 }; 954 };
967 pins2 { 955 pins2 {
968 pinmux = <STM32_PINMUX 956 pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */
969 bias-pull-up; 957 bias-pull-up;
970 }; 958 };
971 }; 959 };
972 960
973 /omit-if-no-ref/ 961 /omit-if-no-ref/
974 uart8_idle_pins_a: uart8-idle-0 { 962 uart8_idle_pins_a: uart8-idle-0 {
975 pins1 { 963 pins1 {
976 pinmux = <STM32_PINMUX 964 pinmux = <STM32_PINMUX('E', 1, ANALOG)>; /* UART8_TX */
977 }; 965 };
978 pins2 { 966 pins2 {
979 pinmux = <STM32_PINMUX 967 pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */
980 bias-pull-up; 968 bias-pull-up;
981 }; 969 };
982 }; 970 };
983 971
984 /omit-if-no-ref/ 972 /omit-if-no-ref/
985 uart8_sleep_pins_a: uart8-sleep-0 { 973 uart8_sleep_pins_a: uart8-sleep-0 {
986 pins { 974 pins {
987 pinmux = <STM32_PINMUX 975 pinmux = <STM32_PINMUX('E', 1, ANALOG)>, /* UART8_TX */
988 <STM32_PINMUX 976 <STM32_PINMUX('F', 9, ANALOG)>; /* UART8_RX */
989 }; 977 };
990 }; 978 };
991 979
992 /omit-if-no-ref/ 980 /omit-if-no-ref/
993 usart1_pins_a: usart1-0 { 981 usart1_pins_a: usart1-0 {
994 pins1 { 982 pins1 {
995 pinmux = <STM32_PINMUX 983 pinmux = <STM32_PINMUX('C', 0, AF7)>, /* USART1_TX */
996 <STM32_PINMUX 984 <STM32_PINMUX('C', 2, AF7)>; /* USART1_RTS */
997 bias-disable; 985 bias-disable;
998 drive-push-pull; 986 drive-push-pull;
999 slew-rate = <0>; 987 slew-rate = <0>;
1000 }; 988 };
1001 pins2 { 989 pins2 {
1002 pinmux = <STM32_PINMU 990 pinmux = <STM32_PINMUX('B', 0, AF4)>, /* USART1_RX */
1003 <STM32_PINMU 991 <STM32_PINMUX('A', 7, AF7)>; /* USART1_CTS_NSS */
1004 bias-pull-up; 992 bias-pull-up;
1005 }; 993 };
1006 }; 994 };
1007 995
1008 /omit-if-no-ref/ 996 /omit-if-no-ref/
1009 usart1_idle_pins_a: usart1-idle-0 { 997 usart1_idle_pins_a: usart1-idle-0 {
1010 pins1 { 998 pins1 {
1011 pinmux = <STM32_PINMU 999 pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */
1012 <STM32_PINMU 1000 <STM32_PINMUX('A', 7, ANALOG)>; /* USART1_CTS_NSS */
1013 }; 1001 };
1014 pins2 { 1002 pins2 {
1015 pinmux = <STM32_PINMU 1003 pinmux = <STM32_PINMUX('C', 2, AF7)>; /* USART1_RTS */
1016 bias-disable; 1004 bias-disable;
1017 drive-push-pull; 1005 drive-push-pull;
1018 slew-rate = <0>; 1006 slew-rate = <0>;
1019 }; 1007 };
1020 pins3 { 1008 pins3 {
1021 pinmux = <STM32_PINMU 1009 pinmux = <STM32_PINMUX('B', 0, AF4)>; /* USART1_RX */
1022 bias-pull-up; 1010 bias-pull-up;
1023 }; 1011 };
1024 }; 1012 };
1025 1013
1026 /omit-if-no-ref/ 1014 /omit-if-no-ref/
1027 usart1_sleep_pins_a: usart1-sleep-0 { 1015 usart1_sleep_pins_a: usart1-sleep-0 {
1028 pins { 1016 pins {
1029 pinmux = <STM32_PINMU 1017 pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */
1030 <STM32_PINMU 1018 <STM32_PINMUX('C', 2, ANALOG)>, /* USART1_RTS */
1031 <STM32_PINMU 1019 <STM32_PINMUX('A', 7, ANALOG)>, /* USART1_CTS_NSS */
1032 <STM32_PINMU 1020 <STM32_PINMUX('B', 0, ANALOG)>; /* USART1_RX */
1033 }; 1021 };
1034 }; 1022 };
1035 1023
1036 /omit-if-no-ref/ 1024 /omit-if-no-ref/
1037 usart1_pins_b: usart1-1 { 1025 usart1_pins_b: usart1-1 {
1038 pins1 { 1026 pins1 {
1039 pinmux = <STM32_PINMU 1027 pinmux = <STM32_PINMUX('C', 0, AF7)>; /* USART1_TX */
1040 bias-disable; 1028 bias-disable;
1041 drive-push-pull; 1029 drive-push-pull;
1042 slew-rate = <0>; 1030 slew-rate = <0>;
1043 }; 1031 };
1044 pins2 { 1032 pins2 {
1045 pinmux = <STM32_PINMU 1033 pinmux = <STM32_PINMUX('D', 14, AF7)>; /* USART1_RX */
1046 bias-pull-up; 1034 bias-pull-up;
1047 }; 1035 };
1048 }; 1036 };
1049 1037
1050 /omit-if-no-ref/ 1038 /omit-if-no-ref/
1051 usart1_idle_pins_b: usart1-idle-1 { 1039 usart1_idle_pins_b: usart1-idle-1 {
1052 pins1 { 1040 pins1 {
1053 pinmux = <STM32_PINMU 1041 pinmux = <STM32_PINMUX('C', 0, ANALOG)>; /* USART1_TX */
1054 }; 1042 };
1055 pins2 { 1043 pins2 {
1056 pinmux = <STM32_PINMU 1044 pinmux = <STM32_PINMUX('D', 14, AF7)>; /* USART1_RX */
1057 bias-pull-up; 1045 bias-pull-up;
1058 }; 1046 };
1059 }; 1047 };
1060 1048
1061 /omit-if-no-ref/ 1049 /omit-if-no-ref/
1062 usart1_sleep_pins_b: usart1-sleep-1 { 1050 usart1_sleep_pins_b: usart1-sleep-1 {
1063 pins { 1051 pins {
1064 pinmux = <STM32_PINMU 1052 pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */
1065 <STM32_PINMU 1053 <STM32_PINMUX('D', 14, ANALOG)>; /* USART1_RX */
1066 }; 1054 };
1067 }; 1055 };
1068 1056
1069 /omit-if-no-ref/ 1057 /omit-if-no-ref/
1070 usart2_pins_a: usart2-0 { 1058 usart2_pins_a: usart2-0 {
1071 pins1 { 1059 pins1 {
1072 pinmux = <STM32_PINMU 1060 pinmux = <STM32_PINMUX('H', 12, AF1)>, /* USART2_TX */
1073 <STM32_PINMU 1061 <STM32_PINMUX('D', 4, AF3)>; /* USART2_RTS */
1074 bias-disable; 1062 bias-disable;
1075 drive-push-pull; 1063 drive-push-pull;
1076 slew-rate = <0>; 1064 slew-rate = <0>;
1077 }; 1065 };
1078 pins2 { 1066 pins2 {
1079 pinmux = <STM32_PINMU 1067 pinmux = <STM32_PINMUX('D', 15, AF1)>, /* USART2_RX */
1080 <STM32_PINMU 1068 <STM32_PINMUX('E', 11, AF2)>; /* USART2_CTS_NSS */
1081 bias-disable; 1069 bias-disable;
1082 }; 1070 };
1083 }; 1071 };
1084 1072
1085 /omit-if-no-ref/ 1073 /omit-if-no-ref/
1086 usart2_idle_pins_a: usart2-idle-0 { 1074 usart2_idle_pins_a: usart2-idle-0 {
1087 pins1 { 1075 pins1 {
1088 pinmux = <STM32_PINMU 1076 pinmux = <STM32_PINMUX('H', 12, ANALOG)>, /* USART2_TX */
1089 <STM32_PINMU 1077 <STM32_PINMUX('E', 11, ANALOG)>; /* USART2_CTS_NSS */
1090 }; 1078 };
1091 pins2 { 1079 pins2 {
1092 pinmux = <STM32_PINMU 1080 pinmux = <STM32_PINMUX('D', 4, AF3)>; /* USART2_RTS */
1093 bias-disable; 1081 bias-disable;
1094 drive-push-pull; 1082 drive-push-pull;
1095 slew-rate = <0>; 1083 slew-rate = <0>;
1096 }; 1084 };
1097 pins3 { 1085 pins3 {
1098 pinmux = <STM32_PINMU 1086 pinmux = <STM32_PINMUX('D', 15, AF1)>; /* USART2_RX */
1099 bias-disable; 1087 bias-disable;
1100 }; 1088 };
1101 }; 1089 };
1102 1090
1103 /omit-if-no-ref/ 1091 /omit-if-no-ref/
1104 usart2_sleep_pins_a: usart2-sleep-0 { 1092 usart2_sleep_pins_a: usart2-sleep-0 {
1105 pins { 1093 pins {
1106 pinmux = <STM32_PINMU 1094 pinmux = <STM32_PINMUX('H', 12, ANALOG)>, /* USART2_TX */
1107 <STM32_PINMU 1095 <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
1108 <STM32_PINMU 1096 <STM32_PINMUX('D', 15, ANALOG)>, /* USART2_RX */
1109 <STM32_PINMU 1097 <STM32_PINMUX('E', 11, ANALOG)>; /* USART2_CTS_NSS */
1110 }; 1098 };
1111 }; 1099 };
1112 1100
1113 /omit-if-no-ref/ 1101 /omit-if-no-ref/
1114 usart2_pins_b: usart2-1 { 1102 usart2_pins_b: usart2-1 {
1115 pins1 { 1103 pins1 {
1116 pinmux = <STM32_PINMU 1104 pinmux = <STM32_PINMUX('F', 11, AF1)>, /* USART2_TX */
1117 <STM32_PINMU 1105 <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
1118 bias-disable; 1106 bias-disable;
1119 drive-push-pull; 1107 drive-push-pull;
1120 slew-rate = <0>; 1108 slew-rate = <0>;
1121 }; 1109 };
1122 pins2 { 1110 pins2 {
1123 pinmux = <STM32_PINMU 1111 pinmux = <STM32_PINMUX('D', 15, AF1)>, /* USART2_RX */
1124 <STM32_PINMU 1112 <STM32_PINMUX('E', 15, AF3)>; /* USART2_CTS_NSS */
1125 bias-disable; 1113 bias-disable;
1126 }; 1114 };
1127 }; 1115 };
1128 1116
1129 /omit-if-no-ref/ 1117 /omit-if-no-ref/
1130 usart2_idle_pins_b: usart2-idle-1 { 1118 usart2_idle_pins_b: usart2-idle-1 {
1131 pins1 { 1119 pins1 {
1132 pinmux = <STM32_PINMU 1120 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* USART2_TX */
1133 <STM32_PINMU 1121 <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
1134 }; 1122 };
1135 pins2 { 1123 pins2 {
1136 pinmux = <STM32_PINMU 1124 pinmux = <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
1137 bias-disable; 1125 bias-disable;
1138 drive-push-pull; 1126 drive-push-pull;
1139 slew-rate = <0>; 1127 slew-rate = <0>;
1140 }; 1128 };
1141 pins3 { 1129 pins3 {
1142 pinmux = <STM32_PINMU 1130 pinmux = <STM32_PINMUX('D', 15, AF1)>; /* USART2_RX */
1143 bias-disable; 1131 bias-disable;
1144 }; 1132 };
1145 }; 1133 };
1146 1134
1147 /omit-if-no-ref/ 1135 /omit-if-no-ref/
1148 usart2_sleep_pins_b: usart2-sleep-1 { 1136 usart2_sleep_pins_b: usart2-sleep-1 {
1149 pins { 1137 pins {
1150 pinmux = <STM32_PINMU 1138 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* USART2_TX */
1151 <STM32_PINMU 1139 <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */
1152 <STM32_PINMU 1140 <STM32_PINMUX('D', 15, ANALOG)>, /* USART2_RX */
1153 <STM32_PINMU 1141 <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
1154 }; 1142 };
1155 }; 1143 };
1156 }; 1144 };
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