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Linux/scripts/dtc/include-prefixes/arm/st/stm32mp131.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm/st/stm32mp131.dtsi (Architecture i386) and /scripts/dtc/include-prefixes/arm/st/stm32mp131.dtsi (Architecture m68k)


  1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3      1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
  2 /*                                                  2 /*
  3  * Copyright (C) STMicroelectronics 2021 - All      3  * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
  4  * Author: Alexandre Torgue <alexandre.torgue@f      4  * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
  5  */                                                 5  */
  6 #include <dt-bindings/interrupt-controller/arm      6 #include <dt-bindings/interrupt-controller/arm-gic.h>
  7 #include <dt-bindings/clock/stm32mp13-clks.h>       7 #include <dt-bindings/clock/stm32mp13-clks.h>
  8 #include <dt-bindings/reset/stm32mp13-resets.h      8 #include <dt-bindings/reset/stm32mp13-resets.h>
  9                                                     9 
 10 / {                                                10 / {
 11         #address-cells = <1>;                      11         #address-cells = <1>;
 12         #size-cells = <1>;                         12         #size-cells = <1>;
 13                                                    13 
 14         cpus {                                     14         cpus {
 15                 #address-cells = <1>;              15                 #address-cells = <1>;
 16                 #size-cells = <0>;                 16                 #size-cells = <0>;
 17                                                    17 
 18                 cpu0: cpu@0 {                      18                 cpu0: cpu@0 {
 19                         compatible = "arm,cort     19                         compatible = "arm,cortex-a7";
 20                         device_type = "cpu";       20                         device_type = "cpu";
 21                         reg = <0>;                 21                         reg = <0>;
 22                 };                                 22                 };
 23         };                                         23         };
 24                                                    24 
 25         arm-pmu {                                  25         arm-pmu {
 26                 compatible = "arm,cortex-a7-pm     26                 compatible = "arm,cortex-a7-pmu";
 27                 interrupts = <GIC_SPI 133 IRQ_     27                 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 28                 interrupt-affinity = <&cpu0>;      28                 interrupt-affinity = <&cpu0>;
 29                 interrupt-parent = <&intc>;        29                 interrupt-parent = <&intc>;
 30         };                                         30         };
 31                                                    31 
 32         firmware {                                 32         firmware {
 33                 optee {                            33                 optee {
 34                         method = "smc";            34                         method = "smc";
 35                         compatible = "linaro,o     35                         compatible = "linaro,optee-tz";
 36                         interrupt-parent = <&i     36                         interrupt-parent = <&intc>;
 37                         interrupts = <GIC_PPI      37                         interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
 38                 };                                 38                 };
 39                                                    39 
 40                 scmi: scmi {                       40                 scmi: scmi {
 41                         compatible = "linaro,s     41                         compatible = "linaro,scmi-optee";
 42                         #address-cells = <1>;      42                         #address-cells = <1>;
 43                         #size-cells = <0>;         43                         #size-cells = <0>;
 44                         linaro,optee-channel-i     44                         linaro,optee-channel-id = <0>;
 45                                                    45 
 46                         scmi_clk: protocol@14      46                         scmi_clk: protocol@14 {
 47                                 reg = <0x14>;      47                                 reg = <0x14>;
 48                                 #clock-cells =     48                                 #clock-cells = <1>;
 49                         };                         49                         };
 50                                                    50 
 51                         scmi_reset: protocol@1     51                         scmi_reset: protocol@16 {
 52                                 reg = <0x16>;      52                                 reg = <0x16>;
 53                                 #reset-cells =     53                                 #reset-cells = <1>;
 54                         };                         54                         };
 55                                                    55 
 56                         scmi_voltd: protocol@1     56                         scmi_voltd: protocol@17 {
 57                                 reg = <0x17>;      57                                 reg = <0x17>;
 58                                                    58 
 59                                 scmi_regu: reg     59                                 scmi_regu: regulators {
 60                                         #addre     60                                         #address-cells = <1>;
 61                                         #size-     61                                         #size-cells = <0>;
 62                                                    62 
 63                                         scmi_r     63                                         scmi_reg11: regulator@0 {
 64                                                    64                                                 reg = <VOLTD_SCMI_REG11>;
 65                                                    65                                                 regulator-name = "reg11";
 66                                         };         66                                         };
 67                                         scmi_r     67                                         scmi_reg18: regulator@1 {
 68                                                    68                                                 reg = <VOLTD_SCMI_REG18>;
 69                                                    69                                                 regulator-name = "reg18";
 70                                         };         70                                         };
 71                                         scmi_u     71                                         scmi_usb33: regulator@2 {
 72                                                    72                                                 reg = <VOLTD_SCMI_USB33>;
 73                                                    73                                                 regulator-name = "usb33";
 74                                         };         74                                         };
 75                                 };                 75                                 };
 76                         };                         76                         };
 77                 };                                 77                 };
 78         };                                         78         };
 79                                                    79 
 80         intc: interrupt-controller@a0021000 {      80         intc: interrupt-controller@a0021000 {
 81                 compatible = "arm,cortex-a7-gi     81                 compatible = "arm,cortex-a7-gic";
 82                 #interrupt-cells = <3>;            82                 #interrupt-cells = <3>;
 83                 interrupt-controller;              83                 interrupt-controller;
 84                 reg = <0xa0021000 0x1000>,         84                 reg = <0xa0021000 0x1000>,
 85                       <0xa0022000 0x2000>;         85                       <0xa0022000 0x2000>;
 86         };                                         86         };
 87                                                    87 
 88         psci {                                     88         psci {
 89                 compatible = "arm,psci-1.0";       89                 compatible = "arm,psci-1.0";
 90                 method = "smc";                    90                 method = "smc";
 91         };                                         91         };
 92                                                    92 
 93         timer {                                    93         timer {
 94                 compatible = "arm,armv7-timer"     94                 compatible = "arm,armv7-timer";
 95                 interrupts = <GIC_PPI 13 (GIC_     95                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
 96                              <GIC_PPI 14 (GIC_     96                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
 97                              <GIC_PPI 11 (GIC_     97                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
 98                              <GIC_PPI 10 (GIC_     98                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
 99                 interrupt-parent = <&intc>;        99                 interrupt-parent = <&intc>;
100                 always-on;                        100                 always-on;
101         };                                        101         };
102                                                   102 
103         soc {                                     103         soc {
104                 compatible = "simple-bus";        104                 compatible = "simple-bus";
105                 #address-cells = <1>;             105                 #address-cells = <1>;
106                 #size-cells = <1>;                106                 #size-cells = <1>;
107                 interrupt-parent = <&intc>;       107                 interrupt-parent = <&intc>;
108                 ranges;                           108                 ranges;
109                                                   109 
110                 timers2: timer@40000000 {         110                 timers2: timer@40000000 {
111                         #address-cells = <1>;     111                         #address-cells = <1>;
112                         #size-cells = <0>;        112                         #size-cells = <0>;
113                         compatible = "st,stm32    113                         compatible = "st,stm32-timers";
114                         reg = <0x40000000 0x40    114                         reg = <0x40000000 0x400>;
115                         interrupts = <GIC_SPI     115                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
116                         interrupt-names = "glo    116                         interrupt-names = "global";
117                         clocks = <&rcc TIM2_K>    117                         clocks = <&rcc TIM2_K>;
118                         clock-names = "int";      118                         clock-names = "int";
119                         dmas = <&dmamux1 18 0x    119                         dmas = <&dmamux1 18 0x400 0x1>,
120                                <&dmamux1 19 0x    120                                <&dmamux1 19 0x400 0x1>,
121                                <&dmamux1 20 0x    121                                <&dmamux1 20 0x400 0x1>,
122                                <&dmamux1 21 0x    122                                <&dmamux1 21 0x400 0x1>,
123                                <&dmamux1 22 0x    123                                <&dmamux1 22 0x400 0x1>;
124                         dma-names = "ch1", "ch    124                         dma-names = "ch1", "ch2", "ch3", "ch4", "up";
125                         status = "disabled";      125                         status = "disabled";
126                                                   126 
127                         pwm {                     127                         pwm {
128                                 compatible = "    128                                 compatible = "st,stm32-pwm";
129                                 #pwm-cells = <    129                                 #pwm-cells = <3>;
130                                 status = "disa    130                                 status = "disabled";
131                         };                        131                         };
132                                                   132 
133                         timer@1 {                 133                         timer@1 {
134                                 compatible = "    134                                 compatible = "st,stm32h7-timer-trigger";
135                                 reg = <1>;        135                                 reg = <1>;
136                                 status = "disa    136                                 status = "disabled";
137                         };                        137                         };
138                                                   138 
139                         counter {                 139                         counter {
140                                 compatible = "    140                                 compatible = "st,stm32-timer-counter";
141                                 status = "disa    141                                 status = "disabled";
142                         };                        142                         };
143                 };                                143                 };
144                                                   144 
145                 timers3: timer@40001000 {         145                 timers3: timer@40001000 {
146                         #address-cells = <1>;     146                         #address-cells = <1>;
147                         #size-cells = <0>;        147                         #size-cells = <0>;
148                         compatible = "st,stm32    148                         compatible = "st,stm32-timers";
149                         reg = <0x40001000 0x40    149                         reg = <0x40001000 0x400>;
150                         interrupts = <GIC_SPI     150                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
151                         interrupt-names = "glo    151                         interrupt-names = "global";
152                         clocks = <&rcc TIM3_K>    152                         clocks = <&rcc TIM3_K>;
153                         clock-names = "int";      153                         clock-names = "int";
154                         dmas = <&dmamux1 23 0x    154                         dmas = <&dmamux1 23 0x400 0x1>,
155                                <&dmamux1 24 0x    155                                <&dmamux1 24 0x400 0x1>,
156                                <&dmamux1 25 0x    156                                <&dmamux1 25 0x400 0x1>,
157                                <&dmamux1 26 0x    157                                <&dmamux1 26 0x400 0x1>,
158                                <&dmamux1 27 0x    158                                <&dmamux1 27 0x400 0x1>,
159                                <&dmamux1 28 0x    159                                <&dmamux1 28 0x400 0x1>;
160                         dma-names = "ch1", "ch    160                         dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
161                         status = "disabled";      161                         status = "disabled";
162                                                   162 
163                         pwm {                     163                         pwm {
164                                 compatible = "    164                                 compatible = "st,stm32-pwm";
165                                 #pwm-cells = <    165                                 #pwm-cells = <3>;
166                                 status = "disa    166                                 status = "disabled";
167                         };                        167                         };
168                                                   168 
169                         timer@2 {                 169                         timer@2 {
170                                 compatible = "    170                                 compatible = "st,stm32h7-timer-trigger";
171                                 reg = <2>;        171                                 reg = <2>;
172                                 status = "disa    172                                 status = "disabled";
173                         };                        173                         };
174                                                   174 
175                         counter {                 175                         counter {
176                                 compatible = "    176                                 compatible = "st,stm32-timer-counter";
177                                 status = "disa    177                                 status = "disabled";
178                         };                        178                         };
179                 };                                179                 };
180                                                   180 
181                 timers4: timer@40002000 {         181                 timers4: timer@40002000 {
182                         #address-cells = <1>;     182                         #address-cells = <1>;
183                         #size-cells = <0>;        183                         #size-cells = <0>;
184                         compatible = "st,stm32    184                         compatible = "st,stm32-timers";
185                         reg = <0x40002000 0x40    185                         reg = <0x40002000 0x400>;
186                         interrupts = <GIC_SPI     186                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
187                         interrupt-names = "glo    187                         interrupt-names = "global";
188                         clocks = <&rcc TIM4_K>    188                         clocks = <&rcc TIM4_K>;
189                         clock-names = "int";      189                         clock-names = "int";
190                         dmas = <&dmamux1 29 0x    190                         dmas = <&dmamux1 29 0x400 0x1>,
191                                <&dmamux1 30 0x    191                                <&dmamux1 30 0x400 0x1>,
192                                <&dmamux1 31 0x    192                                <&dmamux1 31 0x400 0x1>,
193                                <&dmamux1 32 0x    193                                <&dmamux1 32 0x400 0x1>;
194                         dma-names = "ch1", "ch    194                         dma-names = "ch1", "ch2", "ch3", "up";
195                         status = "disabled";      195                         status = "disabled";
196                                                   196 
197                         pwm {                     197                         pwm {
198                                 compatible = "    198                                 compatible = "st,stm32-pwm";
199                                 #pwm-cells = <    199                                 #pwm-cells = <3>;
200                                 status = "disa    200                                 status = "disabled";
201                         };                        201                         };
202                                                   202 
203                         timer@3 {                 203                         timer@3 {
204                                 compatible = "    204                                 compatible = "st,stm32h7-timer-trigger";
205                                 reg = <3>;        205                                 reg = <3>;
206                                 status = "disa    206                                 status = "disabled";
207                         };                        207                         };
208                                                   208 
209                         counter {                 209                         counter {
210                                 compatible = "    210                                 compatible = "st,stm32-timer-counter";
211                                 status = "disa    211                                 status = "disabled";
212                         };                        212                         };
213                 };                                213                 };
214                                                   214 
215                 timers5: timer@40003000 {         215                 timers5: timer@40003000 {
216                         #address-cells = <1>;     216                         #address-cells = <1>;
217                         #size-cells = <0>;        217                         #size-cells = <0>;
218                         compatible = "st,stm32    218                         compatible = "st,stm32-timers";
219                         reg = <0x40003000 0x40    219                         reg = <0x40003000 0x400>;
220                         interrupts = <GIC_SPI     220                         interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
221                         interrupt-names = "glo    221                         interrupt-names = "global";
222                         clocks = <&rcc TIM5_K>    222                         clocks = <&rcc TIM5_K>;
223                         clock-names = "int";      223                         clock-names = "int";
224                         dmas = <&dmamux1 55 0x    224                         dmas = <&dmamux1 55 0x400 0x1>,
225                                <&dmamux1 56 0x    225                                <&dmamux1 56 0x400 0x1>,
226                                <&dmamux1 57 0x    226                                <&dmamux1 57 0x400 0x1>,
227                                <&dmamux1 58 0x    227                                <&dmamux1 58 0x400 0x1>,
228                                <&dmamux1 59 0x    228                                <&dmamux1 59 0x400 0x1>,
229                                <&dmamux1 60 0x    229                                <&dmamux1 60 0x400 0x1>;
230                         dma-names = "ch1", "ch    230                         dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
231                         status = "disabled";      231                         status = "disabled";
232                                                   232 
233                         pwm {                     233                         pwm {
234                                 compatible = "    234                                 compatible = "st,stm32-pwm";
235                                 #pwm-cells = <    235                                 #pwm-cells = <3>;
236                                 status = "disa    236                                 status = "disabled";
237                         };                        237                         };
238                                                   238 
239                         timer@4 {                 239                         timer@4 {
240                                 compatible = "    240                                 compatible = "st,stm32h7-timer-trigger";
241                                 reg = <4>;        241                                 reg = <4>;
242                                 status = "disa    242                                 status = "disabled";
243                         };                        243                         };
244                                                   244 
245                         counter {                 245                         counter {
246                                 compatible = "    246                                 compatible = "st,stm32-timer-counter";
247                                 status = "disa    247                                 status = "disabled";
248                         };                        248                         };
249                 };                                249                 };
250                                                   250 
251                 timers6: timer@40004000 {         251                 timers6: timer@40004000 {
252                         #address-cells = <1>;     252                         #address-cells = <1>;
253                         #size-cells = <0>;        253                         #size-cells = <0>;
254                         compatible = "st,stm32    254                         compatible = "st,stm32-timers";
255                         reg = <0x40004000 0x40    255                         reg = <0x40004000 0x400>;
256                         interrupts = <GIC_SPI     256                         interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
257                         interrupt-names = "glo    257                         interrupt-names = "global";
258                         clocks = <&rcc TIM6_K>    258                         clocks = <&rcc TIM6_K>;
259                         clock-names = "int";      259                         clock-names = "int";
260                         dmas = <&dmamux1 69 0x    260                         dmas = <&dmamux1 69 0x400 0x1>;
261                         dma-names = "up";         261                         dma-names = "up";
262                         status = "disabled";      262                         status = "disabled";
263                                                   263 
264                         timer@5 {                 264                         timer@5 {
265                                 compatible = "    265                                 compatible = "st,stm32h7-timer-trigger";
266                                 reg = <5>;        266                                 reg = <5>;
267                                 status = "disa    267                                 status = "disabled";
268                         };                        268                         };
269                 };                                269                 };
270                                                   270 
271                 timers7: timer@40005000 {         271                 timers7: timer@40005000 {
272                         #address-cells = <1>;     272                         #address-cells = <1>;
273                         #size-cells = <0>;        273                         #size-cells = <0>;
274                         compatible = "st,stm32    274                         compatible = "st,stm32-timers";
275                         reg = <0x40005000 0x40    275                         reg = <0x40005000 0x400>;
276                         interrupts = <GIC_SPI     276                         interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
277                         interrupt-names = "glo    277                         interrupt-names = "global";
278                         clocks = <&rcc TIM7_K>    278                         clocks = <&rcc TIM7_K>;
279                         clock-names = "int";      279                         clock-names = "int";
280                         dmas = <&dmamux1 70 0x    280                         dmas = <&dmamux1 70 0x400 0x1>;
281                         dma-names = "up";         281                         dma-names = "up";
282                         status = "disabled";      282                         status = "disabled";
283                                                   283 
284                         timer@6 {                 284                         timer@6 {
285                                 compatible = "    285                                 compatible = "st,stm32h7-timer-trigger";
286                                 reg = <6>;        286                                 reg = <6>;
287                                 status = "disa    287                                 status = "disabled";
288                         };                        288                         };
289                 };                                289                 };
290                                                   290 
291                 lptimer1: timer@40009000 {        291                 lptimer1: timer@40009000 {
292                         #address-cells = <1>;     292                         #address-cells = <1>;
293                         #size-cells = <0>;        293                         #size-cells = <0>;
294                         compatible = "st,stm32    294                         compatible = "st,stm32-lptimer";
295                         reg = <0x40009000 0x40    295                         reg = <0x40009000 0x400>;
296                         interrupts-extended =     296                         interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
297                         clocks = <&rcc LPTIM1_    297                         clocks = <&rcc LPTIM1_K>;
298                         clock-names = "mux";      298                         clock-names = "mux";
299                         wakeup-source;            299                         wakeup-source;
300                         status = "disabled";      300                         status = "disabled";
301                                                   301 
302                         pwm {                     302                         pwm {
303                                 compatible = "    303                                 compatible = "st,stm32-pwm-lp";
304                                 #pwm-cells = <    304                                 #pwm-cells = <3>;
305                                 status = "disa    305                                 status = "disabled";
306                         };                        306                         };
307                                                   307 
308                         trigger@0 {               308                         trigger@0 {
309                                 compatible = "    309                                 compatible = "st,stm32-lptimer-trigger";
310                                 reg = <0>;        310                                 reg = <0>;
311                                 status = "disa    311                                 status = "disabled";
312                         };                        312                         };
313                                                   313 
314                         counter {                 314                         counter {
315                                 compatible = "    315                                 compatible = "st,stm32-lptimer-counter";
316                                 status = "disa    316                                 status = "disabled";
317                         };                        317                         };
318                                                   318 
319                         timer {                   319                         timer {
320                                 compatible = "    320                                 compatible = "st,stm32-lptimer-timer";
321                                 status = "disa    321                                 status = "disabled";
322                         };                        322                         };
323                 };                                323                 };
324                                                   324 
325                 i2s2: audio-controller@4000b00    325                 i2s2: audio-controller@4000b000 {
326                         compatible = "st,stm32    326                         compatible = "st,stm32h7-i2s";
327                         reg = <0x4000b000 0x40    327                         reg = <0x4000b000 0x400>;
328                         #sound-dai-cells = <0>    328                         #sound-dai-cells = <0>;
329                         interrupts = <GIC_SPI     329                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
330                         dmas = <&dmamux1 39 0x    330                         dmas = <&dmamux1 39 0x400 0x01>,
331                                <&dmamux1 40 0x    331                                <&dmamux1 40 0x400 0x01>;
332                         dma-names = "rx", "tx"    332                         dma-names = "rx", "tx";
333                         status = "disabled";      333                         status = "disabled";
334                 };                                334                 };
335                                                   335 
336                 spi2: spi@4000b000 {              336                 spi2: spi@4000b000 {
337                         compatible = "st,stm32    337                         compatible = "st,stm32h7-spi";
338                         reg = <0x4000b000 0x40    338                         reg = <0x4000b000 0x400>;
339                         interrupts = <GIC_SPI     339                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
340                         clocks = <&rcc SPI2_K>    340                         clocks = <&rcc SPI2_K>;
341                         resets = <&rcc SPI2_R>    341                         resets = <&rcc SPI2_R>;
342                         #address-cells = <1>;     342                         #address-cells = <1>;
343                         #size-cells = <0>;        343                         #size-cells = <0>;
344                         dmas = <&dmamux1 39 0x    344                         dmas = <&dmamux1 39 0x400 0x01>,
345                                <&dmamux1 40 0x    345                                <&dmamux1 40 0x400 0x01>;
346                         dma-names = "rx", "tx"    346                         dma-names = "rx", "tx";
347                         status = "disabled";      347                         status = "disabled";
348                 };                                348                 };
349                                                   349 
350                 i2s3: audio-controller@4000c00    350                 i2s3: audio-controller@4000c000 {
351                         compatible = "st,stm32    351                         compatible = "st,stm32h7-i2s";
352                         reg = <0x4000c000 0x40    352                         reg = <0x4000c000 0x400>;
353                         #sound-dai-cells = <0>    353                         #sound-dai-cells = <0>;
354                         interrupts = <GIC_SPI     354                         interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
355                         dmas = <&dmamux1 61 0x    355                         dmas = <&dmamux1 61 0x400 0x01>,
356                                <&dmamux1 62 0x    356                                <&dmamux1 62 0x400 0x01>;
357                         dma-names = "rx", "tx"    357                         dma-names = "rx", "tx";
358                         status = "disabled";      358                         status = "disabled";
359                 };                                359                 };
360                                                   360 
361                 spi3: spi@4000c000 {              361                 spi3: spi@4000c000 {
362                         compatible = "st,stm32    362                         compatible = "st,stm32h7-spi";
363                         reg = <0x4000c000 0x40    363                         reg = <0x4000c000 0x400>;
364                         interrupts = <GIC_SPI     364                         interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
365                         clocks = <&rcc SPI3_K>    365                         clocks = <&rcc SPI3_K>;
366                         resets = <&rcc SPI3_R>    366                         resets = <&rcc SPI3_R>;
367                         #address-cells = <1>;     367                         #address-cells = <1>;
368                         #size-cells = <0>;        368                         #size-cells = <0>;
369                         dmas = <&dmamux1 61 0x    369                         dmas = <&dmamux1 61 0x400 0x01>,
370                                <&dmamux1 62 0x    370                                <&dmamux1 62 0x400 0x01>;
371                         dma-names = "rx", "tx"    371                         dma-names = "rx", "tx";
372                         status = "disabled";      372                         status = "disabled";
373                 };                                373                 };
374                                                   374 
375                 spdifrx: audio-controller@4000    375                 spdifrx: audio-controller@4000d000 {
376                         compatible = "st,stm32    376                         compatible = "st,stm32h7-spdifrx";
377                         reg = <0x4000d000 0x40    377                         reg = <0x4000d000 0x400>;
378                         #sound-dai-cells = <0>    378                         #sound-dai-cells = <0>;
379                         clocks = <&rcc SPDIF_K    379                         clocks = <&rcc SPDIF_K>;
380                         clock-names = "kclk";     380                         clock-names = "kclk";
381                         interrupts = <GIC_SPI     381                         interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
382                         dmas = <&dmamux1 93 0x    382                         dmas = <&dmamux1 93 0x400 0x01>,
383                                <&dmamux1 94 0x    383                                <&dmamux1 94 0x400 0x01>;
384                         dma-names = "rx", "rx-    384                         dma-names = "rx", "rx-ctrl";
385                         status = "disabled";      385                         status = "disabled";
386                 };                                386                 };
387                                                   387 
388                 usart3: serial@4000f000 {         388                 usart3: serial@4000f000 {
389                         compatible = "st,stm32    389                         compatible = "st,stm32h7-uart";
390                         reg = <0x4000f000 0x40    390                         reg = <0x4000f000 0x400>;
391                         interrupts-extended =     391                         interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>;
392                         clocks = <&rcc USART3_    392                         clocks = <&rcc USART3_K>;
393                         resets = <&rcc USART3_    393                         resets = <&rcc USART3_R>;
394                         wakeup-source;            394                         wakeup-source;
395                         dmas = <&dmamux1 45 0x    395                         dmas = <&dmamux1 45 0x400 0x5>,
396                                <&dmamux1 46 0x    396                                <&dmamux1 46 0x400 0x1>;
397                         dma-names = "rx", "tx"    397                         dma-names = "rx", "tx";
398                         status = "disabled";      398                         status = "disabled";
399                 };                                399                 };
400                                                   400 
401                 uart4: serial@40010000 {          401                 uart4: serial@40010000 {
402                         compatible = "st,stm32    402                         compatible = "st,stm32h7-uart";
403                         reg = <0x40010000 0x40    403                         reg = <0x40010000 0x400>;
404                         interrupts-extended =     404                         interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
405                         clocks = <&rcc UART4_K    405                         clocks = <&rcc UART4_K>;
406                         resets = <&rcc UART4_R    406                         resets = <&rcc UART4_R>;
407                         wakeup-source;            407                         wakeup-source;
408                         dmas = <&dmamux1 63 0x    408                         dmas = <&dmamux1 63 0x400 0x5>,
409                                <&dmamux1 64 0x    409                                <&dmamux1 64 0x400 0x1>;
410                         dma-names = "rx", "tx"    410                         dma-names = "rx", "tx";
411                         status = "disabled";      411                         status = "disabled";
412                 };                                412                 };
413                                                   413 
414                 uart5: serial@40011000 {          414                 uart5: serial@40011000 {
415                         compatible = "st,stm32    415                         compatible = "st,stm32h7-uart";
416                         reg = <0x40011000 0x40    416                         reg = <0x40011000 0x400>;
417                         interrupts-extended =     417                         interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>;
418                         clocks = <&rcc UART5_K    418                         clocks = <&rcc UART5_K>;
419                         resets = <&rcc UART5_R    419                         resets = <&rcc UART5_R>;
420                         wakeup-source;            420                         wakeup-source;
421                         dmas = <&dmamux1 65 0x    421                         dmas = <&dmamux1 65 0x400 0x5>,
422                                <&dmamux1 66 0x    422                                <&dmamux1 66 0x400 0x1>;
423                         dma-names = "rx", "tx"    423                         dma-names = "rx", "tx";
424                         status = "disabled";      424                         status = "disabled";
425                 };                                425                 };
426                                                   426 
427                 i2c1: i2c@40012000 {              427                 i2c1: i2c@40012000 {
428                         compatible = "st,stm32    428                         compatible = "st,stm32mp13-i2c";
429                         reg = <0x40012000 0x40    429                         reg = <0x40012000 0x400>;
430                         interrupt-names = "eve    430                         interrupt-names = "event", "error";
431                         interrupts = <GIC_SPI     431                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
432                                      <GIC_SPI     432                                      <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
433                         clocks = <&rcc I2C1_K>    433                         clocks = <&rcc I2C1_K>;
434                         resets = <&rcc I2C1_R>    434                         resets = <&rcc I2C1_R>;
435                         #address-cells = <1>;     435                         #address-cells = <1>;
436                         #size-cells = <0>;        436                         #size-cells = <0>;
437                         dmas = <&dmamux1 33 0x    437                         dmas = <&dmamux1 33 0x400 0x1>,
438                                <&dmamux1 34 0x    438                                <&dmamux1 34 0x400 0x1>;
439                         dma-names = "rx", "tx"    439                         dma-names = "rx", "tx";
440                         st,syscfg-fmp = <&sysc    440                         st,syscfg-fmp = <&syscfg 0x4 0x1>;
441                         i2c-analog-filter;        441                         i2c-analog-filter;
442                         status = "disabled";      442                         status = "disabled";
443                 };                                443                 };
444                                                   444 
445                 i2c2: i2c@40013000 {              445                 i2c2: i2c@40013000 {
446                         compatible = "st,stm32    446                         compatible = "st,stm32mp13-i2c";
447                         reg = <0x40013000 0x40    447                         reg = <0x40013000 0x400>;
448                         interrupt-names = "eve    448                         interrupt-names = "event", "error";
449                         interrupts = <GIC_SPI     449                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
450                                      <GIC_SPI     450                                      <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
451                         clocks = <&rcc I2C2_K>    451                         clocks = <&rcc I2C2_K>;
452                         resets = <&rcc I2C2_R>    452                         resets = <&rcc I2C2_R>;
453                         #address-cells = <1>;     453                         #address-cells = <1>;
454                         #size-cells = <0>;        454                         #size-cells = <0>;
455                         dmas = <&dmamux1 35 0x    455                         dmas = <&dmamux1 35 0x400 0x1>,
456                                <&dmamux1 36 0x    456                                <&dmamux1 36 0x400 0x1>;
457                         dma-names = "rx", "tx"    457                         dma-names = "rx", "tx";
458                         st,syscfg-fmp = <&sysc    458                         st,syscfg-fmp = <&syscfg 0x4 0x2>;
459                         i2c-analog-filter;        459                         i2c-analog-filter;
460                         status = "disabled";      460                         status = "disabled";
461                 };                                461                 };
462                                                   462 
463                 uart7: serial@40018000 {          463                 uart7: serial@40018000 {
464                         compatible = "st,stm32    464                         compatible = "st,stm32h7-uart";
465                         reg = <0x40018000 0x40    465                         reg = <0x40018000 0x400>;
466                         interrupts-extended =     466                         interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>;
467                         clocks = <&rcc UART7_K    467                         clocks = <&rcc UART7_K>;
468                         resets = <&rcc UART7_R    468                         resets = <&rcc UART7_R>;
469                         wakeup-source;            469                         wakeup-source;
470                         dmas = <&dmamux1 79 0x    470                         dmas = <&dmamux1 79 0x400 0x5>,
471                                <&dmamux1 80 0x    471                                <&dmamux1 80 0x400 0x1>;
472                         dma-names = "rx", "tx"    472                         dma-names = "rx", "tx";
473                         status = "disabled";      473                         status = "disabled";
474                 };                                474                 };
475                                                   475 
476                 uart8: serial@40019000 {          476                 uart8: serial@40019000 {
477                         compatible = "st,stm32    477                         compatible = "st,stm32h7-uart";
478                         reg = <0x40019000 0x40    478                         reg = <0x40019000 0x400>;
479                         interrupts-extended =     479                         interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>;
480                         clocks = <&rcc UART8_K    480                         clocks = <&rcc UART8_K>;
481                         resets = <&rcc UART8_R    481                         resets = <&rcc UART8_R>;
482                         wakeup-source;            482                         wakeup-source;
483                         dmas = <&dmamux1 81 0x    483                         dmas = <&dmamux1 81 0x400 0x5>,
484                                <&dmamux1 82 0x    484                                <&dmamux1 82 0x400 0x1>;
485                         dma-names = "rx", "tx"    485                         dma-names = "rx", "tx";
486                         status = "disabled";      486                         status = "disabled";
487                 };                                487                 };
488                                                   488 
489                 timers1: timer@44000000 {         489                 timers1: timer@44000000 {
490                         #address-cells = <1>;     490                         #address-cells = <1>;
491                         #size-cells = <0>;        491                         #size-cells = <0>;
492                         compatible = "st,stm32    492                         compatible = "st,stm32-timers";
493                         reg = <0x44000000 0x40    493                         reg = <0x44000000 0x400>;
494                         interrupts = <GIC_SPI     494                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
495                                      <GIC_SPI     495                                      <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
496                                      <GIC_SPI     496                                      <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
497                                      <GIC_SPI     497                                      <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
498                         interrupt-names = "brk    498                         interrupt-names = "brk", "up", "trg-com", "cc";
499                         clocks = <&rcc TIM1_K>    499                         clocks = <&rcc TIM1_K>;
500                         clock-names = "int";      500                         clock-names = "int";
501                         dmas = <&dmamux1 11 0x    501                         dmas = <&dmamux1 11 0x400 0x1>,
502                                <&dmamux1 12 0x    502                                <&dmamux1 12 0x400 0x1>,
503                                <&dmamux1 13 0x    503                                <&dmamux1 13 0x400 0x1>,
504                                <&dmamux1 14 0x    504                                <&dmamux1 14 0x400 0x1>,
505                                <&dmamux1 15 0x    505                                <&dmamux1 15 0x400 0x1>,
506                                <&dmamux1 16 0x    506                                <&dmamux1 16 0x400 0x1>,
507                                <&dmamux1 17 0x    507                                <&dmamux1 17 0x400 0x1>;
508                         dma-names = "ch1", "ch    508                         dma-names = "ch1", "ch2", "ch3", "ch4",
509                                     "up", "tri    509                                     "up", "trig", "com";
510                         status = "disabled";      510                         status = "disabled";
511                                                   511 
512                         pwm {                     512                         pwm {
513                                 compatible = "    513                                 compatible = "st,stm32-pwm";
514                                 #pwm-cells = <    514                                 #pwm-cells = <3>;
515                                 status = "disa    515                                 status = "disabled";
516                         };                        516                         };
517                                                   517 
518                         timer@0 {                 518                         timer@0 {
519                                 compatible = "    519                                 compatible = "st,stm32h7-timer-trigger";
520                                 reg = <0>;        520                                 reg = <0>;
521                                 status = "disa    521                                 status = "disabled";
522                         };                        522                         };
523                                                   523 
524                         counter {                 524                         counter {
525                                 compatible = "    525                                 compatible = "st,stm32-timer-counter";
526                                 status = "disa    526                                 status = "disabled";
527                         };                        527                         };
528                 };                                528                 };
529                                                   529 
530                 timers8: timer@44001000 {         530                 timers8: timer@44001000 {
531                         #address-cells = <1>;     531                         #address-cells = <1>;
532                         #size-cells = <0>;        532                         #size-cells = <0>;
533                         compatible = "st,stm32    533                         compatible = "st,stm32-timers";
534                         reg = <0x44001000 0x40    534                         reg = <0x44001000 0x400>;
535                         interrupts = <GIC_SPI     535                         interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
536                                      <GIC_SPI     536                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
537                                      <GIC_SPI     537                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
538                                      <GIC_SPI     538                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
539                         interrupt-names = "brk    539                         interrupt-names = "brk", "up", "trg-com", "cc";
540                         clocks = <&rcc TIM8_K>    540                         clocks = <&rcc TIM8_K>;
541                         clock-names = "int";      541                         clock-names = "int";
542                         dmas = <&dmamux1 47 0x    542                         dmas = <&dmamux1 47 0x400 0x1>,
543                                <&dmamux1 48 0x    543                                <&dmamux1 48 0x400 0x1>,
544                                <&dmamux1 49 0x    544                                <&dmamux1 49 0x400 0x1>,
545                                <&dmamux1 50 0x    545                                <&dmamux1 50 0x400 0x1>,
546                                <&dmamux1 51 0x    546                                <&dmamux1 51 0x400 0x1>,
547                                <&dmamux1 52 0x    547                                <&dmamux1 52 0x400 0x1>,
548                                <&dmamux1 53 0x    548                                <&dmamux1 53 0x400 0x1>;
549                         dma-names = "ch1", "ch    549                         dma-names = "ch1", "ch2", "ch3", "ch4",
550                                     "up", "tri    550                                     "up", "trig", "com";
551                         status = "disabled";      551                         status = "disabled";
552                                                   552 
553                         pwm {                     553                         pwm {
554                                 compatible = "    554                                 compatible = "st,stm32-pwm";
555                                 #pwm-cells = <    555                                 #pwm-cells = <3>;
556                                 status = "disa    556                                 status = "disabled";
557                         };                        557                         };
558                                                   558 
559                         timer@7 {                 559                         timer@7 {
560                                 compatible = "    560                                 compatible = "st,stm32h7-timer-trigger";
561                                 reg = <7>;        561                                 reg = <7>;
562                                 status = "disa    562                                 status = "disabled";
563                         };                        563                         };
564                                                   564 
565                         counter {                 565                         counter {
566                                 compatible = "    566                                 compatible = "st,stm32-timer-counter";
567                                 status = "disa    567                                 status = "disabled";
568                         };                        568                         };
569                 };                                569                 };
570                                                   570 
571                 usart6: serial@44003000 {         571                 usart6: serial@44003000 {
572                         compatible = "st,stm32    572                         compatible = "st,stm32h7-uart";
573                         reg = <0x44003000 0x40    573                         reg = <0x44003000 0x400>;
574                         interrupts-extended =     574                         interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>;
575                         clocks = <&rcc USART6_    575                         clocks = <&rcc USART6_K>;
576                         resets = <&rcc USART6_    576                         resets = <&rcc USART6_R>;
577                         wakeup-source;            577                         wakeup-source;
578                         dmas = <&dmamux1 71 0x    578                         dmas = <&dmamux1 71 0x400 0x5>,
579                                <&dmamux1 72 0x    579                                <&dmamux1 72 0x400 0x1>;
580                         dma-names = "rx", "tx"    580                         dma-names = "rx", "tx";
581                         status = "disabled";      581                         status = "disabled";
582                 };                                582                 };
583                                                   583 
584                 i2s1: audio-controller@4400400    584                 i2s1: audio-controller@44004000 {
585                         compatible = "st,stm32    585                         compatible = "st,stm32h7-i2s";
586                         reg = <0x44004000 0x40    586                         reg = <0x44004000 0x400>;
587                         #sound-dai-cells = <0>    587                         #sound-dai-cells = <0>;
588                         interrupts = <GIC_SPI     588                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
589                         dmas = <&dmamux1 37 0x    589                         dmas = <&dmamux1 37 0x400 0x01>,
590                                <&dmamux1 38 0x    590                                <&dmamux1 38 0x400 0x01>;
591                         dma-names = "rx", "tx"    591                         dma-names = "rx", "tx";
592                         status = "disabled";      592                         status = "disabled";
593                 };                                593                 };
594                                                   594 
595                 spi1: spi@44004000 {              595                 spi1: spi@44004000 {
596                         compatible = "st,stm32    596                         compatible = "st,stm32h7-spi";
597                         reg = <0x44004000 0x40    597                         reg = <0x44004000 0x400>;
598                         interrupts = <GIC_SPI     598                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
599                         clocks = <&rcc SPI1_K>    599                         clocks = <&rcc SPI1_K>;
600                         resets = <&rcc SPI1_R>    600                         resets = <&rcc SPI1_R>;
601                         #address-cells = <1>;     601                         #address-cells = <1>;
602                         #size-cells = <0>;        602                         #size-cells = <0>;
603                         dmas = <&dmamux1 37 0x    603                         dmas = <&dmamux1 37 0x400 0x01>,
604                                <&dmamux1 38 0x    604                                <&dmamux1 38 0x400 0x01>;
605                         dma-names = "rx", "tx"    605                         dma-names = "rx", "tx";
606                         status = "disabled";      606                         status = "disabled";
607                 };                                607                 };
608                                                   608 
609                 sai1: sai@4400a000 {              609                 sai1: sai@4400a000 {
610                         compatible = "st,stm32    610                         compatible = "st,stm32h7-sai";
611                         reg = <0x4400a000 0x4>    611                         reg = <0x4400a000 0x4>, <0x4400a3f0 0x10>;
612                         ranges = <0 0x4400a000    612                         ranges = <0 0x4400a000 0x400>;
613                         #address-cells = <1>;     613                         #address-cells = <1>;
614                         #size-cells = <1>;        614                         #size-cells = <1>;
615                         interrupts = <GIC_SPI     615                         interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
616                         resets = <&rcc SAI1_R>    616                         resets = <&rcc SAI1_R>;
617                         status = "disabled";      617                         status = "disabled";
618                                                   618 
619                         sai1a: audio-controlle    619                         sai1a: audio-controller@4400a004 {
620                                 compatible = "    620                                 compatible = "st,stm32-sai-sub-a";
621                                 reg = <0x4 0x2    621                                 reg = <0x4 0x20>;
622                                 #sound-dai-cel    622                                 #sound-dai-cells = <0>;
623                                 clocks = <&rcc    623                                 clocks = <&rcc SAI1_K>;
624                                 clock-names =     624                                 clock-names = "sai_ck";
625                                 dmas = <&dmamu    625                                 dmas = <&dmamux1 87 0x400 0x01>;
626                                 status = "disa    626                                 status = "disabled";
627                         };                        627                         };
628                                                   628 
629                         sai1b: audio-controlle    629                         sai1b: audio-controller@4400a024 {
630                                 compatible = "    630                                 compatible = "st,stm32-sai-sub-b";
631                                 reg = <0x24 0x    631                                 reg = <0x24 0x20>;
632                                 #sound-dai-cel    632                                 #sound-dai-cells = <0>;
633                                 clocks = <&rcc    633                                 clocks = <&rcc SAI1_K>;
634                                 clock-names =     634                                 clock-names = "sai_ck";
635                                 dmas = <&dmamu    635                                 dmas = <&dmamux1 88 0x400 0x01>;
636                                 status = "disa    636                                 status = "disabled";
637                         };                        637                         };
638                 };                                638                 };
639                                                   639 
640                 sai2: sai@4400b000 {              640                 sai2: sai@4400b000 {
641                         compatible = "st,stm32    641                         compatible = "st,stm32h7-sai";
642                         reg = <0x4400b000 0x4>    642                         reg = <0x4400b000 0x4>, <0x4400b3f0 0x10>;
643                         ranges = <0 0x4400b000    643                         ranges = <0 0x4400b000 0x400>;
644                         #address-cells = <1>;     644                         #address-cells = <1>;
645                         #size-cells = <1>;        645                         #size-cells = <1>;
646                         interrupts = <GIC_SPI     646                         interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
647                         resets = <&rcc SAI2_R>    647                         resets = <&rcc SAI2_R>;
648                         status = "disabled";      648                         status = "disabled";
649                                                   649 
650                         sai2a: audio-controlle    650                         sai2a: audio-controller@4400b004 {
651                                 compatible = "    651                                 compatible = "st,stm32-sai-sub-a";
652                                 reg = <0x4 0x2    652                                 reg = <0x4 0x20>;
653                                 #sound-dai-cel    653                                 #sound-dai-cells = <0>;
654                                 clocks = <&rcc    654                                 clocks = <&rcc SAI2_K>;
655                                 clock-names =     655                                 clock-names = "sai_ck";
656                                 dmas = <&dmamu    656                                 dmas = <&dmamux1 89 0x400 0x01>;
657                                 status = "disa    657                                 status = "disabled";
658                         };                        658                         };
659                                                   659 
660                         sai2b: audio-controlle    660                         sai2b: audio-controller@4400b024 {
661                                 compatible = "    661                                 compatible = "st,stm32-sai-sub-b";
662                                 reg = <0x24 0x    662                                 reg = <0x24 0x20>;
663                                 #sound-dai-cel    663                                 #sound-dai-cells = <0>;
664                                 clocks = <&rcc    664                                 clocks = <&rcc SAI2_K>;
665                                 clock-names =     665                                 clock-names = "sai_ck";
666                                 dmas = <&dmamu    666                                 dmas = <&dmamux1 90 0x400 0x01>;
667                                 status = "disa    667                                 status = "disabled";
668                         };                        668                         };
669                 };                                669                 };
670                                                   670 
671                 dfsdm: dfsdm@4400d000 {           671                 dfsdm: dfsdm@4400d000 {
672                         compatible = "st,stm32    672                         compatible = "st,stm32mp1-dfsdm";
673                         reg = <0x4400d000 0x80    673                         reg = <0x4400d000 0x800>;
674                         clocks = <&rcc DFSDM_K    674                         clocks = <&rcc DFSDM_K>;
675                         clock-names = "dfsdm";    675                         clock-names = "dfsdm";
676                         #address-cells = <1>;     676                         #address-cells = <1>;
677                         #size-cells = <0>;        677                         #size-cells = <0>;
678                         status = "disabled";      678                         status = "disabled";
679                                                   679 
680                         dfsdm0: filter@0 {        680                         dfsdm0: filter@0 {
681                                 compatible = "    681                                 compatible = "st,stm32-dfsdm-adc";
682                                 reg = <0>;        682                                 reg = <0>;
683                                 #io-channel-ce    683                                 #io-channel-cells = <1>;
684                                 interrupts = <    684                                 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
685                                 dmas = <&dmamu    685                                 dmas = <&dmamux1 101 0x400 0x01>;
686                                 dma-names = "r    686                                 dma-names = "rx";
687                                 status = "disa    687                                 status = "disabled";
688                         };                        688                         };
689                                                   689 
690                         dfsdm1: filter@1 {        690                         dfsdm1: filter@1 {
691                                 compatible = "    691                                 compatible = "st,stm32-dfsdm-adc";
692                                 reg = <1>;        692                                 reg = <1>;
693                                 #io-channel-ce    693                                 #io-channel-cells = <1>;
694                                 interrupts = <    694                                 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
695                                 dmas = <&dmamu    695                                 dmas = <&dmamux1 102 0x400 0x01>;
696                                 dma-names = "r    696                                 dma-names = "rx";
697                                 status = "disa    697                                 status = "disabled";
698                         };                        698                         };
699                 };                                699                 };
700                                                   700 
701                 dma1: dma-controller@48000000     701                 dma1: dma-controller@48000000 {
702                         compatible = "st,stm32    702                         compatible = "st,stm32-dma";
703                         reg = <0x48000000 0x40    703                         reg = <0x48000000 0x400>;
704                         interrupts = <GIC_SPI     704                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
705                                      <GIC_SPI     705                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
706                                      <GIC_SPI     706                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
707                                      <GIC_SPI     707                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
708                                      <GIC_SPI     708                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
709                                      <GIC_SPI     709                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
710                                      <GIC_SPI     710                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
711                                      <GIC_SPI     711                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
712                         clocks = <&rcc DMA1>;     712                         clocks = <&rcc DMA1>;
713                         resets = <&rcc DMA1_R>    713                         resets = <&rcc DMA1_R>;
714                         #dma-cells = <4>;         714                         #dma-cells = <4>;
715                         st,mem2mem;               715                         st,mem2mem;
716                         dma-requests = <8>;       716                         dma-requests = <8>;
717                 };                                717                 };
718                                                   718 
719                 dma2: dma-controller@48001000     719                 dma2: dma-controller@48001000 {
720                         compatible = "st,stm32    720                         compatible = "st,stm32-dma";
721                         reg = <0x48001000 0x40    721                         reg = <0x48001000 0x400>;
722                         interrupts = <GIC_SPI     722                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
723                                      <GIC_SPI     723                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
724                                      <GIC_SPI     724                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
725                                      <GIC_SPI     725                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
726                                      <GIC_SPI     726                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
727                                      <GIC_SPI     727                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
728                                      <GIC_SPI     728                                      <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
729                                      <GIC_SPI     729                                      <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
730                         clocks = <&rcc DMA2>;     730                         clocks = <&rcc DMA2>;
731                         resets = <&rcc DMA2_R>    731                         resets = <&rcc DMA2_R>;
732                         #dma-cells = <4>;         732                         #dma-cells = <4>;
733                         st,mem2mem;               733                         st,mem2mem;
734                         dma-requests = <8>;       734                         dma-requests = <8>;
735                 };                                735                 };
736                                                   736 
737                 dmamux1: dma-router@48002000 {    737                 dmamux1: dma-router@48002000 {
738                         compatible = "st,stm32    738                         compatible = "st,stm32h7-dmamux";
739                         reg = <0x48002000 0x40    739                         reg = <0x48002000 0x40>;
740                         clocks = <&rcc DMAMUX1    740                         clocks = <&rcc DMAMUX1>;
741                         resets = <&rcc DMAMUX1    741                         resets = <&rcc DMAMUX1_R>;
742                         #dma-cells = <3>;         742                         #dma-cells = <3>;
743                         dma-masters = <&dma1 &    743                         dma-masters = <&dma1 &dma2>;
744                         dma-requests = <128>;     744                         dma-requests = <128>;
745                         dma-channels = <16>;      745                         dma-channels = <16>;
746                 };                                746                 };
747                                                   747 
748                 rcc: rcc@50000000 {               748                 rcc: rcc@50000000 {
749                         compatible = "st,stm32    749                         compatible = "st,stm32mp13-rcc", "syscon";
750                         reg = <0x50000000 0x10    750                         reg = <0x50000000 0x1000>;
751                         #clock-cells = <1>;       751                         #clock-cells = <1>;
752                         #reset-cells = <1>;       752                         #reset-cells = <1>;
753                         clock-names = "hse", "    753                         clock-names = "hse", "hsi", "csi", "lse", "lsi";
754                         clocks = <&scmi_clk CK    754                         clocks = <&scmi_clk CK_SCMI_HSE>,
755                                  <&scmi_clk CK    755                                  <&scmi_clk CK_SCMI_HSI>,
756                                  <&scmi_clk CK    756                                  <&scmi_clk CK_SCMI_CSI>,
757                                  <&scmi_clk CK    757                                  <&scmi_clk CK_SCMI_LSE>,
758                                  <&scmi_clk CK    758                                  <&scmi_clk CK_SCMI_LSI>;
759                 };                                759                 };
760                                                   760 
761                 pwr_regulators: pwr@50001000 {    761                 pwr_regulators: pwr@50001000 {
762                         compatible = "st,stm32    762                         compatible = "st,stm32mp1,pwr-reg";
763                         reg = <0x50001000 0x10    763                         reg = <0x50001000 0x10>;
764                         status = "disabled";      764                         status = "disabled";
765                                                   765 
766                         reg11: reg11 {            766                         reg11: reg11 {
767                                 regulator-name    767                                 regulator-name = "reg11";
768                                 regulator-min-    768                                 regulator-min-microvolt = <1100000>;
769                                 regulator-max-    769                                 regulator-max-microvolt = <1100000>;
770                         };                        770                         };
771                                                   771 
772                         reg18: reg18 {            772                         reg18: reg18 {
773                                 regulator-name    773                                 regulator-name = "reg18";
774                                 regulator-min-    774                                 regulator-min-microvolt = <1800000>;
775                                 regulator-max-    775                                 regulator-max-microvolt = <1800000>;
776                         };                        776                         };
777                                                   777 
778                         usb33: usb33 {            778                         usb33: usb33 {
779                                 regulator-name    779                                 regulator-name = "usb33";
780                                 regulator-min-    780                                 regulator-min-microvolt = <3300000>;
781                                 regulator-max-    781                                 regulator-max-microvolt = <3300000>;
782                         };                        782                         };
783                 };                                783                 };
784                                                   784 
785                 exti: interrupt-controller@500    785                 exti: interrupt-controller@5000d000 {
786                         compatible = "st,stm32    786                         compatible = "st,stm32mp1-exti", "syscon";
787                         interrupt-controller;     787                         interrupt-controller;
788                         #interrupt-cells = <2>    788                         #interrupt-cells = <2>;
789                         reg = <0x5000d000 0x40    789                         reg = <0x5000d000 0x400>;
790                         interrupts-extended =     790                         interrupts-extended =
791                                 <&intc GIC_SPI    791                                 <&intc GIC_SPI 6   IRQ_TYPE_LEVEL_HIGH>,        /* EXTI_0 */
792                                 <&intc GIC_SPI    792                                 <&intc GIC_SPI 7   IRQ_TYPE_LEVEL_HIGH>,
793                                 <&intc GIC_SPI    793                                 <&intc GIC_SPI 8   IRQ_TYPE_LEVEL_HIGH>,
794                                 <&intc GIC_SPI    794                                 <&intc GIC_SPI 9   IRQ_TYPE_LEVEL_HIGH>,
795                                 <&intc GIC_SPI    795                                 <&intc GIC_SPI 10  IRQ_TYPE_LEVEL_HIGH>,
796                                 <&intc GIC_SPI    796                                 <&intc GIC_SPI 24  IRQ_TYPE_LEVEL_HIGH>,
797                                 <&intc GIC_SPI    797                                 <&intc GIC_SPI 65  IRQ_TYPE_LEVEL_HIGH>,
798                                 <&intc GIC_SPI    798                                 <&intc GIC_SPI 66  IRQ_TYPE_LEVEL_HIGH>,
799                                 <&intc GIC_SPI    799                                 <&intc GIC_SPI 67  IRQ_TYPE_LEVEL_HIGH>,
800                                 <&intc GIC_SPI    800                                 <&intc GIC_SPI 68  IRQ_TYPE_LEVEL_HIGH>,
801                                 <&intc GIC_SPI    801                                 <&intc GIC_SPI 41  IRQ_TYPE_LEVEL_HIGH>,        /* EXTI_10 */
802                                 <&intc GIC_SPI    802                                 <&intc GIC_SPI 43  IRQ_TYPE_LEVEL_HIGH>,
803                                 <&intc GIC_SPI    803                                 <&intc GIC_SPI 77  IRQ_TYPE_LEVEL_HIGH>,
804                                 <&intc GIC_SPI    804                                 <&intc GIC_SPI 78  IRQ_TYPE_LEVEL_HIGH>,
805                                 <&intc GIC_SPI    805                                 <&intc GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
806                                 <&intc GIC_SPI    806                                 <&intc GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
807                                 <&intc GIC_SPI    807                                 <&intc GIC_SPI 1   IRQ_TYPE_LEVEL_HIGH>,
808                                 <0>,              808                                 <0>,
809                                 <0>,              809                                 <0>,
810                                 <&intc GIC_SPI    810                                 <&intc GIC_SPI 3   IRQ_TYPE_LEVEL_HIGH>,
811                                 <0>,              811                                 <0>,                                            /* EXTI_20 */
812                                 <&intc GIC_SPI    812                                 <&intc GIC_SPI 32  IRQ_TYPE_LEVEL_HIGH>,
813                                 <&intc GIC_SPI    813                                 <&intc GIC_SPI 34  IRQ_TYPE_LEVEL_HIGH>,
814                                 <&intc GIC_SPI    814                                 <&intc GIC_SPI 73  IRQ_TYPE_LEVEL_HIGH>,
815                                 <&intc GIC_SPI    815                                 <&intc GIC_SPI 93  IRQ_TYPE_LEVEL_HIGH>,
816                                 <&intc GIC_SPI    816                                 <&intc GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
817                                 <&intc GIC_SPI    817                                 <&intc GIC_SPI 38  IRQ_TYPE_LEVEL_HIGH>,
818                                 <&intc GIC_SPI    818                                 <&intc GIC_SPI 39  IRQ_TYPE_LEVEL_HIGH>,
819                                 <&intc GIC_SPI    819                                 <&intc GIC_SPI 40  IRQ_TYPE_LEVEL_HIGH>,
820                                 <&intc GIC_SPI    820                                 <&intc GIC_SPI 72  IRQ_TYPE_LEVEL_HIGH>,
821                                 <&intc GIC_SPI    821                                 <&intc GIC_SPI 53  IRQ_TYPE_LEVEL_HIGH>,        /* EXTI_30 */
822                                 <&intc GIC_SPI    822                                 <&intc GIC_SPI 54  IRQ_TYPE_LEVEL_HIGH>,
823                                 <&intc GIC_SPI    823                                 <&intc GIC_SPI 83  IRQ_TYPE_LEVEL_HIGH>,
824                                 <&intc GIC_SPI    824                                 <&intc GIC_SPI 84  IRQ_TYPE_LEVEL_HIGH>,
825                                 <0>,              825                                 <0>,
826                                 <0>,              826                                 <0>,
827                                 <0>,              827                                 <0>,
828                                 <0>,              828                                 <0>,
829                                 <0>,              829                                 <0>,
830                                 <0>,              830                                 <0>,
831                                 <0>,              831                                 <0>,                                            /* EXTI_40 */
832                                 <0>,              832                                 <0>,
833                                 <0>,              833                                 <0>,
834                                 <0>,              834                                 <0>,
835                                 <&intc GIC_SPI    835                                 <&intc GIC_SPI 96  IRQ_TYPE_LEVEL_HIGH>,
836                                 <0>,              836                                 <0>,
837                                 <0>,              837                                 <0>,
838                                 <&intc GIC_SPI    838                                 <&intc GIC_SPI 92  IRQ_TYPE_LEVEL_HIGH>,
839                                 <&intc GIC_SPI    839                                 <&intc GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
840                                 <0>,              840                                 <0>,
841                                 <&intc GIC_SPI    841                                 <&intc GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,        /* EXTI_50 */
842                                 <0>,              842                                 <0>,
843                                 <&intc GIC_SPI    843                                 <&intc GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
844                                 <&intc GIC_SPI    844                                 <&intc GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
845                                 <0>,              845                                 <0>,
846                                 <0>,              846                                 <0>,
847                                 <0>,              847                                 <0>,
848                                 <0>,              848                                 <0>,
849                                 <0>,              849                                 <0>,
850                                 <0>,              850                                 <0>,
851                                 <0>,              851                                 <0>,                                            /* EXTI_60 */
852                                 <0>,              852                                 <0>,
853                                 <0>,              853                                 <0>,
854                                 <0>,              854                                 <0>,
855                                 <0>,              855                                 <0>,
856                                 <0>,              856                                 <0>,
857                                 <0>,              857                                 <0>,
858                                 <0>,              858                                 <0>,
859                                 <&intc GIC_SPI    859                                 <&intc GIC_SPI 63  IRQ_TYPE_LEVEL_HIGH>,
860                                 <0>,              860                                 <0>,
861                                 <&intc GIC_SPI    861                                 <&intc GIC_SPI 98  IRQ_TYPE_LEVEL_HIGH>;        /* EXTI_70 */
862                 };                                862                 };
863                                                   863 
864                 syscfg: syscon@50020000 {         864                 syscfg: syscon@50020000 {
865                         compatible = "st,stm32    865                         compatible = "st,stm32mp157-syscfg", "syscon";
866                         reg = <0x50020000 0x40    866                         reg = <0x50020000 0x400>;
867                         clocks = <&rcc SYSCFG>    867                         clocks = <&rcc SYSCFG>;
868                 };                                868                 };
869                                                   869 
870                 lptimer4: timer@50023000 {        870                 lptimer4: timer@50023000 {
871                         compatible = "st,stm32    871                         compatible = "st,stm32-lptimer";
872                         reg = <0x50023000 0x40    872                         reg = <0x50023000 0x400>;
873                         interrupts-extended =     873                         interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
874                         clocks = <&rcc LPTIM4_    874                         clocks = <&rcc LPTIM4_K>;
875                         clock-names = "mux";      875                         clock-names = "mux";
876                         wakeup-source;            876                         wakeup-source;
877                         status = "disabled";      877                         status = "disabled";
878                                                   878 
879                         pwm {                     879                         pwm {
880                                 compatible = "    880                                 compatible = "st,stm32-pwm-lp";
881                                 #pwm-cells = <    881                                 #pwm-cells = <3>;
882                                 status = "disa    882                                 status = "disabled";
883                         };                        883                         };
884                                                   884 
885                         timer {                   885                         timer {
886                                 compatible = "    886                                 compatible = "st,stm32-lptimer-timer";
887                                 status = "disa    887                                 status = "disabled";
888                         };                        888                         };
889                 };                                889                 };
890                                                   890 
891                 lptimer5: timer@50024000 {        891                 lptimer5: timer@50024000 {
892                         compatible = "st,stm32    892                         compatible = "st,stm32-lptimer";
893                         reg = <0x50024000 0x40    893                         reg = <0x50024000 0x400>;
894                         interrupts-extended =     894                         interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
895                         clocks = <&rcc LPTIM5_    895                         clocks = <&rcc LPTIM5_K>;
896                         clock-names = "mux";      896                         clock-names = "mux";
897                         wakeup-source;            897                         wakeup-source;
898                         status = "disabled";      898                         status = "disabled";
899                                                   899 
900                         pwm {                     900                         pwm {
901                                 compatible = "    901                                 compatible = "st,stm32-pwm-lp";
902                                 #pwm-cells = <    902                                 #pwm-cells = <3>;
903                                 status = "disa    903                                 status = "disabled";
904                         };                        904                         };
905                                                   905 
906                         timer {                   906                         timer {
907                                 compatible = "    907                                 compatible = "st,stm32-lptimer-timer";
908                                 status = "disa    908                                 status = "disabled";
909                         };                        909                         };
910                 };                                910                 };
911                                                   911 
912                 mdma: dma-controller@58000000     912                 mdma: dma-controller@58000000 {
913                         compatible = "st,stm32    913                         compatible = "st,stm32h7-mdma";
914                         reg = <0x58000000 0x10    914                         reg = <0x58000000 0x1000>;
915                         interrupts = <GIC_SPI     915                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
916                         clocks = <&rcc MDMA>;     916                         clocks = <&rcc MDMA>;
917                         #dma-cells = <5>;         917                         #dma-cells = <5>;
918                         dma-channels = <32>;      918                         dma-channels = <32>;
919                         dma-requests = <48>;      919                         dma-requests = <48>;
920                 };                                920                 };
921                                                   921 
922                 crc1: crc@58009000 {              922                 crc1: crc@58009000 {
923                         compatible = "st,stm32    923                         compatible = "st,stm32f7-crc";
924                         reg = <0x58009000 0x40    924                         reg = <0x58009000 0x400>;
925                         clocks = <&rcc CRC1>;     925                         clocks = <&rcc CRC1>;
926                         status = "disabled";      926                         status = "disabled";
927                 };                                927                 };
928                                                   928 
929                 usbh_ohci: usb@5800c000 {         929                 usbh_ohci: usb@5800c000 {
930                         compatible = "generic-    930                         compatible = "generic-ohci";
931                         reg = <0x5800c000 0x10    931                         reg = <0x5800c000 0x1000>;
932                         clocks = <&usbphyc>, <    932                         clocks = <&usbphyc>, <&rcc USBH>;
933                         resets = <&rcc USBH_R>    933                         resets = <&rcc USBH_R>;
934                         interrupts = <GIC_SPI     934                         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
935                         status = "disabled";      935                         status = "disabled";
936                 };                                936                 };
937                                                   937 
938                 usbh_ehci: usb@5800d000 {         938                 usbh_ehci: usb@5800d000 {
939                         compatible = "generic-    939                         compatible = "generic-ehci";
940                         reg = <0x5800d000 0x10    940                         reg = <0x5800d000 0x1000>;
941                         clocks = <&usbphyc>, <    941                         clocks = <&usbphyc>, <&rcc USBH>;
942                         resets = <&rcc USBH_R>    942                         resets = <&rcc USBH_R>;
943                         interrupts = <GIC_SPI     943                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
944                         companion = <&usbh_ohc    944                         companion = <&usbh_ohci>;
945                         status = "disabled";      945                         status = "disabled";
946                 };                                946                 };
947                                                   947 
948                 iwdg2: watchdog@5a002000 {        948                 iwdg2: watchdog@5a002000 {
949                         compatible = "st,stm32    949                         compatible = "st,stm32mp1-iwdg";
950                         reg = <0x5a002000 0x40    950                         reg = <0x5a002000 0x400>;
951                         clocks = <&rcc IWDG2>,    951                         clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
952                         clock-names = "pclk",     952                         clock-names = "pclk", "lsi";
953                         status = "disabled";      953                         status = "disabled";
954                 };                                954                 };
955                                                   955 
956                 rtc: rtc@5c004000 {               956                 rtc: rtc@5c004000 {
957                         compatible = "st,stm32    957                         compatible = "st,stm32mp1-rtc";
958                         reg = <0x5c004000 0x40    958                         reg = <0x5c004000 0x400>;
959                         interrupts-extended =     959                         interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;
960                         clocks = <&scmi_clk CK    960                         clocks = <&scmi_clk CK_SCMI_RTCAPB>,
961                                  <&scmi_clk CK    961                                  <&scmi_clk CK_SCMI_RTC>;
962                         clock-names = "pclk",     962                         clock-names = "pclk", "rtc_ck";
963                         status = "disabled";      963                         status = "disabled";
964                 };                                964                 };
965                                                   965 
966                 bsec: efuse@5c005000 {            966                 bsec: efuse@5c005000 {
967                         compatible = "st,stm32    967                         compatible = "st,stm32mp13-bsec";
968                         reg = <0x5c005000 0x40    968                         reg = <0x5c005000 0x400>;
969                         #address-cells = <1>;     969                         #address-cells = <1>;
970                         #size-cells = <1>;        970                         #size-cells = <1>;
971                                                   971 
972                         part_number_otp: part_    972                         part_number_otp: part_number_otp@4 {
973                                 reg = <0x4 0x2    973                                 reg = <0x4 0x2>;
974                                 bits = <0 12>;    974                                 bits = <0 12>;
975                         };                        975                         };
976                         ts_cal1: calib@5c {       976                         ts_cal1: calib@5c {
977                                 reg = <0x5c 0x    977                                 reg = <0x5c 0x2>;
978                         };                        978                         };
979                         ts_cal2: calib@5e {       979                         ts_cal2: calib@5e {
980                                 reg = <0x5e 0x    980                                 reg = <0x5e 0x2>;
981                         };                        981                         };
982                         ethernet_mac1_address:    982                         ethernet_mac1_address: mac1@e4 {
983                                 reg = <0xe4 0x    983                                 reg = <0xe4 0x6>;
984                         };                        984                         };
985                         ethernet_mac2_address:    985                         ethernet_mac2_address: mac2@ea {
986                                 reg = <0xea 0x    986                                 reg = <0xea 0x6>;
987                         };                        987                         };
988                 };                                988                 };
989                                                   989 
990                 etzpc: bus@5c007000 {             990                 etzpc: bus@5c007000 {
991                         compatible = "st,stm32    991                         compatible = "st,stm32-etzpc", "simple-bus";
992                         reg = <0x5c007000 0x40    992                         reg = <0x5c007000 0x400>;
993                         #address-cells = <1>;     993                         #address-cells = <1>;
994                         #size-cells = <1>;        994                         #size-cells = <1>;
995                         #access-controller-cel    995                         #access-controller-cells = <1>;
996                         ranges;                   996                         ranges;
997                                                   997 
998                         adc_2: adc@48004000 {     998                         adc_2: adc@48004000 {
999                                 compatible = "    999                                 compatible = "st,stm32mp13-adc-core";
1000                                 reg = <0x4800    1000                                 reg = <0x48004000 0x400>;
1001                                 interrupts =     1001                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
1002                                 clocks = <&rc    1002                                 clocks = <&rcc ADC2>, <&rcc ADC2_K>;
1003                                 clock-names =    1003                                 clock-names = "bus", "adc";
1004                                 interrupt-con    1004                                 interrupt-controller;
1005                                 #interrupt-ce    1005                                 #interrupt-cells = <1>;
1006                                 #address-cell    1006                                 #address-cells = <1>;
1007                                 #size-cells =    1007                                 #size-cells = <0>;
1008                                 access-contro    1008                                 access-controllers = <&etzpc 33>;
1009                                 status = "dis    1009                                 status = "disabled";
1010                                                  1010 
1011                                 adc2: adc@0 {    1011                                 adc2: adc@0 {
1012                                         compa    1012                                         compatible = "st,stm32mp13-adc";
1013                                         #io-c    1013                                         #io-channel-cells = <1>;
1014                                         #addr    1014                                         #address-cells = <1>;
1015                                         #size    1015                                         #size-cells = <0>;
1016                                         reg =    1016                                         reg = <0x0>;
1017                                         inter    1017                                         interrupt-parent = <&adc_2>;
1018                                         inter    1018                                         interrupts = <0>;
1019                                         dmas     1019                                         dmas = <&dmamux1 10 0x400 0x80000001>;
1020                                         dma-n    1020                                         dma-names = "rx";
1021                                         statu    1021                                         status = "disabled";
1022                                                  1022 
1023                                         chann    1023                                         channel@13 {
1024                                                  1024                                                 reg = <13>;
1025                                                  1025                                                 label = "vrefint";
1026                                         };       1026                                         };
1027                                         chann    1027                                         channel@14 {
1028                                                  1028                                                 reg = <14>;
1029                                                  1029                                                 label = "vddcore";
1030                                         };       1030                                         };
1031                                         chann    1031                                         channel@16 {
1032                                                  1032                                                 reg = <16>;
1033                                                  1033                                                 label = "vddcpu";
1034                                         };       1034                                         };
1035                                         chann    1035                                         channel@17 {
1036                                                  1036                                                 reg = <17>;
1037                                                  1037                                                 label = "vddq_ddr";
1038                                         };       1038                                         };
1039                                 };               1039                                 };
1040                         };                       1040                         };
1041                                                  1041 
1042                         usbotg_hs: usb@490000    1042                         usbotg_hs: usb@49000000 {
1043                                 compatible =     1043                                 compatible = "st,stm32mp15-hsotg", "snps,dwc2";
1044                                 reg = <0x4900    1044                                 reg = <0x49000000 0x40000>;
1045                                 clocks = <&rc    1045                                 clocks = <&rcc USBO_K>;
1046                                 clock-names =    1046                                 clock-names = "otg";
1047                                 resets = <&rc    1047                                 resets = <&rcc USBO_R>;
1048                                 reset-names =    1048                                 reset-names = "dwc2";
1049                                 interrupts =     1049                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
1050                                 g-rx-fifo-siz    1050                                 g-rx-fifo-size = <512>;
1051                                 g-np-tx-fifo-    1051                                 g-np-tx-fifo-size = <32>;
1052                                 g-tx-fifo-siz    1052                                 g-tx-fifo-size = <256 16 16 16 16 16 16 16>;
1053                                 dr_mode = "ot    1053                                 dr_mode = "otg";
1054                                 otg-rev = <0x    1054                                 otg-rev = <0x200>;
1055                                 usb33d-supply    1055                                 usb33d-supply = <&scmi_usb33>;
1056                                 access-contro    1056                                 access-controllers = <&etzpc 34>;
1057                                 status = "dis    1057                                 status = "disabled";
1058                         };                       1058                         };
1059                                                  1059 
1060                         usart1: serial@4c0000    1060                         usart1: serial@4c000000 {
1061                                 compatible =     1061                                 compatible = "st,stm32h7-uart";
1062                                 reg = <0x4c00    1062                                 reg = <0x4c000000 0x400>;
1063                                 interrupts-ex    1063                                 interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
1064                                 clocks = <&rc    1064                                 clocks = <&rcc USART1_K>;
1065                                 resets = <&rc    1065                                 resets = <&rcc USART1_R>;
1066                                 wakeup-source    1066                                 wakeup-source;
1067                                 dmas = <&dmam    1067                                 dmas = <&dmamux1 41 0x400 0x5>,
1068                                 <&dmamux1 42     1068                                 <&dmamux1 42 0x400 0x1>;
1069                                 dma-names = "    1069                                 dma-names = "rx", "tx";
1070                                 access-contro    1070                                 access-controllers = <&etzpc 16>;
1071                                 status = "dis    1071                                 status = "disabled";
1072                         };                       1072                         };
1073                                                  1073 
1074                         usart2: serial@4c0010    1074                         usart2: serial@4c001000 {
1075                                 compatible =     1075                                 compatible = "st,stm32h7-uart";
1076                                 reg = <0x4c00    1076                                 reg = <0x4c001000 0x400>;
1077                                 interrupts-ex    1077                                 interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
1078                                 clocks = <&rc    1078                                 clocks = <&rcc USART2_K>;
1079                                 resets = <&rc    1079                                 resets = <&rcc USART2_R>;
1080                                 wakeup-source    1080                                 wakeup-source;
1081                                 dmas = <&dmam    1081                                 dmas = <&dmamux1 43 0x400 0x5>,
1082                                 <&dmamux1 44     1082                                 <&dmamux1 44 0x400 0x1>;
1083                                 dma-names = "    1083                                 dma-names = "rx", "tx";
1084                                 access-contro    1084                                 access-controllers = <&etzpc 17>;
1085                                 status = "dis    1085                                 status = "disabled";
1086                         };                       1086                         };
1087                                                  1087 
1088                         i2s4: audio-controlle    1088                         i2s4: audio-controller@4c002000 {
1089                                 compatible =     1089                                 compatible = "st,stm32h7-i2s";
1090                                 reg = <0x4c00    1090                                 reg = <0x4c002000 0x400>;
1091                                 #sound-dai-ce    1091                                 #sound-dai-cells = <0>;
1092                                 interrupts =     1092                                 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
1093                                 dmas = <&dmam    1093                                 dmas = <&dmamux1 83 0x400 0x01>,
1094                                 <&dmamux1 84     1094                                 <&dmamux1 84 0x400 0x01>;
1095                                 dma-names = "    1095                                 dma-names = "rx", "tx";
1096                                 access-contro    1096                                 access-controllers = <&etzpc 13>;
1097                                 status = "dis    1097                                 status = "disabled";
1098                         };                       1098                         };
1099                                                  1099 
1100                         spi4: spi@4c002000 {     1100                         spi4: spi@4c002000 {
1101                                 compatible =     1101                                 compatible = "st,stm32h7-spi";
1102                                 reg = <0x4c00    1102                                 reg = <0x4c002000 0x400>;
1103                                 interrupts =     1103                                 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
1104                                 clocks = <&rc    1104                                 clocks = <&rcc SPI4_K>;
1105                                 resets = <&rc    1105                                 resets = <&rcc SPI4_R>;
1106                                 #address-cell    1106                                 #address-cells = <1>;
1107                                 #size-cells =    1107                                 #size-cells = <0>;
1108                                 dmas = <&dmam    1108                                 dmas = <&dmamux1 83 0x400 0x01>,
1109                                        <&dmam    1109                                        <&dmamux1 84 0x400 0x01>;
1110                                 dma-names = "    1110                                 dma-names = "rx", "tx";
1111                                 access-contro    1111                                 access-controllers = <&etzpc 18>;
1112                                 status = "dis    1112                                 status = "disabled";
1113                         };                       1113                         };
1114                                                  1114 
1115                         spi5: spi@4c003000 {     1115                         spi5: spi@4c003000 {
1116                                 compatible =     1116                                 compatible = "st,stm32h7-spi";
1117                                 reg = <0x4c00    1117                                 reg = <0x4c003000 0x400>;
1118                                 interrupts =     1118                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
1119                                 clocks = <&rc    1119                                 clocks = <&rcc SPI5_K>;
1120                                 resets = <&rc    1120                                 resets = <&rcc SPI5_R>;
1121                                 #address-cell    1121                                 #address-cells = <1>;
1122                                 #size-cells =    1122                                 #size-cells = <0>;
1123                                 dmas = <&dmam    1123                                 dmas = <&dmamux1 85 0x400 0x01>,
1124                                        <&dmam    1124                                        <&dmamux1 86 0x400 0x01>;
1125                                 dma-names = "    1125                                 dma-names = "rx", "tx";
1126                                 access-contro    1126                                 access-controllers = <&etzpc 19>;
1127                                 status = "dis    1127                                 status = "disabled";
1128                         };                       1128                         };
1129                                                  1129 
1130                         i2c3: i2c@4c004000 {     1130                         i2c3: i2c@4c004000 {
1131                                 compatible =     1131                                 compatible = "st,stm32mp13-i2c";
1132                                 reg = <0x4c00    1132                                 reg = <0x4c004000 0x400>;
1133                                 interrupt-nam    1133                                 interrupt-names = "event", "error";
1134                                 interrupts =     1134                                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
1135                                                  1135                                              <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1136                                 clocks = <&rc    1136                                 clocks = <&rcc I2C3_K>;
1137                                 resets = <&rc    1137                                 resets = <&rcc I2C3_R>;
1138                                 #address-cell    1138                                 #address-cells = <1>;
1139                                 #size-cells =    1139                                 #size-cells = <0>;
1140                                 dmas = <&dmam    1140                                 dmas = <&dmamux1 73 0x400 0x1>,
1141                                        <&dmam    1141                                        <&dmamux1 74 0x400 0x1>;
1142                                 dma-names = "    1142                                 dma-names = "rx", "tx";
1143                                 st,syscfg-fmp    1143                                 st,syscfg-fmp = <&syscfg 0x4 0x4>;
1144                                 i2c-analog-fi    1144                                 i2c-analog-filter;
1145                                 access-contro    1145                                 access-controllers = <&etzpc 20>;
1146                                 status = "dis    1146                                 status = "disabled";
1147                         };                       1147                         };
1148                                                  1148 
1149                         i2c4: i2c@4c005000 {     1149                         i2c4: i2c@4c005000 {
1150                                 compatible =     1150                                 compatible = "st,stm32mp13-i2c";
1151                                 reg = <0x4c00    1151                                 reg = <0x4c005000 0x400>;
1152                                 interrupt-nam    1152                                 interrupt-names = "event", "error";
1153                                 interrupts =     1153                                 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
1154                                                  1154                                              <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
1155                                 clocks = <&rc    1155                                 clocks = <&rcc I2C4_K>;
1156                                 resets = <&rc    1156                                 resets = <&rcc I2C4_R>;
1157                                 #address-cell    1157                                 #address-cells = <1>;
1158                                 #size-cells =    1158                                 #size-cells = <0>;
1159                                 dmas = <&dmam    1159                                 dmas = <&dmamux1 75 0x400 0x1>,
1160                                        <&dmam    1160                                        <&dmamux1 76 0x400 0x1>;
1161                                 dma-names = "    1161                                 dma-names = "rx", "tx";
1162                                 st,syscfg-fmp    1162                                 st,syscfg-fmp = <&syscfg 0x4 0x8>;
1163                                 i2c-analog-fi    1163                                 i2c-analog-filter;
1164                                 access-contro    1164                                 access-controllers = <&etzpc 21>;
1165                                 status = "dis    1165                                 status = "disabled";
1166                         };                       1166                         };
1167                                                  1167 
1168                         i2c5: i2c@4c006000 {     1168                         i2c5: i2c@4c006000 {
1169                                 compatible =     1169                                 compatible = "st,stm32mp13-i2c";
1170                                 reg = <0x4c00    1170                                 reg = <0x4c006000 0x400>;
1171                                 interrupt-nam    1171                                 interrupt-names = "event", "error";
1172                                 interrupts =     1172                                 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
1173                                                  1173                                              <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
1174                                 clocks = <&rc    1174                                 clocks = <&rcc I2C5_K>;
1175                                 resets = <&rc    1175                                 resets = <&rcc I2C5_R>;
1176                                 #address-cell    1176                                 #address-cells = <1>;
1177                                 #size-cells =    1177                                 #size-cells = <0>;
1178                                 dmas = <&dmam    1178                                 dmas = <&dmamux1 115 0x400 0x1>,
1179                                        <&dmam    1179                                        <&dmamux1 116 0x400 0x1>;
1180                                 dma-names = "    1180                                 dma-names = "rx", "tx";
1181                                 st,syscfg-fmp    1181                                 st,syscfg-fmp = <&syscfg 0x4 0x10>;
1182                                 i2c-analog-fi    1182                                 i2c-analog-filter;
1183                                 access-contro    1183                                 access-controllers = <&etzpc 22>;
1184                                 status = "dis    1184                                 status = "disabled";
1185                         };                       1185                         };
1186                                                  1186 
1187                         timers12: timer@4c007    1187                         timers12: timer@4c007000 {
1188                                 #address-cell    1188                                 #address-cells = <1>;
1189                                 #size-cells =    1189                                 #size-cells = <0>;
1190                                 compatible =     1190                                 compatible = "st,stm32-timers";
1191                                 reg = <0x4c00    1191                                 reg = <0x4c007000 0x400>;
1192                                 interrupts =     1192                                 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1193                                 interrupt-nam    1193                                 interrupt-names = "global";
1194                                 clocks = <&rc    1194                                 clocks = <&rcc TIM12_K>;
1195                                 clock-names =    1195                                 clock-names = "int";
1196                                 access-contro    1196                                 access-controllers = <&etzpc 23>;
1197                                 status = "dis    1197                                 status = "disabled";
1198                                                  1198 
1199                                 pwm {            1199                                 pwm {
1200                                         compa    1200                                         compatible = "st,stm32-pwm";
1201                                         #pwm-    1201                                         #pwm-cells = <3>;
1202                                         statu    1202                                         status = "disabled";
1203                                 };               1203                                 };
1204                                                  1204 
1205                                 timer@11 {       1205                                 timer@11 {
1206                                         compa    1206                                         compatible = "st,stm32h7-timer-trigger";
1207                                         reg =    1207                                         reg = <11>;
1208                                         statu    1208                                         status = "disabled";
1209                                 };               1209                                 };
1210                         };                       1210                         };
1211                                                  1211 
1212                         timers13: timer@4c008    1212                         timers13: timer@4c008000 {
1213                                 #address-cell    1213                                 #address-cells = <1>;
1214                                 #size-cells =    1214                                 #size-cells = <0>;
1215                                 compatible =     1215                                 compatible = "st,stm32-timers";
1216                                 reg = <0x4c00    1216                                 reg = <0x4c008000 0x400>;
1217                                 interrupts =     1217                                 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
1218                                 interrupt-nam    1218                                 interrupt-names = "global";
1219                                 clocks = <&rc    1219                                 clocks = <&rcc TIM13_K>;
1220                                 clock-names =    1220                                 clock-names = "int";
1221                                 access-contro    1221                                 access-controllers = <&etzpc 24>;
1222                                 status = "dis    1222                                 status = "disabled";
1223                                                  1223 
1224                                 pwm {            1224                                 pwm {
1225                                         compa    1225                                         compatible = "st,stm32-pwm";
1226                                         #pwm-    1226                                         #pwm-cells = <3>;
1227                                         statu    1227                                         status = "disabled";
1228                                 };               1228                                 };
1229                                                  1229 
1230                                 timer@12 {       1230                                 timer@12 {
1231                                         compa    1231                                         compatible = "st,stm32h7-timer-trigger";
1232                                         reg =    1232                                         reg = <12>;
1233                                         statu    1233                                         status = "disabled";
1234                                 };               1234                                 };
1235                         };                       1235                         };
1236                                                  1236 
1237                         timers14: timer@4c009    1237                         timers14: timer@4c009000 {
1238                                 #address-cell    1238                                 #address-cells = <1>;
1239                                 #size-cells =    1239                                 #size-cells = <0>;
1240                                 compatible =     1240                                 compatible = "st,stm32-timers";
1241                                 reg = <0x4c00    1241                                 reg = <0x4c009000 0x400>;
1242                                 interrupts =     1242                                 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1243                                 interrupt-nam    1243                                 interrupt-names = "global";
1244                                 clocks = <&rc    1244                                 clocks = <&rcc TIM14_K>;
1245                                 clock-names =    1245                                 clock-names = "int";
1246                                 access-contro    1246                                 access-controllers = <&etzpc 25>;
1247                                 status = "dis    1247                                 status = "disabled";
1248                                                  1248 
1249                                 pwm {            1249                                 pwm {
1250                                         compa    1250                                         compatible = "st,stm32-pwm";
1251                                         #pwm-    1251                                         #pwm-cells = <3>;
1252                                         statu    1252                                         status = "disabled";
1253                                 };               1253                                 };
1254                                                  1254 
1255                                 timer@13 {       1255                                 timer@13 {
1256                                         compa    1256                                         compatible = "st,stm32h7-timer-trigger";
1257                                         reg =    1257                                         reg = <13>;
1258                                         statu    1258                                         status = "disabled";
1259                                 };               1259                                 };
1260                         };                       1260                         };
1261                                                  1261 
1262                         timers15: timer@4c00a    1262                         timers15: timer@4c00a000 {
1263                                 #address-cell    1263                                 #address-cells = <1>;
1264                                 #size-cells =    1264                                 #size-cells = <0>;
1265                                 compatible =     1265                                 compatible = "st,stm32-timers";
1266                                 reg = <0x4c00    1266                                 reg = <0x4c00a000 0x400>;
1267                                 interrupts =     1267                                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1268                                 interrupt-nam    1268                                 interrupt-names = "global";
1269                                 clocks = <&rc    1269                                 clocks = <&rcc TIM15_K>;
1270                                 clock-names =    1270                                 clock-names = "int";
1271                                 dmas = <&dmam    1271                                 dmas = <&dmamux1 105 0x400 0x1>,
1272                                 <&dmamux1 106    1272                                 <&dmamux1 106 0x400 0x1>,
1273                                 <&dmamux1 107    1273                                 <&dmamux1 107 0x400 0x1>,
1274                                 <&dmamux1 108    1274                                 <&dmamux1 108 0x400 0x1>;
1275                                 dma-names = "    1275                                 dma-names = "ch1", "up", "trig", "com";
1276                                 access-contro    1276                                 access-controllers = <&etzpc 26>;
1277                                 status = "dis    1277                                 status = "disabled";
1278                                                  1278 
1279                                 pwm {            1279                                 pwm {
1280                                         compa    1280                                         compatible = "st,stm32-pwm";
1281                                         #pwm-    1281                                         #pwm-cells = <3>;
1282                                         statu    1282                                         status = "disabled";
1283                                 };               1283                                 };
1284                                                  1284 
1285                                 timer@14 {       1285                                 timer@14 {
1286                                         compa    1286                                         compatible = "st,stm32h7-timer-trigger";
1287                                         reg =    1287                                         reg = <14>;
1288                                         statu    1288                                         status = "disabled";
1289                                 };               1289                                 };
1290                         };                       1290                         };
1291                                                  1291 
1292                         timers16: timer@4c00b    1292                         timers16: timer@4c00b000 {
1293                                 #address-cell    1293                                 #address-cells = <1>;
1294                                 #size-cells =    1294                                 #size-cells = <0>;
1295                                 compatible =     1295                                 compatible = "st,stm32-timers";
1296                                 reg = <0x4c00    1296                                 reg = <0x4c00b000 0x400>;
1297                                 interrupts =     1297                                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1298                                 interrupt-nam    1298                                 interrupt-names = "global";
1299                                 clocks = <&rc    1299                                 clocks = <&rcc TIM16_K>;
1300                                 clock-names =    1300                                 clock-names = "int";
1301                                 dmas = <&dmam    1301                                 dmas = <&dmamux1 109 0x400 0x1>,
1302                                 <&dmamux1 110    1302                                 <&dmamux1 110 0x400 0x1>;
1303                                 dma-names = "    1303                                 dma-names = "ch1", "up";
1304                                 access-contro    1304                                 access-controllers = <&etzpc 27>;
1305                                 status = "dis    1305                                 status = "disabled";
1306                                                  1306 
1307                                 pwm {            1307                                 pwm {
1308                                         compa    1308                                         compatible = "st,stm32-pwm";
1309                                         #pwm-    1309                                         #pwm-cells = <3>;
1310                                         statu    1310                                         status = "disabled";
1311                                 };               1311                                 };
1312                                                  1312 
1313                                 timer@15 {       1313                                 timer@15 {
1314                                         compa    1314                                         compatible = "st,stm32h7-timer-trigger";
1315                                         reg =    1315                                         reg = <15>;
1316                                         statu    1316                                         status = "disabled";
1317                                 };               1317                                 };
1318                         };                       1318                         };
1319                                                  1319 
1320                         timers17: timer@4c00c    1320                         timers17: timer@4c00c000 {
1321                                 #address-cell    1321                                 #address-cells = <1>;
1322                                 #size-cells =    1322                                 #size-cells = <0>;
1323                                 compatible =     1323                                 compatible = "st,stm32-timers";
1324                                 reg = <0x4c00    1324                                 reg = <0x4c00c000 0x400>;
1325                                 interrupts =     1325                                 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
1326                                 interrupt-nam    1326                                 interrupt-names = "global";
1327                                 clocks = <&rc    1327                                 clocks = <&rcc TIM17_K>;
1328                                 clock-names =    1328                                 clock-names = "int";
1329                                 dmas = <&dmam    1329                                 dmas = <&dmamux1 111 0x400 0x1>,
1330                                        <&dmam    1330                                        <&dmamux1 112 0x400 0x1>;
1331                                 dma-names = "    1331                                 dma-names = "ch1", "up";
1332                                 access-contro    1332                                 access-controllers = <&etzpc 28>;
1333                                 status = "dis    1333                                 status = "disabled";
1334                                                  1334 
1335                                 pwm {            1335                                 pwm {
1336                                         compa    1336                                         compatible = "st,stm32-pwm";
1337                                         #pwm-    1337                                         #pwm-cells = <3>;
1338                                         statu    1338                                         status = "disabled";
1339                                 };               1339                                 };
1340                                                  1340 
1341                                 timer@16 {       1341                                 timer@16 {
1342                                         compa    1342                                         compatible = "st,stm32h7-timer-trigger";
1343                                         reg =    1343                                         reg = <16>;
1344                                         statu    1344                                         status = "disabled";
1345                                 };               1345                                 };
1346                         };                       1346                         };
1347                                                  1347 
1348                         lptimer2: timer@50021    1348                         lptimer2: timer@50021000 {
1349                                 #address-cell    1349                                 #address-cells = <1>;
1350                                 #size-cells =    1350                                 #size-cells = <0>;
1351                                 compatible =     1351                                 compatible = "st,stm32-lptimer";
1352                                 reg = <0x5002    1352                                 reg = <0x50021000 0x400>;
1353                                 interrupts-ex    1353                                 interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
1354                                 clocks = <&rc    1354                                 clocks = <&rcc LPTIM2_K>;
1355                                 clock-names =    1355                                 clock-names = "mux";
1356                                 wakeup-source    1356                                 wakeup-source;
1357                                 access-contro    1357                                 access-controllers = <&etzpc 1>;
1358                                 status = "dis    1358                                 status = "disabled";
1359                                                  1359 
1360                                 pwm {            1360                                 pwm {
1361                                         compa    1361                                         compatible = "st,stm32-pwm-lp";
1362                                         #pwm-    1362                                         #pwm-cells = <3>;
1363                                         statu    1363                                         status = "disabled";
1364                                 };               1364                                 };
1365                                                  1365 
1366                                 trigger@1 {      1366                                 trigger@1 {
1367                                         compa    1367                                         compatible = "st,stm32-lptimer-trigger";
1368                                         reg =    1368                                         reg = <1>;
1369                                         statu    1369                                         status = "disabled";
1370                                 };               1370                                 };
1371                                                  1371 
1372                                 counter {        1372                                 counter {
1373                                         compa    1373                                         compatible = "st,stm32-lptimer-counter";
1374                                         statu    1374                                         status = "disabled";
1375                                 };               1375                                 };
1376                                                  1376 
1377                                 timer {          1377                                 timer {
1378                                         compa    1378                                         compatible = "st,stm32-lptimer-timer";
1379                                         statu    1379                                         status = "disabled";
1380                                 };               1380                                 };
1381                         };                       1381                         };
1382                                                  1382 
1383                         lptimer3: timer@50022    1383                         lptimer3: timer@50022000 {
1384                                 #address-cell    1384                                 #address-cells = <1>;
1385                                 #size-cells =    1385                                 #size-cells = <0>;
1386                                 compatible =     1386                                 compatible = "st,stm32-lptimer";
1387                                 reg = <0x5002    1387                                 reg = <0x50022000 0x400>;
1388                                 interrupts-ex    1388                                 interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
1389                                 clocks = <&rc    1389                                 clocks = <&rcc LPTIM3_K>;
1390                                 clock-names =    1390                                 clock-names = "mux";
1391                                 wakeup-source    1391                                 wakeup-source;
1392                                 access-contro    1392                                 access-controllers = <&etzpc 2>;
1393                                 status = "dis    1393                                 status = "disabled";
1394                                                  1394 
1395                                 pwm {            1395                                 pwm {
1396                                         compa    1396                                         compatible = "st,stm32-pwm-lp";
1397                                         #pwm-    1397                                         #pwm-cells = <3>;
1398                                         statu    1398                                         status = "disabled";
1399                                 };               1399                                 };
1400                                                  1400 
1401                                 trigger@2 {      1401                                 trigger@2 {
1402                                         compa    1402                                         compatible = "st,stm32-lptimer-trigger";
1403                                         reg =    1403                                         reg = <2>;
1404                                         statu    1404                                         status = "disabled";
1405                                 };               1405                                 };
1406                                                  1406 
1407                                 timer {          1407                                 timer {
1408                                         compa    1408                                         compatible = "st,stm32-lptimer-timer";
1409                                         statu    1409                                         status = "disabled";
1410                                 };               1410                                 };
1411                         };                       1411                         };
1412                                                  1412 
1413                         hash: hash@54003000 {    1413                         hash: hash@54003000 {
1414                                 compatible =     1414                                 compatible = "st,stm32mp13-hash";
1415                                 reg = <0x5400    1415                                 reg = <0x54003000 0x400>;
1416                                 interrupts =     1416                                 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
1417                                 clocks = <&rc    1417                                 clocks = <&rcc HASH1>;
1418                                 resets = <&rc    1418                                 resets = <&rcc HASH1_R>;
1419                                 dmas = <&mdma    1419                                 dmas = <&mdma 30 0x2 0x1000a02 0x0 0x0>;
1420                                 dma-names = "    1420                                 dma-names = "in";
1421                                 access-contro    1421                                 access-controllers = <&etzpc 41>;
1422                                 status = "dis    1422                                 status = "disabled";
1423                         };                       1423                         };
1424                                                  1424 
1425                         rng: rng@54004000 {      1425                         rng: rng@54004000 {
1426                                 compatible =     1426                                 compatible = "st,stm32mp13-rng";
1427                                 reg = <0x5400    1427                                 reg = <0x54004000 0x400>;
1428                                 clocks = <&rc    1428                                 clocks = <&rcc RNG1_K>;
1429                                 resets = <&rc    1429                                 resets = <&rcc RNG1_R>;
1430                                 access-contro    1430                                 access-controllers = <&etzpc 40>;
1431                                 status = "dis    1431                                 status = "disabled";
1432                         };                       1432                         };
1433                                                  1433 
1434                         fmc: memory-controlle    1434                         fmc: memory-controller@58002000 {
1435                                 compatible =     1435                                 compatible = "st,stm32mp1-fmc2-ebi";
1436                                 reg = <0x5800    1436                                 reg = <0x58002000 0x1000>;
1437                                 ranges = <0 0    1437                                 ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
1438                                          <1 0    1438                                          <1 0 0x64000000 0x04000000>, /* EBI CS 2 */
1439                                          <2 0    1439                                          <2 0 0x68000000 0x04000000>, /* EBI CS 3 */
1440                                          <3 0    1440                                          <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */
1441                                          <4 0    1441                                          <4 0 0x80000000 0x10000000>; /* NAND */
1442                                 #address-cell    1442                                 #address-cells = <2>;
1443                                 #size-cells =    1443                                 #size-cells = <1>;
1444                                 clocks = <&rc    1444                                 clocks = <&rcc FMC_K>;
1445                                 resets = <&rc    1445                                 resets = <&rcc FMC_R>;
1446                                 access-contro    1446                                 access-controllers = <&etzpc 54>;
1447                                 status = "dis    1447                                 status = "disabled";
1448                                                  1448 
1449                                 nand-controll    1449                                 nand-controller@4,0 {
1450                                         compa    1450                                         compatible = "st,stm32mp1-fmc2-nfc";
1451                                         reg =    1451                                         reg = <4 0x00000000 0x1000>,
1452                                                  1452                                               <4 0x08010000 0x1000>,
1453                                                  1453                                               <4 0x08020000 0x1000>,
1454                                                  1454                                               <4 0x01000000 0x1000>,
1455                                                  1455                                               <4 0x09010000 0x1000>,
1456                                                  1456                                               <4 0x09020000 0x1000>;
1457                                         #addr    1457                                         #address-cells = <1>;
1458                                         #size    1458                                         #size-cells = <0>;
1459                                         inter    1459                                         interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1460                                         dmas     1460                                         dmas = <&mdma 24 0x2 0x12000a02 0x0 0x0>,
1461                                                  1461                                                <&mdma 24 0x2 0x12000a08 0x0 0x0>,
1462                                                  1462                                                <&mdma 25 0x2 0x12000a0a 0x0 0x0>;
1463                                         dma-n    1463                                         dma-names = "tx", "rx", "ecc";
1464                                         statu    1464                                         status = "disabled";
1465                                 };               1465                                 };
1466                         };                       1466                         };
1467                                                  1467 
1468                         qspi: spi@58003000 {     1468                         qspi: spi@58003000 {
1469                                 compatible =     1469                                 compatible = "st,stm32f469-qspi";
1470                                 reg = <0x5800    1470                                 reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
1471                                 reg-names = "    1471                                 reg-names = "qspi", "qspi_mm";
1472                                 #address-cell    1472                                 #address-cells = <1>;
1473                                 #size-cells =    1473                                 #size-cells = <0>;
1474                                 interrupts =     1474                                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
1475                                 dmas = <&mdma    1475                                 dmas = <&mdma 26 0x2 0x10100002 0x0 0x0>,
1476                                        <&mdma    1476                                        <&mdma 26 0x2 0x10100008 0x0 0x0>;
1477                                 dma-names = "    1477                                 dma-names = "tx", "rx";
1478                                 clocks = <&rc    1478                                 clocks = <&rcc QSPI_K>;
1479                                 resets = <&rc    1479                                 resets = <&rcc QSPI_R>;
1480                                 access-contro    1480                                 access-controllers = <&etzpc 55>;
1481                                 status = "dis    1481                                 status = "disabled";
1482                         };                       1482                         };
1483                                                  1483 
1484                         sdmmc1: mmc@58005000     1484                         sdmmc1: mmc@58005000 {
1485                                 compatible =     1485                                 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1486                                 arm,primecell    1486                                 arm,primecell-periphid = <0x20253180>;
1487                                 reg = <0x5800    1487                                 reg = <0x58005000 0x1000>, <0x58006000 0x1000>;
1488                                 interrupts =     1488                                 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
1489                                 clocks = <&rc    1489                                 clocks = <&rcc SDMMC1_K>;
1490                                 clock-names =    1490                                 clock-names = "apb_pclk";
1491                                 resets = <&rc    1491                                 resets = <&rcc SDMMC1_R>;
1492                                 cap-sd-highsp    1492                                 cap-sd-highspeed;
1493                                 cap-mmc-highs    1493                                 cap-mmc-highspeed;
1494                                 max-frequency    1494                                 max-frequency = <130000000>;
1495                                 access-contro    1495                                 access-controllers = <&etzpc 50>;
1496                                 status = "dis    1496                                 status = "disabled";
1497                         };                       1497                         };
1498                                                  1498 
1499                         sdmmc2: mmc@58007000     1499                         sdmmc2: mmc@58007000 {
1500                                 compatible =     1500                                 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1501                                 arm,primecell    1501                                 arm,primecell-periphid = <0x20253180>;
1502                                 reg = <0x5800    1502                                 reg = <0x58007000 0x1000>, <0x58008000 0x1000>;
1503                                 interrupts =     1503                                 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1504                                 clocks = <&rc    1504                                 clocks = <&rcc SDMMC2_K>;
1505                                 clock-names =    1505                                 clock-names = "apb_pclk";
1506                                 resets = <&rc    1506                                 resets = <&rcc SDMMC2_R>;
1507                                 cap-sd-highsp    1507                                 cap-sd-highspeed;
1508                                 cap-mmc-highs    1508                                 cap-mmc-highspeed;
1509                                 max-frequency    1509                                 max-frequency = <130000000>;
1510                                 access-contro    1510                                 access-controllers = <&etzpc 51>;
1511                                 status = "dis    1511                                 status = "disabled";
1512                         };                       1512                         };
1513                                                  1513 
1514                         ethernet1: ethernet@5    1514                         ethernet1: ethernet@5800a000 {
1515                                 compatible =     1515                                 compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
1516                                 reg = <0x5800    1516                                 reg = <0x5800a000 0x2000>;
1517                                 reg-names = "    1517                                 reg-names = "stmmaceth";
1518                                 interrupts-ex    1518                                 interrupts-extended = <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1519                                                  1519                                                       <&exti 68 1>;
1520                                 interrupt-nam    1520                                 interrupt-names = "macirq", "eth_wake_irq";
1521                                 clock-names =    1521                                 clock-names = "stmmaceth",
1522                                                  1522                                               "mac-clk-tx",
1523                                                  1523                                               "mac-clk-rx",
1524                                                  1524                                               "ethstp",
1525                                                  1525                                               "eth-ck";
1526                                 clocks = <&rc    1526                                 clocks = <&rcc ETH1MAC>,
1527                                          <&rc    1527                                          <&rcc ETH1TX>,
1528                                          <&rc    1528                                          <&rcc ETH1RX>,
1529                                          <&rc    1529                                          <&rcc ETH1STP>,
1530                                          <&rc    1530                                          <&rcc ETH1CK_K>;
1531                                 st,syscon = <    1531                                 st,syscon = <&syscfg 0x4 0xff0000>;
1532                                 snps,mixed-bu    1532                                 snps,mixed-burst;
1533                                 snps,pbl = <2    1533                                 snps,pbl = <2>;
1534                                 snps,axi-conf    1534                                 snps,axi-config = <&stmmac_axi_config_1>;
1535                                 snps,tso;        1535                                 snps,tso;
1536                                 access-contro    1536                                 access-controllers = <&etzpc 48>;
1537                                 status = "dis    1537                                 status = "disabled";
1538                                                  1538 
1539                                 stmmac_axi_co    1539                                 stmmac_axi_config_1: stmmac-axi-config {
1540                                         snps,    1540                                         snps,blen = <0 0 0 0 16 8 4>;
1541                                         snps,    1541                                         snps,rd_osr_lmt = <0x7>;
1542                                         snps,    1542                                         snps,wr_osr_lmt = <0x7>;
1543                                 };               1543                                 };
1544                         };                       1544                         };
1545                                                  1545 
1546                         usbphyc: usbphyc@5a00    1546                         usbphyc: usbphyc@5a006000 {
1547                                 #address-cell    1547                                 #address-cells = <1>;
1548                                 #size-cells =    1548                                 #size-cells = <0>;
1549                                 #clock-cells     1549                                 #clock-cells = <0>;
1550                                 compatible =     1550                                 compatible = "st,stm32mp1-usbphyc";
1551                                 reg = <0x5a00    1551                                 reg = <0x5a006000 0x1000>;
1552                                 clocks = <&rc    1552                                 clocks = <&rcc USBPHY_K>;
1553                                 resets = <&rc    1553                                 resets = <&rcc USBPHY_R>;
1554                                 vdda1v1-suppl    1554                                 vdda1v1-supply = <&scmi_reg11>;
1555                                 vdda1v8-suppl    1555                                 vdda1v8-supply = <&scmi_reg18>;
1556                                 access-contro    1556                                 access-controllers = <&etzpc 5>;
1557                                 status = "dis    1557                                 status = "disabled";
1558                                                  1558 
1559                                 usbphyc_port0    1559                                 usbphyc_port0: usb-phy@0 {
1560                                         #phy-    1560                                         #phy-cells = <0>;
1561                                         reg =    1561                                         reg = <0>;
1562                                 };               1562                                 };
1563                                                  1563 
1564                                 usbphyc_port1    1564                                 usbphyc_port1: usb-phy@1 {
1565                                         #phy-    1565                                         #phy-cells = <1>;
1566                                         reg =    1566                                         reg = <1>;
1567                                 };               1567                                 };
1568                         };                       1568                         };
1569                 };                               1569                 };
1570                                                  1570 
1571                 /*                               1571                 /*
1572                  * Break node order to solve     1572                  * Break node order to solve dependency probe issue between
1573                  * pinctrl and exti.             1573                  * pinctrl and exti.
1574                  */                              1574                  */
1575                 pinctrl: pinctrl@50002000 {      1575                 pinctrl: pinctrl@50002000 {
1576                         #address-cells = <1>;    1576                         #address-cells = <1>;
1577                         #size-cells = <1>;       1577                         #size-cells = <1>;
1578                         compatible = "st,stm3    1578                         compatible = "st,stm32mp135-pinctrl";
1579                         ranges = <0 0x5000200    1579                         ranges = <0 0x50002000 0x8400>;
1580                         interrupt-parent = <&    1580                         interrupt-parent = <&exti>;
1581                         st,syscfg = <&exti 0x    1581                         st,syscfg = <&exti 0x60 0xff>;
1582                                                  1582 
1583                         gpioa: gpio@50002000     1583                         gpioa: gpio@50002000 {
1584                                 gpio-controll    1584                                 gpio-controller;
1585                                 #gpio-cells =    1585                                 #gpio-cells = <2>;
1586                                 interrupt-con    1586                                 interrupt-controller;
1587                                 #interrupt-ce    1587                                 #interrupt-cells = <2>;
1588                                 reg = <0x0 0x    1588                                 reg = <0x0 0x400>;
1589                                 clocks = <&rc    1589                                 clocks = <&rcc GPIOA>;
1590                                 st,bank-name     1590                                 st,bank-name = "GPIOA";
1591                                 ngpios = <16>    1591                                 ngpios = <16>;
1592                                 gpio-ranges =    1592                                 gpio-ranges = <&pinctrl 0 0 16>;
1593                         };                       1593                         };
1594                                                  1594 
1595                         gpiob: gpio@50003000     1595                         gpiob: gpio@50003000 {
1596                                 gpio-controll    1596                                 gpio-controller;
1597                                 #gpio-cells =    1597                                 #gpio-cells = <2>;
1598                                 interrupt-con    1598                                 interrupt-controller;
1599                                 #interrupt-ce    1599                                 #interrupt-cells = <2>;
1600                                 reg = <0x1000    1600                                 reg = <0x1000 0x400>;
1601                                 clocks = <&rc    1601                                 clocks = <&rcc GPIOB>;
1602                                 st,bank-name     1602                                 st,bank-name = "GPIOB";
1603                                 ngpios = <16>    1603                                 ngpios = <16>;
1604                                 gpio-ranges =    1604                                 gpio-ranges = <&pinctrl 0 16 16>;
1605                         };                       1605                         };
1606                                                  1606 
1607                         gpioc: gpio@50004000     1607                         gpioc: gpio@50004000 {
1608                                 gpio-controll    1608                                 gpio-controller;
1609                                 #gpio-cells =    1609                                 #gpio-cells = <2>;
1610                                 interrupt-con    1610                                 interrupt-controller;
1611                                 #interrupt-ce    1611                                 #interrupt-cells = <2>;
1612                                 reg = <0x2000    1612                                 reg = <0x2000 0x400>;
1613                                 clocks = <&rc    1613                                 clocks = <&rcc GPIOC>;
1614                                 st,bank-name     1614                                 st,bank-name = "GPIOC";
1615                                 ngpios = <16>    1615                                 ngpios = <16>;
1616                                 gpio-ranges =    1616                                 gpio-ranges = <&pinctrl 0 32 16>;
1617                         };                       1617                         };
1618                                                  1618 
1619                         gpiod: gpio@50005000     1619                         gpiod: gpio@50005000 {
1620                                 gpio-controll    1620                                 gpio-controller;
1621                                 #gpio-cells =    1621                                 #gpio-cells = <2>;
1622                                 interrupt-con    1622                                 interrupt-controller;
1623                                 #interrupt-ce    1623                                 #interrupt-cells = <2>;
1624                                 reg = <0x3000    1624                                 reg = <0x3000 0x400>;
1625                                 clocks = <&rc    1625                                 clocks = <&rcc GPIOD>;
1626                                 st,bank-name     1626                                 st,bank-name = "GPIOD";
1627                                 ngpios = <16>    1627                                 ngpios = <16>;
1628                                 gpio-ranges =    1628                                 gpio-ranges = <&pinctrl 0 48 16>;
1629                         };                       1629                         };
1630                                                  1630 
1631                         gpioe: gpio@50006000     1631                         gpioe: gpio@50006000 {
1632                                 gpio-controll    1632                                 gpio-controller;
1633                                 #gpio-cells =    1633                                 #gpio-cells = <2>;
1634                                 interrupt-con    1634                                 interrupt-controller;
1635                                 #interrupt-ce    1635                                 #interrupt-cells = <2>;
1636                                 reg = <0x4000    1636                                 reg = <0x4000 0x400>;
1637                                 clocks = <&rc    1637                                 clocks = <&rcc GPIOE>;
1638                                 st,bank-name     1638                                 st,bank-name = "GPIOE";
1639                                 ngpios = <16>    1639                                 ngpios = <16>;
1640                                 gpio-ranges =    1640                                 gpio-ranges = <&pinctrl 0 64 16>;
1641                         };                       1641                         };
1642                                                  1642 
1643                         gpiof: gpio@50007000     1643                         gpiof: gpio@50007000 {
1644                                 gpio-controll    1644                                 gpio-controller;
1645                                 #gpio-cells =    1645                                 #gpio-cells = <2>;
1646                                 interrupt-con    1646                                 interrupt-controller;
1647                                 #interrupt-ce    1647                                 #interrupt-cells = <2>;
1648                                 reg = <0x5000    1648                                 reg = <0x5000 0x400>;
1649                                 clocks = <&rc    1649                                 clocks = <&rcc GPIOF>;
1650                                 st,bank-name     1650                                 st,bank-name = "GPIOF";
1651                                 ngpios = <16>    1651                                 ngpios = <16>;
1652                                 gpio-ranges =    1652                                 gpio-ranges = <&pinctrl 0 80 16>;
1653                         };                       1653                         };
1654                                                  1654 
1655                         gpiog: gpio@50008000     1655                         gpiog: gpio@50008000 {
1656                                 gpio-controll    1656                                 gpio-controller;
1657                                 #gpio-cells =    1657                                 #gpio-cells = <2>;
1658                                 interrupt-con    1658                                 interrupt-controller;
1659                                 #interrupt-ce    1659                                 #interrupt-cells = <2>;
1660                                 reg = <0x6000    1660                                 reg = <0x6000 0x400>;
1661                                 clocks = <&rc    1661                                 clocks = <&rcc GPIOG>;
1662                                 st,bank-name     1662                                 st,bank-name = "GPIOG";
1663                                 ngpios = <16>    1663                                 ngpios = <16>;
1664                                 gpio-ranges =    1664                                 gpio-ranges = <&pinctrl 0 96 16>;
1665                         };                       1665                         };
1666                                                  1666 
1667                         gpioh: gpio@50009000     1667                         gpioh: gpio@50009000 {
1668                                 gpio-controll    1668                                 gpio-controller;
1669                                 #gpio-cells =    1669                                 #gpio-cells = <2>;
1670                                 interrupt-con    1670                                 interrupt-controller;
1671                                 #interrupt-ce    1671                                 #interrupt-cells = <2>;
1672                                 reg = <0x7000    1672                                 reg = <0x7000 0x400>;
1673                                 clocks = <&rc    1673                                 clocks = <&rcc GPIOH>;
1674                                 st,bank-name     1674                                 st,bank-name = "GPIOH";
1675                                 ngpios = <15>    1675                                 ngpios = <15>;
1676                                 gpio-ranges =    1676                                 gpio-ranges = <&pinctrl 0 112 15>;
1677                         };                       1677                         };
1678                                                  1678 
1679                         gpioi: gpio@5000a000     1679                         gpioi: gpio@5000a000 {
1680                                 gpio-controll    1680                                 gpio-controller;
1681                                 #gpio-cells =    1681                                 #gpio-cells = <2>;
1682                                 interrupt-con    1682                                 interrupt-controller;
1683                                 #interrupt-ce    1683                                 #interrupt-cells = <2>;
1684                                 reg = <0x8000    1684                                 reg = <0x8000 0x400>;
1685                                 clocks = <&rc    1685                                 clocks = <&rcc GPIOI>;
1686                                 st,bank-name     1686                                 st,bank-name = "GPIOI";
1687                                 ngpios = <8>;    1687                                 ngpios = <8>;
1688                                 gpio-ranges =    1688                                 gpio-ranges = <&pinctrl 0 128 8>;
1689                         };                       1689                         };
1690                 };                               1690                 };
1691         };                                       1691         };
1692 };                                               1692 };
                                                      

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