1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /* 2 /*
3 * Copyright (C) STMicroelectronics 2017 - All 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> 4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */ 5 */
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h> 6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
7 7
8 &pinctrl { 8 &pinctrl {
9 /omit-if-no-ref/ <<
10 adc1_ain_pins_a: adc1-ain-0 { <<
11 pins { <<
12 pinmux = <STM32_PINMUX <<
13 <STM32_PINMUX <<
14 <STM32_PINMUX <<
15 <STM32_PINMUX <<
16 <STM32_PINMUX <<
17 <STM32_PINMUX <<
18 }; <<
19 }; <<
20 <<
21 /omit-if-no-ref/ <<
22 adc1_in6_pins_a: adc1-in6-0 { 9 adc1_in6_pins_a: adc1-in6-0 {
23 pins { 10 pins {
24 pinmux = <STM32_PINMUX 11 pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
25 }; 12 };
26 }; 13 };
27 14
28 /omit-if-no-ref/ <<
29 adc12_ain_pins_a: adc12-ain-0 { 15 adc12_ain_pins_a: adc12-ain-0 {
30 pins { 16 pins {
31 pinmux = <STM32_PINMUX 17 pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
32 <STM32_PINMUX 18 <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
33 <STM32_PINMUX 19 <STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */
34 <STM32_PINMUX 20 <STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */
35 }; 21 };
36 }; 22 };
37 23
38 /omit-if-no-ref/ <<
39 adc12_ain_pins_b: adc12-ain-1 { 24 adc12_ain_pins_b: adc12-ain-1 {
40 pins { 25 pins {
41 pinmux = <STM32_PINMUX 26 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
42 <STM32_PINMUX 27 <STM32_PINMUX('F', 13, ANALOG)>; /* ADC2 in2 */
43 }; 28 };
44 }; 29 };
45 30
46 /omit-if-no-ref/ <<
47 adc12_usb_cc_pins_a: adc12-usb-cc-pins 31 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
48 pins { 32 pins {
49 pinmux = <STM32_PINMUX 33 pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
50 <STM32_PINMUX 34 <STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
51 }; 35 };
52 }; 36 };
53 37
54 /omit-if-no-ref/ <<
55 cec_pins_a: cec-0 { 38 cec_pins_a: cec-0 {
56 pins { 39 pins {
57 pinmux = <STM32_PINMUX 40 pinmux = <STM32_PINMUX('A', 15, AF4)>;
58 bias-disable; 41 bias-disable;
59 drive-open-drain; 42 drive-open-drain;
60 slew-rate = <0>; 43 slew-rate = <0>;
61 }; 44 };
62 }; 45 };
63 46
64 /omit-if-no-ref/ <<
65 cec_sleep_pins_a: cec-sleep-0 { 47 cec_sleep_pins_a: cec-sleep-0 {
66 pins { 48 pins {
67 pinmux = <STM32_PINMUX 49 pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
68 }; 50 };
69 }; 51 };
70 52
71 /omit-if-no-ref/ <<
72 cec_pins_b: cec-1 { 53 cec_pins_b: cec-1 {
73 pins { 54 pins {
74 pinmux = <STM32_PINMUX 55 pinmux = <STM32_PINMUX('B', 6, AF5)>;
75 bias-disable; 56 bias-disable;
76 drive-open-drain; 57 drive-open-drain;
77 slew-rate = <0>; 58 slew-rate = <0>;
78 }; 59 };
79 }; 60 };
80 61
81 /omit-if-no-ref/ <<
82 cec_sleep_pins_b: cec-sleep-1 { 62 cec_sleep_pins_b: cec-sleep-1 {
83 pins { 63 pins {
84 pinmux = <STM32_PINMUX 64 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
85 }; 65 };
86 }; 66 };
87 67
88 /omit-if-no-ref/ <<
89 dac_ch1_pins_a: dac-ch1-0 { 68 dac_ch1_pins_a: dac-ch1-0 {
90 pins { 69 pins {
91 pinmux = <STM32_PINMUX 70 pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
92 }; 71 };
93 }; 72 };
94 73
95 /omit-if-no-ref/ <<
96 dac_ch2_pins_a: dac-ch2-0 { 74 dac_ch2_pins_a: dac-ch2-0 {
97 pins { 75 pins {
98 pinmux = <STM32_PINMUX 76 pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
99 }; 77 };
100 }; 78 };
101 79
102 /omit-if-no-ref/ <<
103 dcmi_pins_a: dcmi-0 { 80 dcmi_pins_a: dcmi-0 {
104 pins { 81 pins {
105 pinmux = <STM32_PINMUX 82 pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
106 <STM32_PINMUX 83 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
107 <STM32_PINMUX 84 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
108 <STM32_PINMUX 85 <STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */
109 <STM32_PINMUX 86 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
110 <STM32_PINMUX 87 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
111 <STM32_PINMUX 88 <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
112 <STM32_PINMUX 89 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
113 <STM32_PINMUX 90 <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */
114 <STM32_PINMUX 91 <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */
115 <STM32_PINMUX 92 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
116 <STM32_PINMUX 93 <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */
117 <STM32_PINMUX 94 <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */
118 <STM32_PINMUX 95 <STM32_PINMUX('I', 3, AF13)>,/* DCMI_D10 */
119 <STM32_PINMUX 96 <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
120 bias-disable; 97 bias-disable;
121 }; 98 };
122 }; 99 };
123 100
124 /omit-if-no-ref/ <<
125 dcmi_sleep_pins_a: dcmi-sleep-0 { 101 dcmi_sleep_pins_a: dcmi-sleep-0 {
126 pins { 102 pins {
127 pinmux = <STM32_PINMUX 103 pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
128 <STM32_PINMUX 104 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
129 <STM32_PINMUX 105 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
130 <STM32_PINMUX 106 <STM32_PINMUX('H', 9, ANALOG)>,/* DCMI_D0 */
131 <STM32_PINMUX 107 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
132 <STM32_PINMUX 108 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
133 <STM32_PINMUX 109 <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
134 <STM32_PINMUX 110 <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
135 <STM32_PINMUX 111 <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */
136 <STM32_PINMUX 112 <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */
137 <STM32_PINMUX 113 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
138 <STM32_PINMUX 114 <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */
139 <STM32_PINMUX 115 <STM32_PINMUX('H', 7, ANALOG)>,/* DCMI_D9 */
140 <STM32_PINMUX 116 <STM32_PINMUX('I', 3, ANALOG)>,/* DCMI_D10 */
141 <STM32_PINMUX 117 <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
142 }; 118 };
143 }; 119 };
144 120
145 /omit-if-no-ref/ <<
146 dcmi_pins_b: dcmi-1 { 121 dcmi_pins_b: dcmi-1 {
147 pins { 122 pins {
148 pinmux = <STM32_PINMUX 123 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */
149 <STM32_PINMUX 124 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
150 <STM32_PINMUX 125 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
151 <STM32_PINMUX 126 <STM32_PINMUX('C', 6, AF13)>,/* DCMI_D0 */
152 <STM32_PINMUX 127 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
153 <STM32_PINMUX 128 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
154 <STM32_PINMUX 129 <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */
155 <STM32_PINMUX 130 <STM32_PINMUX('E', 11, AF13)>,/* DCMI_D4 */
156 <STM32_PINMUX 131 <STM32_PINMUX('D', 3, AF13)>,/* DCMI_D5 */
157 <STM32_PINMUX 132 <STM32_PINMUX('E', 13, AF13)>,/* DCMI_D6 */
158 <STM32_PINMUX 133 <STM32_PINMUX('B', 9, AF13)>;/* DCMI_D7 */
159 bias-disable; 134 bias-disable;
160 }; 135 };
161 }; 136 };
162 137
163 /omit-if-no-ref/ <<
164 dcmi_sleep_pins_b: dcmi-sleep-1 { 138 dcmi_sleep_pins_b: dcmi-sleep-1 {
165 pins { 139 pins {
166 pinmux = <STM32_PINMUX 140 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */
167 <STM32_PINMUX 141 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
168 <STM32_PINMUX 142 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
169 <STM32_PINMUX 143 <STM32_PINMUX('C', 6, ANALOG)>,/* DCMI_D0 */
170 <STM32_PINMUX 144 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
171 <STM32_PINMUX 145 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
172 <STM32_PINMUX 146 <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */
173 <STM32_PINMUX 147 <STM32_PINMUX('E', 11, ANALOG)>,/* DCMI_D4 */
174 <STM32_PINMUX 148 <STM32_PINMUX('D', 3, ANALOG)>,/* DCMI_D5 */
175 <STM32_PINMUX 149 <STM32_PINMUX('E', 13, ANALOG)>,/* DCMI_D6 */
176 <STM32_PINMUX 150 <STM32_PINMUX('B', 9, ANALOG)>;/* DCMI_D7 */
177 }; 151 };
178 }; 152 };
179 153
180 /omit-if-no-ref/ <<
181 dcmi_pins_c: dcmi-2 { 154 dcmi_pins_c: dcmi-2 {
182 pins { 155 pins {
183 pinmux = <STM32_PINMUX 156 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */
184 <STM32_PINMUX 157 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
185 <STM32_PINMUX 158 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
186 <STM32_PINMUX 159 <STM32_PINMUX('A', 9, AF13)>,/* DCMI_D0 */
187 <STM32_PINMUX 160 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
188 <STM32_PINMUX 161 <STM32_PINMUX('E', 0, AF13)>,/* DCMI_D2 */
189 <STM32_PINMUX 162 <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */
190 <STM32_PINMUX 163 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
191 <STM32_PINMUX 164 <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */
192 <STM32_PINMUX 165 <STM32_PINMUX('I', 6, AF13)>,/* DCMI_D6 */
193 <STM32_PINMUX 166 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
194 <STM32_PINMUX 167 <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */
195 <STM32_PINMUX 168 <STM32_PINMUX('H', 7, AF13)>;/* DCMI_D9 */
196 bias-pull-up; 169 bias-pull-up;
197 }; 170 };
198 }; 171 };
199 172
200 /omit-if-no-ref/ <<
201 dcmi_sleep_pins_c: dcmi-sleep-2 { 173 dcmi_sleep_pins_c: dcmi-sleep-2 {
202 pins { 174 pins {
203 pinmux = <STM32_PINMUX 175 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */
204 <STM32_PINMUX 176 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
205 <STM32_PINMUX 177 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
206 <STM32_PINMUX 178 <STM32_PINMUX('A', 9, ANALOG)>,/* DCMI_D0 */
207 <STM32_PINMUX 179 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
208 <STM32_PINMUX 180 <STM32_PINMUX('E', 0, ANALOG)>,/* DCMI_D2 */
209 <STM32_PINMUX 181 <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */
210 <STM32_PINMUX 182 <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
211 <STM32_PINMUX 183 <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */
212 <STM32_PINMUX 184 <STM32_PINMUX('I', 6, ANALOG)>,/* DCMI_D6 */
213 <STM32_PINMUX 185 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
214 <STM32_PINMUX 186 <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */
215 <STM32_PINMUX 187 <STM32_PINMUX('H', 7, ANALOG)>;/* DCMI_D9 */
216 }; 188 };
217 }; 189 };
218 190
219 /omit-if-no-ref/ <<
220 ethernet0_rgmii_pins_a: rgmii-0 { 191 ethernet0_rgmii_pins_a: rgmii-0 {
221 pins1 { 192 pins1 {
222 pinmux = <STM32_PINMUX 193 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
223 <STM32_PINMUX 194 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
224 <STM32_PINMUX 195 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
225 <STM32_PINMUX 196 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
226 <STM32_PINMUX 197 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
227 <STM32_PINMUX 198 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
228 <STM32_PINMUX 199 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
229 <STM32_PINMUX 200 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
230 bias-disable; 201 bias-disable;
231 drive-push-pull; 202 drive-push-pull;
232 slew-rate = <2>; 203 slew-rate = <2>;
233 }; 204 };
234 pins2 { 205 pins2 {
235 pinmux = <STM32_PINMUX 206 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
236 bias-disable; 207 bias-disable;
237 drive-push-pull; 208 drive-push-pull;
238 slew-rate = <0>; 209 slew-rate = <0>;
239 }; 210 };
240 pins3 { 211 pins3 {
241 pinmux = <STM32_PINMUX 212 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
242 <STM32_PINMUX 213 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
243 <STM32_PINMUX 214 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
244 <STM32_PINMUX 215 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
245 <STM32_PINMUX 216 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
246 <STM32_PINMUX 217 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
247 bias-disable; 218 bias-disable;
248 }; 219 };
249 }; 220 };
250 221
251 /omit-if-no-ref/ <<
252 ethernet0_rgmii_sleep_pins_a: rgmii-sl 222 ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
253 pins1 { 223 pins1 {
254 pinmux = <STM32_PINMUX 224 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
255 <STM32_PINMUX 225 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
256 <STM32_PINMUX 226 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
257 <STM32_PINMUX 227 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
258 <STM32_PINMUX 228 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
259 <STM32_PINMUX 229 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
260 <STM32_PINMUX 230 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
261 <STM32_PINMUX 231 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
262 <STM32_PINMUX 232 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
263 <STM32_PINMUX 233 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
264 <STM32_PINMUX 234 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
265 <STM32_PINMUX 235 <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
266 <STM32_PINMUX 236 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
267 <STM32_PINMUX 237 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
268 <STM32_PINMUX 238 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
269 }; 239 };
270 }; 240 };
271 241
272 /omit-if-no-ref/ <<
273 ethernet0_rgmii_pins_b: rgmii-1 { 242 ethernet0_rgmii_pins_b: rgmii-1 {
274 pins1 { 243 pins1 {
275 pinmux = <STM32_PINMUX 244 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
276 <STM32_PINMUX 245 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
277 <STM32_PINMUX 246 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
278 <STM32_PINMUX 247 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
279 <STM32_PINMUX 248 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
280 <STM32_PINMUX 249 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
281 <STM32_PINMUX 250 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
282 <STM32_PINMUX 251 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
283 bias-disable; 252 bias-disable;
284 drive-push-pull; 253 drive-push-pull;
285 slew-rate = <2>; 254 slew-rate = <2>;
286 }; 255 };
287 pins2 { 256 pins2 {
288 pinmux = <STM32_PINMUX 257 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
289 bias-disable; 258 bias-disable;
290 drive-push-pull; 259 drive-push-pull;
291 slew-rate = <0>; 260 slew-rate = <0>;
292 }; 261 };
293 pins3 { 262 pins3 {
294 pinmux = <STM32_PINMUX 263 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
295 <STM32_PINMUX 264 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
296 <STM32_PINMUX 265 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
297 <STM32_PINMUX 266 <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
298 <STM32_PINMUX 267 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
299 <STM32_PINMUX 268 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
300 bias-disable; 269 bias-disable;
301 }; 270 };
302 }; 271 };
303 272
304 /omit-if-no-ref/ <<
305 ethernet0_rgmii_sleep_pins_b: rgmii-sl 273 ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
306 pins1 { 274 pins1 {
307 pinmux = <STM32_PINMUX 275 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
308 <STM32_PINMUX 276 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
309 <STM32_PINMUX 277 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
310 <STM32_PINMUX 278 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
311 <STM32_PINMUX 279 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
312 <STM32_PINMUX 280 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
313 <STM32_PINMUX 281 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
314 <STM32_PINMUX 282 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
315 <STM32_PINMUX 283 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
316 <STM32_PINMUX 284 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
317 <STM32_PINMUX 285 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
318 <STM32_PINMUX 286 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
319 <STM32_PINMUX 287 <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
320 <STM32_PINMUX 288 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
321 <STM32_PINMUX 289 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
322 }; 290 };
323 }; 291 };
324 292
325 /omit-if-no-ref/ <<
326 ethernet0_rgmii_pins_c: rgmii-2 { 293 ethernet0_rgmii_pins_c: rgmii-2 {
327 pins1 { 294 pins1 {
328 pinmux = <STM32_PINMUX 295 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
329 <STM32_PINMUX 296 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
330 <STM32_PINMUX 297 <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */
331 <STM32_PINMUX 298 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
332 <STM32_PINMUX 299 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
333 <STM32_PINMUX 300 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
334 <STM32_PINMUX 301 <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */
335 <STM32_PINMUX 302 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
336 bias-disable; 303 bias-disable;
337 drive-push-pull; 304 drive-push-pull;
338 slew-rate = <2>; 305 slew-rate = <2>;
339 }; 306 };
340 pins2 { 307 pins2 {
341 pinmux = <STM32_PINMUX 308 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
342 bias-disable; 309 bias-disable;
343 drive-push-pull; 310 drive-push-pull;
344 slew-rate = <0>; 311 slew-rate = <0>;
345 }; 312 };
346 pins3 { 313 pins3 {
347 pinmux = <STM32_PINMUX 314 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
348 <STM32_PINMUX 315 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
349 <STM32_PINMUX 316 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
350 <STM32_PINMUX 317 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
351 <STM32_PINMUX 318 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
352 <STM32_PINMUX 319 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
353 bias-disable; 320 bias-disable;
354 }; 321 };
355 }; 322 };
356 323
357 /omit-if-no-ref/ <<
358 ethernet0_rgmii_sleep_pins_c: rgmii-sl 324 ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
359 pins1 { 325 pins1 {
360 pinmux = <STM32_PINMUX 326 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
361 <STM32_PINMUX 327 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
362 <STM32_PINMUX 328 <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */
363 <STM32_PINMUX 329 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
364 <STM32_PINMUX 330 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
365 <STM32_PINMUX 331 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
366 <STM32_PINMUX 332 <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
367 <STM32_PINMUX 333 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
368 <STM32_PINMUX 334 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
369 <STM32_PINMUX 335 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
370 <STM32_PINMUX 336 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
371 <STM32_PINMUX 337 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
372 <STM32_PINMUX 338 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
373 <STM32_PINMUX 339 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
374 <STM32_PINMUX 340 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
375 }; 341 };
376 }; 342 };
377 343
378 /omit-if-no-ref/ <<
379 ethernet0_rgmii_pins_d: rgmii-3 { 344 ethernet0_rgmii_pins_d: rgmii-3 {
380 pins1 { 345 pins1 {
381 pinmux = <STM32_PINMUX 346 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
382 <STM32_PINMUX 347 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
383 <STM32_PINMUX 348 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
384 <STM32_PINMUX 349 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
385 <STM32_PINMUX 350 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
386 <STM32_PINMUX 351 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
387 <STM32_PINMUX 352 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
388 bias-disable; 353 bias-disable;
389 drive-push-pull; 354 drive-push-pull;
390 slew-rate = <2>; 355 slew-rate = <2>;
391 }; 356 };
392 pins2 { 357 pins2 {
393 pinmux = <STM32_PINMUX 358 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
394 bias-disable; 359 bias-disable;
395 drive-push-pull; 360 drive-push-pull;
396 slew-rate = <0>; 361 slew-rate = <0>;
397 }; 362 };
398 pins3 { 363 pins3 {
399 pinmux = <STM32_PINMUX 364 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
400 <STM32_PINMUX 365 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
401 <STM32_PINMUX 366 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
402 <STM32_PINMUX 367 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
403 <STM32_PINMUX 368 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
404 <STM32_PINMUX 369 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
405 bias-disable; 370 bias-disable;
406 }; 371 };
407 }; 372 };
408 373
409 /omit-if-no-ref/ <<
410 ethernet0_rgmii_sleep_pins_d: rgmii-sl 374 ethernet0_rgmii_sleep_pins_d: rgmii-sleep-3 {
411 pins1 { 375 pins1 {
412 pinmux = <STM32_PINMUX 376 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
413 <STM32_PINMUX 377 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
414 <STM32_PINMUX 378 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
415 <STM32_PINMUX 379 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
416 <STM32_PINMUX 380 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
417 <STM32_PINMUX 381 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
418 <STM32_PINMUX 382 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
419 <STM32_PINMUX 383 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
420 <STM32_PINMUX 384 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
421 <STM32_PINMUX 385 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
422 <STM32_PINMUX 386 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
423 <STM32_PINMUX 387 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
424 <STM32_PINMUX 388 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
425 <STM32_PINMUX 389 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
426 <STM32_PINMUX 390 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
427 }; 391 };
428 }; 392 };
429 393
430 /omit-if-no-ref/ <<
431 ethernet0_rgmii_pins_e: rgmii-4 { <<
432 pins1 { <<
433 pinmux = <STM32_PINMUX <<
434 <STM32_PINMUX <<
435 <STM32_PINMUX <<
436 <STM32_PINMUX <<
437 <STM32_PINMUX <<
438 <STM32_PINMUX <<
439 bias-disable; <<
440 drive-push-pull; <<
441 slew-rate = <2>; <<
442 }; <<
443 pins2 { <<
444 pinmux = <STM32_PINMUX <<
445 <STM32_PINMUX <<
446 <STM32_PINMUX <<
447 <STM32_PINMUX <<
448 <STM32_PINMUX <<
449 <STM32_PINMUX <<
450 bias-disable; <<
451 }; <<
452 }; <<
453 <<
454 /omit-if-no-ref/ <<
455 ethernet0_rgmii_sleep_pins_e: rgmii-sl <<
456 pins1 { <<
457 pinmux = <STM32_PINMUX <<
458 <STM32_PINMUX <<
459 <STM32_PINMUX <<
460 <STM32_PINMUX <<
461 <STM32_PINMUX <<
462 <STM32_PINMUX <<
463 <STM32_PINMUX <<
464 <STM32_PINMUX <<
465 <STM32_PINMUX <<
466 <STM32_PINMUX <<
467 <STM32_PINMUX <<
468 <STM32_PINMUX <<
469 }; <<
470 }; <<
471 <<
472 /omit-if-no-ref/ <<
473 ethernet0_rmii_pins_a: rmii-0 { 394 ethernet0_rmii_pins_a: rmii-0 {
474 pins1 { 395 pins1 {
475 pinmux = <STM32_PINMUX 396 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
476 <STM32_PINMUX 397 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
477 <STM32_PINMUX 398 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
478 <STM32_PINMUX 399 <STM32_PINMUX('A', 1, AF0)>, /* ETH1_RMII_REF_CLK */
479 <STM32_PINMUX 400 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
480 <STM32_PINMUX 401 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
481 bias-disable; 402 bias-disable;
482 drive-push-pull; 403 drive-push-pull;
483 slew-rate = <2>; 404 slew-rate = <2>;
484 }; 405 };
485 pins2 { 406 pins2 {
486 pinmux = <STM32_PINMUX 407 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
487 <STM32_PINMUX 408 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
488 <STM32_PINMUX 409 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
489 bias-disable; 410 bias-disable;
490 }; 411 };
491 }; 412 };
492 413
493 /omit-if-no-ref/ <<
494 ethernet0_rmii_sleep_pins_a: rmii-slee 414 ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
495 pins1 { 415 pins1 {
496 pinmux = <STM32_PINMUX 416 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
497 <STM32_PINMUX 417 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
498 <STM32_PINMUX 418 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
499 <STM32_PINMUX 419 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
500 <STM32_PINMUX 420 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
501 <STM32_PINMUX 421 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
502 <STM32_PINMUX 422 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
503 <STM32_PINMUX 423 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
504 <STM32_PINMUX 424 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
505 }; 425 };
506 }; 426 };
507 427
508 /omit-if-no-ref/ <<
509 ethernet0_rmii_pins_b: rmii-1 { 428 ethernet0_rmii_pins_b: rmii-1 {
510 pins1 { 429 pins1 {
511 pinmux = <STM32_PINMUX 430 pinmux = <STM32_PINMUX('B', 5, AF0)>, /* ETH1_CLK */
512 <STM32_PINMUX( 431 <STM32_PINMUX('C', 1, AF11)>, /* ETH1_MDC */
513 <STM32_PINMUX( 432 <STM32_PINMUX('G', 13, AF11)>, /* ETH1_TXD0 */
514 <STM32_PINMUX( 433 <STM32_PINMUX('G', 14, AF11)>; /* ETH1_TXD1 */
515 bias-disable; 434 bias-disable;
516 drive-push-pull; 435 drive-push-pull;
517 slew-rate = <1>; 436 slew-rate = <1>;
518 }; 437 };
519 pins2 { 438 pins2 {
520 pinmux = <STM32_PINMUX 439 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */
521 bias-disable; 440 bias-disable;
522 drive-push-pull; 441 drive-push-pull;
523 slew-rate = <0>; 442 slew-rate = <0>;
524 }; 443 };
525 pins3 { 444 pins3 {
526 pinmux = <STM32_PINMUX 445 pinmux = <STM32_PINMUX('A', 7, AF11)>, /* ETH1_CRS_DV */
527 <STM32_PINMUX( 446 <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RXD0 */
528 <STM32_PINMUX( 447 <STM32_PINMUX('C', 5, AF11)>; /* ETH1_RXD1 */
529 bias-disable; 448 bias-disable;
530 }; 449 };
531 pins4 { 450 pins4 {
532 pinmux = <STM32_PINMUX 451 pinmux = <STM32_PINMUX('B', 11, AF11)>; /* ETH1_TX_EN */
533 }; 452 };
534 }; 453 };
535 454
536 /omit-if-no-ref/ <<
537 ethernet0_rmii_sleep_pins_b: rmii-slee 455 ethernet0_rmii_sleep_pins_b: rmii-sleep-1 {
538 pins1 { 456 pins1 {
539 pinmux = <STM32_PINMUX 457 pinmux = <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
540 <STM32_PINMUX( 458 <STM32_PINMUX('A', 7, ANALOG)>, /* ETH1_CRS_DV */
541 <STM32_PINMUX( 459 <STM32_PINMUX('B', 5, ANALOG)>, /* ETH1_CLK */
542 <STM32_PINMUX( 460 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_TX_EN */
543 <STM32_PINMUX( 461 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
544 <STM32_PINMUX( 462 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RXD0 */
545 <STM32_PINMUX( 463 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RXD1 */
546 <STM32_PINMUX( 464 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_TXD0 */
547 <STM32_PINMUX( 465 <STM32_PINMUX('G', 14, ANALOG)>; /* ETH1_TXD1 */
548 }; 466 };
549 }; 467 };
550 468
551 /omit-if-no-ref/ <<
552 ethernet0_rmii_pins_c: rmii-2 { 469 ethernet0_rmii_pins_c: rmii-2 {
553 pins1 { 470 pins1 {
554 pinmux = <STM32_PINMUX 471 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
555 <STM32_PINMUX 472 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
556 <STM32_PINMUX 473 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
557 <STM32_PINMUX 474 <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK */
558 <STM32_PINMUX 475 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
559 <STM32_PINMUX 476 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
560 bias-disable; 477 bias-disable;
561 drive-push-pull; 478 drive-push-pull;
562 slew-rate = <2>; 479 slew-rate = <2>;
563 }; 480 };
564 pins2 { 481 pins2 {
565 pinmux = <STM32_PINMUX 482 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
566 <STM32_PINMUX 483 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
567 <STM32_PINMUX 484 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
568 bias-disable; 485 bias-disable;
569 }; 486 };
570 }; 487 };
571 488
572 /omit-if-no-ref/ <<
573 ethernet0_rmii_sleep_pins_c: rmii-slee 489 ethernet0_rmii_sleep_pins_c: rmii-sleep-2 {
574 pins1 { 490 pins1 {
575 pinmux = <STM32_PINMUX 491 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
576 <STM32_PINMUX 492 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
577 <STM32_PINMUX 493 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
578 <STM32_PINMUX 494 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
579 <STM32_PINMUX 495 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
580 <STM32_PINMUX 496 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
581 <STM32_PINMUX 497 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
582 <STM32_PINMUX 498 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
583 <STM32_PINMUX 499 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
584 }; 500 };
585 }; 501 };
586 502
587 /omit-if-no-ref/ <<
588 fmc_pins_a: fmc-0 { 503 fmc_pins_a: fmc-0 {
589 pins1 { 504 pins1 {
590 pinmux = <STM32_PINMUX 505 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
591 <STM32_PINMUX 506 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
592 <STM32_PINMUX 507 <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
593 <STM32_PINMUX 508 <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
594 <STM32_PINMUX 509 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
595 <STM32_PINMUX 510 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
596 <STM32_PINMUX 511 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
597 <STM32_PINMUX 512 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
598 <STM32_PINMUX 513 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
599 <STM32_PINMUX 514 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
600 <STM32_PINMUX 515 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
601 <STM32_PINMUX 516 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
602 <STM32_PINMUX 517 <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
603 bias-disable; 518 bias-disable;
604 drive-push-pull; 519 drive-push-pull;
605 slew-rate = <1>; 520 slew-rate = <1>;
606 }; 521 };
607 pins2 { 522 pins2 {
608 pinmux = <STM32_PINMUX 523 pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
609 bias-pull-up; 524 bias-pull-up;
610 }; 525 };
611 }; 526 };
612 527
613 /omit-if-no-ref/ <<
614 fmc_sleep_pins_a: fmc-sleep-0 { 528 fmc_sleep_pins_a: fmc-sleep-0 {
615 pins { 529 pins {
616 pinmux = <STM32_PINMUX 530 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
617 <STM32_PINMUX 531 <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
618 <STM32_PINMUX 532 <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
619 <STM32_PINMUX 533 <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
620 <STM32_PINMUX 534 <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
621 <STM32_PINMUX 535 <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
622 <STM32_PINMUX 536 <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
623 <STM32_PINMUX 537 <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
624 <STM32_PINMUX 538 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
625 <STM32_PINMUX 539 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
626 <STM32_PINMUX 540 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
627 <STM32_PINMUX 541 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
628 <STM32_PINMUX 542 <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
629 <STM32_PINMUX 543 <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
630 }; 544 };
631 }; 545 };
632 546
633 /omit-if-no-ref/ <<
634 fmc_pins_b: fmc-1 { 547 fmc_pins_b: fmc-1 {
635 pins { 548 pins {
636 pinmux = <STM32_PINMUX 549 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
637 <STM32_PINMUX 550 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
638 <STM32_PINMUX 551 <STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */
639 <STM32_PINMUX 552 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
640 <STM32_PINMUX 553 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
641 <STM32_PINMUX 554 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
642 <STM32_PINMUX 555 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
643 <STM32_PINMUX 556 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
644 <STM32_PINMUX 557 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
645 <STM32_PINMUX 558 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
646 <STM32_PINMUX 559 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
647 <STM32_PINMUX 560 <STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */
648 <STM32_PINMUX 561 <STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */
649 <STM32_PINMUX 562 <STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */
650 <STM32_PINMUX 563 <STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */
651 <STM32_PINMUX 564 <STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */
652 <STM32_PINMUX 565 <STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */
653 <STM32_PINMUX 566 <STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */
654 <STM32_PINMUX 567 <STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */
655 <STM32_PINMUX 568 <STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */
656 <STM32_PINMUX 569 <STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */
657 bias-disable; 570 bias-disable;
658 drive-push-pull; 571 drive-push-pull;
659 slew-rate = <3>; 572 slew-rate = <3>;
660 }; 573 };
661 }; 574 };
662 575
663 /omit-if-no-ref/ <<
664 fmc_sleep_pins_b: fmc-sleep-1 { 576 fmc_sleep_pins_b: fmc-sleep-1 {
665 pins { 577 pins {
666 pinmux = <STM32_PINMUX 578 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
667 <STM32_PINMUX 579 <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
668 <STM32_PINMUX 580 <STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */
669 <STM32_PINMUX 581 <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
670 <STM32_PINMUX 582 <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
671 <STM32_PINMUX 583 <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
672 <STM32_PINMUX 584 <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
673 <STM32_PINMUX 585 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
674 <STM32_PINMUX 586 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
675 <STM32_PINMUX 587 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
676 <STM32_PINMUX 588 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
677 <STM32_PINMUX 589 <STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */
678 <STM32_PINMUX 590 <STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */
679 <STM32_PINMUX 591 <STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */
680 <STM32_PINMUX 592 <STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */
681 <STM32_PINMUX 593 <STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */
682 <STM32_PINMUX 594 <STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */
683 <STM32_PINMUX 595 <STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */
684 <STM32_PINMUX 596 <STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */
685 <STM32_PINMUX 597 <STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */
686 <STM32_PINMUX 598 <STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */
687 }; 599 };
688 }; 600 };
689 601
690 /omit-if-no-ref/ <<
691 i2c1_pins_a: i2c1-0 { 602 i2c1_pins_a: i2c1-0 {
692 pins { 603 pins {
693 pinmux = <STM32_PINMUX 604 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
694 <STM32_PINMUX 605 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
695 bias-disable; 606 bias-disable;
696 drive-open-drain; 607 drive-open-drain;
697 slew-rate = <0>; 608 slew-rate = <0>;
698 }; 609 };
699 }; 610 };
700 611
701 /omit-if-no-ref/ <<
702 i2c1_sleep_pins_a: i2c1-sleep-0 { 612 i2c1_sleep_pins_a: i2c1-sleep-0 {
703 pins { 613 pins {
704 pinmux = <STM32_PINMUX 614 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
705 <STM32_PINMUX 615 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
706 }; 616 };
707 }; 617 };
708 618
709 /omit-if-no-ref/ <<
710 i2c1_pins_b: i2c1-1 { 619 i2c1_pins_b: i2c1-1 {
711 pins { 620 pins {
712 pinmux = <STM32_PINMUX 621 pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
713 <STM32_PINMUX 622 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
714 bias-disable; 623 bias-disable;
715 drive-open-drain; 624 drive-open-drain;
716 slew-rate = <0>; 625 slew-rate = <0>;
717 }; 626 };
718 }; 627 };
719 628
720 /omit-if-no-ref/ <<
721 i2c1_sleep_pins_b: i2c1-sleep-1 { 629 i2c1_sleep_pins_b: i2c1-sleep-1 {
722 pins { 630 pins {
723 pinmux = <STM32_PINMUX 631 pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
724 <STM32_PINMUX 632 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
725 }; 633 };
726 }; 634 };
727 635
728 /omit-if-no-ref/ <<
729 i2c2_pins_a: i2c2-0 { 636 i2c2_pins_a: i2c2-0 {
730 pins { 637 pins {
731 pinmux = <STM32_PINMUX 638 pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
732 <STM32_PINMUX 639 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
733 bias-disable; 640 bias-disable;
734 drive-open-drain; 641 drive-open-drain;
735 slew-rate = <0>; 642 slew-rate = <0>;
736 }; 643 };
737 }; 644 };
738 645
739 /omit-if-no-ref/ <<
740 i2c2_sleep_pins_a: i2c2-sleep-0 { 646 i2c2_sleep_pins_a: i2c2-sleep-0 {
741 pins { 647 pins {
742 pinmux = <STM32_PINMUX 648 pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
743 <STM32_PINMUX 649 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
744 }; 650 };
745 }; 651 };
746 652
747 /omit-if-no-ref/ <<
748 i2c2_pins_b1: i2c2-1 { 653 i2c2_pins_b1: i2c2-1 {
749 pins { 654 pins {
750 pinmux = <STM32_PINMUX 655 pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
751 bias-disable; 656 bias-disable;
752 drive-open-drain; 657 drive-open-drain;
753 slew-rate = <0>; 658 slew-rate = <0>;
754 }; 659 };
755 }; 660 };
756 661
757 /omit-if-no-ref/ <<
758 i2c2_sleep_pins_b1: i2c2-sleep-1 { 662 i2c2_sleep_pins_b1: i2c2-sleep-1 {
759 pins { 663 pins {
760 pinmux = <STM32_PINMUX 664 pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
761 }; 665 };
762 }; 666 };
763 667
764 /omit-if-no-ref/ <<
765 i2c2_pins_c: i2c2-2 { 668 i2c2_pins_c: i2c2-2 {
766 pins { 669 pins {
767 pinmux = <STM32_PINMUX 670 pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
768 <STM32_PINMUX 671 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
769 bias-disable; 672 bias-disable;
770 drive-open-drain; 673 drive-open-drain;
771 slew-rate = <0>; 674 slew-rate = <0>;
772 }; 675 };
773 }; 676 };
774 677
775 /omit-if-no-ref/ <<
776 i2c2_pins_sleep_c: i2c2-sleep-2 { 678 i2c2_pins_sleep_c: i2c2-sleep-2 {
777 pins { 679 pins {
778 pinmux = <STM32_PINMUX 680 pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
779 <STM32_PINMUX 681 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
780 }; 682 };
781 }; 683 };
782 684
783 /omit-if-no-ref/ <<
784 i2c5_pins_a: i2c5-0 { 685 i2c5_pins_a: i2c5-0 {
785 pins { 686 pins {
786 pinmux = <STM32_PINMUX 687 pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
787 <STM32_PINMUX 688 <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
788 bias-disable; 689 bias-disable;
789 drive-open-drain; 690 drive-open-drain;
790 slew-rate = <0>; 691 slew-rate = <0>;
791 }; 692 };
792 }; 693 };
793 694
794 /omit-if-no-ref/ <<
795 i2c5_sleep_pins_a: i2c5-sleep-0 { 695 i2c5_sleep_pins_a: i2c5-sleep-0 {
796 pins { 696 pins {
797 pinmux = <STM32_PINMUX 697 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
798 <STM32_PINMUX 698 <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
799 699
800 }; 700 };
801 }; 701 };
802 702
803 /omit-if-no-ref/ <<
804 i2c5_pins_b: i2c5-1 { 703 i2c5_pins_b: i2c5-1 {
805 pins { 704 pins {
806 pinmux = <STM32_PINMUX 705 pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */
807 <STM32_PINMUX 706 <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */
808 bias-disable; 707 bias-disable;
809 drive-open-drain; 708 drive-open-drain;
810 slew-rate = <0>; 709 slew-rate = <0>;
811 }; 710 };
812 }; 711 };
813 712
814 /omit-if-no-ref/ <<
815 i2c5_sleep_pins_b: i2c5-sleep-1 { 713 i2c5_sleep_pins_b: i2c5-sleep-1 {
816 pins { 714 pins {
817 pinmux = <STM32_PINMUX 715 pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */
818 <STM32_PINMUX 716 <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */
819 }; 717 };
820 }; 718 };
821 719
822 /omit-if-no-ref/ <<
823 i2s2_pins_a: i2s2-0 { 720 i2s2_pins_a: i2s2-0 {
824 pins { 721 pins {
825 pinmux = <STM32_PINMUX 722 pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
826 <STM32_PINMUX 723 <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
827 <STM32_PINMUX 724 <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
828 slew-rate = <1>; 725 slew-rate = <1>;
829 drive-push-pull; 726 drive-push-pull;
830 bias-disable; 727 bias-disable;
831 }; 728 };
832 }; 729 };
833 730
834 /omit-if-no-ref/ <<
835 i2s2_sleep_pins_a: i2s2-sleep-0 { 731 i2s2_sleep_pins_a: i2s2-sleep-0 {
836 pins { 732 pins {
837 pinmux = <STM32_PINMUX 733 pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
838 <STM32_PINMUX 734 <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
839 <STM32_PINMUX 735 <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
840 }; 736 };
841 }; 737 };
842 738
843 /omit-if-no-ref/ <<
844 i2s2_pins_b: i2s2-1 { <<
845 pins { <<
846 pinmux = <STM32_PINMUX <<
847 <STM32_PINMUX <<
848 <STM32_PINMUX <<
849 bias-disable; <<
850 drive-push-pull; <<
851 slew-rate = <1>; <<
852 }; <<
853 }; <<
854 <<
855 /omit-if-no-ref/ <<
856 i2s2_sleep_pins_b: i2s2-sleep-1 { <<
857 pins { <<
858 pinmux = <STM32_PINMUX <<
859 <STM32_PINMUX <<
860 <STM32_PINMUX <<
861 }; <<
862 }; <<
863 <<
864 /omit-if-no-ref/ <<
865 ltdc_pins_a: ltdc-0 { 739 ltdc_pins_a: ltdc-0 {
866 pins { 740 pins {
867 pinmux = <STM32_PINMUX 741 pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
868 <STM32_PINMUX 742 <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
869 <STM32_PINMUX 743 <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
870 <STM32_PINMUX 744 <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
871 <STM32_PINMUX 745 <STM32_PINMUX('H', 2, AF14)>, /* LCD_R0 */
872 <STM32_PINMUX 746 <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
873 <STM32_PINMUX 747 <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
874 <STM32_PINMUX 748 <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
875 <STM32_PINMUX 749 <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
876 <STM32_PINMUX 750 <STM32_PINMUX('C', 0, AF14)>, /* LCD_R5 */
877 <STM32_PINMUX 751 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
878 <STM32_PINMUX 752 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
879 <STM32_PINMUX 753 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
880 <STM32_PINMUX 754 <STM32_PINMUX('E', 6, AF14)>, /* LCD_G1 */
881 <STM32_PINMUX 755 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
882 <STM32_PINMUX 756 <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
883 <STM32_PINMUX 757 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
884 <STM32_PINMUX 758 <STM32_PINMUX('I', 0, AF14)>, /* LCD_G5 */
885 <STM32_PINMUX 759 <STM32_PINMUX('I', 1, AF14)>, /* LCD_G6 */
886 <STM32_PINMUX 760 <STM32_PINMUX('I', 2, AF14)>, /* LCD_G7 */
887 <STM32_PINMUX 761 <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
888 <STM32_PINMUX 762 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
889 <STM32_PINMUX 763 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
890 <STM32_PINMUX 764 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
891 <STM32_PINMUX 765 <STM32_PINMUX('I', 4, AF14)>, /* LCD_B4 */
892 <STM32_PINMUX 766 <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
893 <STM32_PINMUX 767 <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
894 <STM32_PINMUX 768 <STM32_PINMUX('D', 8, AF14)>; /* LCD_B7 */
895 bias-disable; 769 bias-disable;
896 drive-push-pull; 770 drive-push-pull;
897 slew-rate = <1>; 771 slew-rate = <1>;
898 }; 772 };
899 }; 773 };
900 774
901 /omit-if-no-ref/ <<
902 ltdc_sleep_pins_a: ltdc-sleep-0 { 775 ltdc_sleep_pins_a: ltdc-sleep-0 {
903 pins { 776 pins {
904 pinmux = <STM32_PINMUX 777 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
905 <STM32_PINMUX 778 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
906 <STM32_PINMUX 779 <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
907 <STM32_PINMUX 780 <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
908 <STM32_PINMUX 781 <STM32_PINMUX('H', 2, ANALOG)>, /* LCD_R0 */
909 <STM32_PINMUX 782 <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
910 <STM32_PINMUX 783 <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
911 <STM32_PINMUX 784 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
912 <STM32_PINMUX 785 <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
913 <STM32_PINMUX 786 <STM32_PINMUX('C', 0, ANALOG)>, /* LCD_R5 */
914 <STM32_PINMUX 787 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
915 <STM32_PINMUX 788 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
916 <STM32_PINMUX 789 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
917 <STM32_PINMUX 790 <STM32_PINMUX('E', 6, ANALOG)>, /* LCD_G1 */
918 <STM32_PINMUX 791 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
919 <STM32_PINMUX 792 <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
920 <STM32_PINMUX 793 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
921 <STM32_PINMUX 794 <STM32_PINMUX('I', 0, ANALOG)>, /* LCD_G5 */
922 <STM32_PINMUX 795 <STM32_PINMUX('I', 1, ANALOG)>, /* LCD_G6 */
923 <STM32_PINMUX 796 <STM32_PINMUX('I', 2, ANALOG)>, /* LCD_G7 */
924 <STM32_PINMUX 797 <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
925 <STM32_PINMUX 798 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
926 <STM32_PINMUX 799 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
927 <STM32_PINMUX 800 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
928 <STM32_PINMUX 801 <STM32_PINMUX('I', 4, ANALOG)>, /* LCD_B4 */
929 <STM32_PINMUX 802 <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
930 <STM32_PINMUX 803 <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
931 <STM32_PINMUX 804 <STM32_PINMUX('D', 8, ANALOG)>; /* LCD_B7 */
932 }; 805 };
933 }; 806 };
934 807
935 /omit-if-no-ref/ <<
936 ltdc_pins_b: ltdc-1 { 808 ltdc_pins_b: ltdc-1 {
937 pins { 809 pins {
938 pinmux = <STM32_PINMUX 810 pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
939 <STM32_PINMUX 811 <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
940 <STM32_PINMUX 812 <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
941 <STM32_PINMUX 813 <STM32_PINMUX('K', 7, AF14)>, /* LCD_DE */
942 <STM32_PINMUX 814 <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
943 <STM32_PINMUX 815 <STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */
944 <STM32_PINMUX 816 <STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */
945 <STM32_PINMUX 817 <STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */
946 <STM32_PINMUX 818 <STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */
947 <STM32_PINMUX 819 <STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */
948 <STM32_PINMUX 820 <STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */
949 <STM32_PINMUX 821 <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */
950 <STM32_PINMUX 822 <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */
951 <STM32_PINMUX 823 <STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */
952 <STM32_PINMUX 824 <STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */
953 <STM32_PINMUX 825 <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
954 <STM32_PINMUX 826 <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
955 <STM32_PINMUX 827 <STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */
956 <STM32_PINMUX 828 <STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */
957 <STM32_PINMUX 829 <STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */
958 <STM32_PINMUX 830 <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
959 <STM32_PINMUX 831 <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
960 <STM32_PINMUX 832 <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
961 <STM32_PINMUX 833 <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
962 <STM32_PINMUX 834 <STM32_PINMUX('K', 3, AF14)>, /* LCD_B4 */
963 <STM32_PINMUX 835 <STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */
964 <STM32_PINMUX 836 <STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */
965 <STM32_PINMUX 837 <STM32_PINMUX('K', 6, AF14)>; /* LCD_B7 */
966 bias-disable; 838 bias-disable;
967 drive-push-pull; 839 drive-push-pull;
968 slew-rate = <1>; 840 slew-rate = <1>;
969 }; 841 };
970 }; 842 };
971 843
972 /omit-if-no-ref/ <<
973 ltdc_sleep_pins_b: ltdc-sleep-1 { 844 ltdc_sleep_pins_b: ltdc-sleep-1 {
974 pins { 845 pins {
975 pinmux = <STM32_PINMUX 846 pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
976 <STM32_PINMUX 847 <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
977 <STM32_PINMUX 848 <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
978 <STM32_PINMUX 849 <STM32_PINMUX('K', 7, ANALOG)>, /* LCD_DE */
979 <STM32_PINMUX 850 <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
980 <STM32_PINMUX 851 <STM32_PINMUX('J', 0, ANALOG)>, /* LCD_R1 */
981 <STM32_PINMUX 852 <STM32_PINMUX('J', 1, ANALOG)>, /* LCD_R2 */
982 <STM32_PINMUX 853 <STM32_PINMUX('J', 2, ANALOG)>, /* LCD_R3 */
983 <STM32_PINMUX 854 <STM32_PINMUX('J', 3, ANALOG)>, /* LCD_R4 */
984 <STM32_PINMUX 855 <STM32_PINMUX('J', 4, ANALOG)>, /* LCD_R5 */
985 <STM32_PINMUX 856 <STM32_PINMUX('J', 5, ANALOG)>, /* LCD_R6 */
986 <STM32_PINMUX 857 <STM32_PINMUX('J', 6, ANALOG)>, /* LCD_R7 */
987 <STM32_PINMUX 858 <STM32_PINMUX('J', 7, ANALOG)>, /* LCD_G0 */
988 <STM32_PINMUX 859 <STM32_PINMUX('J', 8, ANALOG)>, /* LCD_G1 */
989 <STM32_PINMUX 860 <STM32_PINMUX('J', 9, ANALOG)>, /* LCD_G2 */
990 <STM32_PINMUX 861 <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
991 <STM32_PINMUX 862 <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
992 <STM32_PINMUX 863 <STM32_PINMUX('K', 0, ANALOG)>, /* LCD_G5 */
993 <STM32_PINMUX 864 <STM32_PINMUX('K', 1, ANALOG)>, /* LCD_G6 */
994 <STM32_PINMUX 865 <STM32_PINMUX('K', 2, ANALOG)>, /* LCD_G7 */
995 <STM32_PINMUX 866 <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
996 <STM32_PINMUX 867 <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
997 <STM32_PINMUX 868 <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
998 <STM32_PINMUX 869 <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
999 <STM32_PINMUX 870 <STM32_PINMUX('K', 3, ANALOG)>, /* LCD_B4 */
1000 <STM32_PINMU 871 <STM32_PINMUX('K', 4, ANALOG)>, /* LCD_B5 */
1001 <STM32_PINMU 872 <STM32_PINMUX('K', 5, ANALOG)>, /* LCD_B6 */
1002 <STM32_PINMU 873 <STM32_PINMUX('K', 6, ANALOG)>; /* LCD_B7 */
1003 }; 874 };
1004 }; 875 };
1005 876
1006 /omit-if-no-ref/ <<
1007 ltdc_pins_c: ltdc-2 { 877 ltdc_pins_c: ltdc-2 {
1008 pins1 { 878 pins1 {
1009 pinmux = <STM32_PINMU 879 pinmux = <STM32_PINMUX('B', 1, AF9)>, /* LTDC_R6 */
1010 <STM32_PINMU 880 <STM32_PINMUX('B', 9, AF14)>, /* LTDC_B7 */
1011 <STM32_PINMU 881 <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */
1012 <STM32_PINMU 882 <STM32_PINMUX('D', 3, AF14)>, /* LTDC_G7 */
1013 <STM32_PINMU 883 <STM32_PINMUX('D', 6, AF14)>, /* LTDC_B2 */
1014 <STM32_PINMU 884 <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
1015 <STM32_PINMU 885 <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */
1016 <STM32_PINMU 886 <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
1017 <STM32_PINMU 887 <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
1018 <STM32_PINMU 888 <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
1019 <STM32_PINMU 889 <STM32_PINMUX('H', 4, AF9)>, /* LTDC_G5 */
1020 <STM32_PINMU 890 <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */
1021 <STM32_PINMU 891 <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */
1022 <STM32_PINMU 892 <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
1023 <STM32_PINMU 893 <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
1024 <STM32_PINMU 894 <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
1025 <STM32_PINMU 895 <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */
1026 <STM32_PINMU 896 <STM32_PINMUX('I', 5, AF14)>, /* LTDC_B5 */
1027 <STM32_PINMU 897 <STM32_PINMUX('I', 6, AF14)>, /* LTDC_B6 */
1028 <STM32_PINMU 898 <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */
1029 <STM32_PINMU 899 <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
1030 bias-disable; 900 bias-disable;
1031 drive-push-pull; 901 drive-push-pull;
1032 slew-rate = <0>; 902 slew-rate = <0>;
1033 }; 903 };
1034 pins2 { 904 pins2 {
1035 pinmux = <STM32_PINMU 905 pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
1036 bias-disable; 906 bias-disable;
1037 drive-push-pull; 907 drive-push-pull;
1038 slew-rate = <1>; 908 slew-rate = <1>;
1039 }; 909 };
1040 }; 910 };
1041 911
1042 /omit-if-no-ref/ <<
1043 ltdc_sleep_pins_c: ltdc-sleep-2 { 912 ltdc_sleep_pins_c: ltdc-sleep-2 {
1044 pins1 { 913 pins1 {
1045 pinmux = <STM32_PINMU 914 pinmux = <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_R6 */
1046 <STM32_PINMU 915 <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */
1047 <STM32_PINMU 916 <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
1048 <STM32_PINMU 917 <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */
1049 <STM32_PINMU 918 <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */
1050 <STM32_PINMU 919 <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
1051 <STM32_PINMU 920 <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */
1052 <STM32_PINMU 921 <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
1053 <STM32_PINMU 922 <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */
1054 <STM32_PINMU 923 <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
1055 <STM32_PINMU 924 <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G5 */
1056 <STM32_PINMU 925 <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
1057 <STM32_PINMU 926 <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
1058 <STM32_PINMU 927 <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
1059 <STM32_PINMU 928 <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
1060 <STM32_PINMU 929 <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */
1061 <STM32_PINMU 930 <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
1062 <STM32_PINMU 931 <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */
1063 <STM32_PINMU 932 <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */
1064 <STM32_PINMU 933 <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
1065 <STM32_PINMU 934 <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */
1066 <STM32_PINMU 935 <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */
1067 }; 936 };
1068 }; 937 };
1069 938
1070 /omit-if-no-ref/ <<
1071 ltdc_pins_d: ltdc-3 { 939 ltdc_pins_d: ltdc-3 {
1072 pins1 { 940 pins1 {
1073 pinmux = <STM32_PINMU 941 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LCD_CLK */
1074 bias-disable; 942 bias-disable;
1075 drive-push-pull; 943 drive-push-pull;
1076 slew-rate = <3>; 944 slew-rate = <3>;
1077 }; 945 };
1078 pins2 { 946 pins2 {
1079 pinmux = <STM32_PINMU 947 pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
1080 <STM32_PINMU 948 <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
1081 <STM32_PINMU 949 <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */
1082 <STM32_PINMU 950 <STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */
1083 <STM32_PINMU 951 <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
1084 <STM32_PINMU 952 <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
1085 <STM32_PINMU 953 <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
1086 <STM32_PINMU 954 <STM32_PINMUX('A', 5, AF14)>, /* LCD_R4 */
1087 <STM32_PINMU 955 <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */
1088 <STM32_PINMU 956 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
1089 <STM32_PINMU 957 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
1090 <STM32_PINMU 958 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
1091 <STM32_PINMU 959 <STM32_PINMUX('B', 0, AF14)>, /* LCD_G1 */
1092 <STM32_PINMU 960 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
1093 <STM32_PINMU 961 <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */
1094 <STM32_PINMU 962 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
1095 <STM32_PINMU 963 <STM32_PINMUX('H', 4, AF9)>, /* LCD_G5 */
1096 <STM32_PINMU 964 <STM32_PINMUX('I', 11, AF9)>, /* LCD_G6 */
1097 <STM32_PINMU 965 <STM32_PINMUX('G', 8, AF14)>, /* LCD_G7 */
1098 <STM32_PINMU 966 <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
1099 <STM32_PINMU 967 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
1100 <STM32_PINMU 968 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
1101 <STM32_PINMU 969 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
1102 <STM32_PINMU 970 <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */
1103 <STM32_PINMU 971 <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
1104 <STM32_PINMU 972 <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
1105 <STM32_PINMU 973 <STM32_PINMUX('I', 7, AF14)>; /* LCD_B7 */
1106 bias-disable; 974 bias-disable;
1107 drive-push-pull; 975 drive-push-pull;
1108 slew-rate = <2>; 976 slew-rate = <2>;
1109 }; 977 };
1110 }; 978 };
1111 979
1112 /omit-if-no-ref/ <<
1113 ltdc_sleep_pins_d: ltdc-sleep-3 { 980 ltdc_sleep_pins_d: ltdc-sleep-3 {
1114 pins { 981 pins {
1115 pinmux = <STM32_PINMU 982 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
1116 <STM32_PINMU 983 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
1117 <STM32_PINMU 984 <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
1118 <STM32_PINMU 985 <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */
1119 <STM32_PINMU 986 <STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */
1120 <STM32_PINMU 987 <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
1121 <STM32_PINMU 988 <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
1122 <STM32_PINMU 989 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
1123 <STM32_PINMU 990 <STM32_PINMUX('A', 5, ANALOG)>, /* LCD_R4 */
1124 <STM32_PINMU 991 <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */
1125 <STM32_PINMU 992 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
1126 <STM32_PINMU 993 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
1127 <STM32_PINMU 994 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
1128 <STM32_PINMU 995 <STM32_PINMUX('B', 0, ANALOG)>, /* LCD_G1 */
1129 <STM32_PINMU 996 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
1130 <STM32_PINMU 997 <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */
1131 <STM32_PINMU 998 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
1132 <STM32_PINMU 999 <STM32_PINMUX('H', 4, ANALOG)>, /* LCD_G5 */
1133 <STM32_PINMU 1000 <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
1134 <STM32_PINMU 1001 <STM32_PINMUX('G', 8, ANALOG)>, /* LCD_G7 */
1135 <STM32_PINMU 1002 <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
1136 <STM32_PINMU 1003 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
1137 <STM32_PINMU 1004 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
1138 <STM32_PINMU 1005 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
1139 <STM32_PINMU 1006 <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */
1140 <STM32_PINMU 1007 <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
1141 <STM32_PINMU 1008 <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
1142 <STM32_PINMU 1009 <STM32_PINMUX('I', 7, ANALOG)>; /* LCD_B7 */
1143 }; 1010 };
1144 }; 1011 };
1145 1012
1146 /omit-if-no-ref/ <<
1147 ltdc_pins_e: ltdc-4 { <<
1148 pins1 { <<
1149 pinmux = <STM32_PINMU <<
1150 <STM32_PINMU <<
1151 <STM32_PINMU <<
1152 <STM32_PINMU <<
1153 <STM32_PINMU <<
1154 <STM32_PINMU <<
1155 <STM32_PINMU <<
1156 <STM32_PINMU <<
1157 <STM32_PINMU <<
1158 <STM32_PINMU <<
1159 <STM32_PINMU <<
1160 <STM32_PINMU <<
1161 <STM32_PINMU <<
1162 <STM32_PINMU <<
1163 <STM32_PINMU <<
1164 <STM32_PINMU <<
1165 <STM32_PINMU <<
1166 <STM32_PINMU <<
1167 <STM32_PINMU <<
1168 <STM32_PINMU <<
1169 <STM32_PINMU <<
1170 <STM32_PINMU <<
1171 <STM32_PINMU <<
1172 <STM32_PINMU <<
1173 <STM32_PINMU <<
1174 <STM32_PINMU <<
1175 <STM32_PINMU <<
1176 bias-disable; <<
1177 drive-push-pull; <<
1178 slew-rate = <0>; <<
1179 }; <<
1180 <<
1181 pins2 { <<
1182 pinmux = <STM32_PINMU <<
1183 bias-disable; <<
1184 drive-push-pull; <<
1185 slew-rate = <1>; <<
1186 }; <<
1187 }; <<
1188 <<
1189 /omit-if-no-ref/ <<
1190 ltdc_sleep_pins_e: ltdc-sleep-4 { <<
1191 pins { <<
1192 pinmux = <STM32_PINMU <<
1193 <STM32_PINMU <<
1194 <STM32_PINMU <<
1195 <STM32_PINMU <<
1196 <STM32_PINMU <<
1197 <STM32_PINMU <<
1198 <STM32_PINMU <<
1199 <STM32_PINMU <<
1200 <STM32_PINMU <<
1201 <STM32_PINMU <<
1202 <STM32_PINMU <<
1203 <STM32_PINMU <<
1204 <STM32_PINMU <<
1205 <STM32_PINMU <<
1206 <STM32_PINMU <<
1207 <STM32_PINMU <<
1208 <STM32_PINMU <<
1209 <STM32_PINMU <<
1210 <STM32_PINMU <<
1211 <STM32_PINMU <<
1212 <STM32_PINMU <<
1213 <STM32_PINMU <<
1214 <STM32_PINMU <<
1215 <STM32_PINMU <<
1216 <STM32_PINMU <<
1217 <STM32_PINMU <<
1218 <STM32_PINMU <<
1219 <STM32_PINMU <<
1220 }; <<
1221 }; <<
1222 <<
1223 /omit-if-no-ref/ <<
1224 mco1_pins_a: mco1-0 { 1013 mco1_pins_a: mco1-0 {
1225 pins { 1014 pins {
1226 pinmux = <STM32_PINMU 1015 pinmux = <STM32_PINMUX('A', 13, AF2)>; /* MCO1 */
1227 bias-disable; 1016 bias-disable;
1228 drive-push-pull; 1017 drive-push-pull;
1229 slew-rate = <1>; 1018 slew-rate = <1>;
1230 }; 1019 };
1231 }; 1020 };
1232 1021
1233 /omit-if-no-ref/ <<
1234 mco1_sleep_pins_a: mco1-sleep-0 { 1022 mco1_sleep_pins_a: mco1-sleep-0 {
1235 pins { 1023 pins {
1236 pinmux = <STM32_PINMU 1024 pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* MCO1 */
1237 }; 1025 };
1238 }; 1026 };
1239 1027
1240 /omit-if-no-ref/ <<
1241 mco2_pins_a: mco2-0 { 1028 mco2_pins_a: mco2-0 {
1242 pins { 1029 pins {
1243 pinmux = <STM32_PINMU 1030 pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */
1244 bias-disable; 1031 bias-disable;
1245 drive-push-pull; 1032 drive-push-pull;
1246 slew-rate = <2>; 1033 slew-rate = <2>;
1247 }; 1034 };
1248 }; 1035 };
1249 1036
1250 /omit-if-no-ref/ <<
1251 mco2_sleep_pins_a: mco2-sleep-0 { 1037 mco2_sleep_pins_a: mco2-sleep-0 {
1252 pins { 1038 pins {
1253 pinmux = <STM32_PINMU 1039 pinmux = <STM32_PINMUX('G', 2, ANALOG)>; /* MCO2 */
1254 }; 1040 };
1255 }; 1041 };
1256 1042
1257 /omit-if-no-ref/ <<
1258 m_can1_pins_a: m-can1-0 { 1043 m_can1_pins_a: m-can1-0 {
1259 pins1 { 1044 pins1 {
1260 pinmux = <STM32_PINMU 1045 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
1261 slew-rate = <1>; 1046 slew-rate = <1>;
1262 drive-push-pull; 1047 drive-push-pull;
1263 bias-disable; 1048 bias-disable;
1264 }; 1049 };
1265 pins2 { 1050 pins2 {
1266 pinmux = <STM32_PINMU 1051 pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
1267 bias-disable; 1052 bias-disable;
1268 }; 1053 };
1269 }; 1054 };
1270 1055
1271 /omit-if-no-ref/ <<
1272 m_can1_sleep_pins_a: m_can1-sleep-0 { 1056 m_can1_sleep_pins_a: m_can1-sleep-0 {
1273 pins { 1057 pins {
1274 pinmux = <STM32_PINMU 1058 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
1275 <STM32_PINMU 1059 <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
1276 }; 1060 };
1277 }; 1061 };
1278 1062
1279 /omit-if-no-ref/ <<
1280 m_can1_pins_b: m-can1-1 { 1063 m_can1_pins_b: m-can1-1 {
1281 pins1 { 1064 pins1 {
1282 pinmux = <STM32_PINMU 1065 pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
1283 slew-rate = <1>; 1066 slew-rate = <1>;
1284 drive-push-pull; 1067 drive-push-pull;
1285 bias-disable; 1068 bias-disable;
1286 }; 1069 };
1287 pins2 { 1070 pins2 {
1288 pinmux = <STM32_PINMU 1071 pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
1289 bias-disable; 1072 bias-disable;
1290 }; 1073 };
1291 }; 1074 };
1292 1075
1293 /omit-if-no-ref/ <<
1294 m_can1_sleep_pins_b: m_can1-sleep-1 { 1076 m_can1_sleep_pins_b: m_can1-sleep-1 {
1295 pins { 1077 pins {
1296 pinmux = <STM32_PINMU 1078 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */
1297 <STM32_PINMU 1079 <STM32_PINMUX('A', 11, ANALOG)>; /* CAN1_RX */
1298 }; 1080 };
1299 }; 1081 };
1300 1082
1301 /omit-if-no-ref/ <<
1302 m_can1_pins_c: m-can1-2 { 1083 m_can1_pins_c: m-can1-2 {
1303 pins1 { 1084 pins1 {
1304 pinmux = <STM32_PINMU 1085 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
1305 slew-rate = <1>; 1086 slew-rate = <1>;
1306 drive-push-pull; 1087 drive-push-pull;
1307 bias-disable; 1088 bias-disable;
1308 }; 1089 };
1309 pins2 { 1090 pins2 {
1310 pinmux = <STM32_PINMU 1091 pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */
1311 bias-disable; 1092 bias-disable;
1312 }; 1093 };
1313 }; 1094 };
1314 1095
1315 /omit-if-no-ref/ <<
1316 m_can1_sleep_pins_c: m_can1-sleep-2 { 1096 m_can1_sleep_pins_c: m_can1-sleep-2 {
1317 pins { 1097 pins {
1318 pinmux = <STM32_PINMU 1098 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
1319 <STM32_PINMU 1099 <STM32_PINMUX('H', 14, ANALOG)>; /* CAN1_RX */
1320 }; 1100 };
1321 }; 1101 };
1322 1102
1323 /omit-if-no-ref/ <<
1324 m_can1_pins_d: m-can1-3 { <<
1325 pins1 { <<
1326 pinmux = <STM32_PINMU <<
1327 slew-rate = <1>; <<
1328 drive-push-pull; <<
1329 bias-disable; <<
1330 }; <<
1331 pins2 { <<
1332 pinmux = <STM32_PINMU <<
1333 bias-disable; <<
1334 }; <<
1335 }; <<
1336 <<
1337 /omit-if-no-ref/ <<
1338 m_can1_sleep_pins_d: m_can1-sleep-3 { <<
1339 pins { <<
1340 pinmux = <STM32_PINMU <<
1341 <STM32_PINMU <<
1342 }; <<
1343 }; <<
1344 <<
1345 /omit-if-no-ref/ <<
1346 m_can2_pins_a: m-can2-0 { 1103 m_can2_pins_a: m-can2-0 {
1347 pins1 { 1104 pins1 {
1348 pinmux = <STM32_PINMU 1105 pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
1349 slew-rate = <1>; 1106 slew-rate = <1>;
1350 drive-push-pull; 1107 drive-push-pull;
1351 bias-disable; 1108 bias-disable;
1352 }; 1109 };
1353 pins2 { 1110 pins2 {
1354 pinmux = <STM32_PINMU 1111 pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
1355 bias-disable; 1112 bias-disable;
1356 }; 1113 };
1357 }; 1114 };
1358 1115
1359 /omit-if-no-ref/ <<
1360 m_can2_sleep_pins_a: m_can2-sleep-0 { 1116 m_can2_sleep_pins_a: m_can2-sleep-0 {
1361 pins { 1117 pins {
1362 pinmux = <STM32_PINMU 1118 pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */
1363 <STM32_PINMU 1119 <STM32_PINMUX('B', 5, ANALOG)>; /* CAN2_RX */
1364 }; 1120 };
1365 }; 1121 };
1366 1122
1367 /omit-if-no-ref/ <<
1368 pwm1_pins_a: pwm1-0 { 1123 pwm1_pins_a: pwm1-0 {
1369 pins { 1124 pins {
1370 pinmux = <STM32_PINMU 1125 pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
1371 <STM32_PINMU 1126 <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */
1372 <STM32_PINMU 1127 <STM32_PINMUX('E', 14, AF1)>; /* TIM1_CH4 */
1373 bias-pull-down; 1128 bias-pull-down;
1374 drive-push-pull; 1129 drive-push-pull;
1375 slew-rate = <0>; 1130 slew-rate = <0>;
1376 }; 1131 };
1377 }; 1132 };
1378 1133
1379 /omit-if-no-ref/ <<
1380 pwm1_sleep_pins_a: pwm1-sleep-0 { 1134 pwm1_sleep_pins_a: pwm1-sleep-0 {
1381 pins { 1135 pins {
1382 pinmux = <STM32_PINMU 1136 pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
1383 <STM32_PINMU 1137 <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */
1384 <STM32_PINMU 1138 <STM32_PINMUX('E', 14, ANALOG)>; /* TIM1_CH4 */
1385 }; 1139 };
1386 }; 1140 };
1387 1141
1388 /omit-if-no-ref/ <<
1389 pwm1_pins_b: pwm1-1 { 1142 pwm1_pins_b: pwm1-1 {
1390 pins { 1143 pins {
1391 pinmux = <STM32_PINMU 1144 pinmux = <STM32_PINMUX('E', 9, AF1)>; /* TIM1_CH1 */
1392 bias-pull-down; 1145 bias-pull-down;
1393 drive-push-pull; 1146 drive-push-pull;
1394 slew-rate = <0>; 1147 slew-rate = <0>;
1395 }; 1148 };
1396 }; 1149 };
1397 1150
1398 /omit-if-no-ref/ <<
1399 pwm1_sleep_pins_b: pwm1-sleep-1 { 1151 pwm1_sleep_pins_b: pwm1-sleep-1 {
1400 pins { 1152 pins {
1401 pinmux = <STM32_PINMU 1153 pinmux = <STM32_PINMUX('E', 9, ANALOG)>; /* TIM1_CH1 */
1402 }; 1154 };
1403 }; 1155 };
1404 1156
1405 /omit-if-no-ref/ <<
1406 pwm1_pins_c: pwm1-2 { <<
1407 pins { <<
1408 pinmux = <STM32_PINMU <<
1409 drive-push-pull; <<
1410 slew-rate = <0>; <<
1411 }; <<
1412 }; <<
1413 <<
1414 /omit-if-no-ref/ <<
1415 pwm1_sleep_pins_c: pwm1-sleep-2 { <<
1416 pins { <<
1417 pinmux = <STM32_PINMU <<
1418 }; <<
1419 }; <<
1420 <<
1421 /omit-if-no-ref/ <<
1422 pwm2_pins_a: pwm2-0 { 1157 pwm2_pins_a: pwm2-0 {
1423 pins { 1158 pins {
1424 pinmux = <STM32_PINMU 1159 pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
1425 bias-pull-down; 1160 bias-pull-down;
1426 drive-push-pull; 1161 drive-push-pull;
1427 slew-rate = <0>; 1162 slew-rate = <0>;
1428 }; 1163 };
1429 }; 1164 };
1430 1165
1431 /omit-if-no-ref/ <<
1432 pwm2_sleep_pins_a: pwm2-sleep-0 { 1166 pwm2_sleep_pins_a: pwm2-sleep-0 {
1433 pins { 1167 pins {
1434 pinmux = <STM32_PINMU 1168 pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
1435 }; 1169 };
1436 }; 1170 };
1437 1171
1438 /omit-if-no-ref/ <<
1439 pwm3_pins_a: pwm3-0 { 1172 pwm3_pins_a: pwm3-0 {
1440 pins { 1173 pins {
1441 pinmux = <STM32_PINMU 1174 pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
1442 bias-pull-down; 1175 bias-pull-down;
1443 drive-push-pull; 1176 drive-push-pull;
1444 slew-rate = <0>; 1177 slew-rate = <0>;
1445 }; 1178 };
1446 }; 1179 };
1447 1180
1448 /omit-if-no-ref/ <<
1449 pwm3_sleep_pins_a: pwm3-sleep-0 { 1181 pwm3_sleep_pins_a: pwm3-sleep-0 {
1450 pins { 1182 pins {
1451 pinmux = <STM32_PINMU 1183 pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
1452 }; 1184 };
1453 }; 1185 };
1454 1186
1455 /omit-if-no-ref/ <<
1456 pwm3_pins_b: pwm3-1 { 1187 pwm3_pins_b: pwm3-1 {
1457 pins { 1188 pins {
1458 pinmux = <STM32_PINMU 1189 pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
1459 bias-disable; 1190 bias-disable;
1460 drive-push-pull; 1191 drive-push-pull;
1461 slew-rate = <0>; 1192 slew-rate = <0>;
1462 }; 1193 };
1463 }; 1194 };
1464 1195
1465 /omit-if-no-ref/ <<
1466 pwm3_sleep_pins_b: pwm3-sleep-1 { 1196 pwm3_sleep_pins_b: pwm3-sleep-1 {
1467 pins { 1197 pins {
1468 pinmux = <STM32_PINMU 1198 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
1469 }; 1199 };
1470 }; 1200 };
1471 1201
1472 /omit-if-no-ref/ <<
1473 pwm4_pins_a: pwm4-0 { 1202 pwm4_pins_a: pwm4-0 {
1474 pins { 1203 pins {
1475 pinmux = <STM32_PINMU 1204 pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
1476 <STM32_PINMU 1205 <STM32_PINMUX('D', 15, AF2)>; /* TIM4_CH4 */
1477 bias-pull-down; 1206 bias-pull-down;
1478 drive-push-pull; 1207 drive-push-pull;
1479 slew-rate = <0>; 1208 slew-rate = <0>;
1480 }; 1209 };
1481 }; 1210 };
1482 1211
1483 /omit-if-no-ref/ <<
1484 pwm4_sleep_pins_a: pwm4-sleep-0 { 1212 pwm4_sleep_pins_a: pwm4-sleep-0 {
1485 pins { 1213 pins {
1486 pinmux = <STM32_PINMU 1214 pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */
1487 <STM32_PINMU 1215 <STM32_PINMUX('D', 15, ANALOG)>; /* TIM4_CH4 */
1488 }; 1216 };
1489 }; 1217 };
1490 1218
1491 /omit-if-no-ref/ <<
1492 pwm4_pins_b: pwm4-1 { 1219 pwm4_pins_b: pwm4-1 {
1493 pins { 1220 pins {
1494 pinmux = <STM32_PINMU 1221 pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
1495 bias-pull-down; 1222 bias-pull-down;
1496 drive-push-pull; 1223 drive-push-pull;
1497 slew-rate = <0>; 1224 slew-rate = <0>;
1498 }; 1225 };
1499 }; 1226 };
1500 1227
1501 /omit-if-no-ref/ <<
1502 pwm4_sleep_pins_b: pwm4-sleep-1 { 1228 pwm4_sleep_pins_b: pwm4-sleep-1 {
1503 pins { 1229 pins {
1504 pinmux = <STM32_PINMU 1230 pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
1505 }; 1231 };
1506 }; 1232 };
1507 1233
1508 /omit-if-no-ref/ <<
1509 pwm5_pins_a: pwm5-0 { 1234 pwm5_pins_a: pwm5-0 {
1510 pins { 1235 pins {
1511 pinmux = <STM32_PINMU 1236 pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */
1512 bias-pull-down; 1237 bias-pull-down;
1513 drive-push-pull; 1238 drive-push-pull;
1514 slew-rate = <0>; 1239 slew-rate = <0>;
1515 }; 1240 };
1516 }; 1241 };
1517 1242
1518 /omit-if-no-ref/ <<
1519 pwm5_sleep_pins_a: pwm5-sleep-0 { 1243 pwm5_sleep_pins_a: pwm5-sleep-0 {
1520 pins { 1244 pins {
1521 pinmux = <STM32_PINMU 1245 pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */
1522 }; 1246 };
1523 }; 1247 };
1524 1248
1525 /omit-if-no-ref/ <<
1526 pwm5_pins_b: pwm5-1 { 1249 pwm5_pins_b: pwm5-1 {
1527 pins { 1250 pins {
1528 pinmux = <STM32_PINMU 1251 pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */
1529 <STM32_PINMU 1252 <STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */
1530 <STM32_PINMU 1253 <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */
1531 bias-disable; 1254 bias-disable;
1532 drive-push-pull; 1255 drive-push-pull;
1533 slew-rate = <0>; 1256 slew-rate = <0>;
1534 }; 1257 };
1535 }; 1258 };
1536 1259
1537 /omit-if-no-ref/ <<
1538 pwm5_sleep_pins_b: pwm5-sleep-1 { 1260 pwm5_sleep_pins_b: pwm5-sleep-1 {
1539 pins { 1261 pins {
1540 pinmux = <STM32_PINMU 1262 pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */
1541 <STM32_PINMU 1263 <STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */
1542 <STM32_PINMU 1264 <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */
1543 }; 1265 };
1544 }; 1266 };
1545 1267
1546 /omit-if-no-ref/ <<
1547 pwm8_pins_a: pwm8-0 { 1268 pwm8_pins_a: pwm8-0 {
1548 pins { 1269 pins {
1549 pinmux = <STM32_PINMU 1270 pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
1550 bias-pull-down; 1271 bias-pull-down;
1551 drive-push-pull; 1272 drive-push-pull;
1552 slew-rate = <0>; 1273 slew-rate = <0>;
1553 }; 1274 };
1554 }; 1275 };
1555 1276
1556 /omit-if-no-ref/ <<
1557 pwm8_sleep_pins_a: pwm8-sleep-0 { 1277 pwm8_sleep_pins_a: pwm8-sleep-0 {
1558 pins { 1278 pins {
1559 pinmux = <STM32_PINMU 1279 pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
1560 }; 1280 };
1561 }; 1281 };
1562 1282
1563 /omit-if-no-ref/ <<
1564 pwm8_pins_b: pwm8-1 { <<
1565 pins { <<
1566 pinmux = <STM32_PINMU <<
1567 <STM32_PINMU <<
1568 <STM32_PINMU <<
1569 <STM32_PINMU <<
1570 drive-push-pull; <<
1571 slew-rate = <0>; <<
1572 }; <<
1573 }; <<
1574 <<
1575 /omit-if-no-ref/ <<
1576 pwm8_sleep_pins_b: pwm8-sleep-1 { <<
1577 pins { <<
1578 pinmux = <STM32_PINMU <<
1579 <STM32_PINMU <<
1580 <STM32_PINMU <<
1581 <STM32_PINMU <<
1582 }; <<
1583 }; <<
1584 <<
1585 /omit-if-no-ref/ <<
1586 pwm12_pins_a: pwm12-0 { 1283 pwm12_pins_a: pwm12-0 {
1587 pins { 1284 pins {
1588 pinmux = <STM32_PINMU 1285 pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
1589 bias-pull-down; 1286 bias-pull-down;
1590 drive-push-pull; 1287 drive-push-pull;
1591 slew-rate = <0>; 1288 slew-rate = <0>;
1592 }; 1289 };
1593 }; 1290 };
1594 1291
1595 /omit-if-no-ref/ <<
1596 pwm12_sleep_pins_a: pwm12-sleep-0 { 1292 pwm12_sleep_pins_a: pwm12-sleep-0 {
1597 pins { 1293 pins {
1598 pinmux = <STM32_PINMU 1294 pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
1599 }; 1295 };
1600 }; 1296 };
1601 1297
1602 /omit-if-no-ref/ <<
1603 qspi_clk_pins_a: qspi-clk-0 { 1298 qspi_clk_pins_a: qspi-clk-0 {
1604 pins { 1299 pins {
1605 pinmux = <STM32_PINMU 1300 pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
1606 bias-disable; 1301 bias-disable;
1607 drive-push-pull; 1302 drive-push-pull;
1608 slew-rate = <3>; 1303 slew-rate = <3>;
1609 }; 1304 };
1610 }; 1305 };
1611 1306
1612 /omit-if-no-ref/ <<
1613 qspi_clk_sleep_pins_a: qspi-clk-sleep 1307 qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
1614 pins { 1308 pins {
1615 pinmux = <STM32_PINMU 1309 pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
1616 }; 1310 };
1617 }; 1311 };
1618 1312
1619 /omit-if-no-ref/ <<
1620 qspi_bk1_pins_a: qspi-bk1-0 { 1313 qspi_bk1_pins_a: qspi-bk1-0 {
1621 pins { 1314 pins {
1622 pinmux = <STM32_PINMU 1315 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
1623 <STM32_PINMU 1316 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
1624 <STM32_PINMU 1317 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
1625 <STM32_PINMU 1318 <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
1626 bias-disable; 1319 bias-disable;
1627 drive-push-pull; 1320 drive-push-pull;
1628 slew-rate = <1>; 1321 slew-rate = <1>;
1629 }; 1322 };
1630 }; 1323 };
1631 1324
1632 /omit-if-no-ref/ <<
1633 qspi_bk1_sleep_pins_a: qspi-bk1-sleep 1325 qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
1634 pins { 1326 pins {
1635 pinmux = <STM32_PINMU 1327 pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
1636 <STM32_PINMU 1328 <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
1637 <STM32_PINMU 1329 <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
1638 <STM32_PINMU 1330 <STM32_PINMUX('F', 6, ANALOG)>; /* QSPI_BK1_IO3 */
1639 }; 1331 };
1640 }; 1332 };
1641 1333
1642 /omit-if-no-ref/ <<
1643 qspi_bk2_pins_a: qspi-bk2-0 { 1334 qspi_bk2_pins_a: qspi-bk2-0 {
1644 pins { 1335 pins {
1645 pinmux = <STM32_PINMU 1336 pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
1646 <STM32_PINMU 1337 <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
1647 <STM32_PINMU 1338 <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
1648 <STM32_PINMU 1339 <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
1649 bias-disable; 1340 bias-disable;
1650 drive-push-pull; 1341 drive-push-pull;
1651 slew-rate = <1>; 1342 slew-rate = <1>;
1652 }; 1343 };
1653 }; 1344 };
1654 1345
1655 /omit-if-no-ref/ <<
1656 qspi_bk2_sleep_pins_a: qspi-bk2-sleep 1346 qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
1657 pins { 1347 pins {
1658 pinmux = <STM32_PINMU 1348 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
1659 <STM32_PINMU 1349 <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
1660 <STM32_PINMU 1350 <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
1661 <STM32_PINMU 1351 <STM32_PINMUX('G', 7, ANALOG)>; /* QSPI_BK2_IO3 */
1662 }; 1352 };
1663 }; 1353 };
1664 1354
1665 /omit-if-no-ref/ <<
1666 qspi_cs1_pins_a: qspi-cs1-0 { 1355 qspi_cs1_pins_a: qspi-cs1-0 {
1667 pins { 1356 pins {
1668 pinmux = <STM32_PINMU 1357 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
1669 bias-pull-up; 1358 bias-pull-up;
1670 drive-push-pull; 1359 drive-push-pull;
1671 slew-rate = <1>; 1360 slew-rate = <1>;
1672 }; 1361 };
1673 }; 1362 };
1674 1363
1675 /omit-if-no-ref/ <<
1676 qspi_cs1_sleep_pins_a: qspi-cs1-sleep 1364 qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 {
1677 pins { 1365 pins {
1678 pinmux = <STM32_PINMU 1366 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
1679 }; 1367 };
1680 }; 1368 };
1681 1369
1682 /omit-if-no-ref/ <<
1683 qspi_cs2_pins_a: qspi-cs2-0 { 1370 qspi_cs2_pins_a: qspi-cs2-0 {
1684 pins { 1371 pins {
1685 pinmux = <STM32_PINMU 1372 pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
1686 bias-pull-up; 1373 bias-pull-up;
1687 drive-push-pull; 1374 drive-push-pull;
1688 slew-rate = <1>; 1375 slew-rate = <1>;
1689 }; 1376 };
1690 }; 1377 };
1691 1378
1692 /omit-if-no-ref/ <<
1693 qspi_cs2_sleep_pins_a: qspi-cs2-sleep 1379 qspi_cs2_sleep_pins_a: qspi-cs2-sleep-0 {
1694 pins { 1380 pins {
1695 pinmux = <STM32_PINMU 1381 pinmux = <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
1696 }; 1382 };
1697 }; 1383 };
1698 1384
1699 /omit-if-no-ref/ <<
1700 sai2a_pins_a: sai2a-0 { 1385 sai2a_pins_a: sai2a-0 {
1701 pins { 1386 pins {
1702 pinmux = <STM32_PINMU 1387 pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
1703 <STM32_PINMU 1388 <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1704 <STM32_PINMU 1389 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1705 <STM32_PINMU 1390 <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
1706 slew-rate = <0>; 1391 slew-rate = <0>;
1707 drive-push-pull; 1392 drive-push-pull;
1708 bias-disable; 1393 bias-disable;
1709 }; 1394 };
1710 }; 1395 };
1711 1396
1712 /omit-if-no-ref/ <<
1713 sai2a_sleep_pins_a: sai2a-sleep-0 { 1397 sai2a_sleep_pins_a: sai2a-sleep-0 {
1714 pins { 1398 pins {
1715 pinmux = <STM32_PINMU 1399 pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
1716 <STM32_PINMU 1400 <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1717 <STM32_PINMU 1401 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1718 <STM32_PINMU 1402 <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
1719 }; 1403 };
1720 }; 1404 };
1721 1405
1722 /omit-if-no-ref/ <<
1723 sai2a_pins_b: sai2a-1 { 1406 sai2a_pins_b: sai2a-1 {
1724 pins1 { 1407 pins1 {
1725 pinmux = <STM32_PINMU 1408 pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1726 <STM32_PINMU 1409 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1727 <STM32_PINMU 1410 <STM32_PINMUX('D', 13, AF10)>; /* SAI2_SCK_A */
1728 slew-rate = <0>; 1411 slew-rate = <0>;
1729 drive-push-pull; 1412 drive-push-pull;
1730 bias-disable; 1413 bias-disable;
1731 }; 1414 };
1732 }; 1415 };
1733 1416
1734 /omit-if-no-ref/ <<
1735 sai2a_sleep_pins_b: sai2a-sleep-1 { 1417 sai2a_sleep_pins_b: sai2a-sleep-1 {
1736 pins { 1418 pins {
1737 pinmux = <STM32_PINMU 1419 pinmux = <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1738 <STM32_PINMU 1420 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1739 <STM32_PINMU 1421 <STM32_PINMUX('D', 13, ANALOG)>; /* SAI2_SCK_A */
1740 }; 1422 };
1741 }; 1423 };
1742 1424
1743 /omit-if-no-ref/ <<
1744 sai2a_pins_c: sai2a-2 { 1425 sai2a_pins_c: sai2a-2 {
1745 pins { 1426 pins {
1746 pinmux = <STM32_PINMU 1427 pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */
1747 <STM32_PINMU 1428 <STM32_PINMUX('D', 11, AF10)>, /* SAI2_SD_A */
1748 <STM32_PINMU 1429 <STM32_PINMUX('D', 12, AF10)>; /* SAI2_FS_A */
1749 slew-rate = <0>; 1430 slew-rate = <0>;
1750 drive-push-pull; 1431 drive-push-pull;
1751 bias-disable; 1432 bias-disable;
1752 }; 1433 };
1753 }; 1434 };
1754 1435
1755 /omit-if-no-ref/ <<
1756 sai2a_sleep_pins_c: sai2a-sleep-2 { 1436 sai2a_sleep_pins_c: sai2a-sleep-2 {
1757 pins { 1437 pins {
1758 pinmux = <STM32_PINMU 1438 pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */
1759 <STM32_PINMU 1439 <STM32_PINMUX('D', 11, ANALOG)>, /* SAI2_SD_A */
1760 <STM32_PINMU 1440 <STM32_PINMUX('D', 12, ANALOG)>; /* SAI2_FS_A */
1761 }; 1441 };
1762 }; 1442 };
1763 1443
1764 /omit-if-no-ref/ <<
1765 sai2b_pins_a: sai2b-0 { 1444 sai2b_pins_a: sai2b-0 {
1766 pins1 { 1445 pins1 {
1767 pinmux = <STM32_PINMU 1446 pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
1768 <STM32_PINMU 1447 <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
1769 <STM32_PINMU 1448 <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
1770 slew-rate = <0>; 1449 slew-rate = <0>;
1771 drive-push-pull; 1450 drive-push-pull;
1772 bias-disable; 1451 bias-disable;
1773 }; 1452 };
1774 pins2 { 1453 pins2 {
1775 pinmux = <STM32_PINMU 1454 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1776 bias-disable; 1455 bias-disable;
1777 }; 1456 };
1778 }; 1457 };
1779 1458
1780 /omit-if-no-ref/ <<
1781 sai2b_sleep_pins_a: sai2b-sleep-0 { 1459 sai2b_sleep_pins_a: sai2b-sleep-0 {
1782 pins { 1460 pins {
1783 pinmux = <STM32_PINMU 1461 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
1784 <STM32_PINMU 1462 <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
1785 <STM32_PINMU 1463 <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
1786 <STM32_PINMU 1464 <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
1787 }; 1465 };
1788 }; 1466 };
1789 1467
1790 /omit-if-no-ref/ <<
1791 sai2b_pins_b: sai2b-1 { 1468 sai2b_pins_b: sai2b-1 {
1792 pins { 1469 pins {
1793 pinmux = <STM32_PINMU 1470 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1794 bias-disable; 1471 bias-disable;
1795 }; 1472 };
1796 }; 1473 };
1797 1474
1798 /omit-if-no-ref/ <<
1799 sai2b_sleep_pins_b: sai2b-sleep-1 { 1475 sai2b_sleep_pins_b: sai2b-sleep-1 {
1800 pins { 1476 pins {
1801 pinmux = <STM32_PINMU 1477 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1802 }; 1478 };
1803 }; 1479 };
1804 1480
1805 /omit-if-no-ref/ <<
1806 sai2b_pins_c: sai2b-2 { 1481 sai2b_pins_c: sai2b-2 {
1807 pins1 { 1482 pins1 {
1808 pinmux = <STM32_PINMU 1483 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1809 bias-disable; 1484 bias-disable;
1810 }; 1485 };
1811 }; 1486 };
1812 1487
1813 /omit-if-no-ref/ <<
1814 sai2b_sleep_pins_c: sai2b-sleep-2 { 1488 sai2b_sleep_pins_c: sai2b-sleep-2 {
1815 pins { 1489 pins {
1816 pinmux = <STM32_PINMU 1490 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1817 }; 1491 };
1818 }; 1492 };
1819 1493
1820 /omit-if-no-ref/ <<
1821 sai2b_pins_d: sai2b-3 { 1494 sai2b_pins_d: sai2b-3 {
1822 pins1 { 1495 pins1 {
1823 pinmux = <STM32_PINMU 1496 pinmux = <STM32_PINMUX('H', 2, AF10)>, /* SAI2_SCK_B */
1824 <STM32_PINMU 1497 <STM32_PINMUX('C', 0, AF8)>, /* SAI2_FS_B */
1825 <STM32_PINMU 1498 <STM32_PINMUX('H', 3, AF10)>; /* SAI2_MCLK_B */
1826 slew-rate = <0>; 1499 slew-rate = <0>;
1827 drive-push-pull; 1500 drive-push-pull;
1828 bias-disable; 1501 bias-disable;
1829 }; 1502 };
1830 pins2 { 1503 pins2 {
1831 pinmux = <STM32_PINMU 1504 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1832 bias-disable; 1505 bias-disable;
1833 }; 1506 };
1834 }; 1507 };
1835 1508
1836 /omit-if-no-ref/ <<
1837 sai2b_sleep_pins_d: sai2b-sleep-3 { 1509 sai2b_sleep_pins_d: sai2b-sleep-3 {
1838 pins1 { 1510 pins1 {
1839 pinmux = <STM32_PINMU 1511 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* SAI2_SCK_B */
1840 <STM32_PINMU 1512 <STM32_PINMUX('C', 0, ANALOG)>, /* SAI2_FS_B */
1841 <STM32_PINMU 1513 <STM32_PINMUX('H', 3, ANALOG)>, /* SAI2_MCLK_B */
1842 <STM32_PINMU 1514 <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1843 }; 1515 };
1844 }; 1516 };
1845 1517
1846 /omit-if-no-ref/ <<
1847 sai4a_pins_a: sai4a-0 { 1518 sai4a_pins_a: sai4a-0 {
1848 pins { 1519 pins {
1849 pinmux = <STM32_PINMU 1520 pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
1850 slew-rate = <0>; 1521 slew-rate = <0>;
1851 drive-push-pull; 1522 drive-push-pull;
1852 bias-disable; 1523 bias-disable;
1853 }; 1524 };
1854 }; 1525 };
1855 1526
1856 /omit-if-no-ref/ <<
1857 sai4a_sleep_pins_a: sai4a-sleep-0 { 1527 sai4a_sleep_pins_a: sai4a-sleep-0 {
1858 pins { 1528 pins {
1859 pinmux = <STM32_PINMU 1529 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
1860 }; 1530 };
1861 }; 1531 };
1862 1532
1863 /omit-if-no-ref/ <<
1864 sdmmc1_b4_pins_a: sdmmc1-b4-0 { 1533 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
1865 pins1 { 1534 pins1 {
1866 pinmux = <STM32_PINMU 1535 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1867 <STM32_PINMU 1536 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1868 <STM32_PINMU 1537 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1869 <STM32_PINMU 1538 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
1870 <STM32_PINMU 1539 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1871 slew-rate = <1>; 1540 slew-rate = <1>;
1872 drive-push-pull; 1541 drive-push-pull;
1873 bias-disable; 1542 bias-disable;
1874 }; 1543 };
1875 pins2 { 1544 pins2 {
1876 pinmux = <STM32_PINMU 1545 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1877 slew-rate = <2>; 1546 slew-rate = <2>;
1878 drive-push-pull; 1547 drive-push-pull;
1879 bias-disable; 1548 bias-disable;
1880 }; 1549 };
1881 }; 1550 };
1882 1551
1883 /omit-if-no-ref/ <<
1884 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { 1552 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
1885 pins1 { 1553 pins1 {
1886 pinmux = <STM32_PINMU 1554 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1887 <STM32_PINMU 1555 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1888 <STM32_PINMU 1556 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1889 <STM32_PINMU 1557 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1890 slew-rate = <1>; 1558 slew-rate = <1>;
1891 drive-push-pull; 1559 drive-push-pull;
1892 bias-disable; 1560 bias-disable;
1893 }; 1561 };
1894 pins2 { 1562 pins2 {
1895 pinmux = <STM32_PINMU 1563 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1896 slew-rate = <2>; 1564 slew-rate = <2>;
1897 drive-push-pull; 1565 drive-push-pull;
1898 bias-disable; 1566 bias-disable;
1899 }; 1567 };
1900 pins3 { 1568 pins3 {
1901 pinmux = <STM32_PINMU 1569 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1902 slew-rate = <1>; 1570 slew-rate = <1>;
1903 drive-open-drain; 1571 drive-open-drain;
1904 bias-disable; 1572 bias-disable;
1905 }; 1573 };
1906 }; 1574 };
1907 1575
1908 /omit-if-no-ref/ <<
1909 sdmmc1_b4_init_pins_a: sdmmc1-b4-init 1576 sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 {
1910 pins1 { 1577 pins1 {
1911 pinmux = <STM32_PINMU 1578 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1912 <STM32_PINMU 1579 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1913 <STM32_PINMU 1580 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1914 <STM32_PINMU 1581 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1915 slew-rate = <1>; 1582 slew-rate = <1>;
1916 drive-push-pull; 1583 drive-push-pull;
1917 bias-disable; 1584 bias-disable;
1918 }; 1585 };
1919 }; 1586 };
1920 1587
1921 /omit-if-no-ref/ <<
1922 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sle 1588 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
1923 pins { 1589 pins {
1924 pinmux = <STM32_PINMU 1590 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1925 <STM32_PINMU 1591 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
1926 <STM32_PINMU 1592 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
1927 <STM32_PINMU 1593 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
1928 <STM32_PINMU 1594 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
1929 <STM32_PINMU 1595 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
1930 }; 1596 };
1931 }; 1597 };
1932 1598
1933 /omit-if-no-ref/ <<
1934 sdmmc1_b4_pins_b: sdmmc1-b4-1 { 1599 sdmmc1_b4_pins_b: sdmmc1-b4-1 {
1935 pins1 { 1600 pins1 {
1936 pinmux = <STM32_PINMU 1601 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1937 <STM32_PINMU 1602 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1938 <STM32_PINMU 1603 <STM32_PINMUX('E', 6, AF8)>, /* SDMMC1_D2 */
1939 <STM32_PINMU 1604 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
1940 <STM32_PINMU 1605 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1941 slew-rate = <1>; 1606 slew-rate = <1>;
1942 drive-push-pull; 1607 drive-push-pull;
1943 bias-disable; 1608 bias-disable;
1944 }; 1609 };
1945 pins2 { 1610 pins2 {
1946 pinmux = <STM32_PINMU 1611 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1947 slew-rate = <2>; 1612 slew-rate = <2>;
1948 drive-push-pull; 1613 drive-push-pull;
1949 bias-disable; 1614 bias-disable;
1950 }; 1615 };
1951 }; 1616 };
1952 1617
1953 /omit-if-no-ref/ <<
1954 sdmmc1_b4_od_pins_b: sdmmc1-b4-od-1 { 1618 sdmmc1_b4_od_pins_b: sdmmc1-b4-od-1 {
1955 pins1 { 1619 pins1 {
1956 pinmux = <STM32_PINMU 1620 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1957 <STM32_PINMU 1621 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1958 <STM32_PINMU 1622 <STM32_PINMUX('E', 6, AF8)>, /* SDMMC1_D2 */
1959 <STM32_PINMU 1623 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1960 slew-rate = <1>; 1624 slew-rate = <1>;
1961 drive-push-pull; 1625 drive-push-pull;
1962 bias-disable; 1626 bias-disable;
1963 }; 1627 };
1964 pins2 { 1628 pins2 {
1965 pinmux = <STM32_PINMU 1629 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1966 slew-rate = <2>; 1630 slew-rate = <2>;
1967 drive-push-pull; 1631 drive-push-pull;
1968 bias-disable; 1632 bias-disable;
1969 }; 1633 };
1970 pins3 { 1634 pins3 {
1971 pinmux = <STM32_PINMU 1635 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1972 slew-rate = <1>; 1636 slew-rate = <1>;
1973 drive-open-drain; 1637 drive-open-drain;
1974 bias-disable; 1638 bias-disable;
1975 }; 1639 };
1976 }; 1640 };
1977 1641
1978 /omit-if-no-ref/ <<
1979 sdmmc1_b4_sleep_pins_b: sdmmc1-b4-sle 1642 sdmmc1_b4_sleep_pins_b: sdmmc1-b4-sleep-1 {
1980 pins { 1643 pins {
1981 pinmux = <STM32_PINMU 1644 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1982 <STM32_PINMU 1645 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
1983 <STM32_PINMU 1646 <STM32_PINMUX('E', 6, ANALOG)>, /* SDMMC1_D2 */
1984 <STM32_PINMU 1647 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
1985 <STM32_PINMU 1648 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
1986 <STM32_PINMU 1649 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
1987 }; 1650 };
1988 }; 1651 };
1989 1652
1990 /omit-if-no-ref/ <<
1991 sdmmc1_dir_pins_a: sdmmc1-dir-0 { 1653 sdmmc1_dir_pins_a: sdmmc1-dir-0 {
1992 pins1 { 1654 pins1 {
1993 pinmux = <STM32_PINMU 1655 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1994 <STM32_PINMU 1656 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
1995 <STM32_PINMU 1657 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1996 slew-rate = <1>; 1658 slew-rate = <1>;
1997 drive-push-pull; 1659 drive-push-pull;
1998 bias-pull-up; 1660 bias-pull-up;
1999 }; 1661 };
2000 pins2 { 1662 pins2 {
2001 pinmux = <STM32_PINMU 1663 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
2002 bias-pull-up; 1664 bias-pull-up;
2003 }; 1665 };
2004 }; 1666 };
2005 1667
2006 /omit-if-no-ref/ <<
2007 sdmmc1_dir_init_pins_a: sdmmc1-dir-in 1668 sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 {
2008 pins1 { 1669 pins1 {
2009 pinmux = <STM32_PINMU 1670 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
2010 <STM32_PINMU 1671 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
2011 <STM32_PINMU 1672 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
2012 slew-rate = <1>; 1673 slew-rate = <1>;
2013 drive-push-pull; 1674 drive-push-pull;
2014 bias-pull-up; 1675 bias-pull-up;
2015 }; 1676 };
2016 }; 1677 };
2017 1678
2018 /omit-if-no-ref/ <<
2019 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-s 1679 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
2020 pins { 1680 pins {
2021 pinmux = <STM32_PINMU 1681 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
2022 <STM32_PINMU 1682 <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
2023 <STM32_PINMU 1683 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
2024 <STM32_PINMU 1684 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
2025 }; 1685 };
2026 }; 1686 };
2027 1687
2028 /omit-if-no-ref/ <<
2029 sdmmc1_dir_pins_b: sdmmc1-dir-1 { 1688 sdmmc1_dir_pins_b: sdmmc1-dir-1 {
2030 pins1 { 1689 pins1 {
2031 pinmux = <STM32_PINMU 1690 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
2032 <STM32_PINMU 1691 <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
2033 <STM32_PINMU 1692 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
2034 slew-rate = <1>; 1693 slew-rate = <1>;
2035 drive-push-pull; 1694 drive-push-pull;
2036 bias-pull-up; 1695 bias-pull-up;
2037 }; 1696 };
2038 pins2 { 1697 pins2 {
2039 pinmux = <STM32_PINMU 1698 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
2040 bias-pull-up; 1699 bias-pull-up;
2041 }; 1700 };
2042 }; 1701 };
2043 1702
2044 /omit-if-no-ref/ <<
2045 sdmmc1_dir_sleep_pins_b: sdmmc1-dir-s 1703 sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
2046 pins { 1704 pins {
2047 pinmux = <STM32_PINMU 1705 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
2048 <STM32_PINMU 1706 <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */
2049 <STM32_PINMU 1707 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
2050 <STM32_PINMU 1708 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
2051 }; 1709 };
2052 }; 1710 };
2053 1711
2054 /omit-if-no-ref/ <<
2055 sdmmc2_b4_pins_a: sdmmc2-b4-0 { 1712 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
2056 pins1 { 1713 pins1 {
2057 pinmux = <STM32_PINMU 1714 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
2058 <STM32_PINMU 1715 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
2059 <STM32_PINMU 1716 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
2060 <STM32_PINMU 1717 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
2061 <STM32_PINMU 1718 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2062 slew-rate = <1>; 1719 slew-rate = <1>;
2063 drive-push-pull; 1720 drive-push-pull;
2064 bias-pull-up; 1721 bias-pull-up;
2065 }; 1722 };
2066 pins2 { 1723 pins2 {
2067 pinmux = <STM32_PINMU 1724 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2068 slew-rate = <2>; 1725 slew-rate = <2>;
2069 drive-push-pull; 1726 drive-push-pull;
2070 bias-pull-up; 1727 bias-pull-up;
2071 }; 1728 };
2072 }; 1729 };
2073 1730
2074 /omit-if-no-ref/ <<
2075 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { 1731 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
2076 pins1 { 1732 pins1 {
2077 pinmux = <STM32_PINMU 1733 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
2078 <STM32_PINMU 1734 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
2079 <STM32_PINMU 1735 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
2080 <STM32_PINMU 1736 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
2081 slew-rate = <1>; 1737 slew-rate = <1>;
2082 drive-push-pull; 1738 drive-push-pull;
2083 bias-pull-up; 1739 bias-pull-up;
2084 }; 1740 };
2085 pins2 { 1741 pins2 {
2086 pinmux = <STM32_PINMU 1742 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2087 slew-rate = <2>; 1743 slew-rate = <2>;
2088 drive-push-pull; 1744 drive-push-pull;
2089 bias-pull-up; 1745 bias-pull-up;
2090 }; 1746 };
2091 pins3 { 1747 pins3 {
2092 pinmux = <STM32_PINMU 1748 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2093 slew-rate = <1>; 1749 slew-rate = <1>;
2094 drive-open-drain; 1750 drive-open-drain;
2095 bias-pull-up; 1751 bias-pull-up;
2096 }; 1752 };
2097 }; 1753 };
2098 1754
2099 /omit-if-no-ref/ <<
2100 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sle 1755 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
2101 pins { 1756 pins {
2102 pinmux = <STM32_PINMU 1757 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
2103 <STM32_PINMU 1758 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
2104 <STM32_PINMU 1759 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
2105 <STM32_PINMU 1760 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
2106 <STM32_PINMU 1761 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
2107 <STM32_PINMU 1762 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
2108 }; 1763 };
2109 }; 1764 };
2110 1765
2111 /omit-if-no-ref/ <<
2112 sdmmc2_b4_pins_b: sdmmc2-b4-1 { 1766 sdmmc2_b4_pins_b: sdmmc2-b4-1 {
2113 pins1 { 1767 pins1 {
2114 pinmux = <STM32_PINMU 1768 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
2115 <STM32_PINMU 1769 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
2116 <STM32_PINMU 1770 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
2117 <STM32_PINMU 1771 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
2118 <STM32_PINMU 1772 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2119 slew-rate = <1>; 1773 slew-rate = <1>;
2120 drive-push-pull; 1774 drive-push-pull;
2121 bias-disable; 1775 bias-disable;
2122 }; 1776 };
2123 pins2 { 1777 pins2 {
2124 pinmux = <STM32_PINMU 1778 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2125 slew-rate = <2>; 1779 slew-rate = <2>;
2126 drive-push-pull; 1780 drive-push-pull;
2127 bias-disable; 1781 bias-disable;
2128 }; 1782 };
2129 }; 1783 };
2130 1784
2131 /omit-if-no-ref/ <<
2132 sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 { 1785 sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
2133 pins1 { 1786 pins1 {
2134 pinmux = <STM32_PINMU 1787 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
2135 <STM32_PINMU 1788 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
2136 <STM32_PINMU 1789 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
2137 <STM32_PINMU 1790 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
2138 slew-rate = <1>; 1791 slew-rate = <1>;
2139 drive-push-pull; 1792 drive-push-pull;
2140 bias-disable; 1793 bias-disable;
2141 }; 1794 };
2142 pins2 { 1795 pins2 {
2143 pinmux = <STM32_PINMU 1796 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2144 slew-rate = <2>; 1797 slew-rate = <2>;
2145 drive-push-pull; 1798 drive-push-pull;
2146 bias-disable; 1799 bias-disable;
2147 }; 1800 };
2148 pins3 { 1801 pins3 {
2149 pinmux = <STM32_PINMU 1802 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2150 slew-rate = <1>; 1803 slew-rate = <1>;
2151 drive-open-drain; 1804 drive-open-drain;
2152 bias-disable; 1805 bias-disable;
2153 }; 1806 };
2154 }; 1807 };
2155 1808
2156 /omit-if-no-ref/ <<
2157 sdmmc2_d47_pins_a: sdmmc2-d47-0 { 1809 sdmmc2_d47_pins_a: sdmmc2-d47-0 {
2158 pins { 1810 pins {
2159 pinmux = <STM32_PINMU 1811 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
2160 <STM32_PINMU 1812 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
2161 <STM32_PINMU 1813 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
2162 <STM32_PINMU 1814 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
2163 slew-rate = <1>; 1815 slew-rate = <1>;
2164 drive-push-pull; 1816 drive-push-pull;
2165 bias-pull-up; 1817 bias-pull-up;
2166 }; 1818 };
2167 }; 1819 };
2168 1820
2169 /omit-if-no-ref/ <<
2170 sdmmc2_d47_sleep_pins_a: sdmmc2-d47-s 1821 sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
2171 pins { 1822 pins {
2172 pinmux = <STM32_PINMU 1823 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
2173 <STM32_PINMU 1824 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
2174 <STM32_PINMU 1825 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
2175 <STM32_PINMU 1826 <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
2176 }; 1827 };
2177 }; 1828 };
2178 1829
2179 /omit-if-no-ref/ <<
2180 sdmmc2_d47_pins_b: sdmmc2-d47-1 { 1830 sdmmc2_d47_pins_b: sdmmc2-d47-1 {
2181 pins { 1831 pins {
2182 pinmux = <STM32_PINMU 1832 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
2183 <STM32_PINMU 1833 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
2184 <STM32_PINMU 1834 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
2185 <STM32_PINMU 1835 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
2186 slew-rate = <1>; 1836 slew-rate = <1>;
2187 drive-push-pull; 1837 drive-push-pull;
2188 bias-disable; 1838 bias-disable;
2189 }; 1839 };
2190 }; 1840 };
2191 1841
2192 /omit-if-no-ref/ <<
2193 sdmmc2_d47_sleep_pins_b: sdmmc2-d47-s 1842 sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
2194 pins { 1843 pins {
2195 pinmux = <STM32_PINMU 1844 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
2196 <STM32_PINMU 1845 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
2197 <STM32_PINMU 1846 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
2198 <STM32_PINMU 1847 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
2199 }; 1848 };
2200 }; 1849 };
2201 1850
2202 /omit-if-no-ref/ <<
2203 sdmmc2_d47_pins_c: sdmmc2-d47-2 { 1851 sdmmc2_d47_pins_c: sdmmc2-d47-2 {
2204 pins { 1852 pins {
2205 pinmux = <STM32_PINMU 1853 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
2206 <STM32_PINMU 1854 <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
2207 <STM32_PINMU 1855 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
2208 <STM32_PINMU 1856 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
2209 slew-rate = <1>; 1857 slew-rate = <1>;
2210 drive-push-pull; 1858 drive-push-pull;
2211 bias-pull-up; 1859 bias-pull-up;
2212 }; 1860 };
2213 }; 1861 };
2214 1862
2215 /omit-if-no-ref/ <<
2216 sdmmc2_d47_sleep_pins_c: sdmmc2-d47-s 1863 sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
2217 pins { 1864 pins {
2218 pinmux = <STM32_PINMU 1865 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
2219 <STM32_PINMU 1866 <STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */
2220 <STM32_PINMU 1867 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
2221 <STM32_PINMU 1868 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
2222 }; 1869 };
2223 }; 1870 };
2224 1871
2225 /omit-if-no-ref/ <<
2226 sdmmc2_d47_pins_d: sdmmc2-d47-3 { 1872 sdmmc2_d47_pins_d: sdmmc2-d47-3 {
2227 pins { 1873 pins {
2228 pinmux = <STM32_PINMU 1874 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
2229 <STM32_PINMU 1875 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
2230 <STM32_PINMU 1876 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
2231 <STM32_PINMU 1877 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
2232 slew-rate = <1>; <<
2233 drive-push-pull; <<
2234 bias-pull-up; <<
2235 }; 1878 };
2236 }; 1879 };
2237 1880
2238 /omit-if-no-ref/ <<
2239 sdmmc2_d47_sleep_pins_d: sdmmc2-d47-s 1881 sdmmc2_d47_sleep_pins_d: sdmmc2-d47-sleep-3 {
2240 pins { 1882 pins {
2241 pinmux = <STM32_PINMU 1883 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
2242 <STM32_PINMU 1884 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
2243 <STM32_PINMU 1885 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
2244 <STM32_PINMU 1886 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
2245 }; 1887 };
2246 }; 1888 };
2247 1889
2248 /omit-if-no-ref/ <<
2249 sdmmc2_d47_pins_e: sdmmc2-d47-4 { 1890 sdmmc2_d47_pins_e: sdmmc2-d47-4 {
2250 pins { 1891 pins {
2251 pinmux = <STM32_PINMU 1892 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
2252 <STM32_PINMU 1893 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
2253 <STM32_PINMU 1894 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
2254 <STM32_PINMU 1895 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
2255 slew-rate = <1>; 1896 slew-rate = <1>;
2256 drive-push-pull; 1897 drive-push-pull;
2257 bias-pull-up; 1898 bias-pull-up;
2258 }; 1899 };
2259 }; 1900 };
2260 1901
2261 /omit-if-no-ref/ <<
2262 sdmmc2_d47_sleep_pins_e: sdmmc2-d47-s 1902 sdmmc2_d47_sleep_pins_e: sdmmc2-d47-sleep-4 {
2263 pins { 1903 pins {
2264 pinmux = <STM32_PINMU 1904 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
2265 <STM32_PINMU 1905 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
2266 <STM32_PINMU 1906 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
2267 <STM32_PINMU 1907 <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
2268 }; 1908 };
2269 }; 1909 };
2270 1910
2271 /omit-if-no-ref/ <<
2272 sdmmc3_b4_pins_a: sdmmc3-b4-0 { 1911 sdmmc3_b4_pins_a: sdmmc3-b4-0 {
2273 pins1 { 1912 pins1 {
2274 pinmux = <STM32_PINMU 1913 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2275 <STM32_PINMU 1914 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
2276 <STM32_PINMU 1915 <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
2277 <STM32_PINMU 1916 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
2278 <STM32_PINMU 1917 <STM32_PINMUX('F', 1, AF9)>; /* SDMMC3_CMD */
2279 slew-rate = <1>; 1918 slew-rate = <1>;
2280 drive-push-pull; 1919 drive-push-pull;
2281 bias-pull-up; 1920 bias-pull-up;
2282 }; 1921 };
2283 pins2 { 1922 pins2 {
2284 pinmux = <STM32_PINMU 1923 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2285 slew-rate = <2>; 1924 slew-rate = <2>;
2286 drive-push-pull; 1925 drive-push-pull;
2287 bias-pull-up; 1926 bias-pull-up;
2288 }; 1927 };
2289 }; 1928 };
2290 1929
2291 /omit-if-no-ref/ <<
2292 sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 { 1930 sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
2293 pins1 { 1931 pins1 {
2294 pinmux = <STM32_PINMU 1932 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2295 <STM32_PINMU 1933 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
2296 <STM32_PINMU 1934 <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
2297 <STM32_PINMU 1935 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
2298 slew-rate = <1>; 1936 slew-rate = <1>;
2299 drive-push-pull; 1937 drive-push-pull;
2300 bias-pull-up; 1938 bias-pull-up;
2301 }; 1939 };
2302 pins2 { 1940 pins2 {
2303 pinmux = <STM32_PINMU 1941 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2304 slew-rate = <2>; 1942 slew-rate = <2>;
2305 drive-push-pull; 1943 drive-push-pull;
2306 bias-pull-up; 1944 bias-pull-up;
2307 }; 1945 };
2308 pins3 { 1946 pins3 {
2309 pinmux = <STM32_PINMU 1947 pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */
2310 slew-rate = <1>; 1948 slew-rate = <1>;
2311 drive-open-drain; 1949 drive-open-drain;
2312 bias-pull-up; 1950 bias-pull-up;
2313 }; 1951 };
2314 }; 1952 };
2315 1953
2316 /omit-if-no-ref/ <<
2317 sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sle 1954 sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
2318 pins { 1955 pins {
2319 pinmux = <STM32_PINMU 1956 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
2320 <STM32_PINMU 1957 <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
2321 <STM32_PINMU 1958 <STM32_PINMUX('F', 5, ANALOG)>, /* SDMMC3_D2 */
2322 <STM32_PINMU 1959 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
2323 <STM32_PINMU 1960 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
2324 <STM32_PINMU 1961 <STM32_PINMUX('F', 1, ANALOG)>; /* SDMMC3_CMD */
2325 }; 1962 };
2326 }; 1963 };
2327 1964
2328 /omit-if-no-ref/ <<
2329 sdmmc3_b4_pins_b: sdmmc3-b4-1 { 1965 sdmmc3_b4_pins_b: sdmmc3-b4-1 {
2330 pins1 { 1966 pins1 {
2331 pinmux = <STM32_PINMU 1967 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2332 <STM32_PINMU 1968 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
2333 <STM32_PINMU 1969 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
2334 <STM32_PINMU 1970 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
2335 <STM32_PINMU 1971 <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
2336 slew-rate = <1>; 1972 slew-rate = <1>;
2337 drive-push-pull; 1973 drive-push-pull;
2338 bias-pull-up; 1974 bias-pull-up;
2339 }; 1975 };
2340 pins2 { 1976 pins2 {
2341 pinmux = <STM32_PINMU 1977 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2342 slew-rate = <2>; 1978 slew-rate = <2>;
2343 drive-push-pull; 1979 drive-push-pull;
2344 bias-pull-up; 1980 bias-pull-up;
2345 }; 1981 };
2346 }; 1982 };
2347 1983
2348 /omit-if-no-ref/ <<
2349 sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 { 1984 sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
2350 pins1 { 1985 pins1 {
2351 pinmux = <STM32_PINMU 1986 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2352 <STM32_PINMU 1987 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
2353 <STM32_PINMU 1988 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
2354 <STM32_PINMU 1989 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
2355 slew-rate = <1>; 1990 slew-rate = <1>;
2356 drive-push-pull; 1991 drive-push-pull;
2357 bias-pull-up; 1992 bias-pull-up;
2358 }; 1993 };
2359 pins2 { 1994 pins2 {
2360 pinmux = <STM32_PINMU 1995 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2361 slew-rate = <2>; 1996 slew-rate = <2>;
2362 drive-push-pull; 1997 drive-push-pull;
2363 bias-pull-up; 1998 bias-pull-up;
2364 }; 1999 };
2365 pins3 { 2000 pins3 {
2366 pinmux = <STM32_PINMU 2001 pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */
2367 slew-rate = <1>; 2002 slew-rate = <1>;
2368 drive-open-drain; 2003 drive-open-drain;
2369 bias-pull-up; 2004 bias-pull-up;
2370 }; 2005 };
2371 }; 2006 };
2372 2007
2373 /omit-if-no-ref/ <<
2374 sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sle 2008 sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
2375 pins { 2009 pins {
2376 pinmux = <STM32_PINMU 2010 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
2377 <STM32_PINMU 2011 <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
2378 <STM32_PINMU 2012 <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
2379 <STM32_PINMU 2013 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
2380 <STM32_PINMU 2014 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
2381 <STM32_PINMU 2015 <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
2382 }; 2016 };
2383 }; 2017 };
2384 2018
2385 /omit-if-no-ref/ <<
2386 spdifrx_pins_a: spdifrx-0 { 2019 spdifrx_pins_a: spdifrx-0 {
2387 pins { 2020 pins {
2388 pinmux = <STM32_PINMU 2021 pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
2389 bias-disable; 2022 bias-disable;
2390 }; 2023 };
2391 }; 2024 };
2392 2025
2393 /omit-if-no-ref/ <<
2394 spdifrx_sleep_pins_a: spdifrx-sleep-0 2026 spdifrx_sleep_pins_a: spdifrx-sleep-0 {
2395 pins { 2027 pins {
2396 pinmux = <STM32_PINMU 2028 pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
2397 }; 2029 };
2398 }; 2030 };
2399 2031
2400 /omit-if-no-ref/ <<
2401 spi1_pins_b: spi1-1 { 2032 spi1_pins_b: spi1-1 {
2402 pins1 { 2033 pins1 {
2403 pinmux = <STM32_PINMU 2034 pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
2404 <STM32_PINMU 2035 <STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
2405 bias-disable; 2036 bias-disable;
2406 drive-push-pull; 2037 drive-push-pull;
2407 slew-rate = <1>; 2038 slew-rate = <1>;
2408 }; 2039 };
2409 2040
2410 pins2 { 2041 pins2 {
2411 pinmux = <STM32_PINMU 2042 pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
2412 bias-disable; 2043 bias-disable;
2413 }; 2044 };
2414 }; 2045 };
2415 2046
2416 /omit-if-no-ref/ <<
2417 spi2_pins_a: spi2-0 { 2047 spi2_pins_a: spi2-0 {
2418 pins1 { 2048 pins1 {
2419 pinmux = <STM32_PINMU 2049 pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */
2420 <STM32_PINMU 2050 <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
2421 bias-disable; 2051 bias-disable;
2422 drive-push-pull; 2052 drive-push-pull;
2423 slew-rate = <1>; 2053 slew-rate = <1>;
2424 }; 2054 };
2425 2055
2426 pins2 { 2056 pins2 {
2427 pinmux = <STM32_PINMU 2057 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
2428 bias-disable; 2058 bias-disable;
2429 }; 2059 };
2430 }; 2060 };
2431 2061
2432 /omit-if-no-ref/ <<
2433 spi2_pins_b: spi2-1 { 2062 spi2_pins_b: spi2-1 {
2434 pins1 { 2063 pins1 {
2435 pinmux = <STM32_PINMU 2064 pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */
2436 <STM32_PINMU 2065 <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
2437 bias-disable; 2066 bias-disable;
2438 drive-push-pull; 2067 drive-push-pull;
2439 slew-rate = <1>; 2068 slew-rate = <1>;
2440 }; 2069 };
2441 2070
2442 pins2 { 2071 pins2 {
2443 pinmux = <STM32_PINMU 2072 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
2444 bias-disable; 2073 bias-disable;
2445 }; 2074 };
2446 }; 2075 };
2447 2076
2448 /omit-if-no-ref/ <<
2449 spi2_pins_c: spi2-2 { <<
2450 pins1 { <<
2451 pinmux = <STM32_PINMU <<
2452 <STM32_PINMU <<
2453 bias-disable; <<
2454 drive-push-pull; <<
2455 }; <<
2456 <<
2457 pins2 { <<
2458 pinmux = <STM32_PINMU <<
2459 bias-pull-down; <<
2460 }; <<
2461 }; <<
2462 <<
2463 /omit-if-no-ref/ <<
2464 spi4_pins_a: spi4-0 { 2077 spi4_pins_a: spi4-0 {
2465 pins { 2078 pins {
2466 pinmux = <STM32_PINMU 2079 pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
2467 <STM32_PINMU 2080 <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */
2468 bias-disable; 2081 bias-disable;
2469 drive-push-pull; 2082 drive-push-pull;
2470 slew-rate = <1>; 2083 slew-rate = <1>;
2471 }; 2084 };
2472 pins2 { 2085 pins2 {
2473 pinmux = <STM32_PINMU 2086 pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
2474 bias-disable; 2087 bias-disable;
2475 }; 2088 };
2476 }; 2089 };
2477 2090
2478 /omit-if-no-ref/ <<
2479 spi5_pins_a: spi5-0 { <<
2480 pins1 { <<
2481 pinmux = <STM32_PINMU <<
2482 <STM32_PINMU <<
2483 bias-disable; <<
2484 drive-push-pull; <<
2485 slew-rate = <1>; <<
2486 }; <<
2487 <<
2488 pins2 { <<
2489 pinmux = <STM32_PINMU <<
2490 bias-disable; <<
2491 }; <<
2492 }; <<
2493 <<
2494 /omit-if-no-ref/ <<
2495 stusb1600_pins_a: stusb1600-0 { 2091 stusb1600_pins_a: stusb1600-0 {
2496 pins { 2092 pins {
2497 pinmux = <STM32_PINMU 2093 pinmux = <STM32_PINMUX('I', 11, GPIO)>;
2498 bias-pull-up; 2094 bias-pull-up;
2499 }; 2095 };
2500 }; 2096 };
2501 2097
2502 /omit-if-no-ref/ <<
2503 uart4_pins_a: uart4-0 { 2098 uart4_pins_a: uart4-0 {
2504 pins1 { 2099 pins1 {
2505 pinmux = <STM32_PINMU 2100 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
2506 bias-disable; 2101 bias-disable;
2507 drive-push-pull; 2102 drive-push-pull;
2508 slew-rate = <0>; 2103 slew-rate = <0>;
2509 }; 2104 };
2510 pins2 { 2105 pins2 {
2511 pinmux = <STM32_PINMU 2106 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2512 bias-disable; 2107 bias-disable;
2513 }; 2108 };
2514 }; 2109 };
2515 2110
2516 /omit-if-no-ref/ <<
2517 uart4_idle_pins_a: uart4-idle-0 { 2111 uart4_idle_pins_a: uart4-idle-0 {
2518 pins1 { 2112 pins1 {
2519 pinmux = <STM32_PINMU 2113 pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
2520 }; 2114 };
2521 pins2 { 2115 pins2 {
2522 pinmux = <STM32_PINMU 2116 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2523 bias-disable; 2117 bias-disable;
2524 }; 2118 };
2525 }; 2119 };
2526 2120
2527 /omit-if-no-ref/ <<
2528 uart4_sleep_pins_a: uart4-sleep-0 { 2121 uart4_sleep_pins_a: uart4-sleep-0 {
2529 pins { 2122 pins {
2530 pinmux = <STM32_PINMU 2123 pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */
2531 <STM32_PINMU 2124 <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
2532 }; 2125 };
2533 }; 2126 };
2534 2127
2535 /omit-if-no-ref/ <<
2536 uart4_pins_b: uart4-1 { 2128 uart4_pins_b: uart4-1 {
2537 pins1 { 2129 pins1 {
2538 pinmux = <STM32_PINMU 2130 pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
2539 bias-disable; 2131 bias-disable;
2540 drive-push-pull; 2132 drive-push-pull;
2541 slew-rate = <0>; 2133 slew-rate = <0>;
2542 }; 2134 };
2543 pins2 { 2135 pins2 {
2544 pinmux = <STM32_PINMU 2136 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2545 bias-disable; 2137 bias-disable;
2546 }; 2138 };
2547 }; 2139 };
2548 2140
2549 /omit-if-no-ref/ <<
2550 uart4_pins_c: uart4-2 { 2141 uart4_pins_c: uart4-2 {
2551 pins1 { 2142 pins1 {
2552 pinmux = <STM32_PINMU 2143 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
2553 bias-disable; 2144 bias-disable;
2554 drive-push-pull; 2145 drive-push-pull;
2555 slew-rate = <0>; 2146 slew-rate = <0>;
2556 }; 2147 };
2557 pins2 { 2148 pins2 {
2558 pinmux = <STM32_PINMU 2149 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2559 bias-disable; 2150 bias-disable;
2560 }; 2151 };
2561 }; 2152 };
2562 2153
2563 /omit-if-no-ref/ <<
2564 uart4_pins_d: uart4-3 { 2154 uart4_pins_d: uart4-3 {
2565 pins1 { 2155 pins1 {
2566 pinmux = <STM32_PINMU 2156 pinmux = <STM32_PINMUX('A', 13, AF8)>; /* UART4_TX */
2567 bias-disable; 2157 bias-disable;
2568 drive-push-pull; 2158 drive-push-pull;
2569 slew-rate = <0>; 2159 slew-rate = <0>;
2570 }; 2160 };
2571 pins2 { 2161 pins2 {
2572 pinmux = <STM32_PINMU 2162 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2573 bias-disable; 2163 bias-disable;
2574 }; 2164 };
2575 }; 2165 };
2576 2166
2577 /omit-if-no-ref/ <<
2578 uart4_idle_pins_d: uart4-idle-3 { 2167 uart4_idle_pins_d: uart4-idle-3 {
2579 pins1 { 2168 pins1 {
2580 pinmux = <STM32_PINMU 2169 pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* UART4_TX */
2581 }; 2170 };
2582 pins2 { 2171 pins2 {
2583 pinmux = <STM32_PINMU 2172 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2584 bias-disable; 2173 bias-disable;
2585 }; 2174 };
2586 }; 2175 };
2587 2176
2588 /omit-if-no-ref/ <<
2589 uart4_sleep_pins_d: uart4-sleep-3 { 2177 uart4_sleep_pins_d: uart4-sleep-3 {
2590 pins { 2178 pins {
2591 pinmux = <STM32_PINMU 2179 pinmux = <STM32_PINMUX('A', 13, ANALOG)>, /* UART4_TX */
2592 <STM32_PINMU 2180 <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
2593 }; 2181 };
2594 }; 2182 };
2595 2183
2596 /omit-if-no-ref/ <<
2597 uart5_pins_a: uart5-0 { 2184 uart5_pins_a: uart5-0 {
2598 pins1 { 2185 pins1 {
2599 pinmux = <STM32_PINMU 2186 pinmux = <STM32_PINMUX('B', 13, AF14)>; /* UART5_TX */
2600 bias-disable; 2187 bias-disable;
2601 drive-push-pull; 2188 drive-push-pull;
2602 slew-rate = <0>; 2189 slew-rate = <0>;
2603 }; 2190 };
2604 pins2 { 2191 pins2 {
2605 pinmux = <STM32_PINMU 2192 pinmux = <STM32_PINMUX('B', 5, AF12)>; /* UART5_RX */
2606 bias-disable; 2193 bias-disable;
2607 }; 2194 };
2608 }; 2195 };
2609 2196
2610 /omit-if-no-ref/ <<
2611 uart7_pins_a: uart7-0 { 2197 uart7_pins_a: uart7-0 {
2612 pins1 { 2198 pins1 {
2613 pinmux = <STM32_PINMU 2199 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
2614 bias-disable; 2200 bias-disable;
2615 drive-push-pull; 2201 drive-push-pull;
2616 slew-rate = <0>; 2202 slew-rate = <0>;
2617 }; 2203 };
2618 pins2 { 2204 pins2 {
2619 pinmux = <STM32_PINMU 2205 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
2620 <STM32_PINMU 2206 <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
2621 <STM32_PINMU 2207 <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
2622 bias-disable; 2208 bias-disable;
2623 }; 2209 };
2624 }; 2210 };
2625 2211
2626 /omit-if-no-ref/ <<
2627 uart7_pins_b: uart7-1 { 2212 uart7_pins_b: uart7-1 {
2628 pins1 { 2213 pins1 {
2629 pinmux = <STM32_PINMU 2214 pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
2630 bias-disable; 2215 bias-disable;
2631 drive-push-pull; 2216 drive-push-pull;
2632 slew-rate = <0>; 2217 slew-rate = <0>;
2633 }; 2218 };
2634 pins2 { 2219 pins2 {
2635 pinmux = <STM32_PINMU 2220 pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
2636 bias-disable; 2221 bias-disable;
2637 }; 2222 };
2638 }; 2223 };
2639 2224
2640 /omit-if-no-ref/ <<
2641 uart7_pins_c: uart7-2 { 2225 uart7_pins_c: uart7-2 {
2642 pins1 { 2226 pins1 {
2643 pinmux = <STM32_PINMU 2227 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
2644 bias-disable; 2228 bias-disable;
2645 drive-push-pull; 2229 drive-push-pull;
2646 slew-rate = <0>; 2230 slew-rate = <0>;
2647 }; 2231 };
2648 pins2 { 2232 pins2 {
2649 pinmux = <STM32_PINMU 2233 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
2650 bias-pull-up; 2234 bias-pull-up;
2651 }; 2235 };
2652 }; 2236 };
2653 2237
2654 /omit-if-no-ref/ <<
2655 uart7_idle_pins_c: uart7-idle-2 { 2238 uart7_idle_pins_c: uart7-idle-2 {
2656 pins1 { 2239 pins1 {
2657 pinmux = <STM32_PINMU 2240 pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */
2658 }; 2241 };
2659 pins2 { 2242 pins2 {
2660 pinmux = <STM32_PINMU 2243 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
2661 bias-pull-up; 2244 bias-pull-up;
2662 }; 2245 };
2663 }; 2246 };
2664 2247
2665 /omit-if-no-ref/ <<
2666 uart7_sleep_pins_c: uart7-sleep-2 { 2248 uart7_sleep_pins_c: uart7-sleep-2 {
2667 pins { 2249 pins {
2668 pinmux = <STM32_PINMU 2250 pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */
2669 <STM32_PINMU 2251 <STM32_PINMUX('E', 7, ANALOG)>; /* UART7_RX */
2670 }; 2252 };
2671 }; 2253 };
2672 2254
2673 /omit-if-no-ref/ <<
2674 uart8_pins_a: uart8-0 { 2255 uart8_pins_a: uart8-0 {
2675 pins1 { 2256 pins1 {
2676 pinmux = <STM32_PINMU 2257 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
2677 bias-disable; 2258 bias-disable;
2678 drive-push-pull; 2259 drive-push-pull;
2679 slew-rate = <0>; 2260 slew-rate = <0>;
2680 }; 2261 };
2681 pins2 { 2262 pins2 {
2682 pinmux = <STM32_PINMU 2263 pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
2683 bias-disable; 2264 bias-disable;
2684 }; 2265 };
2685 }; 2266 };
2686 2267
2687 /omit-if-no-ref/ <<
2688 uart8_rtscts_pins_a: uart8rtscts-0 { 2268 uart8_rtscts_pins_a: uart8rtscts-0 {
2689 pins { 2269 pins {
2690 pinmux = <STM32_PINMU 2270 pinmux = <STM32_PINMUX('G', 7, AF8)>, /* UART8_RTS */
2691 <STM32_PINMU 2271 <STM32_PINMUX('G', 10, AF8)>; /* UART8_CTS */
2692 bias-disable; 2272 bias-disable;
2693 }; 2273 };
2694 }; 2274 };
2695 2275
2696 /omit-if-no-ref/ <<
2697 usart1_pins_a: usart1-0 { 2276 usart1_pins_a: usart1-0 {
2698 pins1 { 2277 pins1 {
2699 pinmux = <STM32_PINMU 2278 pinmux = <STM32_PINMUX('A', 12, AF7)>; /* USART1_RTS */
2700 bias-disable; 2279 bias-disable;
2701 drive-push-pull; 2280 drive-push-pull;
2702 slew-rate = <0>; 2281 slew-rate = <0>;
2703 }; 2282 };
2704 pins2 { 2283 pins2 {
2705 pinmux = <STM32_PINMU 2284 pinmux = <STM32_PINMUX('A', 11, AF7)>; /* USART1_CTS_NSS */
2706 bias-disable; 2285 bias-disable;
2707 }; 2286 };
2708 }; 2287 };
2709 2288
2710 /omit-if-no-ref/ <<
2711 usart1_idle_pins_a: usart1-idle-0 { 2289 usart1_idle_pins_a: usart1-idle-0 {
2712 pins1 { 2290 pins1 {
2713 pinmux = <STM32_PINMU 2291 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */
2714 <STM32_PINMU 2292 <STM32_PINMUX('A', 11, AF7)>; /* USART1_CTS_NSS */
2715 }; 2293 };
2716 }; 2294 };
2717 2295
2718 /omit-if-no-ref/ <<
2719 usart1_sleep_pins_a: usart1-sleep-0 { 2296 usart1_sleep_pins_a: usart1-sleep-0 {
2720 pins { 2297 pins {
2721 pinmux = <STM32_PINMU 2298 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */
2722 <STM32_PINMU 2299 <STM32_PINMUX('A', 11, ANALOG)>; /* USART1_CTS_NSS */
2723 }; 2300 };
2724 }; 2301 };
2725 2302
2726 /omit-if-no-ref/ <<
2727 usart2_pins_a: usart2-0 { 2303 usart2_pins_a: usart2-0 {
2728 pins1 { 2304 pins1 {
2729 pinmux = <STM32_PINMU 2305 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
2730 <STM32_PINMU 2306 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2731 bias-disable; 2307 bias-disable;
2732 drive-push-pull; 2308 drive-push-pull;
2733 slew-rate = <0>; 2309 slew-rate = <0>;
2734 }; 2310 };
2735 pins2 { 2311 pins2 {
2736 pinmux = <STM32_PINMU 2312 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
2737 <STM32_PINMU 2313 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
2738 bias-disable; 2314 bias-disable;
2739 }; 2315 };
2740 }; 2316 };
2741 2317
2742 /omit-if-no-ref/ <<
2743 usart2_sleep_pins_a: usart2-sleep-0 { 2318 usart2_sleep_pins_a: usart2-sleep-0 {
2744 pins { 2319 pins {
2745 pinmux = <STM32_PINMU 2320 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
2746 <STM32_PINMU 2321 <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
2747 <STM32_PINMU 2322 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
2748 <STM32_PINMU 2323 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
2749 }; 2324 };
2750 }; 2325 };
2751 2326
2752 /omit-if-no-ref/ <<
2753 usart2_pins_b: usart2-1 { 2327 usart2_pins_b: usart2-1 {
2754 pins1 { 2328 pins1 {
2755 pinmux = <STM32_PINMU 2329 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
2756 <STM32_PINMU 2330 <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
2757 bias-disable; 2331 bias-disable;
2758 drive-push-pull; 2332 drive-push-pull;
2759 slew-rate = <0>; 2333 slew-rate = <0>;
2760 }; 2334 };
2761 pins2 { 2335 pins2 {
2762 pinmux = <STM32_PINMU 2336 pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
2763 <STM32_PINMU 2337 <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
2764 bias-disable; 2338 bias-disable;
2765 }; 2339 };
2766 }; 2340 };
2767 2341
2768 /omit-if-no-ref/ <<
2769 usart2_sleep_pins_b: usart2-sleep-1 { 2342 usart2_sleep_pins_b: usart2-sleep-1 {
2770 pins { 2343 pins {
2771 pinmux = <STM32_PINMU 2344 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
2772 <STM32_PINMU 2345 <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */
2773 <STM32_PINMU 2346 <STM32_PINMUX('F', 4, ANALOG)>, /* USART2_RX */
2774 <STM32_PINMU 2347 <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
2775 }; 2348 };
2776 }; 2349 };
2777 2350
2778 /omit-if-no-ref/ <<
2779 usart2_pins_c: usart2-2 { 2351 usart2_pins_c: usart2-2 {
2780 pins1 { 2352 pins1 {
2781 pinmux = <STM32_PINMU 2353 pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
2782 <STM32_PINMU 2354 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2783 bias-disable; 2355 bias-disable;
2784 drive-push-pull; 2356 drive-push-pull;
2785 slew-rate = <0>; 2357 slew-rate = <0>;
2786 }; 2358 };
2787 pins2 { 2359 pins2 {
2788 pinmux = <STM32_PINMU 2360 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
2789 <STM32_PINMU 2361 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
2790 bias-disable; 2362 bias-disable;
2791 }; 2363 };
2792 }; 2364 };
2793 2365
2794 /omit-if-no-ref/ <<
2795 usart2_idle_pins_c: usart2-idle-2 { 2366 usart2_idle_pins_c: usart2-idle-2 {
2796 pins1 { 2367 pins1 {
2797 pinmux = <STM32_PINMU 2368 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
2798 <STM32_PINMU 2369 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
2799 }; 2370 };
2800 pins2 { 2371 pins2 {
2801 pinmux = <STM32_PINMU 2372 pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2802 bias-disable; 2373 bias-disable;
2803 drive-push-pull; 2374 drive-push-pull;
2804 slew-rate = <0>; 2375 slew-rate = <0>;
2805 }; 2376 };
2806 pins3 { 2377 pins3 {
2807 pinmux = <STM32_PINMU 2378 pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
2808 bias-disable; 2379 bias-disable;
2809 }; 2380 };
2810 }; 2381 };
2811 2382
2812 /omit-if-no-ref/ <<
2813 usart2_sleep_pins_c: usart2-sleep-2 { 2383 usart2_sleep_pins_c: usart2-sleep-2 {
2814 pins { 2384 pins {
2815 pinmux = <STM32_PINMU 2385 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
2816 <STM32_PINMU 2386 <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
2817 <STM32_PINMU 2387 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
2818 <STM32_PINMU 2388 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
2819 }; 2389 };
2820 }; 2390 };
2821 2391
2822 /omit-if-no-ref/ <<
2823 usart3_pins_a: usart3-0 { 2392 usart3_pins_a: usart3-0 {
2824 pins1 { 2393 pins1 {
2825 pinmux = <STM32_PINMU 2394 pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
2826 bias-disable; 2395 bias-disable;
2827 drive-push-pull; 2396 drive-push-pull;
2828 slew-rate = <0>; 2397 slew-rate = <0>;
2829 }; 2398 };
2830 pins2 { 2399 pins2 {
2831 pinmux = <STM32_PINMU 2400 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2832 bias-disable; 2401 bias-disable;
2833 }; 2402 };
2834 }; 2403 };
2835 2404
2836 /omit-if-no-ref/ <<
2837 usart3_idle_pins_a: usart3-idle-0 { 2405 usart3_idle_pins_a: usart3-idle-0 {
2838 pins1 { 2406 pins1 {
2839 pinmux = <STM32_PINMU 2407 pinmux = <STM32_PINMUX('B', 10, ANALOG)>; /* USART3_TX */
2840 }; 2408 };
2841 pins2 { 2409 pins2 {
2842 pinmux = <STM32_PINMU 2410 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2843 bias-disable; 2411 bias-disable;
2844 }; 2412 };
2845 }; 2413 };
2846 2414
2847 /omit-if-no-ref/ <<
2848 usart3_sleep_pins_a: usart3-sleep-0 { 2415 usart3_sleep_pins_a: usart3-sleep-0 {
2849 pins { 2416 pins {
2850 pinmux = <STM32_PINMU 2417 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2851 <STM32_PINMU 2418 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
2852 }; 2419 };
2853 }; 2420 };
2854 2421
2855 /omit-if-no-ref/ <<
2856 usart3_pins_b: usart3-1 { 2422 usart3_pins_b: usart3-1 {
2857 pins1 { 2423 pins1 {
2858 pinmux = <STM32_PINMU 2424 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2859 <STM32_PINMU 2425 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2860 bias-disable; 2426 bias-disable;
2861 drive-push-pull; 2427 drive-push-pull;
2862 slew-rate = <0>; 2428 slew-rate = <0>;
2863 }; 2429 };
2864 pins2 { 2430 pins2 {
2865 pinmux = <STM32_PINMU 2431 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2866 <STM32_PINMU 2432 <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
2867 bias-pull-up; 2433 bias-pull-up;
2868 }; 2434 };
2869 }; 2435 };
2870 2436
2871 /omit-if-no-ref/ <<
2872 usart3_idle_pins_b: usart3-idle-1 { 2437 usart3_idle_pins_b: usart3-idle-1 {
2873 pins1 { 2438 pins1 {
2874 pinmux = <STM32_PINMU 2439 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2875 <STM32_PINMU 2440 <STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */
2876 }; 2441 };
2877 pins2 { 2442 pins2 {
2878 pinmux = <STM32_PINMU 2443 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2879 bias-disable; 2444 bias-disable;
2880 drive-push-pull; 2445 drive-push-pull;
2881 slew-rate = <0>; 2446 slew-rate = <0>;
2882 }; 2447 };
2883 pins3 { 2448 pins3 {
2884 pinmux = <STM32_PINMU 2449 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2885 bias-pull-up; 2450 bias-pull-up;
2886 }; 2451 };
2887 }; 2452 };
2888 2453
2889 /omit-if-no-ref/ <<
2890 usart3_sleep_pins_b: usart3-sleep-1 { 2454 usart3_sleep_pins_b: usart3-sleep-1 {
2891 pins { 2455 pins {
2892 pinmux = <STM32_PINMU 2456 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2893 <STM32_PINMU 2457 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2894 <STM32_PINMU 2458 <STM32_PINMUX('I', 10, ANALOG)>, /* USART3_CTS_NSS */
2895 <STM32_PINMU 2459 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
2896 }; 2460 };
2897 }; 2461 };
2898 2462
2899 /omit-if-no-ref/ <<
2900 usart3_pins_c: usart3-2 { 2463 usart3_pins_c: usart3-2 {
2901 pins1 { 2464 pins1 {
2902 pinmux = <STM32_PINMU 2465 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2903 <STM32_PINMU 2466 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2904 bias-disable; 2467 bias-disable;
2905 drive-push-pull; 2468 drive-push-pull;
2906 slew-rate = <0>; 2469 slew-rate = <0>;
2907 }; 2470 };
2908 pins2 { 2471 pins2 {
2909 pinmux = <STM32_PINMU 2472 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2910 <STM32_PINMU 2473 <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */
2911 bias-pull-up; 2474 bias-pull-up;
2912 }; 2475 };
2913 }; 2476 };
2914 2477
2915 /omit-if-no-ref/ <<
2916 usart3_idle_pins_c: usart3-idle-2 { 2478 usart3_idle_pins_c: usart3-idle-2 {
2917 pins1 { 2479 pins1 {
2918 pinmux = <STM32_PINMU 2480 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2919 <STM32_PINMU 2481 <STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */
2920 }; 2482 };
2921 pins2 { 2483 pins2 {
2922 pinmux = <STM32_PINMU 2484 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2923 bias-disable; 2485 bias-disable;
2924 drive-push-pull; 2486 drive-push-pull;
2925 slew-rate = <0>; 2487 slew-rate = <0>;
2926 }; 2488 };
2927 pins3 { 2489 pins3 {
2928 pinmux = <STM32_PINMU 2490 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2929 bias-pull-up; 2491 bias-pull-up;
2930 }; 2492 };
2931 }; 2493 };
2932 2494
2933 /omit-if-no-ref/ <<
2934 usart3_sleep_pins_c: usart3-sleep-2 { 2495 usart3_sleep_pins_c: usart3-sleep-2 {
2935 pins { 2496 pins {
2936 pinmux = <STM32_PINMU 2497 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2937 <STM32_PINMU 2498 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2938 <STM32_PINMU 2499 <STM32_PINMUX('B', 13, ANALOG)>, /* USART3_CTS_NSS */
2939 <STM32_PINMU 2500 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
2940 }; 2501 };
2941 }; 2502 };
2942 2503
2943 /omit-if-no-ref/ <<
2944 usart3_pins_d: usart3-3 { 2504 usart3_pins_d: usart3-3 {
2945 pins1 { 2505 pins1 {
2946 pinmux = <STM32_PINMU 2506 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2947 <STM32_PINMU 2507 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2948 bias-disable; 2508 bias-disable;
2949 drive-push-pull; 2509 drive-push-pull;
2950 slew-rate = <0>; 2510 slew-rate = <0>;
2951 }; 2511 };
2952 pins2 { 2512 pins2 {
2953 pinmux = <STM32_PINMU 2513 pinmux = <STM32_PINMUX('D', 9, AF7)>, /* USART3_RX */
2954 <STM32_PINMU 2514 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
2955 bias-disable; 2515 bias-disable;
2956 }; 2516 };
2957 }; 2517 };
2958 2518
2959 /omit-if-no-ref/ <<
2960 usart3_idle_pins_d: usart3-idle-3 { 2519 usart3_idle_pins_d: usart3-idle-3 {
2961 pins1 { 2520 pins1 {
2962 pinmux = <STM32_PINMU 2521 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2963 <STM32_PINMU 2522 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2964 <STM32_PINMU 2523 <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */
2965 }; 2524 };
2966 pins2 { 2525 pins2 {
2967 pinmux = <STM32_PINMU 2526 pinmux = <STM32_PINMUX('D', 9, AF7)>; /* USART3_RX */
2968 bias-disable; 2527 bias-disable;
2969 }; 2528 };
2970 }; 2529 };
2971 2530
2972 /omit-if-no-ref/ <<
2973 usart3_sleep_pins_d: usart3-sleep-3 { 2531 usart3_sleep_pins_d: usart3-sleep-3 {
2974 pins { 2532 pins {
2975 pinmux = <STM32_PINMU 2533 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2976 <STM32_PINMU 2534 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2977 <STM32_PINMU 2535 <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */
2978 <STM32_PINMU 2536 <STM32_PINMUX('D', 9, ANALOG)>; /* USART3_RX */
2979 }; 2537 };
2980 }; 2538 };
2981 2539
2982 /omit-if-no-ref/ <<
2983 usart3_pins_e: usart3-4 { 2540 usart3_pins_e: usart3-4 {
2984 pins1 { 2541 pins1 {
2985 pinmux = <STM32_PINMU 2542 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2986 <STM32_PINMU 2543 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2987 bias-disable; 2544 bias-disable;
2988 drive-push-pull; 2545 drive-push-pull;
2989 slew-rate = <0>; 2546 slew-rate = <0>;
2990 }; 2547 };
2991 pins2 { 2548 pins2 {
2992 pinmux = <STM32_PINMU 2549 pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */
2993 <STM32_PINMU 2550 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
2994 bias-pull-up; 2551 bias-pull-up;
2995 }; 2552 };
2996 }; 2553 };
2997 2554
2998 /omit-if-no-ref/ <<
2999 usart3_idle_pins_e: usart3-idle-4 { 2555 usart3_idle_pins_e: usart3-idle-4 {
3000 pins1 { 2556 pins1 {
3001 pinmux = <STM32_PINMU 2557 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
3002 <STM32_PINMU 2558 <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */
3003 }; 2559 };
3004 pins2 { 2560 pins2 {
3005 pinmux = <STM32_PINMU 2561 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
3006 bias-disable; 2562 bias-disable;
3007 drive-push-pull; 2563 drive-push-pull;
3008 slew-rate = <0>; 2564 slew-rate = <0>;
3009 }; 2565 };
3010 pins3 { 2566 pins3 {
3011 pinmux = <STM32_PINMU 2567 pinmux = <STM32_PINMUX('B', 11, AF7)>; /* USART3_RX */
3012 bias-pull-up; 2568 bias-pull-up;
3013 }; 2569 };
3014 }; 2570 };
3015 2571
3016 /omit-if-no-ref/ <<
3017 usart3_sleep_pins_e: usart3-sleep-4 { 2572 usart3_sleep_pins_e: usart3-sleep-4 {
3018 pins { 2573 pins {
3019 pinmux = <STM32_PINMU 2574 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
3020 <STM32_PINMU 2575 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
3021 <STM32_PINMU 2576 <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */
3022 <STM32_PINMU 2577 <STM32_PINMUX('B', 11, ANALOG)>; /* USART3_RX */
3023 }; 2578 };
3024 }; 2579 };
3025 2580
3026 /omit-if-no-ref/ <<
3027 usart3_pins_f: usart3-5 { <<
3028 pins1 { <<
3029 pinmux = <STM32_PINMU <<
3030 <STM32_PINMU <<
3031 bias-disable; <<
3032 drive-push-pull; <<
3033 slew-rate = <0>; <<
3034 }; <<
3035 pins2 { <<
3036 pinmux = <STM32_PINMU <<
3037 <STM32_PINMU <<
3038 bias-disable; <<
3039 }; <<
3040 }; <<
3041 <<
3042 /omit-if-no-ref/ <<
3043 usbotg_hs_pins_a: usbotg-hs-0 { 2581 usbotg_hs_pins_a: usbotg-hs-0 {
3044 pins { 2582 pins {
3045 pinmux = <STM32_PINMU 2583 pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
3046 }; 2584 };
3047 }; 2585 };
3048 2586
3049 /omit-if-no-ref/ <<
3050 usbotg_fs_dp_dm_pins_a: usbotg-fs-dp- 2587 usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
3051 pins { 2588 pins {
3052 pinmux = <STM32_PINMU 2589 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
3053 <STM32_PINMU 2590 <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
3054 }; 2591 };
3055 }; 2592 };
3056 }; 2593 };
3057 2594
3058 &pinctrl_z { 2595 &pinctrl_z {
3059 /omit-if-no-ref/ <<
3060 i2c2_pins_b2: i2c2-0 { 2596 i2c2_pins_b2: i2c2-0 {
3061 pins { 2597 pins {
3062 pinmux = <STM32_PINMU 2598 pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
3063 bias-disable; 2599 bias-disable;
3064 drive-open-drain; 2600 drive-open-drain;
3065 slew-rate = <0>; 2601 slew-rate = <0>;
3066 }; 2602 };
3067 }; 2603 };
3068 2604
3069 /omit-if-no-ref/ <<
3070 i2c2_sleep_pins_b2: i2c2-sleep-0 { 2605 i2c2_sleep_pins_b2: i2c2-sleep-0 {
3071 pins { 2606 pins {
3072 pinmux = <STM32_PINMU 2607 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
3073 }; 2608 };
3074 }; 2609 };
3075 2610
3076 /omit-if-no-ref/ <<
3077 i2c4_pins_a: i2c4-0 { 2611 i2c4_pins_a: i2c4-0 {
3078 pins { 2612 pins {
3079 pinmux = <STM32_PINMU 2613 pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
3080 <STM32_PINMU 2614 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
3081 bias-disable; 2615 bias-disable;
3082 drive-open-drain; 2616 drive-open-drain;
3083 slew-rate = <0>; 2617 slew-rate = <0>;
3084 }; 2618 };
3085 }; 2619 };
3086 2620
3087 /omit-if-no-ref/ <<
3088 i2c4_sleep_pins_a: i2c4-sleep-0 { 2621 i2c4_sleep_pins_a: i2c4-sleep-0 {
3089 pins { 2622 pins {
3090 pinmux = <STM32_PINMU 2623 pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
3091 <STM32_PINMU 2624 <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
3092 }; 2625 };
3093 }; 2626 };
3094 2627
3095 /omit-if-no-ref/ <<
3096 i2c6_pins_a: i2c6-0 { 2628 i2c6_pins_a: i2c6-0 {
3097 pins { 2629 pins {
3098 pinmux = <STM32_PINMU 2630 pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */
3099 <STM32_PINMU 2631 <STM32_PINMUX('Z', 7, AF2)>; /* I2C6_SDA */
3100 bias-disable; 2632 bias-disable;
3101 drive-open-drain; 2633 drive-open-drain;
3102 slew-rate = <0>; 2634 slew-rate = <0>;
3103 }; 2635 };
3104 }; 2636 };
3105 2637
3106 /omit-if-no-ref/ <<
3107 i2c6_sleep_pins_a: i2c6-sleep-0 { 2638 i2c6_sleep_pins_a: i2c6-sleep-0 {
3108 pins { 2639 pins {
3109 pinmux = <STM32_PINMU 2640 pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */
3110 <STM32_PINMU 2641 <STM32_PINMUX('Z', 7, ANALOG)>; /* I2C6_SDA */
3111 }; 2642 };
3112 }; 2643 };
3113 2644
3114 /omit-if-no-ref/ <<
3115 spi1_pins_a: spi1-0 { 2645 spi1_pins_a: spi1-0 {
3116 pins1 { 2646 pins1 {
3117 pinmux = <STM32_PINMU 2647 pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
3118 <STM32_PINMU 2648 <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
3119 bias-disable; 2649 bias-disable;
3120 drive-push-pull; 2650 drive-push-pull;
3121 slew-rate = <1>; 2651 slew-rate = <1>;
3122 }; 2652 };
3123 2653
3124 pins2 { 2654 pins2 {
3125 pinmux = <STM32_PINMU 2655 pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
3126 bias-disable; 2656 bias-disable;
3127 }; 2657 };
3128 }; 2658 };
3129 2659
3130 /omit-if-no-ref/ <<
3131 spi1_sleep_pins_a: spi1-sleep-0 { 2660 spi1_sleep_pins_a: spi1-sleep-0 {
3132 pins { 2661 pins {
3133 pinmux = <STM32_PINMU 2662 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>, /* SPI1_SCK */
3134 <STM32_PINMU 2663 <STM32_PINMUX('Z', 1, ANALOG)>, /* SPI1_MISO */
3135 <STM32_PINMU 2664 <STM32_PINMUX('Z', 2, ANALOG)>; /* SPI1_MOSI */
3136 }; 2665 };
3137 }; 2666 };
3138 2667
3139 /omit-if-no-ref/ <<
3140 usart1_pins_b: usart1-1 { 2668 usart1_pins_b: usart1-1 {
3141 pins1 { 2669 pins1 {
3142 pinmux = <STM32_PINMU 2670 pinmux = <STM32_PINMUX('Z', 7, AF7)>; /* USART1_TX */
3143 bias-disable; 2671 bias-disable;
3144 drive-push-pull; 2672 drive-push-pull;
3145 slew-rate = <0>; 2673 slew-rate = <0>;
3146 }; 2674 };
3147 pins2 { 2675 pins2 {
3148 pinmux = <STM32_PINMU 2676 pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */
3149 bias-disable; 2677 bias-disable;
3150 }; 2678 };
3151 }; 2679 };
3152 2680
3153 /omit-if-no-ref/ <<
3154 usart1_idle_pins_b: usart1-idle-1 { 2681 usart1_idle_pins_b: usart1-idle-1 {
3155 pins1 { 2682 pins1 {
3156 pinmux = <STM32_PINMU 2683 pinmux = <STM32_PINMUX('Z', 7, ANALOG)>; /* USART1_TX */
3157 }; 2684 };
3158 pins2 { 2685 pins2 {
3159 pinmux = <STM32_PINMU 2686 pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */
3160 bias-disable; 2687 bias-disable;
3161 }; 2688 };
3162 }; 2689 };
3163 2690
3164 /omit-if-no-ref/ <<
3165 usart1_sleep_pins_b: usart1-sleep-1 { 2691 usart1_sleep_pins_b: usart1-sleep-1 {
3166 pins { 2692 pins {
3167 pinmux = <STM32_PINMU 2693 pinmux = <STM32_PINMUX('Z', 7, ANALOG)>, /* USART1_TX */
3168 <STM32_PINMU 2694 <STM32_PINMUX('Z', 6, ANALOG)>; /* USART1_RX */
3169 }; 2695 };
3170 }; 2696 };
3171 }; 2697 };
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