1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /* 2 /*
3 * Copyright (C) STMicroelectronics 2019 - All 3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@s 4 * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
5 */ 5 */
6 6
7 #include "stm32mp153.dtsi" 7 #include "stm32mp153.dtsi"
8 8
9 / { 9 / {
10 soc { 10 soc {
11 gpu: gpu@59000000 { 11 gpu: gpu@59000000 {
12 compatible = "vivante, 12 compatible = "vivante,gc";
13 reg = <0x59000000 0x80 13 reg = <0x59000000 0x800>;
14 interrupts = <GIC_SPI 14 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
15 clocks = <&rcc GPU>, < 15 clocks = <&rcc GPU>, <&rcc GPU_K>;
16 clock-names = "bus" ," 16 clock-names = "bus" ,"core";
17 resets = <&rcc GPU_R>; 17 resets = <&rcc GPU_R>;
18 }; 18 };
19 19
20 dsi: dsi@5a000000 { 20 dsi: dsi@5a000000 {
21 compatible = "st,stm32 21 compatible = "st,stm32-dsi";
22 reg = <0x5a000000 0x80 22 reg = <0x5a000000 0x800>;
23 clocks = <&rcc DSI>, < 23 clocks = <&rcc DSI>, <&clk_hse>, <&rcc DSI_PX>;
24 clock-names = "pclk", 24 clock-names = "pclk", "ref", "px_clk";
25 phy-dsi-supply = <® 25 phy-dsi-supply = <®18>;
26 resets = <&rcc DSI_R>; 26 resets = <&rcc DSI_R>;
27 reset-names = "apb"; 27 reset-names = "apb";
28 status = "disabled"; 28 status = "disabled";
29 29
30 ports { 30 ports {
31 #address-cells 31 #address-cells = <1>;
32 #size-cells = 32 #size-cells = <0>;
33 33
34 port@0 { 34 port@0 {
35 reg = 35 reg = <0>;
36 dsi_in 36 dsi_in: endpoint {
37 }; 37 };
38 }; 38 };
39 39
40 port@1 { 40 port@1 {
41 reg = 41 reg = <1>;
42 dsi_ou 42 dsi_out: endpoint {
43 }; 43 };
44 }; 44 };
45 }; 45 };
46 }; 46 };
47 }; 47 };
48 }; 48 };
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