1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for Sunplus SP7021
4 *
5 * Copyright (C) 2021 Sunplus Technology Co.
6 */
7
8 #include <dt-bindings/clock/sunplus,sp7021-clk
9 #include <dt-bindings/interrupt-controller/irq
10 #include <dt-bindings/reset/sunplus,sp7021-res
11 #include <dt-bindings/pinctrl/sppctl-sp7021.h>
12 #include <dt-bindings/gpio/gpio.h>
13
14 #define XTAL 27000000
15
16 / {
17 compatible = "sunplus,sp7021";
18 model = "Sunplus SP7021";
19
20 clocks {
21 extclk: osc0 {
22 compatible = "fixed-cl
23 #clock-cells = <0>;
24 clock-frequency = <XTA
25 clock-output-names = "
26 };
27 };
28
29 soc@9c000000 {
30 compatible = "simple-bus";
31 #address-cells = <1>;
32 #size-cells = <1>;
33 ranges = <0 0x9c000000 0x40000
34 interrupt-parent = <&intc>;
35
36 clkc: clock-controller@4 {
37 compatible = "sunplus,
38 reg = <0x4 0x28>,
39 <0x200 0x44>,
40 <0x268 0x04>;
41 clocks = <&extclk>;
42 #clock-cells = <1>;
43 };
44
45 intc: interrupt-controller@780
46 compatible = "sunplus,
47 reg = <0x780 0x80>, <0
48 interrupt-controller;
49 #interrupt-cells = <2>
50 };
51
52 otp: otp@af00 {
53 compatible = "sunplus,
54 reg = <0xaf00 0x34>, <
55 reg-names = "hb_gpio",
56 clocks = <&clkc CLK_OT
57 resets = <&rstc RST_OT
58 #address-cells = <1>;
59 #size-cells = <1>;
60
61 therm_calib: thermal-c
62 reg = <0x14 0x
63 };
64 disc_vol: disconnect-v
65 reg = <0x18 0x
66 };
67 mac_addr0: mac-address
68 reg = <0x34 0x
69 };
70 mac_addr1: mac-address
71 reg = <0x3a 0x
72 };
73 };
74
75 pctl: pinctrl@100 {
76 compatible = "sunplus,
77 reg = <0x100 0x100>,
78 <0x300 0x100>,
79 <0x32e4 0x1C>,
80 <0x80 0x20>;
81 reg-names = "moon2", "
82 gpio-controller;
83 #gpio-cells = <2>;
84 clocks = <&clkc CLK_GP
85 resets = <&rstc RST_GP
86
87 emac_pins: pinmux-emac
88 sunplus,pins =
89 SPPCTL
90 SPPCTL
91 SPPCTL
92 SPPCTL
93 SPPCTL
94 SPPCTL
95 SPPCTL
96 SPPCTL
97 SPPCTL
98 SPPCTL
99 SPPCTL
100 SPPCTL
101 SPPCTL
102 SPPCTL
103 SPPCTL
104 SPPCTL
105 SPPCTL
106 >;
107 sunplus,zerofu
108 MUXF_L
109 MUXF_L
110 MUXF_L
111 MUXF_L
112 MUXF_D
113 >;
114 };
115
116 emmc_pins: pinmux-emmc
117 function = "CA
118 groups = "CARD
119 };
120
121 leds_pins: pinmux-leds
122 sunplus,pins =
123 };
124
125 sdcard_pins: pinmux-sd
126 function = "SD
127 groups = "SD_C
128 sunplus,pins =
129 };
130
131 spi0_pins: pinmux-spi0
132 sunplus,pins =
133 SPPCTL
134 SPPCTL
135 SPPCTL
136 SPPCTL
137 SPPCTL
138 >;
139 };
140
141 uart0_pins: pinmux-uar
142 function = "UA
143 groups = "UA0"
144 };
145
146 uart1_pins: pinmux-uar
147 sunplus,pins =
148 SPPCTL
149 SPPCTL
150 >;
151 };
152
153 uart2_pins: pinmux-uar
154 sunplus,pins =
155 SPPCTL
156 SPPCTL
157 SPPCTL
158 SPPCTL
159 >;
160 };
161
162 uart4_pins: pinmux-uar
163 sunplus,pins =
164 SPPCTL
165 SPPCTL
166 SPPCTL
167 SPPCTL
168 >;
169 };
170 };
171
172 rstc: reset@54 {
173 compatible = "sunplus,
174 reg = <0x54 0x28>;
175 #reset-cells = <1>;
176 };
177
178 rtc: rtc@3a00 {
179 compatible = "sunplus,
180 reg = <0x3a00 0x80>;
181 reg-names = "rtc";
182 clocks = <&clkc CLK_RT
183 resets = <&rstc RST_RT
184 interrupts = <163 IRQ_
185 };
186
187 spi_controller0: spi@2d80 {
188 compatible = "sunplus,
189 reg = <0x2d80 0x80>, <
190 reg-names = "master",
191 interrupts = <144 IRQ_
192 <146 IRQ_
193 <145 IRQ_
194 interrupt-names = "dma
195 clocks = <&clkc CLK_SP
196 resets = <&rstc RST_SP
197
198 pinctrl-names = "defau
199 pinctrl-0 = <&spi0_pin
200 cs-gpios = <&pctl 26 G
201 <&pctl 28 G
202 };
203
204 spi_controller1: spi@f480 {
205 compatible = "sunplus,
206 reg = <0xf480 0x80>, <
207 reg-names = "master",
208 interrupts = <67 IRQ_T
209 <69 IRQ_T
210 <68 IRQ_T
211 interrupt-names = "dma
212 clocks = <&clkc CLK_SP
213 resets = <&rstc RST_SP
214 status = "disabled";
215 };
216
217 spi_controller2: spi@f600 {
218 compatible = "sunplus,
219 reg = <0xf600 0x80>, <
220 reg-names = "master",
221 interrupts = <70 IRQ_T
222 <72 IRQ_T
223 <71 IRQ_T
224 interrupt-names = "dma
225 clocks = <&clkc CLK_SP
226 resets = <&rstc RST_SP
227 status = "disabled";
228 };
229
230 spi_controller3: spi@f780 {
231 compatible = "sunplus,
232 reg = <0xf780 0x80>, <
233 reg-names = "master",
234 interrupts = <73 IRQ_T
235 <75 IRQ_T
236 <74 IRQ_T
237 interrupt-names = "dma
238 clocks = <&clkc CLK_SP
239 resets = <&rstc RST_SP
240 status = "disabled";
241 };
242
243 uart0: serial@900 {
244 compatible = "sunplus,
245 reg = <0x900 0x80>;
246 interrupts = <53 IRQ_T
247 clocks = <&clkc CLK_UA
248 resets = <&rstc RST_UA
249 pinctrl-names = "defau
250 pinctrl-0 = <&uart0_pi
251 };
252
253 uart1: serial@980 {
254 compatible = "sunplus,
255 reg = <0x980 0x80>;
256 interrupts = <54 IRQ_T
257 clocks = <&clkc CLK_UA
258 resets = <&rstc RST_UA
259 pinctrl-names = "defau
260 pinctrl-0 = <&uart1_pi
261 status = "disabled";
262 };
263
264 uart2: serial@800 {
265 compatible = "sunplus,
266 reg = <0x800 0x80>;
267 interrupts = <55 IRQ_T
268 clocks = <&clkc CLK_UA
269 resets = <&rstc RST_UA
270 pinctrl-names = "defau
271 pinctrl-0 = <&uart2_pi
272 status = "disabled";
273 };
274
275 uart3: serial@880 {
276 compatible = "sunplus,
277 reg = <0x880 0x80>;
278 interrupts = <56 IRQ_T
279 clocks = <&clkc CLK_UA
280 resets = <&rstc RST_UA
281 status = "disabled";
282 };
283
284 uart4: serial@8780 {
285 compatible = "sunplus,
286 reg = <0x8780 0x80>;
287 interrupts = <134 IRQ_
288 clocks = <&clkc CLK_UA
289 resets = <&rstc RST_UA
290 pinctrl-names = "defau
291 pinctrl-0 = <&uart4_pi
292 status = "disabled";
293 };
294 };
295
296 leds {
297 compatible = "gpio-leds";
298 pinctrl-names = "default";
299 pinctrl-0 = <&leds_pins>;
300 system-led {
301 label = "system-led";
302 gpios = <&pctl 0 GPIO_
303 default-state = "off";
304 linux,default-trigger
305 };
306 };
307 };
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