1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Keystone 2 Edison EVM device tree 3 * Keystone 2 Edison EVM device tree
4 * 4 *
5 * Copyright (C) 2013-2017 Texas Instruments I 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/
6 */ 6 */
7 /dts-v1/; 7 /dts-v1/;
8 8
9 #include "keystone.dtsi" 9 #include "keystone.dtsi"
10 #include "keystone-k2e.dtsi" 10 #include "keystone-k2e.dtsi"
11 11
12 / { 12 / {
13 compatible = "ti,k2e-evm", "ti,k2e", " 13 compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone";
14 model = "Texas Instruments Keystone 2 14 model = "Texas Instruments Keystone 2 Edison EVM";
15 15
16 reserved-memory { 16 reserved-memory {
17 #address-cells = <2>; 17 #address-cells = <2>;
18 #size-cells = <2>; 18 #size-cells = <2>;
19 ranges; 19 ranges;
20 20
21 dsp_common_memory: dsp-common- 21 dsp_common_memory: dsp-common-memory@81f800000 {
22 compatible = "shared-d 22 compatible = "shared-dma-pool";
23 reg = <0x00000008 0x1f 23 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
24 reusable; 24 reusable;
25 status = "okay"; 25 status = "okay";
26 }; 26 };
27 }; 27 };
28 }; 28 };
29 29
30 &soc0 { 30 &soc0 {
31 31
32 clocks { 32 clocks {
33 refclksys: refclksys { 33 refclksys: refclksys {
34 #clock-cells = 34 #clock-cells = <0>;
35 compatible = " 35 compatible = "fixed-clock";
36 clock-frequenc 36 clock-frequency = <100000000>;
37 clock-output-n 37 clock-output-names = "refclk-sys";
38 }; 38 };
39 39
40 refclkpass: refclkpass 40 refclkpass: refclkpass {
41 #clock-cells = 41 #clock-cells = <0>;
42 compatible = " 42 compatible = "fixed-clock";
43 clock-frequenc 43 clock-frequency = <100000000>;
44 clock-output-n 44 clock-output-names = "refclk-pass";
45 }; 45 };
46 46
47 refclkddr3a: refclkddr 47 refclkddr3a: refclkddr3a {
48 #clock-cells = 48 #clock-cells = <0>;
49 compatible = " 49 compatible = "fixed-clock";
50 clock-frequenc 50 clock-frequency = <100000000>;
51 clock-output-n 51 clock-output-names = "refclk-ddr3a";
52 }; 52 };
53 }; 53 };
54 }; 54 };
55 55
56 &usb_phy { 56 &usb_phy {
57 status = "okay"; 57 status = "okay";
58 }; 58 };
59 59
60 &keystone_usb0 { 60 &keystone_usb0 {
61 status = "okay"; 61 status = "okay";
62 }; 62 };
63 63
64 &usb0 { 64 &usb0 {
65 dr_mode = "host"; 65 dr_mode = "host";
66 }; 66 };
67 67
68 &usb1_phy { 68 &usb1_phy {
69 status = "okay"; 69 status = "okay";
70 }; 70 };
71 71
72 &keystone_usb1 { 72 &keystone_usb1 {
73 status = "okay"; 73 status = "okay";
74 }; 74 };
75 75
76 &usb1 { 76 &usb1 {
77 dr_mode = "peripheral"; 77 dr_mode = "peripheral";
78 }; 78 };
79 79
80 &i2c0 { 80 &i2c0 {
81 eeprom@50 { 81 eeprom@50 {
82 compatible = "atmel,24c1024"; 82 compatible = "atmel,24c1024";
83 reg = <0x50>; 83 reg = <0x50>;
84 }; 84 };
85 }; 85 };
86 86
87 &aemif { 87 &aemif {
88 cs0 { 88 cs0 {
89 #address-cells = <2>; 89 #address-cells = <2>;
90 #size-cells = <1>; 90 #size-cells = <1>;
91 clock-ranges; 91 clock-ranges;
92 ranges; 92 ranges;
93 93
94 ti,cs-chipselect = <0>; 94 ti,cs-chipselect = <0>;
95 /* all timings in nanoseconds 95 /* all timings in nanoseconds */
96 ti,cs-min-turnaround-ns = <12> 96 ti,cs-min-turnaround-ns = <12>;
97 ti,cs-read-hold-ns = <6>; 97 ti,cs-read-hold-ns = <6>;
98 ti,cs-read-strobe-ns = <23>; 98 ti,cs-read-strobe-ns = <23>;
99 ti,cs-read-setup-ns = <9>; 99 ti,cs-read-setup-ns = <9>;
100 ti,cs-write-hold-ns = <8>; 100 ti,cs-write-hold-ns = <8>;
101 ti,cs-write-strobe-ns = <23>; 101 ti,cs-write-strobe-ns = <23>;
102 ti,cs-write-setup-ns = <8>; 102 ti,cs-write-setup-ns = <8>;
103 103
104 nand@0,0 { 104 nand@0,0 {
105 compatible = "ti,keyst 105 compatible = "ti,keystone-nand","ti,davinci-nand";
106 #address-cells = <1>; 106 #address-cells = <1>;
107 #size-cells = <1>; 107 #size-cells = <1>;
108 reg = <0 0 0x4000000 108 reg = <0 0 0x4000000
109 1 0 0x0000100>; 109 1 0 0x0000100>;
110 110
111 ti,davinci-chipselect 111 ti,davinci-chipselect = <0>;
112 ti,davinci-mask-ale = 112 ti,davinci-mask-ale = <0x2000>;
113 ti,davinci-mask-cle = 113 ti,davinci-mask-cle = <0x4000>;
114 ti,davinci-mask-chipse 114 ti,davinci-mask-chipsel = <0>;
115 nand-ecc-mode = "hw"; 115 nand-ecc-mode = "hw";
116 ti,davinci-ecc-bits = 116 ti,davinci-ecc-bits = <4>;
117 nand-on-flash-bbt; 117 nand-on-flash-bbt;
118 118
119 partition@0 { 119 partition@0 {
120 label = "u-boo 120 label = "u-boot";
121 reg = <0x0 0x1 121 reg = <0x0 0x100000>;
122 read-only; 122 read-only;
123 }; 123 };
124 124
125 partition@100000 { 125 partition@100000 {
126 label = "param 126 label = "params";
127 reg = <0x10000 127 reg = <0x100000 0x80000>;
128 read-only; 128 read-only;
129 }; 129 };
130 130
131 partition@180000 { 131 partition@180000 {
132 label = "ubifs 132 label = "ubifs";
133 reg = <0x18000 133 reg = <0x180000 0x1fe80000>;
134 }; 134 };
135 }; 135 };
136 }; 136 };
137 }; 137 };
138 138
139 &spi0 { 139 &spi0 {
140 nor_flash: flash@0 { 140 nor_flash: flash@0 {
141 #address-cells = <1>; 141 #address-cells = <1>;
142 #size-cells = <1>; 142 #size-cells = <1>;
143 compatible = "micron,n25q128a1 143 compatible = "micron,n25q128a11", "jedec,spi-nor";
144 spi-max-frequency = <54000000> 144 spi-max-frequency = <54000000>;
145 m25p,fast-read; 145 m25p,fast-read;
146 reg = <0>; 146 reg = <0>;
147 147
148 partition@0 { 148 partition@0 {
149 label = "u-boot-spl"; 149 label = "u-boot-spl";
150 reg = <0x0 0x80000>; 150 reg = <0x0 0x80000>;
151 read-only; 151 read-only;
152 }; 152 };
153 153
154 partition@1 { 154 partition@1 {
155 label = "misc"; 155 label = "misc";
156 reg = <0x80000 0xf8000 156 reg = <0x80000 0xf80000>;
157 }; 157 };
158 }; 158 };
159 }; 159 };
160 160
161 &mdio { 161 &mdio {
162 status = "okay"; 162 status = "okay";
163 ethphy0: ethernet-phy@0 { 163 ethphy0: ethernet-phy@0 {
164 compatible = "marvell,88E1514" 164 compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
165 reg = <0>; 165 reg = <0>;
166 }; 166 };
167 167
168 ethphy1: ethernet-phy@1 { 168 ethphy1: ethernet-phy@1 {
169 compatible = "marvell,88E1514" 169 compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
170 reg = <1>; 170 reg = <1>;
171 }; 171 };
172 }; 172 };
173 173
174 &dsp0 { 174 &dsp0 {
175 memory-region = <&dsp_common_memory>; 175 memory-region = <&dsp_common_memory>;
176 status = "okay"; 176 status = "okay";
177 }; 177 };
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