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Linux/scripts/dtc/include-prefixes/arm/ti/keystone/keystone-k2l-netcp.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm/ti/keystone/keystone-k2l-netcp.dtsi (Architecture i386) and /scripts/dtc/include-prefixes/arm/ti/keystone/keystone-k2l-netcp.dtsi (Architecture alpha)


  1 // SPDX-License-Identifier: GPL-2.0                 1 // SPDX-License-Identifier: GPL-2.0
  2 /*                                                  2 /*
  3  * Device Tree Source for Keystone 2 Lamarr Ne      3  * Device Tree Source for Keystone 2 Lamarr Netcp driver
  4  *                                                  4  *
  5  * Copyright (C) 2015-2017 Texas Instruments I      5  * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
  6  */                                                 6  */
  7                                                     7 
  8 qmss: qmss@2a40000 {                                8 qmss: qmss@2a40000 {
  9         compatible = "ti,keystone-navigator-qm      9         compatible = "ti,keystone-navigator-qmss";
 10         dma-coherent;                              10         dma-coherent;
 11         #address-cells = <1>;                      11         #address-cells = <1>;
 12         #size-cells = <1>;                         12         #size-cells = <1>;
 13         clocks = <&chipclk13>;                     13         clocks = <&chipclk13>;
 14         ranges;                                    14         ranges;
 15         queue-range = <0 0x2000>;                  15         queue-range = <0 0x2000>;
 16         linkram0 = <0x100000 0x4000>;              16         linkram0 = <0x100000 0x4000>;
 17         linkram1 = <0x70000000 0x10000>; /* 1M     17         linkram1 = <0x70000000 0x10000>; /* 1MB OSR mem */
 18                                                    18 
 19         qmgrs {                                    19         qmgrs {
 20                 #address-cells = <1>;              20                 #address-cells = <1>;
 21                 #size-cells = <1>;                 21                 #size-cells = <1>;
 22                 ranges;                            22                 ranges;
 23                 qmgr0 {                            23                 qmgr0 {
 24                         managed-queues = <0 0x     24                         managed-queues = <0 0x2000>;
 25                         reg = <0x2a40000 0x200     25                         reg = <0x2a40000 0x20000>,
 26                               <0x2a06000 0x400     26                               <0x2a06000 0x400>,
 27                               <0x2a02000 0x100     27                               <0x2a02000 0x1000>,
 28                               <0x2a03000 0x100     28                               <0x2a03000 0x1000>,
 29                               <0x23a80000 0x20     29                               <0x23a80000 0x20000>,
 30                               <0x2a80000 0x200     30                               <0x2a80000 0x20000>;
 31                         reg-names = "peek", "s     31                         reg-names = "peek", "status", "config",
 32                                     "region",      32                                     "region", "push", "pop";
 33                 };                                 33                 };
 34         };                                         34         };
 35         queue-pools {                              35         queue-pools {
 36                 qpend {                            36                 qpend {
 37                         qpend-0 {                  37                         qpend-0 {
 38                                 qrange = <658      38                                 qrange = <658 8>;
 39                                 interrupts = <     39                                 interrupts = <0 40 0xf04 0 41 0xf04 0 42 0xf04
 40                                                    40                                               0 43 0xf04 0 44 0xf04 0 45 0xf04
 41                                                    41                                               0 46 0xf04 0 47 0xf04>;
 42                         };                         42                         };
 43                         qpend-1 {                  43                         qpend-1 {
 44                                 qrange = <528      44                                 qrange = <528 16>;
 45                                 interrupts = <     45                                 interrupts = <0 48 0xf04 0 49 0xf04 0 50 0xf04
 46                                                    46                                               0 51 0xf04 0 52 0xf04 0 53 0xf04
 47                                                    47                                               0 54 0xf04 0 55 0xf04 0 56 0xf04
 48                                                    48                                               0 57 0xf04 0 58 0xf04 0 59 0xf04
 49                                                    49                                               0 60 0xf04 0 61 0xf04 0 62 0xf04
 50                                                    50                                               0 63 0xf04>;
 51                                 qalloc-by-id;      51                                 qalloc-by-id;
 52                         };                         52                         };
 53                         qpend-2 {                  53                         qpend-2 {
 54                                 qrange = <544      54                                 qrange = <544 16>;
 55                                 interrupts = <     55                                 interrupts = <0 64 0xf04 0 65 0xf04 0 66 0xf04
 56                                                    56                                               0 59 0xf04 0 68 0xf04 0 69 0xf04
 57                                                    57                                               0 70 0xf04 0 71 0xf04 0 72 0xf04
 58                                                    58                                               0 73 0xf04 0 74 0xf04 0 75 0xf04
 59                                                    59                                               0 76 0xf04 0 77 0xf04 0 78 0xf04
 60                                                    60                                               0 79 0xf04>;
 61                         };                         61                         };
 62                 };                                 62                 };
 63                 general-purpose {                  63                 general-purpose {
 64                         gp-0 {                     64                         gp-0 {
 65                                 qrange = <4000     65                                 qrange = <4000 64>;
 66                         };                         66                         };
 67                         netcp-tx {                 67                         netcp-tx {
 68                                 qrange = <896      68                                 qrange = <896 128>;
 69                                 qalloc-by-id;      69                                 qalloc-by-id;
 70                         };                         70                         };
 71                 };                                 71                 };
 72                 accumulator {                      72                 accumulator {
 73                         acc-low-0 {                73                         acc-low-0 {
 74                                 qrange = <480      74                                 qrange = <480 32>;
 75                                 accumulator =      75                                 accumulator = <0 47 16 2 50>;
 76                                 interrupts = <     76                                 interrupts = <0 226 0xf01>;
 77                                 multi-queue;       77                                 multi-queue;
 78                         };                         78                         };
 79                 };                                 79                 };
 80         };                                         80         };
 81                                                    81 
 82         descriptor-regions {                       82         descriptor-regions {
 83                 #address-cells = <1>;              83                 #address-cells = <1>;
 84                 #size-cells = <1>;                 84                 #size-cells = <1>;
 85                 ranges;                            85                 ranges;
 86                 region-12 {                        86                 region-12 {
 87                         id = <12>;                 87                         id = <12>;
 88                         region-spec = <8192 12     88                         region-spec = <8192 128>;       /* num_desc desc_size */
 89                         link-index = <0x4000>;     89                         link-index = <0x4000>;
 90                 };                                 90                 };
 91         };                                         91         };
 92                                                    92 
 93         pdsps {                                    93         pdsps {
 94                 #address-cells = <1>;              94                 #address-cells = <1>;
 95                 #size-cells = <1>;                 95                 #size-cells = <1>;
 96                 ranges;                            96                 ranges;
 97                 pdsp0@2a10000 {                    97                 pdsp0@2a10000 {
 98                         reg = <0x2a10000 0x100     98                         reg = <0x2a10000 0x1000    /*iram */
 99                                0x2a0f000 0x100     99                                0x2a0f000 0x100     /*reg*/
100                                0x2a0c000 0x3c8    100                                0x2a0c000 0x3c8     /*intd */
101                                0x2a20000 0x400    101                                0x2a20000 0x4000>;  /*cmd*/
102                         id = <0>;                 102                         id = <0>;
103                 };                                103                 };
104         };                                        104         };
105                                                   105 
106 }; /* qmss */                                     106 }; /* qmss */
107                                                   107 
108 knav_dmas: knav_dmas@0 {                          108 knav_dmas: knav_dmas@0 {
109         compatible = "ti,keystone-navigator-dm    109         compatible = "ti,keystone-navigator-dma";
110         clocks = <&papllclk>;                     110         clocks = <&papllclk>;
111         #address-cells = <1>;                     111         #address-cells = <1>;
112         #size-cells = <1>;                        112         #size-cells = <1>;
113         ranges;                                   113         ranges;
114         ti,navigator-cloud-address = <0x23a800    114         ti,navigator-cloud-address = <0x23a80000 0x23a90000>;
115                                                   115 
116         dma_gbe: dma_gbe@0 {                      116         dma_gbe: dma_gbe@0 {
117                 reg = <0x26186000 0x100>,         117                 reg = <0x26186000 0x100>,
118                           <0x26187000 0x2a0>,     118                           <0x26187000 0x2a0>,
119                           <0x26188000 0xb60>,     119                           <0x26188000 0xb60>,
120                           <0x26186100 0x80>,      120                           <0x26186100 0x80>,
121                           <0x26189000 0x1000>;    121                           <0x26189000 0x1000>;
122                 reg-names = "global", "txchan"    122                 reg-names = "global", "txchan", "rxchan",
123                                 "txsched", "rx    123                                 "txsched", "rxflow";
124         };                                        124         };
125 };                                                125 };
126                                                   126 
127 netcp: netcp@26000000 {                           127 netcp: netcp@26000000 {
128         reg = <0x2620110 0x8>;                    128         reg = <0x2620110 0x8>;
129         reg-names = "efuse";                      129         reg-names = "efuse";
130         compatible = "ti,netcp-1.0";              130         compatible = "ti,netcp-1.0";
131         #address-cells = <1>;                     131         #address-cells = <1>;
132         #size-cells = <1>;                        132         #size-cells = <1>;
133                                                   133 
134         /* NetCP address range */                 134         /* NetCP address range */
135         ranges = <0 0x26000000 0x1000000>;        135         ranges = <0 0x26000000 0x1000000>;
136                                                   136 
137         clocks = <&clkpa>, <&clkcpgmac>;          137         clocks = <&clkpa>, <&clkcpgmac>;
138         clock-names = "pa_clk", "ethss_clk";      138         clock-names = "pa_clk", "ethss_clk";
139         dma-coherent;                             139         dma-coherent;
140                                                   140 
141         ti,navigator-dmas = <&dma_gbe 0>,         141         ti,navigator-dmas = <&dma_gbe 0>,
142                         <&dma_gbe 8>,             142                         <&dma_gbe 8>,
143                         <&dma_gbe 0>;             143                         <&dma_gbe 0>;
144         ti,navigator-dma-names = "netrx0", "ne    144         ti,navigator-dma-names = "netrx0", "netrx1", "nettx";
145                                                   145 
146         netcp-devices {                           146         netcp-devices {
147                 #address-cells = <1>;             147                 #address-cells = <1>;
148                 #size-cells = <1>;                148                 #size-cells = <1>;
149                 ranges;                           149                 ranges;
150                 gbe@200000 { /* ETHSS */          150                 gbe@200000 { /* ETHSS */
151                         label = "netcp-gbe";      151                         label = "netcp-gbe";
152                         compatible = "ti,netcp    152                         compatible = "ti,netcp-gbe-5";
153                         reg = <0x200000 0x900>    153                         reg = <0x200000 0x900>, <0x220000 0x20000>;
154                         /* enable-ale; */         154                         /* enable-ale; */
155                         tx-queue = <896>;         155                         tx-queue = <896>;
156                         tx-channel = "nettx";     156                         tx-channel = "nettx";
157                                                   157 
158                         cpts {                    158                         cpts {
159                                 clocks = <&cpt    159                                 clocks = <&cpts_refclk_mux>;
160                                 clock-names =     160                                 clock-names = "cpts";
161                                                   161 
162                                 cpts_refclk_mu    162                                 cpts_refclk_mux: cpts-refclk-mux {
163                                         #clock    163                                         #clock-cells = <0>;
164                                         clocks    164                                         clocks = <&chipclk12>, <&chipclk13>,
165                                                   165                                                  <&timi0>, <&timi1>,
166                                                   166                                                  <&tsrefclk>;
167                                         ti,mux    167                                         ti,mux-tbl = <0x0>, <0x1>, <0x2>,
168                                                   168                                                 <0x3>, <0x8>;
169                                         assign    169                                         assigned-clocks = <&cpts_refclk_mux>;
170                                         assign    170                                         assigned-clock-parents = <&chipclk12>;
171                                 };                171                                 };
172                         };                        172                         };
173                                                   173 
174                         interfaces {              174                         interfaces {
175                                 gbe0: interfac    175                                 gbe0: interface-0 {
176                                         slave-    176                                         slave-port = <0>;
177                                         link-i    177                                         link-interface = <1>;
178                                         phy-ha    178                                         phy-handle = <&ethphy0>;
179                                 };                179                                 };
180                                 gbe1: interfac    180                                 gbe1: interface-1 {
181                                         slave-    181                                         slave-port = <1>;
182                                         link-i    182                                         link-interface = <1>;
183                                         phy-ha    183                                         phy-handle = <&ethphy1>;
184                                 };                184                                 };
185                         };                        185                         };
186                                                   186 
187                         secondary-slave-ports     187                         secondary-slave-ports {
188                                 port-2 {          188                                 port-2 {
189                                         slave-    189                                         slave-port = <2>;
190                                         link-i    190                                         link-interface = <2>;
191                                 };                191                                 };
192                                 port-3 {          192                                 port-3 {
193                                         slave-    193                                         slave-port = <3>;
194                                         link-i    194                                         link-interface = <2>;
195                                 };                195                                 };
196                         };                        196                         };
197                 };                                197                 };
198         };                                        198         };
199                                                   199 
200         netcp-interfaces {                        200         netcp-interfaces {
201                 interface-0 {                     201                 interface-0 {
202                         rx-channel = "netrx0";    202                         rx-channel = "netrx0";
203                         rx-pool = <1024 12>;      203                         rx-pool = <1024 12>;
204                         tx-pool = <1024 12>;      204                         tx-pool = <1024 12>;
205                         rx-queue-depth = <128     205                         rx-queue-depth = <128 128 0 0>;
206                         rx-buffer-size = <1518    206                         rx-buffer-size = <1518 4096 0 0>;
207                         rx-queue = <528>;         207                         rx-queue = <528>;
208                         tx-completion-queue =     208                         tx-completion-queue = <530>;
209                         efuse-mac = <1>;          209                         efuse-mac = <1>;
210                         netcp-gbe = <&gbe0>;      210                         netcp-gbe = <&gbe0>;
211                                                   211 
212                 };                                212                 };
213                 interface-1 {                     213                 interface-1 {
214                         rx-channel = "netrx1";    214                         rx-channel = "netrx1";
215                         rx-pool = <1024 12>;      215                         rx-pool = <1024 12>;
216                         tx-pool = <1024 12>;      216                         tx-pool = <1024 12>;
217                         rx-queue-depth = <128     217                         rx-queue-depth = <128 128 0 0>;
218                         rx-buffer-size = <1518    218                         rx-buffer-size = <1518 4096 0 0>;
219                         rx-queue = <529>;         219                         rx-queue = <529>;
220                         tx-completion-queue =     220                         tx-completion-queue = <531>;
221                         efuse-mac = <0>;          221                         efuse-mac = <0>;
222                         local-mac-address = [0    222                         local-mac-address = [02 18 31 7e 3e 7f];
223                         netcp-gbe = <&gbe1>;      223                         netcp-gbe = <&gbe1>;
224                 };                                224                 };
225         };                                        225         };
226 };                                                226 };
227                                                   227 
228 sa_subsys: subsys@26080000 {                      228 sa_subsys: subsys@26080000 {
229         #address-cells = <1>;                     229         #address-cells = <1>;
230         #size-cells = <1>;                        230         #size-cells = <1>;
231         compatible = "simple-bus";                231         compatible = "simple-bus";
232         ranges = <0 0x26080000 0x40000>;          232         ranges = <0 0x26080000 0x40000>;
233                                                   233 
234         sa_config: subsys@0 {                     234         sa_config: subsys@0 {
235                 compatible = "syscon";            235                 compatible = "syscon";
236                 reg = <0x0 0x100>;                236                 reg = <0x0 0x100>;
237         };                                        237         };
238                                                   238 
239         rng@24000 {                               239         rng@24000 {
240                 compatible = "ti,keystone-rng"    240                 compatible = "ti,keystone-rng";
241                 reg = <0x24000 0x1000>;           241                 reg = <0x24000 0x1000>;
242                 ti,syscon-sa-cfg = <&sa_config    242                 ti,syscon-sa-cfg = <&sa_config>;
243                 clocks = <&clksa>;                243                 clocks = <&clksa>;
244                 clock-names = "fck";              244                 clock-names = "fck";
245         };                                        245         };
246 };                                                246 };
                                                      

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