1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * Copyright (C) 2012 Texas Instruments Incorp 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
4 */ 4 */
5 5
6 /* 6 /*
7 * VScom OnRISC 7 * VScom OnRISC
8 * https://www.vscom.de 8 * https://www.vscom.de
9 */ 9 */
10 10
11 /dts-v1/; 11 /dts-v1/;
12 12
13 #include "am335x-baltos.dtsi" 13 #include "am335x-baltos.dtsi"
14 #include "am335x-baltos-leds.dtsi" 14 #include "am335x-baltos-leds.dtsi"
15 15
16 / { 16 / {
17 model = "OnRISC Baltos iR 3220"; 17 model = "OnRISC Baltos iR 3220";
18 }; 18 };
19 19
20 &am33xx_pinmux { 20 &am33xx_pinmux {
21 tca6416_pins: tca6416-pins { 21 tca6416_pins: tca6416-pins {
22 pinctrl-single,pins = < 22 pinctrl-single,pins = <
23 AM33XX_PADCONF(AM335X_ 23 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE7) /* xdma_event_intr1.gpio0[20] tca6416 stuff */
24 >; 24 >;
25 }; 25 };
26 26
27 uart1_pins: uart1-pins { 27 uart1_pins: uart1-pins {
28 pinctrl-single,pins = < 28 pinctrl-single,pins = <
29 AM33XX_PADCONF(AM335X_ 29 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0)
30 AM33XX_PADCONF(AM335X_ 30 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0)
31 AM33XX_PADCONF(AM335X_ 31 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)
32 AM33XX_PADCONF(AM335X_ 32 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
33 AM33XX_PADCONF(AM335X_ 33 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */
34 AM33XX_PADCONF(AM335X_ 34 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */
35 AM33XX_PADCONF(AM335X_ 35 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_pclk.gpio2[24] DCD */
36 AM33XX_PADCONF(AM335X_ 36 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */
37 >; 37 >;
38 }; 38 };
39 39
40 uart2_pins: uart2-pins { 40 uart2_pins: uart2-pins {
41 pinctrl-single,pins = < 41 pinctrl-single,pins = <
42 AM33XX_PADCONF(AM335X_ 42 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1) /* spi0_sclk.uart2_rxd_mux3 */
43 AM33XX_PADCONF(AM335X_ 43 AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1) /* spi0_d0.uart2_txd_mux3 */
44 AM33XX_PADCONF(AM335X_ 44 AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE2) /* i2c0_sda.uart2_ctsn_mux0 */
45 AM33XX_PADCONF(AM335X_ 45 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* i2c0_scl.uart2_rtsn_mux0 */
46 AM33XX_PADCONF(AM335X_ 46 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad12.gpio1[12] DTR */
47 AM33XX_PADCONF(AM335X_ 47 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad13.gpio1[13] DSR */
48 AM33XX_PADCONF(AM335X_ 48 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad14.gpio1[14] DCD */
49 AM33XX_PADCONF(AM335X_ 49 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad15.gpio1[15] RI */
50 50
51 AM33XX_PADCONF(AM335X_ 51 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
52 >; 52 >;
53 }; 53 };
54 54
55 mmc1_pins: mmc1-pins { 55 mmc1_pins: mmc1-pins {
56 pinctrl-single,pins = < 56 pinctrl-single,pins = <
57 AM33XX_PADCONF(AM335X_ 57 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT, MUX_MODE7) /* MMC1 CD */
58 >; 58 >;
59 }; 59 };
60 }; 60 };
61 61
62 &uart1 { 62 &uart1 {
63 pinctrl-names = "default"; 63 pinctrl-names = "default";
64 pinctrl-0 = <&uart1_pins>; 64 pinctrl-0 = <&uart1_pins>;
65 dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW 65 dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
66 dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW 66 dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
67 dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW 67 dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
68 rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW 68 rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
69 69
70 status = "okay"; 70 status = "okay";
71 }; 71 };
72 72
73 &uart2 { 73 &uart2 {
74 pinctrl-names = "default"; 74 pinctrl-names = "default";
75 pinctrl-0 = <&uart2_pins>; 75 pinctrl-0 = <&uart2_pins>;
76 dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW 76 dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
77 dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW 77 dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
78 dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW 78 dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
79 rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW 79 rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
80 80
81 status = "okay"; 81 status = "okay";
82 }; 82 };
83 83
84 &i2c1 { 84 &i2c1 {
85 tca6416: gpio@20 { 85 tca6416: gpio@20 {
86 compatible = "ti,tca6416"; 86 compatible = "ti,tca6416";
87 reg = <0x20>; 87 reg = <0x20>;
88 gpio-controller; 88 gpio-controller;
89 #gpio-cells = <2>; 89 #gpio-cells = <2>;
90 interrupt-parent = <&gpio0>; 90 interrupt-parent = <&gpio0>;
91 interrupts = <20 IRQ_TYPE_EDGE 91 interrupts = <20 IRQ_TYPE_EDGE_RISING>;
92 pinctrl-names = "default"; 92 pinctrl-names = "default";
93 pinctrl-0 = <&tca6416_pins>; 93 pinctrl-0 = <&tca6416_pins>;
94 gpio-line-names = "GP_IN0", "G 94 gpio-line-names = "GP_IN0", "GP_IN1", "GP_IN2", "GP_IN3",
95 "GP_OUT0", " 95 "GP_OUT0", "GP_OUT1", "GP_OUT2", "GP_OUT3",
96 "ModeA0", "M 96 "ModeA0", "ModeA1", "ModeA2", "ModeA3",
97 "ModeB0", "M 97 "ModeB0", "ModeB1", "ModeB2", "ModeB3";
98 }; 98 };
99 }; 99 };
100 100
101 &usb0_phy { 101 &usb0_phy {
102 status = "okay"; 102 status = "okay";
103 }; 103 };
104 104
105 &usb0 { 105 &usb0 {
106 status = "okay"; 106 status = "okay";
107 dr_mode = "host"; 107 dr_mode = "host";
108 }; 108 };
109 109
110 &cpsw_port1 { 110 &cpsw_port1 {
111 phy-mode = "rmii"; 111 phy-mode = "rmii";
112 ti,dual-emac-pvid = <1>; 112 ti,dual-emac-pvid = <1>;
113 fixed-link { 113 fixed-link {
114 speed = <100>; 114 speed = <100>;
115 full-duplex; 115 full-duplex;
116 }; 116 };
117 }; 117 };
118 118
119 &cpsw_port2 { 119 &cpsw_port2 {
120 phy-mode = "rgmii-id"; 120 phy-mode = "rgmii-id";
121 ti,dual-emac-pvid = <2>; 121 ti,dual-emac-pvid = <2>;
122 phy-handle = <&phy1>; 122 phy-handle = <&phy1>;
123 }; 123 };
124 124
125 &mmc1 { 125 &mmc1 {
126 pinctrl-names = "default"; 126 pinctrl-names = "default";
127 pinctrl-0 = <&mmc1_pins>; 127 pinctrl-0 = <&mmc1_pins>;
128 cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW> 128 cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
129 }; 129 };
130 130
131 &gpio0 { 131 &gpio0 {
132 gpio-line-names = 132 gpio-line-names =
133 "MDIO", 133 "MDIO",
134 "MDC", 134 "MDC",
135 "UART2_RX", 135 "UART2_RX",
136 "UART2_TX", 136 "UART2_TX",
137 "I2C1_SDA", 137 "I2C1_SDA",
138 "I2C1_SCL", 138 "I2C1_SCL",
139 "WLAN_BTN", 139 "WLAN_BTN",
140 "W_DISABLE", 140 "W_DISABLE",
141 "NC", 141 "NC",
142 "NC", 142 "NC",
143 "NC", 143 "NC",
144 "NC", 144 "NC",
145 "UART1_CTSN", 145 "UART1_CTSN",
146 "UART1_RTSN", 146 "UART1_RTSN",
147 "UART1_RX", 147 "UART1_RX",
148 "UART1_TX", 148 "UART1_TX",
149 "onrisc:blue:wlan", 149 "onrisc:blue:wlan",
150 "onrisc:green:app", 150 "onrisc:green:app",
151 "USB0_DRVVBUS", 151 "USB0_DRVVBUS",
152 "ETH2_INT", 152 "ETH2_INT",
153 "TCA6416_INT", 153 "TCA6416_INT",
154 "RMII1_TXD1", 154 "RMII1_TXD1",
155 "MMC1_DAT0", 155 "MMC1_DAT0",
156 "MMC1_DAT1", 156 "MMC1_DAT1",
157 "NC", 157 "NC",
158 "NC", 158 "NC",
159 "MMC1_DAT2", 159 "MMC1_DAT2",
160 "MMC1_DAT3", 160 "MMC1_DAT3",
161 "RMII1_TXD0", 161 "RMII1_TXD0",
162 "NC", 162 "NC",
163 "GPMC_WAIT0", 163 "GPMC_WAIT0",
164 "GPMC_WP_N"; 164 "GPMC_WP_N";
165 }; 165 };
166 166
167 &gpio1 { 167 &gpio1 {
168 gpio-line-names = 168 gpio-line-names =
169 "GPMC_AD0", 169 "GPMC_AD0",
170 "GPMC_AD1", 170 "GPMC_AD1",
171 "GPMC_AD2", 171 "GPMC_AD2",
172 "GPMC_AD3", 172 "GPMC_AD3",
173 "GPMC_AD4", 173 "GPMC_AD4",
174 "GPMC_AD5", 174 "GPMC_AD5",
175 "GPMC_AD6", 175 "GPMC_AD6",
176 "GPMC_AD7", 176 "GPMC_AD7",
177 "NC", 177 "NC",
178 "NC", 178 "NC",
179 "CONSOLE_RX", 179 "CONSOLE_RX",
180 "CONSOLE_TX", 180 "CONSOLE_TX",
181 "UART2_DTR", 181 "UART2_DTR",
182 "UART2_DSR", 182 "UART2_DSR",
183 "UART2_DCD", 183 "UART2_DCD",
184 "UART2_RI", 184 "UART2_RI",
185 "RGMII2_TCTL", 185 "RGMII2_TCTL",
186 "RGMII2_RCTL", 186 "RGMII2_RCTL",
187 "RGMII2_TD3", 187 "RGMII2_TD3",
188 "RGMII2_TD2", 188 "RGMII2_TD2",
189 "RGMII2_TD1", 189 "RGMII2_TD1",
190 "RGMII2_TD0", 190 "RGMII2_TD0",
191 "RGMII2_TCLK", 191 "RGMII2_TCLK",
192 "RGMII2_RCLK", 192 "RGMII2_RCLK",
193 "RGMII2_RD3", 193 "RGMII2_RD3",
194 "RGMII2_RD2", 194 "RGMII2_RD2",
195 "RGMII2_RD1", 195 "RGMII2_RD1",
196 "RGMII2_RD0", 196 "RGMII2_RD0",
197 "PMIC_INT1", 197 "PMIC_INT1",
198 "GPMC_CSN0_Flash", 198 "GPMC_CSN0_Flash",
199 "MMC1_CLK", 199 "MMC1_CLK",
200 "MMC1_CMD"; 200 "MMC1_CMD";
201 }; 201 };
202 202
203 &gpio2 { 203 &gpio2 {
204 gpio-line-names = 204 gpio-line-names =
205 "GPMC_CSN3_BUS", 205 "GPMC_CSN3_BUS",
206 "GPMC_CLK", 206 "GPMC_CLK",
207 "GPMC_ADVN_ALE", 207 "GPMC_ADVN_ALE",
208 "GPMC_OEN_RE_N", 208 "GPMC_OEN_RE_N",
209 "GPMC_WE_N", 209 "GPMC_WE_N",
210 "GPMC_BEN0_CLE", 210 "GPMC_BEN0_CLE",
211 "NC", 211 "NC",
212 "NC", 212 "NC",
213 "NC", 213 "NC",
214 "NC", 214 "NC",
215 "NC", 215 "NC",
216 "NC", 216 "NC",
217 "NC", 217 "NC",
218 "NC", 218 "NC",
219 "NC", 219 "NC",
220 "NC", 220 "NC",
221 "NC", 221 "NC",
222 "NC", 222 "NC",
223 "SD_CD", 223 "SD_CD",
224 "SD_WP", 224 "SD_WP",
225 "RMII1_RXD1", 225 "RMII1_RXD1",
226 "RMII1_RXD0", 226 "RMII1_RXD0",
227 "UART1_DTR", 227 "UART1_DTR",
228 "UART1_DSR", 228 "UART1_DSR",
229 "UART1_DCD", 229 "UART1_DCD",
230 "UART1_RI", 230 "UART1_RI",
231 "MMC0_DAT3", 231 "MMC0_DAT3",
232 "MMC0_DAT2", 232 "MMC0_DAT2",
233 "MMC0_DAT1", 233 "MMC0_DAT1",
234 "MMC0_DAT0", 234 "MMC0_DAT0",
235 "MMC0_CLK", 235 "MMC0_CLK",
236 "MMC0_CMD"; 236 "MMC0_CMD";
237 }; 237 };
238 238
239 &gpio3 { 239 &gpio3 {
240 gpio-line-names = 240 gpio-line-names =
241 "onrisc:red:power", 241 "onrisc:red:power",
242 "RMII1_CRS_DV", 242 "RMII1_CRS_DV",
243 "RMII1_RXER", 243 "RMII1_RXER",
244 "RMII1_TXEN", 244 "RMII1_TXEN",
245 "3G_PWR_EN", 245 "3G_PWR_EN",
246 "UART2_CTSN", 246 "UART2_CTSN",
247 "UART2_RTSN", 247 "UART2_RTSN",
248 "WLAN_IRQ", 248 "WLAN_IRQ",
249 "WLAN_EN", 249 "WLAN_EN",
250 "NC", 250 "NC",
251 "NC", 251 "NC",
252 "NC", 252 "NC",
253 "NC", 253 "NC",
254 "USB1_DRVVBUS", 254 "USB1_DRVVBUS",
255 "NC", 255 "NC",
256 "NC", 256 "NC",
257 "NC", 257 "NC",
258 "NC", 258 "NC",
259 "NC", 259 "NC",
260 "NC", 260 "NC",
261 "NC", 261 "NC",
262 "NC", 262 "NC",
263 "NC", 263 "NC",
264 "NC", 264 "NC",
265 "NC", 265 "NC",
266 "NC", 266 "NC",
267 "NC", 267 "NC",
268 "NC", 268 "NC",
269 "NC", 269 "NC",
270 "NC", 270 "NC",
271 "NC", 271 "NC",
272 "NC"; 272 "NC";
273 }; 273 };
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