1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * Copyright (C) 2012 Texas Instruments Incorp 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
4 */ 4 */
5 5
6 /* 6 /*
7 * VScom OnRISC 7 * VScom OnRISC
8 * https://www.vscom.de 8 * https://www.vscom.de
9 */ 9 */
10 10
11 /dts-v1/; 11 /dts-v1/;
12 12
13 #include "am335x-baltos.dtsi" 13 #include "am335x-baltos.dtsi"
14 #include "am335x-baltos-leds.dtsi" 14 #include "am335x-baltos-leds.dtsi"
15 15
16 / { 16 / {
17 model = "NetCom Plus"; 17 model = "NetCom Plus";
18 }; 18 };
19 19
20 &am33xx_pinmux { 20 &am33xx_pinmux {
21 uart1_pins: uart1-pins { 21 uart1_pins: uart1-pins {
22 pinctrl-single,pins = < 22 pinctrl-single,pins = <
23 AM33XX_PADCONF(AM335X_ 23 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0) /* RX */
24 AM33XX_PADCONF(AM335X_ 24 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0) /* TX */
25 AM33XX_PADCONF(AM335X_ 25 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0) /* CTS */
26 AM33XX_PADCONF(AM335X_ 26 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* RTS */
27 AM33XX_PADCONF(AM335X_ 27 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* DTR */
28 AM33XX_PADCONF(AM335X_ 28 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* DSR */
29 AM33XX_PADCONF(AM335X_ 29 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* DCD */
30 AM33XX_PADCONF(AM335X_ 30 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* RI */
31 >; 31 >;
32 }; 32 };
33 33
34 uart2_pins: uart2-pins { 34 uart2_pins: uart2-pins {
35 pinctrl-single,pins = < 35 pinctrl-single,pins = <
36 AM33XX_PADCONF(AM335X_ 36 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1) /* RX */
37 AM33XX_PADCONF(AM335X_ 37 AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1) /* TX */
38 AM33XX_PADCONF(AM335X_ 38 AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE2) /* CTS */
39 AM33XX_PADCONF(AM335X_ 39 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* RTS */
40 AM33XX_PADCONF(AM335X_ 40 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* DTR */
41 AM33XX_PADCONF(AM335X_ 41 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* DSR */
42 AM33XX_PADCONF(AM335X_ 42 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) /* DCD */
43 AM33XX_PADCONF(AM335X_ 43 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) /* RI */
44 >; 44 >;
45 }; 45 };
46 }; 46 };
47 47
48 &usb0_phy { 48 &usb0_phy {
49 status = "okay"; 49 status = "okay";
50 }; 50 };
51 51
52 &usb0 { 52 &usb0 {
53 status = "okay"; 53 status = "okay";
54 dr_mode = "host"; 54 dr_mode = "host";
55 }; 55 };
56 56
57 &uart1 { 57 &uart1 {
58 pinctrl-names = "default"; 58 pinctrl-names = "default";
59 pinctrl-0 = <&uart1_pins>; 59 pinctrl-0 = <&uart1_pins>;
60 dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW 60 dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
61 dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW 61 dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
62 dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW 62 dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
63 rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW 63 rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
64 64
65 status = "okay"; 65 status = "okay";
66 }; 66 };
67 67
68 &uart2 { 68 &uart2 {
69 pinctrl-names = "default"; 69 pinctrl-names = "default";
70 pinctrl-0 = <&uart2_pins>; 70 pinctrl-0 = <&uart2_pins>;
71 dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW 71 dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
72 dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW 72 dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
73 dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW 73 dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
74 rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW 74 rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
75 75
76 status = "okay"; 76 status = "okay";
77 }; 77 };
78 78
79 &davinci_mdio_sw { 79 &davinci_mdio_sw {
80 phy0: ethernet-phy@0 { 80 phy0: ethernet-phy@0 {
81 reg = <1>; 81 reg = <1>;
82 }; 82 };
83 }; 83 };
84 84
85 &cpsw_port1 { 85 &cpsw_port1 {
86 phy-mode = "rmii"; 86 phy-mode = "rmii";
87 ti,dual-emac-pvid = <1>; 87 ti,dual-emac-pvid = <1>;
88 phy-handle = <&phy0>; 88 phy-handle = <&phy0>;
89 }; 89 };
90 90
91 &cpsw_port2 { 91 &cpsw_port2 {
92 phy-mode = "rgmii-id"; 92 phy-mode = "rgmii-id";
93 ti,dual-emac-pvid = <2>; 93 ti,dual-emac-pvid = <2>;
94 phy-handle = <&phy1>; 94 phy-handle = <&phy1>;
95 }; 95 };
96 96
97 &gpio0 { 97 &gpio0 {
98 gpio-line-names = 98 gpio-line-names =
99 "MDIO", 99 "MDIO",
100 "MDC", 100 "MDC",
101 "UART2_RX", 101 "UART2_RX",
102 "UART2_TX", 102 "UART2_TX",
103 "I2C1_SDA", 103 "I2C1_SDA",
104 "I2C1_SCL", 104 "I2C1_SCL",
105 "NC", 105 "NC",
106 "NC", 106 "NC",
107 "NC", 107 "NC",
108 "NC", 108 "NC",
109 "NC", 109 "NC",
110 "NC", 110 "NC",
111 "UART1_CTSN", 111 "UART1_CTSN",
112 "UART1_RTSN", 112 "UART1_RTSN",
113 "UART1_RX", 113 "UART1_RX",
114 "UART1_TX", 114 "UART1_TX",
115 "onrisc:blue:wlan", 115 "onrisc:blue:wlan",
116 "onrisc:green:app", 116 "onrisc:green:app",
117 "USB0_DRVVBUS", 117 "USB0_DRVVBUS",
118 "ETH2_INT", 118 "ETH2_INT",
119 "NC", 119 "NC",
120 "NC", 120 "NC",
121 "MMC1_DAT0", 121 "MMC1_DAT0",
122 "MMC1_DAT1", 122 "MMC1_DAT1",
123 "NC", 123 "NC",
124 "NC", 124 "NC",
125 "MMC1_DAT2", 125 "MMC1_DAT2",
126 "MMC1_DAT3", 126 "MMC1_DAT3",
127 "NC", 127 "NC",
128 "NC", 128 "NC",
129 "GPMC_WAIT0", 129 "GPMC_WAIT0",
130 "GPMC_WP_N"; 130 "GPMC_WP_N";
131 }; 131 };
132 132
133 &gpio1 { 133 &gpio1 {
134 gpio-line-names = 134 gpio-line-names =
135 "GPMC_AD0", 135 "GPMC_AD0",
136 "GPMC_AD1", 136 "GPMC_AD1",
137 "GPMC_AD2", 137 "GPMC_AD2",
138 "GPMC_AD3", 138 "GPMC_AD3",
139 "GPMC_AD4", 139 "GPMC_AD4",
140 "GPMC_AD5", 140 "GPMC_AD5",
141 "GPMC_AD6", 141 "GPMC_AD6",
142 "GPMC_AD7", 142 "GPMC_AD7",
143 "NC", 143 "NC",
144 "NC", 144 "NC",
145 "CONSOLE_RX", 145 "CONSOLE_RX",
146 "CONSOLE_TX", 146 "CONSOLE_TX",
147 "UART2_DTR", 147 "UART2_DTR",
148 "UART2_DSR", 148 "UART2_DSR",
149 "UART2_DCD", 149 "UART2_DCD",
150 "UART2_RI", 150 "UART2_RI",
151 "RGMII2_TCTL", 151 "RGMII2_TCTL",
152 "RGMII2_RCTL", 152 "RGMII2_RCTL",
153 "RGMII2_TD3", 153 "RGMII2_TD3",
154 "RGMII2_TD2", 154 "RGMII2_TD2",
155 "RGMII2_TD1", 155 "RGMII2_TD1",
156 "RGMII2_TD0", 156 "RGMII2_TD0",
157 "RGMII2_TCLK", 157 "RGMII2_TCLK",
158 "RGMII2_RCLK", 158 "RGMII2_RCLK",
159 "RGMII2_RD3", 159 "RGMII2_RD3",
160 "RGMII2_RD2", 160 "RGMII2_RD2",
161 "RGMII2_RD1", 161 "RGMII2_RD1",
162 "RGMII2_RD0", 162 "RGMII2_RD0",
163 "PMIC_INT1", 163 "PMIC_INT1",
164 "GPMC_CSN0_Flash", 164 "GPMC_CSN0_Flash",
165 "MMC1_CLK", 165 "MMC1_CLK",
166 "MMC1_CMD"; 166 "MMC1_CMD";
167 }; 167 };
168 168
169 &gpio2 { 169 &gpio2 {
170 gpio-line-names = 170 gpio-line-names =
171 "GPMC_CSN3_BUS", 171 "GPMC_CSN3_BUS",
172 "GPMC_CLK", 172 "GPMC_CLK",
173 "GPMC_ADVN_ALE", 173 "GPMC_ADVN_ALE",
174 "GPMC_OEN_RE_N", 174 "GPMC_OEN_RE_N",
175 "GPMC_WE_N", 175 "GPMC_WE_N",
176 "GPMC_BEN0_CLE", 176 "GPMC_BEN0_CLE",
177 "NC", 177 "NC",
178 "NC", 178 "NC",
179 "NC", 179 "NC",
180 "NC", 180 "NC",
181 "NC", 181 "NC",
182 "NC", 182 "NC",
183 "NC", 183 "NC",
184 "NC", 184 "NC",
185 "NC", 185 "NC",
186 "NC", 186 "NC",
187 "NC", 187 "NC",
188 "NC", 188 "NC",
189 "SW2_0", 189 "SW2_0",
190 "SW2_1", 190 "SW2_1",
191 "NC", 191 "NC",
192 "NC", 192 "NC",
193 "UART1_DTR", 193 "UART1_DTR",
194 "UART1_DSR", 194 "UART1_DSR",
195 "UART1_DCD", 195 "UART1_DCD",
196 "UART1_RI", 196 "UART1_RI",
197 "MMC0_DAT3", 197 "MMC0_DAT3",
198 "MMC0_DAT2", 198 "MMC0_DAT2",
199 "MMC0_DAT1", 199 "MMC0_DAT1",
200 "MMC0_DAT0", 200 "MMC0_DAT0",
201 "MMC0_CLK", 201 "MMC0_CLK",
202 "MMC0_CMD"; 202 "MMC0_CMD";
203 }; 203 };
204 204
205 &gpio3 { 205 &gpio3 {
206 gpio-line-names = 206 gpio-line-names =
207 "onrisc:red:power", 207 "onrisc:red:power",
208 "NC", 208 "NC",
209 "NC", 209 "NC",
210 "NC", 210 "NC",
211 "NC", 211 "NC",
212 "UART2_CTSN", 212 "UART2_CTSN",
213 "UART2_RTSN", 213 "UART2_RTSN",
214 "WLAN_IRQ", 214 "WLAN_IRQ",
215 "WLAN_EN", 215 "WLAN_EN",
216 "SW2_2", 216 "SW2_2",
217 "SW2_3", 217 "SW2_3",
218 "NC", 218 "NC",
219 "NC", 219 "NC",
220 "NC", 220 "NC",
221 "ModeA0", 221 "ModeA0",
222 "ModeA1", 222 "ModeA1",
223 "ModeA2", 223 "ModeA2",
224 "ModeA3", 224 "ModeA3",
225 "NC", 225 "NC",
226 "NC", 226 "NC",
227 "NC", 227 "NC",
228 "NC", 228 "NC",
229 "NC", 229 "NC",
230 "NC", 230 "NC",
231 "NC", 231 "NC",
232 "NC", 232 "NC",
233 "NC", 233 "NC",
234 "NC", 234 "NC",
235 "NC", 235 "NC",
236 "NC", 236 "NC",
237 "NC", 237 "NC",
238 "NC"; 238 "NC";
239 }; 239 };
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