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TOMOYO Linux Cross Reference
Linux/scripts/dtc/include-prefixes/arm/ti/omap/am335x-sancloud-bbe-common.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm/ti/omap/am335x-sancloud-bbe-common.dtsi (Architecture i386) and /scripts/dtc/include-prefixes/arm/ti/omap/am335x-sancloud-bbe-common.dtsi (Architecture sparc64)


  1 // SPDX-License-Identifier: GPL-2.0-only            1 // SPDX-License-Identifier: GPL-2.0-only
  2 /*                                                  2 /*
  3  * Copyright (C) 2012 Texas Instruments Incorp      3  * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
  4  */                                                 4  */
  5                                                     5 
  6 &am33xx_pinmux {                                    6 &am33xx_pinmux {
  7         cpsw_default: cpsw-default-pins {           7         cpsw_default: cpsw-default-pins {
  8                 pinctrl-single,pins = <             8                 pinctrl-single,pins = <
  9                         /* Slave 1 */               9                         /* Slave 1 */
 10                         AM33XX_PADCONF(AM335X_     10                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)   /* mii1_txen.rgmii1_tctl */
 11                         AM33XX_PADCONF(AM335X_     11                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2)    /* mii1_rxdv.rgmii1_rctl */
 12                         AM33XX_PADCONF(AM335X_     12                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)    /* mii1_txd3.rgmii1_td3 */
 13                         AM33XX_PADCONF(AM335X_     13                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)    /* mii1_txd2.rgmii1_td2 */
 14                         AM33XX_PADCONF(AM335X_     14                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)    /* mii1_txd1.rgmii1_td1 */
 15                         AM33XX_PADCONF(AM335X_     15                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)    /* mii1_txd0.rgmii1_td0 */
 16                         AM33XX_PADCONF(AM335X_     16                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2)  /* mii1_txclk.rgmii1_tclk */
 17                         AM33XX_PADCONF(AM335X_     17                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2)   /* mii1_rxclk.rgmii1_rclk */
 18                         AM33XX_PADCONF(AM335X_     18                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2)     /* mii1_rxd3.rgmii1_rd3 */
 19                         AM33XX_PADCONF(AM335X_     19                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2)     /* mii1_rxd2.rgmii1_rd2 */
 20                         AM33XX_PADCONF(AM335X_     20                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2)     /* mii1_rxd1.rgmii1_rd1 */
 21                         AM33XX_PADCONF(AM335X_     21                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2)     /* mii1_rxd0.rgmii1_rd0 */
 22                 >;                                 22                 >;
 23         };                                         23         };
 24                                                    24 
 25         cpsw_sleep: cpsw-sleep-pins {              25         cpsw_sleep: cpsw-sleep-pins {
 26                 pinctrl-single,pins = <            26                 pinctrl-single,pins = <
 27                         /* Slave 1 reset value     27                         /* Slave 1 reset value */
 28                         AM33XX_PADCONF(AM335X_     28                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
 29                         AM33XX_PADCONF(AM335X_     29                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
 30                         AM33XX_PADCONF(AM335X_     30                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
 31                         AM33XX_PADCONF(AM335X_     31                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
 32                         AM33XX_PADCONF(AM335X_     32                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
 33                         AM33XX_PADCONF(AM335X_     33                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
 34                         AM33XX_PADCONF(AM335X_     34                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
 35                         AM33XX_PADCONF(AM335X_     35                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
 36                         AM33XX_PADCONF(AM335X_     36                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
 37                         AM33XX_PADCONF(AM335X_     37                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
 38                         AM33XX_PADCONF(AM335X_     38                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
 39                         AM33XX_PADCONF(AM335X_     39                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
 40                 >;                                 40                 >;
 41         };                                         41         };
 42                                                    42 
 43         usb_hub_ctrl: usb-hub-ctrl-pins {          43         usb_hub_ctrl: usb-hub-ctrl-pins {
 44                 pinctrl-single,pins = <            44                 pinctrl-single,pins = <
 45                         AM33XX_PADCONF(AM335X_     45                         AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7)     /* rmii1_refclk.gpio0_29 */
 46                 >;                                 46                 >;
 47         };                                         47         };
 48 };                                                 48 };
 49                                                    49 
 50 &mac_sw {                                          50 &mac_sw {
 51         pinctrl-0 = <&cpsw_default>;               51         pinctrl-0 = <&cpsw_default>;
 52         pinctrl-1 = <&cpsw_sleep>;                 52         pinctrl-1 = <&cpsw_sleep>;
 53 };                                                 53 };
 54                                                    54 
 55 &cpsw_port1 {                                      55 &cpsw_port1 {
 56         phy-mode = "rgmii-id";                     56         phy-mode = "rgmii-id";
 57 };                                                 57 };
 58                                                    58 
 59 &i2c0 {                                            59 &i2c0 {
 60         usb2512b: usb-hub@2c {                     60         usb2512b: usb-hub@2c {
 61                 pinctrl-names = "default";         61                 pinctrl-names = "default";
 62                 pinctrl-0 = <&usb_hub_ctrl>;       62                 pinctrl-0 = <&usb_hub_ctrl>;
 63                 compatible = "microchip,usb251     63                 compatible = "microchip,usb2512b";
 64                 reg = <0x2c>;                      64                 reg = <0x2c>;
 65                 reset-gpios = <&gpio0 29 GPIO_     65                 reset-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
 66         };                                         66         };
 67 };                                                 67 };
                                                      

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