1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * Copyright (C) 2015 Toby Churchill - https:/ 3 * Copyright (C) 2015 Toby Churchill - https://www.toby-churchill.com/
4 * url above is defunct 4 * url above is defunct
5 */ 5 */
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include "am33xx.dtsi" 8 #include "am33xx.dtsi"
9 #include <dt-bindings/pwm/pwm.h> 9 #include <dt-bindings/pwm/pwm.h>
10 #include <dt-bindings/interrupt-controller/irq 10 #include <dt-bindings/interrupt-controller/irq.h>
11 11
12 / { 12 / {
13 model = "Toby Churchill SL50 Series"; 13 model = "Toby Churchill SL50 Series";
14 compatible = "tcl,am335x-sl50", "ti,am 14 compatible = "tcl,am335x-sl50", "ti,am33xx";
15 15
16 cpus { 16 cpus {
17 cpu@0 { 17 cpu@0 {
18 cpu0-supply = <&dcdc2_ 18 cpu0-supply = <&dcdc2_reg>;
19 }; 19 };
20 }; 20 };
21 21
22 memory@80000000 { 22 memory@80000000 {
23 device_type = "memory"; 23 device_type = "memory";
24 reg = <0x80000000 0x20000000>; 24 reg = <0x80000000 0x20000000>; /* 512 MB */
25 }; 25 };
26 26
27 chosen { 27 chosen {
28 stdout-path = &uart0; 28 stdout-path = &uart0;
29 }; 29 };
30 30
31 leds { 31 leds {
32 compatible = "gpio-leds"; 32 compatible = "gpio-leds";
33 pinctrl-names = "default"; 33 pinctrl-names = "default";
34 pinctrl-0 = <&led_pins>; 34 pinctrl-0 = <&led_pins>;
35 35
36 led0 { 36 led0 {
37 label = "sl50:red:usr0 37 label = "sl50:red:usr0";
38 gpios = <&gpio1 21 GPI 38 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
39 default-state = "off"; 39 default-state = "off";
40 }; 40 };
41 41
42 led1 { 42 led1 {
43 label = "sl50:green:us 43 label = "sl50:green:usr1";
44 gpios = <&gpio1 22 GPI 44 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
45 default-state = "off"; 45 default-state = "off";
46 }; 46 };
47 47
48 led2 { 48 led2 {
49 label = "sl50:red:usr2 49 label = "sl50:red:usr2";
50 gpios = <&gpio1 23 GPI 50 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
51 default-state = "off"; 51 default-state = "off";
52 }; 52 };
53 53
54 led3 { 54 led3 {
55 label = "sl50:green:us 55 label = "sl50:green:usr3";
56 gpios = <&gpio1 24 GPI 56 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
57 default-state = "off"; 57 default-state = "off";
58 }; 58 };
59 }; 59 };
60 60
61 backlight0: disp0 { 61 backlight0: disp0 {
62 compatible = "pwm-backlight"; 62 compatible = "pwm-backlight";
63 pinctrl-names = "default"; 63 pinctrl-names = "default";
64 pinctrl-0 = <&backlight0_pins> 64 pinctrl-0 = <&backlight0_pins>;
65 pwms = <&ehrpwm1 0 500000 PWM_ 65 pwms = <&ehrpwm1 0 500000 PWM_POLARITY_INVERTED>;
66 brightness-levels = < 0 1 2 66 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
67 10 11 12 67 10 11 12 13 14 15 16 17 18 19
68 20 21 22 68 20 21 22 23 24 25 26 27 28 29
69 30 31 32 69 30 31 32 33 34 35 36 37 38 39
70 40 41 42 70 40 41 42 43 44 45 46 47 48 49
71 50 51 52 71 50 51 52 53 54 55 56 57 58 59
72 60 61 62 72 60 61 62 63 64 65 66 67 68 69
73 70 71 72 73 70 71 72 73 74 75 76 77 78 79
74 80 81 82 74 80 81 82 83 84 85 86 87 88 89
75 90 91 92 75 90 91 92 93 94 95 96 97 98 99
76 100>; 76 100>;
77 default-brightness-level = <50 77 default-brightness-level = <50>;
78 enable-gpios = <&gpio2 4 GPIO_ 78 enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
79 power-supply = <&vdd_sys_reg>; 79 power-supply = <&vdd_sys_reg>;
80 }; 80 };
81 81
82 backlight1: disp1 { 82 backlight1: disp1 {
83 compatible = "pwm-backlight"; 83 compatible = "pwm-backlight";
84 pinctrl-names = "default"; 84 pinctrl-names = "default";
85 pinctrl-0 = <&backlight1_pins> 85 pinctrl-0 = <&backlight1_pins>;
86 pwms = <&ehrpwm1 1 500000 PWM_ 86 pwms = <&ehrpwm1 1 500000 PWM_POLARITY_INVERTED>;
87 brightness-levels = < 0 1 2 87 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
88 10 11 12 88 10 11 12 13 14 15 16 17 18 19
89 20 21 22 89 20 21 22 23 24 25 26 27 28 29
90 30 31 32 90 30 31 32 33 34 35 36 37 38 39
91 40 41 42 91 40 41 42 43 44 45 46 47 48 49
92 50 51 52 92 50 51 52 53 54 55 56 57 58 59
93 60 61 62 93 60 61 62 63 64 65 66 67 68 69
94 70 71 72 94 70 71 72 73 74 75 76 77 78 79
95 80 81 82 95 80 81 82 83 84 85 86 87 88 89
96 90 91 92 96 90 91 92 93 94 95 96 97 98 99
97 100>; 97 100>;
98 default-brightness-level = <50 98 default-brightness-level = <50>;
99 enable-gpios = <&gpio0 26 GPIO 99 enable-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
100 power-supply = <&vdd_sys_reg>; 100 power-supply = <&vdd_sys_reg>;
101 }; 101 };
102 102
103 clocks { 103 clocks {
104 compatible = "simple-bus"; 104 compatible = "simple-bus";
105 #address-cells = <1>; 105 #address-cells = <1>;
106 #size-cells = <0>; 106 #size-cells = <0>;
107 107
108 /* audio external oscillator * 108 /* audio external oscillator */
109 audio_mclk_fixed: oscillator@0 109 audio_mclk_fixed: oscillator@0 {
110 compatible = "fixed-cl 110 compatible = "fixed-clock";
111 #clock-cells = <0>; 111 #clock-cells = <0>;
112 clock-frequency = <24 112 clock-frequency = <24576000>; /* 24.576MHz */
113 }; 113 };
114 114
115 audio_mclk: audio_mclk_gate@0 115 audio_mclk: audio_mclk_gate@0 {
116 compatible = "gpio-gat 116 compatible = "gpio-gate-clock";
117 #clock-cells = <0>; 117 #clock-cells = <0>;
118 pinctrl-names = "defau 118 pinctrl-names = "default";
119 pinctrl-0 = <&audio_mc 119 pinctrl-0 = <&audio_mclk_pins>;
120 clocks = <&audio_mclk_ 120 clocks = <&audio_mclk_fixed>;
121 enable-gpios = <&gpio1 121 enable-gpios = <&gpio1 27 0>;
122 }; 122 };
123 }; 123 };
124 124
125 panel: lcd_panel { 125 panel: lcd_panel {
126 compatible = "ti,tilcdc,panel" 126 compatible = "ti,tilcdc,panel";
127 pinctrl-names = "default"; 127 pinctrl-names = "default";
128 pinctrl-0 = <&lcd_pins>; 128 pinctrl-0 = <&lcd_pins>;
129 129
130 panel-info { 130 panel-info {
131 ac-bias = <255>; 131 ac-bias = <255>;
132 ac-bias-intrpt = <0>; 132 ac-bias-intrpt = <0>;
133 dma-burst-sz = <16>; 133 dma-burst-sz = <16>;
134 bpp = <16>; 134 bpp = <16>;
135 fdd = <0x80>; 135 fdd = <0x80>;
136 tft-alt-mode = <0>; 136 tft-alt-mode = <0>;
137 mono-8bit-mode = <0>; 137 mono-8bit-mode = <0>;
138 sync-edge = <0>; 138 sync-edge = <0>;
139 sync-ctrl = <1>; 139 sync-ctrl = <1>;
140 raster-order = <0>; 140 raster-order = <0>;
141 fifo-th = <0>; 141 fifo-th = <0>;
142 }; 142 };
143 143
144 display-timings { 144 display-timings {
145 native-mode = <&timing 145 native-mode = <&timing0>;
146 timing0: 960x128 { 146 timing0: 960x128 {
147 clock-frequenc 147 clock-frequency = <18000000>;
148 hactive = <960 148 hactive = <960>;
149 vactive = <272 149 vactive = <272>;
150 150
151 hback-porch = 151 hback-porch = <40>;
152 hfront-porch = 152 hfront-porch = <16>;
153 hsync-len = <2 153 hsync-len = <24>;
154 hsync-active = 154 hsync-active = <0>;
155 155
156 vback-porch = 156 vback-porch = <3>;
157 vfront-porch = 157 vfront-porch = <8>;
158 vsync-len = <4 158 vsync-len = <4>;
159 vsync-active = 159 vsync-active = <0>;
160 }; 160 };
161 }; 161 };
162 }; 162 };
163 163
164 sound { 164 sound {
165 compatible = "audio-graph-card 165 compatible = "audio-graph-card";
166 label = "sound-card"; 166 label = "sound-card";
167 pinctrl-names = "default"; 167 pinctrl-names = "default";
168 pinctrl-0 = <&audio_pa_pins>; 168 pinctrl-0 = <&audio_pa_pins>;
169 169
170 widgets = "Headphone", "Headph 170 widgets = "Headphone", "Headphone Jack",
171 "Speaker", "Speaker 171 "Speaker", "Speaker External",
172 "Line", "Line In", 172 "Line", "Line In",
173 "Microphone", "Micro 173 "Microphone", "Microphone Jack";
174 174
175 routing = "Headphone Jack", 175 routing = "Headphone Jack", "HPLOUT",
176 "Headphone Jack", 176 "Headphone Jack", "HPROUT",
177 "Amplifier", 177 "Amplifier", "MONO_LOUT",
178 "Speaker External", 178 "Speaker External", "Amplifier",
179 "LINE1R", 179 "LINE1R", "Line In",
180 "LINE1L", 180 "LINE1L", "Line In",
181 "MIC3L", 181 "MIC3L", "Microphone Jack",
182 "MIC3R", 182 "MIC3R", "Microphone Jack",
183 "Microphone Jack", 183 "Microphone Jack", "Mic Bias";
184 184
185 dais = <&cpu_port>; 185 dais = <&cpu_port>;
186 186
187 pa-gpios = <&gpio3 18 GPIO_ACT 187 pa-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
188 }; 188 };
189 189
190 emmc_pwrseq: pwrseq@0 { 190 emmc_pwrseq: pwrseq@0 {
191 compatible = "mmc-pwrseq-emmc" 191 compatible = "mmc-pwrseq-emmc";
192 pinctrl-names = "default"; 192 pinctrl-names = "default";
193 pinctrl-0 = <&emmc_pwrseq_pins 193 pinctrl-0 = <&emmc_pwrseq_pins>;
194 reset-gpios = <&gpio1 20 GPIO_ 194 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
195 }; 195 };
196 196
197 vdd_sys_reg: regulator@0 { 197 vdd_sys_reg: regulator@0 {
198 compatible = "regulator-fixed" 198 compatible = "regulator-fixed";
199 regulator-name = "vdd_sys_reg" 199 regulator-name = "vdd_sys_reg";
200 regulator-min-microvolt = <500 200 regulator-min-microvolt = <5000000>;
201 regulator-max-microvolt = <500 201 regulator-max-microvolt = <5000000>;
202 regulator-always-on; 202 regulator-always-on;
203 }; 203 };
204 204
205 vmmcsd_fixed: fixedregulator0 { 205 vmmcsd_fixed: fixedregulator0 {
206 compatible = "regulator-fixed" 206 compatible = "regulator-fixed";
207 regulator-name = "vmmcsd_fixed 207 regulator-name = "vmmcsd_fixed";
208 regulator-min-microvolt = <330 208 regulator-min-microvolt = <3300000>;
209 regulator-max-microvolt = <330 209 regulator-max-microvolt = <3300000>;
210 }; 210 };
211 }; 211 };
212 212
213 &am33xx_pinmux { 213 &am33xx_pinmux {
214 pinctrl-names = "default"; 214 pinctrl-names = "default";
215 pinctrl-0 = <&lwb_pins>; 215 pinctrl-0 = <&lwb_pins>;
216 216
217 audio_pins: audio-pins { 217 audio_pins: audio-pins {
218 pinctrl-single,pins = < 218 pinctrl-single,pins = <
219 AM33XX_PADCONF(AM335X_ 219 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE0)
220 AM33XX_PADCONF(AM335X_ 220 AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0)
221 AM33XX_PADCONF(AM335X_ 221 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0)
222 AM33XX_PADCONF(AM335X_ 222 AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT_PULLDOWN, MUX_MODE0)
223 AM33XX_PADCONF(AM335X_ 223 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
224 >; 224 >;
225 }; 225 };
226 226
227 audio_pa_pins: audio-pa-pins { 227 audio_pa_pins: audio-pa-pins {
228 pinctrl-single,pins = < 228 pinctrl-single,pins = <
229 AM33XX_PADCONF(AM335X_ 229 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLDOWN, MUX_MODE7) /* SoundPA_en - mcasp0_aclkr.gpio3_18 */
230 >; 230 >;
231 }; 231 };
232 232
233 audio_mclk_pins: audio-mclk-pins { 233 audio_mclk_pins: audio-mclk-pins {
234 pinctrl-single,pins = < 234 pinctrl-single,pins = <
235 AM33XX_PADCONF(AM335X_ 235 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.gpio1_27 */
236 >; 236 >;
237 }; 237 };
238 238
239 backlight0_pins: backlight0-pins { 239 backlight0_pins: backlight0-pins {
240 pinctrl-single,pins = < 240 pinctrl-single,pins = <
241 AM33XX_PADCONF(AM335X_ 241 AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE7) /* gpmc_wen.gpio2_4 */
242 >; 242 >;
243 }; 243 };
244 244
245 backlight1_pins: backlight1-pins { 245 backlight1_pins: backlight1-pins {
246 pinctrl-single,pins = < 246 pinctrl-single,pins = <
247 AM33XX_PADCONF(AM335X_ 247 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad10.gpio0_26 */
248 >; 248 >;
249 }; 249 };
250 250
251 lcd_pins: lcd-pins { 251 lcd_pins: lcd-pins {
252 pinctrl-single,pins = < 252 pinctrl-single,pins = <
253 AM33XX_PADCONF(AM335X_ 253 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
254 AM33XX_PADCONF(AM335X_ 254 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
255 AM33XX_PADCONF(AM335X_ 255 AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
256 AM33XX_PADCONF(AM335X_ 256 AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
257 AM33XX_PADCONF(AM335X_ 257 AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
258 AM33XX_PADCONF(AM335X_ 258 AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
259 AM33XX_PADCONF(AM335X_ 259 AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
260 AM33XX_PADCONF(AM335X_ 260 AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
261 AM33XX_PADCONF(AM335X_ 261 AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
262 AM33XX_PADCONF(AM335X_ 262 AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
263 AM33XX_PADCONF(AM335X_ 263 AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
264 AM33XX_PADCONF(AM335X_ 264 AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
265 AM33XX_PADCONF(AM335X_ 265 AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
266 AM33XX_PADCONF(AM335X_ 266 AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
267 AM33XX_PADCONF(AM335X_ 267 AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
268 AM33XX_PADCONF(AM335X_ 268 AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
269 AM33XX_PADCONF(AM335X_ 269 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
270 AM33XX_PADCONF(AM335X_ 270 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
271 AM33XX_PADCONF(AM335X_ 271 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
272 AM33XX_PADCONF(AM335X_ 272 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
273 >; 273 >;
274 }; 274 };
275 275
276 led_pins: led-pins { 276 led_pins: led-pins {
277 pinctrl-single,pins = < 277 pinctrl-single,pins = <
278 AM33XX_PADCONF(AM335X_ 278 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* gpmc_a5.gpio1_21 */
279 AM33XX_PADCONF(AM335X_ 279 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) /* gpmc_a6.gpio1_22 */
280 AM33XX_PADCONF(AM335X_ 280 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) /* gpmc_a7.gpio1_23 */
281 AM33XX_PADCONF(AM335X_ 281 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) /* gpmc_a8.gpio1_24 */
282 >; 282 >;
283 }; 283 };
284 284
285 uart0_pins: uart0-pins { 285 uart0_pins: uart0-pins {
286 pinctrl-single,pins = < 286 pinctrl-single,pins = <
287 AM33XX_PADCONF(AM335X_ 287 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
288 AM33XX_PADCONF(AM335X_ 288 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
289 >; 289 >;
290 }; 290 };
291 291
292 uart1_pins: uart1-pins { 292 uart1_pins: uart1-pins {
293 pinctrl-single,pins = < 293 pinctrl-single,pins = <
294 AM33XX_PADCONF(AM335X_ 294 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
295 AM33XX_PADCONF(AM335X_ 295 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
296 >; 296 >;
297 }; 297 };
298 298
299 uart4_pins: uart4-pins { 299 uart4_pins: uart4-pins {
300 pinctrl-single,pins = < 300 pinctrl-single,pins = <
301 AM33XX_PADCONF(AM335X_ 301 AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* gpmc_wait0.uart4_rxd */
302 AM33XX_PADCONF(AM335X_ 302 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* gpmc_wpn.uart4_txd */
303 >; 303 >;
304 }; 304 };
305 305
306 i2c0_pins: i2c0-pins { 306 i2c0_pins: i2c0-pins {
307 pinctrl-single,pins = < 307 pinctrl-single,pins = <
308 AM33XX_PADCONF(AM335X_ 308 AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
309 AM33XX_PADCONF(AM335X_ 309 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
310 >; 310 >;
311 }; 311 };
312 312
313 i2c2_pins: i2c2-pins { 313 i2c2_pins: i2c2-pins {
314 pinctrl-single,pins = < 314 pinctrl-single,pins = <
315 AM33XX_PADCONF(AM335X_ 315 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_ctsn.i2c2_sda */
316 AM33XX_PADCONF(AM335X_ 316 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_rtsn.i2c2_scl */
317 >; 317 >;
318 }; 318 };
319 319
320 cpsw_default: cpsw-default-pins { 320 cpsw_default: cpsw-default-pins {
321 pinctrl-single,pins = < 321 pinctrl-single,pins = <
322 /* Slave 1 */ 322 /* Slave 1 */
323 AM33XX_PADCONF(AM335X_ 323 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE0)
324 AM33XX_PADCONF(AM335X_ 324 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
325 AM33XX_PADCONF(AM335X_ 325 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE0)
326 AM33XX_PADCONF(AM335X_ 326 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
327 AM33XX_PADCONF(AM335X_ 327 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
328 AM33XX_PADCONF(AM335X_ 328 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
329 AM33XX_PADCONF(AM335X_ 329 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
330 AM33XX_PADCONF(AM335X_ 330 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
331 AM33XX_PADCONF(AM335X_ 331 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
332 AM33XX_PADCONF(AM335X_ 332 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE0)
333 AM33XX_PADCONF(AM335X_ 333 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE0)
334 AM33XX_PADCONF(AM335X_ 334 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE0)
335 AM33XX_PADCONF(AM335X_ 335 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE0)
336 >; 336 >;
337 }; 337 };
338 338
339 cpsw_sleep: cpsw-sleep-pins { 339 cpsw_sleep: cpsw-sleep-pins {
340 pinctrl-single,pins = < 340 pinctrl-single,pins = <
341 /* Slave 1 reset value 341 /* Slave 1 reset value */
342 AM33XX_PADCONF(AM335X_ 342 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
343 AM33XX_PADCONF(AM335X_ 343 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
344 AM33XX_PADCONF(AM335X_ 344 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
345 AM33XX_PADCONF(AM335X_ 345 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
346 AM33XX_PADCONF(AM335X_ 346 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
347 AM33XX_PADCONF(AM335X_ 347 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
348 AM33XX_PADCONF(AM335X_ 348 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
349 AM33XX_PADCONF(AM335X_ 349 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
350 AM33XX_PADCONF(AM335X_ 350 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
351 AM33XX_PADCONF(AM335X_ 351 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
352 AM33XX_PADCONF(AM335X_ 352 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
353 AM33XX_PADCONF(AM335X_ 353 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
354 AM33XX_PADCONF(AM335X_ 354 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
355 >; 355 >;
356 }; 356 };
357 357
358 davinci_mdio_default: davinci-mdio-def 358 davinci_mdio_default: davinci-mdio-default-pins {
359 pinctrl-single,pins = < 359 pinctrl-single,pins = <
360 /* MDIO */ 360 /* MDIO */
361 AM33XX_PADCONF(AM335X_ 361 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
362 AM33XX_PADCONF(AM335X_ 362 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
363 /* Ethernet */ 363 /* Ethernet */
364 AM33XX_PADCONF(AM335X_ 364 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE7) /* Ethernet_nRST - gpmc_ad14.gpio1_14 */
365 >; 365 >;
366 }; 366 };
367 367
368 davinci_mdio_sleep: davinci-mdio-sleep 368 davinci_mdio_sleep: davinci-mdio-sleep-pins {
369 pinctrl-single,pins = < 369 pinctrl-single,pins = <
370 /* MDIO reset value */ 370 /* MDIO reset value */
371 AM33XX_PADCONF(AM335X_ 371 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
372 AM33XX_PADCONF(AM335X_ 372 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
373 >; 373 >;
374 }; 374 };
375 375
376 mmc1_pins: mmc1-pins { 376 mmc1_pins: mmc1-pins {
377 pinctrl-single,pins = < 377 pinctrl-single,pins = <
378 AM33XX_PADCONF(AM335X_ 378 AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE7) /* uart0_rtsn.gpio1_9 */
379 >; 379 >;
380 }; 380 };
381 381
382 emmc_pwrseq_pins: emmc-pwrseq-pins { 382 emmc_pwrseq_pins: emmc-pwrseq-pins {
383 pinctrl-single,pins = < 383 pinctrl-single,pins = <
384 AM33XX_PADCONF(AM335X_ 384 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a4.gpio1_20 */
385 >; 385 >;
386 }; 386 };
387 387
388 emmc_pins: emmc-pins { 388 emmc_pins: emmc-pins {
389 pinctrl-single,pins = < 389 pinctrl-single,pins = <
390 AM33XX_PADCONF(AM335X_ 390 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
391 AM33XX_PADCONF(AM335X_ 391 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
392 AM33XX_PADCONF(AM335X_ 392 AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
393 AM33XX_PADCONF(AM335X_ 393 AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
394 AM33XX_PADCONF(AM335X_ 394 AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
395 AM33XX_PADCONF(AM335X_ 395 AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
396 AM33XX_PADCONF(AM335X_ 396 AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
397 AM33XX_PADCONF(AM335X_ 397 AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
398 AM33XX_PADCONF(AM335X_ 398 AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
399 AM33XX_PADCONF(AM335X_ 399 AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
400 >; 400 >;
401 }; 401 };
402 402
403 ehrpwm1_pins: ehrpwm1a-pins { 403 ehrpwm1_pins: ehrpwm1a-pins {
404 pinctrl-single,pins = < 404 pinctrl-single,pins = <
405 AM33XX_PADCONF(AM335X_ 405 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE6) /* gpmc_a2.ehrpwm1a */
406 AM33XX_PADCONF(AM335X_ 406 AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT, MUX_MODE6) /* gpmc_a3.ehrpwm1b */
407 >; 407 >;
408 }; 408 };
409 409
410 rtc0_irq_pins: rtc0-irq-pins { 410 rtc0_irq_pins: rtc0-irq-pins {
411 pinctrl-single,pins = < 411 pinctrl-single,pins = <
412 AM33XX_PADCONF(AM335X_ 412 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_ad9.gpio0_23 */
413 >; 413 >;
414 }; 414 };
415 415
416 spi0_pins: spi0-pins { 416 spi0_pins: spi0-pins {
417 pinctrl-single,pins = < 417 pinctrl-single,pins = <
418 AM33XX_PADCONF(AM335X_ 418 AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_MOSI */
419 AM33XX_PADCONF(AM335X_ 419 AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_MISO */
420 AM33XX_PADCONF(AM335X_ 420 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
421 AM33XX_PADCONF(AM335X_ 421 AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_CS0 (NBATTSS) */
422 AM33XX_PADCONF(AM335X_ 422 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_CS1 (FPGA_FLASH_NCS) */
423 >; 423 >;
424 }; 424 };
425 425
426 lwb_pins: lwb-pins { 426 lwb_pins: lwb-pins {
427 pinctrl-single,pins = < 427 pinctrl-single,pins = <
428 AM33XX_PADCONF(AM335X_ 428 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE7) /* nKbdInt - gpmc_ad12.gpio1_12 */
429 AM33XX_PADCONF(AM335X_ 429 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE7) /* nKbdReset - gpmc_ad13.gpio1_13 */
430 AM33XX_PADCONF(AM335X_ 430 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLUP, MUX_MODE7) /* USB1_enPower - gpmc_a1.gpio1_17 */
431 /* PDI Bus - Battery s 431 /* PDI Bus - Battery system */
432 AM33XX_PADCONF(AM335X_ 432 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLUP, MUX_MODE7) /* nBattReset gpmc_a0.gpio1_16 */
433 AM33XX_PADCONF(AM335X_ 433 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE7) /* BattPDIData gpmc_ad15.gpio1_15 */
434 /* FPGA */ 434 /* FPGA */
435 AM33XX_PADCONF(AM335X_ 435 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLUP, MUX_MODE7) /* FPGA_DONE - gpmc_ad8.gpio0_22 */
436 AM33XX_PADCONF(AM335X_ 436 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLUP, MUX_MODE7) /* FPGA_NRST - gpmc_a0.gpio1_16 */
437 AM33XX_PADCONF(AM335X_ 437 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE7) /* FPGA_RUN - gpmc_a1.gpio1_17 */
438 AM33XX_PADCONF(AM335X_ 438 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLUP, MUX_MODE7) /* ENFPGA - gpmc_a9.gpio1_25 */
439 AM33XX_PADCONF(AM335X_ 439 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7) /* FPGA_PROGRAM - gpmc_a10.gpio1_26 */
440 >; 440 >;
441 }; 441 };
442 }; 442 };
443 443
444 &i2c0 { 444 &i2c0 {
445 status = "okay"; 445 status = "okay";
446 pinctrl-names = "default"; 446 pinctrl-names = "default";
447 pinctrl-0 = <&i2c0_pins>; 447 pinctrl-0 = <&i2c0_pins>;
448 448
449 clock-frequency = <400000>; 449 clock-frequency = <400000>;
450 450
451 tps: tps@24 { 451 tps: tps@24 {
452 reg = <0x24>; 452 reg = <0x24>;
453 }; 453 };
454 454
455 rtc0: rtc@68 { 455 rtc0: rtc@68 {
456 compatible = "dallas,ds1339"; 456 compatible = "dallas,ds1339";
457 pinctrl-names = "default"; 457 pinctrl-names = "default";
458 pinctrl-0 = <&rtc0_irq_pins>; 458 pinctrl-0 = <&rtc0_irq_pins>;
459 interrupt-parent = <&gpio0>; 459 interrupt-parent = <&gpio0>;
460 interrupts = <23 IRQ_TYPE_EDGE 460 interrupts = <23 IRQ_TYPE_EDGE_FALLING>; /* gpio 23 */
461 wakeup-source; 461 wakeup-source;
462 trickle-resistor-ohms = <2000> 462 trickle-resistor-ohms = <2000>;
463 reg = <0x68>; 463 reg = <0x68>;
464 }; 464 };
465 465
466 eeprom: eeprom@50 { 466 eeprom: eeprom@50 {
467 compatible = "atmel,24c256"; 467 compatible = "atmel,24c256";
468 reg = <0x50>; 468 reg = <0x50>;
469 }; 469 };
470 470
471 gpio_exp: mcp23017@20 { 471 gpio_exp: mcp23017@20 {
472 compatible = "microchip,mcp230 472 compatible = "microchip,mcp23017";
473 reg = <0x20>; 473 reg = <0x20>;
474 }; 474 };
475 475
476 }; 476 };
477 477
478 &i2c2 { 478 &i2c2 {
479 status = "okay"; 479 status = "okay";
480 pinctrl-names = "default"; 480 pinctrl-names = "default";
481 pinctrl-0 = <&i2c2_pins>; 481 pinctrl-0 = <&i2c2_pins>;
482 482
483 clock-frequency = <400000>; 483 clock-frequency = <400000>;
484 484
485 audio_codec: tlv320aic3106@1b { 485 audio_codec: tlv320aic3106@1b {
486 status = "okay"; 486 status = "okay";
487 compatible = "ti,tlv320aic3106 487 compatible = "ti,tlv320aic3106";
488 #sound-dai-cells = <0>; 488 #sound-dai-cells = <0>;
489 reg = <0x1b>; 489 reg = <0x1b>;
490 ai3x-micbias-vg = <2>; /* 2.5 490 ai3x-micbias-vg = <2>; /* 2.5V */
491 491
492 AVDD-supply = <&ldo4_reg>; 492 AVDD-supply = <&ldo4_reg>;
493 IOVDD-supply = <&ldo4_reg>; 493 IOVDD-supply = <&ldo4_reg>;
494 DRVDD-supply = <&ldo4_reg>; 494 DRVDD-supply = <&ldo4_reg>;
495 DVDD-supply = <&ldo3_reg>; 495 DVDD-supply = <&ldo3_reg>;
496 496
497 codec_port: port { 497 codec_port: port {
498 codec_endpoint: endpoi 498 codec_endpoint: endpoint {
499 remote-endpoin 499 remote-endpoint = <&cpu_endpoint>;
500 clocks = <&aud 500 clocks = <&audio_mclk>;
501 }; 501 };
502 }; 502 };
503 }; 503 };
504 504
505 /* Ambient Light Sensor */ 505 /* Ambient Light Sensor */
506 als: isl29023@44 { 506 als: isl29023@44 {
507 compatible = "isil,isl29023"; 507 compatible = "isil,isl29023";
508 reg = <0x44>; 508 reg = <0x44>;
509 }; 509 };
510 }; 510 };
511 511
512 &rtc { 512 &rtc {
513 status = "disabled"; 513 status = "disabled";
514 }; 514 };
515 515
516 &usb0 { 516 &usb0 {
517 dr_mode = "otg"; 517 dr_mode = "otg";
518 }; 518 };
519 519
520 &usb1 { 520 &usb1 {
521 dr_mode = "host"; 521 dr_mode = "host";
522 }; 522 };
523 523
524 &mmc1 { 524 &mmc1 {
525 status = "okay"; 525 status = "okay";
526 pinctrl-names = "default"; 526 pinctrl-names = "default";
527 pinctrl-0 = <&mmc1_pins>; 527 pinctrl-0 = <&mmc1_pins>;
528 bus-width = <4>; 528 bus-width = <4>;
529 cd-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; 529 cd-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
530 vmmc-supply = <&vmmcsd_fixed>; 530 vmmc-supply = <&vmmcsd_fixed>;
531 }; 531 };
532 532
533 &mmc2 { 533 &mmc2 {
534 status = "okay"; 534 status = "okay";
535 pinctrl-names = "default"; 535 pinctrl-names = "default";
536 pinctrl-0 = <&emmc_pins>; 536 pinctrl-0 = <&emmc_pins>;
537 bus-width = <8>; 537 bus-width = <8>;
538 vmmc-supply = <&vmmcsd_fixed>; 538 vmmc-supply = <&vmmcsd_fixed>;
539 mmc-pwrseq = <&emmc_pwrseq>; 539 mmc-pwrseq = <&emmc_pwrseq>;
540 }; 540 };
541 541
542 &mcasp0 { 542 &mcasp0 {
543 status = "okay"; 543 status = "okay";
544 pinctrl-names = "default"; 544 pinctrl-names = "default";
545 pinctrl-0 = <&audio_pins>; 545 pinctrl-0 = <&audio_pins>;
546 #sound-dai-cells = <0>; 546 #sound-dai-cells = <0>;
547 op-mode = <0>; /* MCASP_ISS_MODE */ 547 op-mode = <0>; /* MCASP_ISS_MODE */
548 tdm-slots = <2>; 548 tdm-slots = <2>;
549 /* 4 serializers */ 549 /* 4 serializers */
550 serial-dir = < /* 0: INACTIVE, 1: TX, 550 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
551 0 0 1 2 551 0 0 1 2
552 >; 552 >;
553 tx-num-evt = <32>; 553 tx-num-evt = <32>;
554 rx-num-evt = <32>; 554 rx-num-evt = <32>;
555 555
556 cpu_port: port { 556 cpu_port: port {
557 cpu_endpoint: endpoint { 557 cpu_endpoint: endpoint {
558 remote-endpoint = <&co 558 remote-endpoint = <&codec_endpoint>;
559 559
560 dai-format = "dsp_b"; 560 dai-format = "dsp_b";
561 bitclock-master = <&co 561 bitclock-master = <&codec_port>;
562 frame-master = <&codec 562 frame-master = <&codec_port>;
563 bitclock-inversion; 563 bitclock-inversion;
564 clocks = <&audio_mclk> 564 clocks = <&audio_mclk>;
565 }; 565 };
566 }; 566 };
567 }; 567 };
568 568
569 &uart0 { 569 &uart0 {
570 status = "okay"; 570 status = "okay";
571 pinctrl-names = "default"; 571 pinctrl-names = "default";
572 pinctrl-0 = <&uart0_pins>; 572 pinctrl-0 = <&uart0_pins>;
573 }; 573 };
574 574
575 &uart1 { 575 &uart1 {
576 status = "okay"; 576 status = "okay";
577 pinctrl-names = "default"; 577 pinctrl-names = "default";
578 pinctrl-0 = <&uart1_pins>; 578 pinctrl-0 = <&uart1_pins>;
579 }; 579 };
580 580
581 &uart4 { 581 &uart4 {
582 status = "okay"; 582 status = "okay";
583 pinctrl-names = "default"; 583 pinctrl-names = "default";
584 pinctrl-0 = <&uart4_pins>; 584 pinctrl-0 = <&uart4_pins>;
585 }; 585 };
586 586
587 &spi0 { 587 &spi0 {
588 status = "okay"; 588 status = "okay";
589 pinctrl-names = "default"; 589 pinctrl-names = "default";
590 pinctrl-0 = <&spi0_pins>; 590 pinctrl-0 = <&spi0_pins>;
591 591
592 flash: flash@1 { 592 flash: flash@1 {
593 #address-cells = <1>; 593 #address-cells = <1>;
594 #size-cells = <1>; 594 #size-cells = <1>;
595 compatible = "micron,n25q032"; 595 compatible = "micron,n25q032";
596 reg = <1>; 596 reg = <1>;
597 spi-max-frequency = <5000000>; 597 spi-max-frequency = <5000000>;
598 }; 598 };
599 }; 599 };
600 600
601 #include "../../tps65217.dtsi" 601 #include "../../tps65217.dtsi"
602 602
603 &tps { 603 &tps {
604 ti,pmic-shutdown-controller; 604 ti,pmic-shutdown-controller;
605 605
606 interrupt-parent = <&intc>; 606 interrupt-parent = <&intc>;
607 interrupts = <7>; /* NNMI */ 607 interrupts = <7>; /* NNMI */
608 608
609 regulators { 609 regulators {
610 dcdc1_reg: regulator@0 { 610 dcdc1_reg: regulator@0 {
611 /* VDDS_DDR */ 611 /* VDDS_DDR */
612 regulator-min-microvol 612 regulator-min-microvolt = <1500000>;
613 regulator-max-microvol 613 regulator-max-microvolt = <1500000>;
614 regulator-always-on; 614 regulator-always-on;
615 }; 615 };
616 616
617 dcdc2_reg: regulator@1 { 617 dcdc2_reg: regulator@1 {
618 /* VDD_MPU voltage lim 618 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
619 regulator-name = "vdd_ 619 regulator-name = "vdd_mpu";
620 regulator-min-microvol 620 regulator-min-microvolt = <925000>;
621 regulator-max-microvol 621 regulator-max-microvolt = <1325000>;
622 regulator-boot-on; 622 regulator-boot-on;
623 regulator-always-on; 623 regulator-always-on;
624 }; 624 };
625 625
626 dcdc3_reg: regulator@2 { 626 dcdc3_reg: regulator@2 {
627 /* VDD_CORE voltage li 627 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
628 regulator-name = "vdd_ 628 regulator-name = "vdd_core";
629 regulator-min-microvol 629 regulator-min-microvolt = <925000>;
630 regulator-max-microvol 630 regulator-max-microvolt = <1150000>;
631 regulator-boot-on; 631 regulator-boot-on;
632 regulator-always-on; 632 regulator-always-on;
633 }; 633 };
634 634
635 ldo1_reg: regulator@3 { 635 ldo1_reg: regulator@3 {
636 /* VRTC / VIO / VDDS*/ 636 /* VRTC / VIO / VDDS*/
637 regulator-always-on; 637 regulator-always-on;
638 regulator-min-microvol 638 regulator-min-microvolt = <1800000>;
639 regulator-max-microvol 639 regulator-max-microvolt = <1800000>;
640 }; 640 };
641 641
642 ldo2_reg: regulator@4 { 642 ldo2_reg: regulator@4 {
643 /* VDD_3V3AUX */ 643 /* VDD_3V3AUX */
644 regulator-always-on; 644 regulator-always-on;
645 regulator-min-microvol 645 regulator-min-microvolt = <3300000>;
646 regulator-max-microvol 646 regulator-max-microvolt = <3300000>;
647 }; 647 };
648 648
649 ldo3_reg: regulator@5 { 649 ldo3_reg: regulator@5 {
650 /* VDD_1V8 */ 650 /* VDD_1V8 */
651 regulator-min-microvol 651 regulator-min-microvolt = <1800000>;
652 regulator-max-microvol 652 regulator-max-microvolt = <1800000>;
653 regulator-always-on; 653 regulator-always-on;
654 }; 654 };
655 655
656 ldo4_reg: regulator@6 { 656 ldo4_reg: regulator@6 {
657 /* VDD_3V3A */ 657 /* VDD_3V3A */
658 regulator-min-microvol 658 regulator-min-microvolt = <3300000>;
659 regulator-max-microvol 659 regulator-max-microvolt = <3300000>;
660 regulator-always-on; 660 regulator-always-on;
661 }; 661 };
662 }; 662 };
663 }; 663 };
664 664
665 &cpsw_port1 { 665 &cpsw_port1 {
666 phy-mode = "mii"; 666 phy-mode = "mii";
667 phy-handle = <ðphy0>; 667 phy-handle = <ðphy0>;
668 ti,dual-emac-pvid = <1>; 668 ti,dual-emac-pvid = <1>;
669 }; 669 };
670 670
671 &cpsw_port2 { 671 &cpsw_port2 {
672 status = "disabled"; 672 status = "disabled";
673 }; 673 };
674 674
675 &mac_sw { 675 &mac_sw {
676 status = "okay"; 676 status = "okay";
677 pinctrl-names = "default", "sleep"; 677 pinctrl-names = "default", "sleep";
678 pinctrl-0 = <&cpsw_default>; 678 pinctrl-0 = <&cpsw_default>;
679 pinctrl-1 = <&cpsw_sleep>; 679 pinctrl-1 = <&cpsw_sleep>;
680 }; 680 };
681 681
682 &davinci_mdio_sw { 682 &davinci_mdio_sw {
683 pinctrl-names = "default", "sleep"; 683 pinctrl-names = "default", "sleep";
684 pinctrl-0 = <&davinci_mdio_default>; 684 pinctrl-0 = <&davinci_mdio_default>;
685 pinctrl-1 = <&davinci_mdio_sleep>; 685 pinctrl-1 = <&davinci_mdio_sleep>;
686 reset-gpios = <&gpio1 14 GPIO_ACTIVE_L 686 reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
687 reset-delay-us = <100>; /* PHY datas 687 reset-delay-us = <100>; /* PHY datasheet states 100us min */
688 688
689 ethphy0: ethernet-phy@0 { 689 ethphy0: ethernet-phy@0 {
690 reg = <0>; 690 reg = <0>;
691 }; 691 };
692 }; 692 };
693 693
694 &sham { 694 &sham {
695 status = "okay"; 695 status = "okay";
696 }; 696 };
697 697
698 &aes { 698 &aes {
699 status = "okay"; 699 status = "okay";
700 }; 700 };
701 701
702 &epwmss1 { 702 &epwmss1 {
703 status = "okay"; 703 status = "okay";
704 }; 704 };
705 705
706 &ehrpwm1 { 706 &ehrpwm1 {
707 status = "okay"; 707 status = "okay";
708 pinctrl-names = "default"; 708 pinctrl-names = "default";
709 pinctrl-0 = <&ehrpwm1_pins>; 709 pinctrl-0 = <&ehrpwm1_pins>;
710 }; 710 };
711 711
712 &lcdc { 712 &lcdc {
713 status = "okay"; 713 status = "okay";
714 }; 714 };
715 715
716 &tscadc { 716 &tscadc {
717 status = "okay"; 717 status = "okay";
718 }; 718 };
719 719
720 &am335x_adc { 720 &am335x_adc {
721 ti,adc-channels = <0 1 2 3 4 5 6 7>; 721 ti,adc-channels = <0 1 2 3 4 5 6 7>;
722 }; 722 };
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