1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * Copyright (C) 2014 Texas Instruments Incorp 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include "am4372.dtsi" 8 #include "am4372.dtsi"
9 #include <dt-bindings/pinctrl/am43xx.h> 9 #include <dt-bindings/pinctrl/am43xx.h>
10 #include <dt-bindings/pwm/pwm.h> 10 #include <dt-bindings/pwm/pwm.h>
11 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/input/input.h>
13 13
14 / { 14 / {
15 model = "TI AM437x Industrial Developm 15 model = "TI AM437x Industrial Development Kit";
16 compatible = "ti,am437x-idk-evm","ti,a 16 compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43";
17 17
18 chosen { 18 chosen {
19 stdout-path = &uart0; 19 stdout-path = &uart0;
20 }; 20 };
21 21
22 v24_0d: fixed-regulator-v24_0d { 22 v24_0d: fixed-regulator-v24_0d {
23 compatible = "regulator-fixed" 23 compatible = "regulator-fixed";
24 regulator-name = "V24_0D"; 24 regulator-name = "V24_0D";
25 regulator-min-microvolt = <240 25 regulator-min-microvolt = <24000000>;
26 regulator-max-microvolt = <240 26 regulator-max-microvolt = <24000000>;
27 regulator-always-on; 27 regulator-always-on;
28 regulator-boot-on; 28 regulator-boot-on;
29 }; 29 };
30 30
31 v3_3d: fixed-regulator-v3_3d { 31 v3_3d: fixed-regulator-v3_3d {
32 compatible = "regulator-fixed" 32 compatible = "regulator-fixed";
33 regulator-name = "V3_3D"; 33 regulator-name = "V3_3D";
34 regulator-min-microvolt = <330 34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <330 35 regulator-max-microvolt = <3300000>;
36 regulator-always-on; 36 regulator-always-on;
37 regulator-boot-on; 37 regulator-boot-on;
38 vin-supply = <&v24_0d>; 38 vin-supply = <&v24_0d>;
39 }; 39 };
40 40
41 vdd_corereg: fixed-regulator-vdd_corer 41 vdd_corereg: fixed-regulator-vdd_corereg {
42 compatible = "regulator-fixed" 42 compatible = "regulator-fixed";
43 regulator-name = "VDD_COREREG" 43 regulator-name = "VDD_COREREG";
44 regulator-min-microvolt = <110 44 regulator-min-microvolt = <1100000>;
45 regulator-max-microvolt = <110 45 regulator-max-microvolt = <1100000>;
46 regulator-always-on; 46 regulator-always-on;
47 regulator-boot-on; 47 regulator-boot-on;
48 vin-supply = <&v24_0d>; 48 vin-supply = <&v24_0d>;
49 }; 49 };
50 50
51 vdd_core: fixed-regulator-vdd_core { 51 vdd_core: fixed-regulator-vdd_core {
52 compatible = "regulator-fixed" 52 compatible = "regulator-fixed";
53 regulator-name = "VDD_CORE"; 53 regulator-name = "VDD_CORE";
54 regulator-min-microvolt = <110 54 regulator-min-microvolt = <1100000>;
55 regulator-max-microvolt = <110 55 regulator-max-microvolt = <1100000>;
56 regulator-always-on; 56 regulator-always-on;
57 regulator-boot-on; 57 regulator-boot-on;
58 vin-supply = <&vdd_corereg>; 58 vin-supply = <&vdd_corereg>;
59 }; 59 };
60 60
61 v1_8dreg: fixed-regulator-v1_8dreg { 61 v1_8dreg: fixed-regulator-v1_8dreg {
62 compatible = "regulator-fixed" 62 compatible = "regulator-fixed";
63 regulator-name = "V1_8DREG"; 63 regulator-name = "V1_8DREG";
64 regulator-min-microvolt = <180 64 regulator-min-microvolt = <1800000>;
65 regulator-max-microvolt = <180 65 regulator-max-microvolt = <1800000>;
66 regulator-always-on; 66 regulator-always-on;
67 regulator-boot-on; 67 regulator-boot-on;
68 vin-supply = <&v24_0d>; 68 vin-supply = <&v24_0d>;
69 }; 69 };
70 70
71 v1_8d: fixed-regulator-v1_8d { 71 v1_8d: fixed-regulator-v1_8d {
72 compatible = "regulator-fixed" 72 compatible = "regulator-fixed";
73 regulator-name = "V1_8D"; 73 regulator-name = "V1_8D";
74 regulator-min-microvolt = <180 74 regulator-min-microvolt = <1800000>;
75 regulator-max-microvolt = <180 75 regulator-max-microvolt = <1800000>;
76 regulator-always-on; 76 regulator-always-on;
77 regulator-boot-on; 77 regulator-boot-on;
78 vin-supply = <&v1_8dreg>; 78 vin-supply = <&v1_8dreg>;
79 }; 79 };
80 80
81 v1_5dreg: fixed-regulator-v1_5dreg { 81 v1_5dreg: fixed-regulator-v1_5dreg {
82 compatible = "regulator-fixed" 82 compatible = "regulator-fixed";
83 regulator-name = "V1_5DREG"; 83 regulator-name = "V1_5DREG";
84 regulator-min-microvolt = <150 84 regulator-min-microvolt = <1500000>;
85 regulator-max-microvolt = <150 85 regulator-max-microvolt = <1500000>;
86 regulator-always-on; 86 regulator-always-on;
87 regulator-boot-on; 87 regulator-boot-on;
88 vin-supply = <&v24_0d>; 88 vin-supply = <&v24_0d>;
89 }; 89 };
90 90
91 v1_5d: fixed-regulator-v1_5d { 91 v1_5d: fixed-regulator-v1_5d {
92 compatible = "regulator-fixed" 92 compatible = "regulator-fixed";
93 regulator-name = "V1_5D"; 93 regulator-name = "V1_5D";
94 regulator-min-microvolt = <150 94 regulator-min-microvolt = <1500000>;
95 regulator-max-microvolt = <150 95 regulator-max-microvolt = <1500000>;
96 regulator-always-on; 96 regulator-always-on;
97 regulator-boot-on; 97 regulator-boot-on;
98 vin-supply = <&v1_5dreg>; 98 vin-supply = <&v1_5dreg>;
99 }; 99 };
100 100
101 gpio_keys: gpio-keys { 101 gpio_keys: gpio-keys {
102 compatible = "gpio-keys"; 102 compatible = "gpio-keys";
103 pinctrl-names = "default"; 103 pinctrl-names = "default";
104 pinctrl-0 = <&gpio_keys_pins_d 104 pinctrl-0 = <&gpio_keys_pins_default>;
105 105
106 switch-0 { 106 switch-0 {
107 label = "power-button" 107 label = "power-button";
108 linux,code = <KEY_POWE 108 linux,code = <KEY_POWER>;
109 gpios = <&gpio4 2 GPIO 109 gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
110 }; 110 };
111 }; 111 };
112 112
113 /* fixed 32k external oscillator clock 113 /* fixed 32k external oscillator clock */
114 clk_32k_rtc: clk_32k_rtc { 114 clk_32k_rtc: clk_32k_rtc {
115 #clock-cells = <0>; 115 #clock-cells = <0>;
116 compatible = "fixed-clock"; 116 compatible = "fixed-clock";
117 clock-frequency = <32768>; 117 clock-frequency = <32768>;
118 }; 118 };
119 119
120 leds-iio { 120 leds-iio {
121 status = "disabled"; 121 status = "disabled";
122 compatible = "gpio-leds"; 122 compatible = "gpio-leds";
123 led-out0 { 123 led-out0 {
124 label = "out0"; 124 label = "out0";
125 gpios = <&tpic2810 0 G 125 gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
126 default-state = "off"; 126 default-state = "off";
127 }; 127 };
128 128
129 led-out1 { 129 led-out1 {
130 label = "out1"; 130 label = "out1";
131 gpios = <&tpic2810 1 G 131 gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
132 default-state = "off"; 132 default-state = "off";
133 }; 133 };
134 134
135 led-out2 { 135 led-out2 {
136 label = "out2"; 136 label = "out2";
137 gpios = <&tpic2810 2 G 137 gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
138 default-state = "off"; 138 default-state = "off";
139 }; 139 };
140 140
141 led-out3 { 141 led-out3 {
142 label = "out3"; 142 label = "out3";
143 gpios = <&tpic2810 3 G 143 gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
144 default-state = "off"; 144 default-state = "off";
145 }; 145 };
146 146
147 led-out4 { 147 led-out4 {
148 label = "out4"; 148 label = "out4";
149 gpios = <&tpic2810 4 G 149 gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
150 default-state = "off"; 150 default-state = "off";
151 }; 151 };
152 152
153 led-out5 { 153 led-out5 {
154 label = "out5"; 154 label = "out5";
155 gpios = <&tpic2810 5 G 155 gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
156 default-state = "off"; 156 default-state = "off";
157 }; 157 };
158 158
159 led-out6 { 159 led-out6 {
160 label = "out6"; 160 label = "out6";
161 gpios = <&tpic2810 6 G 161 gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
162 default-state = "off"; 162 default-state = "off";
163 }; 163 };
164 164
165 led-out7 { 165 led-out7 {
166 label = "out7"; 166 label = "out7";
167 gpios = <&tpic2810 7 G 167 gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
168 default-state = "off"; 168 default-state = "off";
169 }; 169 };
170 }; 170 };
171 }; 171 };
172 172
173 &am43xx_pinmux { 173 &am43xx_pinmux {
174 gpio_keys_pins_default: gpio-keys-defa 174 gpio_keys_pins_default: gpio-keys-default-pins {
175 pinctrl-single,pins = < 175 pinctrl-single,pins = <
176 AM4372_IOPAD(0x9b8, PI 176 AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7) /* cam0_field.gpio4_2 */
177 >; 177 >;
178 }; 178 };
179 179
180 i2c0_pins_default: i2c0-default-pins { 180 i2c0_pins_default: i2c0-default-pins {
181 pinctrl-single,pins = < 181 pinctrl-single,pins = <
182 AM4372_IOPAD(0x988, PI 182 AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
183 AM4372_IOPAD(0x98c, PI 183 AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
184 >; 184 >;
185 }; 185 };
186 186
187 i2c0_pins_sleep: i2c0-sleep-pins { 187 i2c0_pins_sleep: i2c0-sleep-pins {
188 pinctrl-single,pins = < 188 pinctrl-single,pins = <
189 AM4372_IOPAD(0x988, PI 189 AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7)
190 AM4372_IOPAD(0x98c, PI 190 AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7)
191 >; 191 >;
192 }; 192 };
193 193
194 i2c2_pins_default: i2c2-default-pins { 194 i2c2_pins_default: i2c2-default-pins {
195 pinctrl-single,pins = < 195 pinctrl-single,pins = <
196 AM4372_IOPAD(0x9e8, PI 196 AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
197 AM4372_IOPAD(0x9ec, PI 197 AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
198 >; 198 >;
199 }; 199 };
200 200
201 i2c2_pins_sleep: i2c2-sleep-pins { 201 i2c2_pins_sleep: i2c2-sleep-pins {
202 pinctrl-single,pins = < 202 pinctrl-single,pins = <
203 AM4372_IOPAD(0x9e8, PI 203 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7)
204 AM4372_IOPAD(0x9ec, PI 204 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7)
205 >; 205 >;
206 }; 206 };
207 207
208 mmc1_pins_default: mmc1-default-pins { 208 mmc1_pins_default: mmc1-default-pins {
209 pinctrl-single,pins = < 209 pinctrl-single,pins = <
210 AM4372_IOPAD(0x900, PI 210 AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
211 AM4372_IOPAD(0x904, PI 211 AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
212 AM4372_IOPAD(0x9f0, PI 212 AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
213 AM4372_IOPAD(0x9f4, PI 213 AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
214 AM4372_IOPAD(0x9f8, PI 214 AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
215 AM4372_IOPAD(0x9fc, PI 215 AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
216 AM4372_IOPAD(0x960, PI 216 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
217 >; 217 >;
218 }; 218 };
219 219
220 mmc1_pins_sleep: mmc1-sleep-pins { 220 mmc1_pins_sleep: mmc1-sleep-pins {
221 pinctrl-single,pins = < 221 pinctrl-single,pins = <
222 AM4372_IOPAD(0x900, PI 222 AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7)
223 AM4372_IOPAD(0x904, PI 223 AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7)
224 AM4372_IOPAD(0x9f0, PI 224 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7)
225 AM4372_IOPAD(0x9f4, PI 225 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7)
226 AM4372_IOPAD(0x9f8, PI 226 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
227 AM4372_IOPAD(0x9fc, PI 227 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
228 AM4372_IOPAD(0x960, PI 228 AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7)
229 >; 229 >;
230 }; 230 };
231 231
232 spi1_pins_default: spi1-default-pins { 232 spi1_pins_default: spi1-default-pins {
233 pinctrl-single,pins = < 233 pinctrl-single,pins = <
234 AM4372_IOPAD(0x908, PI 234 AM4372_IOPAD(0x908, PIN_INPUT | MUX_MODE2) /* mii1_col.spi1_sclk */
235 AM4372_IOPAD(0x910, PI 235 AM4372_IOPAD(0x910, PIN_INPUT | MUX_MODE2) /* mii1_rx_er.spi1_d1 */
236 AM4372_IOPAD(0x944, PI 236 AM4372_IOPAD(0x944, PIN_OUTPUT | MUX_MODE2) /* rmii1_ref_clk.spi1_cs0 */
237 AM4372_IOPAD(0x90c, PI 237 AM4372_IOPAD(0x90c, PIN_OUTPUT | MUX_MODE7) /* mii1_crs.gpio3_1 */
238 >; 238 >;
239 }; 239 };
240 240
241 spi1_pins_sleep: spi1-sleep-pins { 241 spi1_pins_sleep: spi1-sleep-pins {
242 pinctrl-single,pins = < 242 pinctrl-single,pins = <
243 AM4372_IOPAD(0x908, PI 243 AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
244 AM4372_IOPAD(0x910, PI 244 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
245 AM4372_IOPAD(0x944, PI 245 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
246 AM4372_IOPAD(0x90c, PI 246 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
247 >; 247 >;
248 }; 248 };
249 249
250 ecap0_pins_default: backlight-default- 250 ecap0_pins_default: backlight-default-pins {
251 pinctrl-single,pins = < 251 pinctrl-single,pins = <
252 AM4372_IOPAD(0x964, PI 252 AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
253 >; 253 >;
254 }; 254 };
255 255
256 cpsw_default: cpsw-default-pins { 256 cpsw_default: cpsw-default-pins {
257 pinctrl-single,pins = < 257 pinctrl-single,pins = <
258 AM4372_IOPAD(0x92c, PI 258 AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
259 AM4372_IOPAD(0x914, PI 259 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
260 AM4372_IOPAD(0x928, PI 260 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
261 AM4372_IOPAD(0x924, PI 261 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
262 AM4372_IOPAD(0x920, PI 262 AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
263 AM4372_IOPAD(0x91c, PI 263 AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
264 AM4372_IOPAD(0x930, PI 264 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
265 AM4372_IOPAD(0x918, PI 265 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
266 AM4372_IOPAD(0x940, PI 266 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
267 AM4372_IOPAD(0x93c, PI 267 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
268 AM4372_IOPAD(0x938, PI 268 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
269 AM4372_IOPAD(0x934, PI 269 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
270 >; 270 >;
271 }; 271 };
272 272
273 cpsw_sleep: cpsw-sleep-pins { 273 cpsw_sleep: cpsw-sleep-pins {
274 pinctrl-single,pins = < 274 pinctrl-single,pins = <
275 AM4372_IOPAD(0x92c, PI 275 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
276 AM4372_IOPAD(0x914, PI 276 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
277 AM4372_IOPAD(0x928, PI 277 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
278 AM4372_IOPAD(0x924, PI 278 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
279 AM4372_IOPAD(0x920, PI 279 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
280 AM4372_IOPAD(0x91c, PI 280 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
281 AM4372_IOPAD(0x930, PI 281 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
282 AM4372_IOPAD(0x918, PI 282 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
283 AM4372_IOPAD(0x940, PI 283 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
284 AM4372_IOPAD(0x93c, PI 284 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
285 AM4372_IOPAD(0x938, PI 285 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
286 AM4372_IOPAD(0x934, PI 286 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
287 >; 287 >;
288 }; 288 };
289 289
290 davinci_mdio_default: davinci-mdio-def 290 davinci_mdio_default: davinci-mdio-default-pins {
291 pinctrl-single,pins = < 291 pinctrl-single,pins = <
292 /* MDIO */ 292 /* MDIO */
293 AM4372_IOPAD(0x948, PI 293 AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
294 AM4372_IOPAD(0x94c, PI 294 AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
295 >; 295 >;
296 }; 296 };
297 297
298 davinci_mdio_sleep: davinci-mdio-sleep 298 davinci_mdio_sleep: davinci-mdio-sleep-pins {
299 pinctrl-single,pins = < 299 pinctrl-single,pins = <
300 /* MDIO reset value */ 300 /* MDIO reset value */
301 AM4372_IOPAD(0x948, PI 301 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
302 AM4372_IOPAD(0x94c, PI 302 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
303 >; 303 >;
304 }; 304 };
305 305
306 qspi_pins_default: qspi-default-pins { 306 qspi_pins_default: qspi-default-pins {
307 pinctrl-single,pins = < 307 pinctrl-single,pins = <
308 AM4372_IOPAD(0x87c, PI 308 AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */
309 AM4372_IOPAD(0x888, PI 309 AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
310 AM4372_IOPAD(0x890, PI 310 AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
311 AM4372_IOPAD(0x894, PI 311 AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
312 AM4372_IOPAD(0x898, PI 312 AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */
313 AM4372_IOPAD(0x89c, PI 313 AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
314 >; 314 >;
315 }; 315 };
316 316
317 qspi_pins_sleep: qspi-sleep-pins { 317 qspi_pins_sleep: qspi-sleep-pins {
318 pinctrl-single,pins = < 318 pinctrl-single,pins = <
319 AM4372_IOPAD(0x87c, PI 319 AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7)
320 AM4372_IOPAD(0x888, PI 320 AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)
321 AM4372_IOPAD(0x890, PI 321 AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7)
322 AM4372_IOPAD(0x894, PI 322 AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7)
323 AM4372_IOPAD(0x898, PI 323 AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7)
324 AM4372_IOPAD(0x89c, PI 324 AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7)
325 >; 325 >;
326 }; 326 };
327 }; 327 };
328 328
329 &i2c0 { 329 &i2c0 {
330 status = "okay"; 330 status = "okay";
331 pinctrl-names = "default", "sleep"; 331 pinctrl-names = "default", "sleep";
332 pinctrl-0 = <&i2c0_pins_default>; 332 pinctrl-0 = <&i2c0_pins_default>;
333 pinctrl-1 = <&i2c0_pins_sleep>; 333 pinctrl-1 = <&i2c0_pins_sleep>;
334 clock-frequency = <400000>; 334 clock-frequency = <400000>;
335 335
336 at24@50 { 336 at24@50 {
337 compatible = "atmel,24c256"; 337 compatible = "atmel,24c256";
338 pagesize = <64>; 338 pagesize = <64>;
339 reg = <0x50>; 339 reg = <0x50>;
340 }; 340 };
341 341
342 tps: tps62362@60 { 342 tps: tps62362@60 {
343 compatible = "ti,tps62362"; 343 compatible = "ti,tps62362";
344 reg = <0x60>; 344 reg = <0x60>;
345 regulator-name = "VDD_MPU"; 345 regulator-name = "VDD_MPU";
346 regulator-min-microvolt = <950 346 regulator-min-microvolt = <950000>;
347 regulator-max-microvolt = <133 347 regulator-max-microvolt = <1330000>;
348 regulator-boot-on; 348 regulator-boot-on;
349 regulator-always-on; 349 regulator-always-on;
350 ti,vsel0-state-high; 350 ti,vsel0-state-high;
351 ti,vsel1-state-high; 351 ti,vsel1-state-high;
352 vin-supply = <&v3_3d>; 352 vin-supply = <&v3_3d>;
353 }; 353 };
354 }; 354 };
355 355
356 &i2c2 { 356 &i2c2 {
357 status = "okay"; 357 status = "okay";
358 pinctrl-names = "default", "sleep"; 358 pinctrl-names = "default", "sleep";
359 pinctrl-0 = <&i2c2_pins_default>; 359 pinctrl-0 = <&i2c2_pins_default>;
360 pinctrl-1 = <&i2c2_pins_sleep>; 360 pinctrl-1 = <&i2c2_pins_sleep>;
361 clock-frequency = <100000>; 361 clock-frequency = <100000>;
362 362
363 tpic2810: tpic2810@60 { 363 tpic2810: tpic2810@60 {
364 compatible = "ti,tpic2810"; 364 compatible = "ti,tpic2810";
365 reg = <0x60>; 365 reg = <0x60>;
366 gpio-controller; 366 gpio-controller;
367 #gpio-cells = <2>; 367 #gpio-cells = <2>;
368 }; 368 };
369 }; 369 };
370 370
371 &spi1 { 371 &spi1 {
372 status = "okay"; 372 status = "okay";
373 pinctrl-names = "default", "sleep"; 373 pinctrl-names = "default", "sleep";
374 pinctrl-0 = <&spi1_pins_default>; 374 pinctrl-0 = <&spi1_pins_default>;
375 pinctrl-1 = <&spi1_pins_sleep>; 375 pinctrl-1 = <&spi1_pins_sleep>;
376 ti,pindir-d0-out-d1-in; 376 ti,pindir-d0-out-d1-in;
377 377
378 sn65hvs882: sn65hvs882@0 { 378 sn65hvs882: sn65hvs882@0 {
379 compatible = "pisosr-gpio"; 379 compatible = "pisosr-gpio";
380 gpio-controller; 380 gpio-controller;
381 #gpio-cells = <2>; 381 #gpio-cells = <2>;
382 382
383 load-gpios = <&gpio3 1 GPIO_AC 383 load-gpios = <&gpio3 1 GPIO_ACTIVE_LOW>;
384 384
385 reg = <0>; 385 reg = <0>;
386 spi-max-frequency = <1000000>; 386 spi-max-frequency = <1000000>;
387 spi-cpol; 387 spi-cpol;
388 }; 388 };
389 }; 389 };
390 390
391 &epwmss0 { 391 &epwmss0 {
392 status = "okay"; 392 status = "okay";
393 }; 393 };
394 394
395 &ecap0 { 395 &ecap0 {
396 status = "okay"; 396 status = "okay";
397 pinctrl-names = "default"; 397 pinctrl-names = "default";
398 pinctrl-0 = <&ecap0_pins_default>; 398 pinctrl-0 = <&ecap0_pins_default>;
399 }; 399 };
400 400
401 &gpio0 { 401 &gpio0 {
402 status = "okay"; 402 status = "okay";
403 }; 403 };
404 404
405 &gpio1 { 405 &gpio1 {
406 status = "okay"; 406 status = "okay";
407 }; 407 };
408 408
409 &gpio3 { 409 &gpio3 {
410 status = "okay"; 410 status = "okay";
411 }; 411 };
412 412
413 &gpio4 { 413 &gpio4 {
414 status = "okay"; 414 status = "okay";
415 }; 415 };
416 416
417 &gpio5 { 417 &gpio5 {
418 status = "okay"; 418 status = "okay";
419 }; 419 };
420 420
421 &mmc1 { 421 &mmc1 {
422 status = "okay"; 422 status = "okay";
423 pinctrl-names = "default", "sleep"; 423 pinctrl-names = "default", "sleep";
424 pinctrl-0 = <&mmc1_pins_default>; 424 pinctrl-0 = <&mmc1_pins_default>;
425 pinctrl-1 = <&mmc1_pins_sleep>; 425 pinctrl-1 = <&mmc1_pins_sleep>;
426 vmmc-supply = <&v3_3d>; 426 vmmc-supply = <&v3_3d>;
427 bus-width = <4>; 427 bus-width = <4>;
428 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 428 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
429 }; 429 };
430 430
431 &qspi { 431 &qspi {
432 status = "okay"; 432 status = "okay";
433 pinctrl-names = "default", "sleep"; 433 pinctrl-names = "default", "sleep";
434 pinctrl-0 = <&qspi_pins_default>; 434 pinctrl-0 = <&qspi_pins_default>;
435 pinctrl-1 = <&qspi_pins_sleep>; 435 pinctrl-1 = <&qspi_pins_sleep>;
436 436
437 spi-max-frequency = <48000000>; 437 spi-max-frequency = <48000000>;
438 flash@0 { 438 flash@0 {
439 compatible = "mx66l51235l"; 439 compatible = "mx66l51235l";
440 spi-max-frequency = <48000000> 440 spi-max-frequency = <48000000>;
441 reg = <0>; 441 reg = <0>;
442 spi-cpol; 442 spi-cpol;
443 spi-cpha; 443 spi-cpha;
444 spi-tx-bus-width = <1>; 444 spi-tx-bus-width = <1>;
445 spi-rx-bus-width = <4>; 445 spi-rx-bus-width = <4>;
446 #address-cells = <1>; 446 #address-cells = <1>;
447 #size-cells = <1>; 447 #size-cells = <1>;
448 448
449 /* 449 /*
450 * MTD partition table. The R 450 * MTD partition table. The ROM checks the first 512KiB for a
451 * valid file to boot(XIP). 451 * valid file to boot(XIP).
452 */ 452 */
453 partition@0 { 453 partition@0 {
454 label = "QSPI.U_BOOT"; 454 label = "QSPI.U_BOOT";
455 reg = <0x00000000 0x00 455 reg = <0x00000000 0x00080000>;
456 }; 456 };
457 partition@1 { 457 partition@1 {
458 label = "QSPI.U_BOOT.b 458 label = "QSPI.U_BOOT.backup";
459 reg = <0x00080000 0x00 459 reg = <0x00080000 0x00080000>;
460 }; 460 };
461 partition@2 { 461 partition@2 {
462 label = "QSPI.U-BOOT-S 462 label = "QSPI.U-BOOT-SPL_OS";
463 reg = <0x00100000 0x00 463 reg = <0x00100000 0x00010000>;
464 }; 464 };
465 partition@3 { 465 partition@3 {
466 label = "QSPI.U_BOOT_E 466 label = "QSPI.U_BOOT_ENV";
467 reg = <0x00110000 0x00 467 reg = <0x00110000 0x00010000>;
468 }; 468 };
469 partition@4 { 469 partition@4 {
470 label = "QSPI.U-BOOT-E 470 label = "QSPI.U-BOOT-ENV.backup";
471 reg = <0x00120000 0x00 471 reg = <0x00120000 0x00010000>;
472 }; 472 };
473 partition@5 { 473 partition@5 {
474 label = "QSPI.KERNEL"; 474 label = "QSPI.KERNEL";
475 reg = <0x00130000 0x08 475 reg = <0x00130000 0x0800000>;
476 }; 476 };
477 partition@6 { 477 partition@6 {
478 label = "QSPI.FILESYST 478 label = "QSPI.FILESYSTEM";
479 reg = <0x00930000 0x36 479 reg = <0x00930000 0x36D0000>;
480 }; 480 };
481 }; 481 };
482 }; 482 };
483 483
484 &mac_sw { 484 &mac_sw {
485 pinctrl-names = "default", "sleep"; 485 pinctrl-names = "default", "sleep";
486 pinctrl-0 = <&cpsw_default>; 486 pinctrl-0 = <&cpsw_default>;
487 pinctrl-1 = <&cpsw_sleep>; 487 pinctrl-1 = <&cpsw_sleep>;
488 status = "okay"; 488 status = "okay";
489 }; 489 };
490 490
491 &davinci_mdio_sw { 491 &davinci_mdio_sw {
492 pinctrl-names = "default", "sleep"; 492 pinctrl-names = "default", "sleep";
493 pinctrl-0 = <&davinci_mdio_default>; 493 pinctrl-0 = <&davinci_mdio_default>;
494 pinctrl-1 = <&davinci_mdio_sleep>; 494 pinctrl-1 = <&davinci_mdio_sleep>;
495 495
496 ethphy0: ethernet-phy@0 { 496 ethphy0: ethernet-phy@0 {
497 reg = <0>; 497 reg = <0>;
498 }; 498 };
499 }; 499 };
500 500
501 &cpsw_port1 { 501 &cpsw_port1 {
502 phy-handle = <ðphy0>; 502 phy-handle = <ðphy0>;
503 phy-mode = "rgmii-rxid"; 503 phy-mode = "rgmii-rxid";
504 ti,dual-emac-pvid = <1>; 504 ti,dual-emac-pvid = <1>;
505 }; 505 };
506 506
507 &cpsw_port2 { 507 &cpsw_port2 {
508 status = "disabled"; 508 status = "disabled";
509 }; 509 };
510 510
511 &rtc { 511 &rtc {
512 clocks = <&clk_32k_rtc>, <&clk_32768_c 512 clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
513 clock-names = "ext-clk", "int-clk"; 513 clock-names = "ext-clk", "int-clk";
514 status = "okay"; 514 status = "okay";
515 }; 515 };
516 516
517 &wdt { 517 &wdt {
518 status = "okay"; 518 status = "okay";
519 }; 519 };
520 520
521 &cpu { 521 &cpu {
522 cpu0-supply = <&tps>; 522 cpu0-supply = <&tps>;
523 }; 523 };
524 524
525 &cpu0_opp_table { 525 &cpu0_opp_table {
526 /* 526 /*
527 * Supply voltage supervisor on board 527 * Supply voltage supervisor on board will not allow opp50 so
528 * disable it and set opp100 as suspen 528 * disable it and set opp100 as suspend OPP.
529 */ 529 */
530 opp-50-300000000 { 530 opp-50-300000000 {
531 /* opp50-300000000 */ 531 /* opp50-300000000 */
532 status = "disabled"; 532 status = "disabled";
533 }; 533 };
534 534
535 opp-100-600000000 { 535 opp-100-600000000 {
536 /* opp100-600000000 */ 536 /* opp100-600000000 */
537 opp-suspend; 537 opp-suspend;
538 }; 538 };
539 }; 539 };
540 540
541 &pruss1_mdio { 541 &pruss1_mdio {
542 status = "disabled"; 542 status = "disabled";
543 }; 543 };
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