1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * Copyright (C) 2014 Texas Instruments Incorp 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
4 */ 4 */
5 5
6 /* AM437x SK EVM */ 6 /* AM437x SK EVM */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 9
10 #include "am4372.dtsi" 10 #include "am4372.dtsi"
11 #include <dt-bindings/pinctrl/am43xx.h> 11 #include <dt-bindings/pinctrl/am43xx.h>
12 #include <dt-bindings/pwm/pwm.h> 12 #include <dt-bindings/pwm/pwm.h>
13 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq 15 #include <dt-bindings/interrupt-controller/irq.h>
16 16
17 / { 17 / {
18 model = "TI AM437x SK EVM"; 18 model = "TI AM437x SK EVM";
19 compatible = "ti,am437x-sk-evm","ti,am 19 compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
20 20
21 aliases { 21 aliases {
22 display0 = &lcd0; 22 display0 = &lcd0;
23 }; 23 };
24 24
25 chosen { 25 chosen {
26 stdout-path = &uart0; 26 stdout-path = &uart0;
27 }; 27 };
28 28
29 /* fixed 32k external oscillator clock 29 /* fixed 32k external oscillator clock */
30 clk_32k_rtc: clk_32k_rtc { 30 clk_32k_rtc: clk_32k_rtc {
31 #clock-cells = <0>; 31 #clock-cells = <0>;
32 compatible = "fixed-clock"; 32 compatible = "fixed-clock";
33 clock-frequency = <32768>; 33 clock-frequency = <32768>;
34 }; 34 };
35 35
36 lcd_bl: backlight { 36 lcd_bl: backlight {
37 compatible = "pwm-backlight"; 37 compatible = "pwm-backlight";
38 pwms = <&ecap0 0 50000 PWM_POL 38 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
39 brightness-levels = <0 51 53 5 39 brightness-levels = <0 51 53 56 62 75 101 152 255>;
40 default-brightness-level = <8> 40 default-brightness-level = <8>;
41 }; 41 };
42 42
43 sound { 43 sound {
44 compatible = "simple-audio-car 44 compatible = "simple-audio-card";
45 simple-audio-card,name = "AM43 45 simple-audio-card,name = "AM437x-SK-EVM";
46 simple-audio-card,widgets = 46 simple-audio-card,widgets =
47 "Headphone", "Headphon 47 "Headphone", "Headphone Jack",
48 "Line", "Line In"; 48 "Line", "Line In";
49 simple-audio-card,routing = 49 simple-audio-card,routing =
50 "Headphone Jack", 50 "Headphone Jack", "HPLOUT",
51 "Headphone Jack", 51 "Headphone Jack", "HPROUT",
52 "LINE1L", 52 "LINE1L", "Line In",
53 "LINE1R", 53 "LINE1R", "Line In";
54 simple-audio-card,format = "ds 54 simple-audio-card,format = "dsp_b";
55 simple-audio-card,bitclock-mas 55 simple-audio-card,bitclock-master = <&sound_master>;
56 simple-audio-card,frame-master 56 simple-audio-card,frame-master = <&sound_master>;
57 simple-audio-card,bitclock-inv 57 simple-audio-card,bitclock-inversion;
58 58
59 simple-audio-card,cpu { 59 simple-audio-card,cpu {
60 sound-dai = <&mcasp1>; 60 sound-dai = <&mcasp1>;
61 }; 61 };
62 62
63 sound_master: simple-audio-car 63 sound_master: simple-audio-card,codec {
64 sound-dai = <&tlv320ai 64 sound-dai = <&tlv320aic3106>;
65 system-clock-frequency 65 system-clock-frequency = <24000000>;
66 }; 66 };
67 }; 67 };
68 68
69 matrix_keypad: matrix_keypad0 { 69 matrix_keypad: matrix_keypad0 {
70 compatible = "gpio-matrix-keyp 70 compatible = "gpio-matrix-keypad";
71 71
72 pinctrl-names = "default"; 72 pinctrl-names = "default";
73 pinctrl-0 = <&matrix_keypad_pi 73 pinctrl-0 = <&matrix_keypad_pins>;
74 74
75 debounce-delay-ms = <5>; 75 debounce-delay-ms = <5>;
76 col-scan-delay-us = <5>; 76 col-scan-delay-us = <5>;
77 77
78 row-gpios = <&gpio5 5 GPIO_ACT 78 row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */
79 &gpio5 6 GPIO_ 79 &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */
80 80
81 col-gpios = <&gpio5 13 GPIO_AC 81 col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */
82 &gpio5 4 GPIO_ 82 &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */
83 83
84 linux,keymap = < 84 linux,keymap = <
85 MATRIX_KEY(0, 85 MATRIX_KEY(0, 0, KEY_DOWN)
86 MATRIX_KEY(0, 86 MATRIX_KEY(0, 1, KEY_RIGHT)
87 MATRIX_KEY(1, 87 MATRIX_KEY(1, 0, KEY_LEFT)
88 MATRIX_KEY(1, 88 MATRIX_KEY(1, 1, KEY_UP)
89 >; 89 >;
90 }; 90 };
91 91
92 leds { 92 leds {
93 compatible = "gpio-leds"; 93 compatible = "gpio-leds";
94 94
95 pinctrl-names = "default"; 95 pinctrl-names = "default";
96 pinctrl-0 = <&leds_pins>; 96 pinctrl-0 = <&leds_pins>;
97 97
98 led0 { 98 led0 {
99 label = "am437x-sk:red 99 label = "am437x-sk:red:heartbeat";
100 gpios = <&gpio5 0 GPIO 100 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
101 linux,default-trigger 101 linux,default-trigger = "heartbeat";
102 default-state = "off"; 102 default-state = "off";
103 }; 103 };
104 104
105 led1 { 105 led1 {
106 label = "am437x-sk:gre 106 label = "am437x-sk:green:mmc1";
107 gpios = <&gpio5 1 GPIO 107 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
108 linux,default-trigger 108 linux,default-trigger = "mmc0";
109 default-state = "off"; 109 default-state = "off";
110 }; 110 };
111 111
112 led2 { 112 led2 {
113 label = "am437x-sk:blu 113 label = "am437x-sk:blue:cpu0";
114 gpios = <&gpio5 2 GPIO 114 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
115 linux,default-trigger 115 linux,default-trigger = "cpu0";
116 default-state = "off"; 116 default-state = "off";
117 }; 117 };
118 118
119 led3 { 119 led3 {
120 label = "am437x-sk:blu 120 label = "am437x-sk:blue:usr3";
121 gpios = <&gpio5 3 GPIO 121 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
122 default-state = "off"; 122 default-state = "off";
123 }; 123 };
124 }; 124 };
125 125
126 lcd0: display { 126 lcd0: display {
127 compatible = "newhaven,nhd-4.3 127 compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
128 label = "lcd"; 128 label = "lcd";
129 129
130 pinctrl-names = "default"; 130 pinctrl-names = "default";
131 pinctrl-0 = <&lcd_pins>; 131 pinctrl-0 = <&lcd_pins>;
132 132
133 backlight = <&lcd_bl>; 133 backlight = <&lcd_bl>;
134 134
135 enable-gpios = <&gpio1 7 GPIO_ 135 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
136 136
137 port { 137 port {
138 lcd_in: endpoint { 138 lcd_in: endpoint {
139 remote-endpoin 139 remote-endpoint = <&dpi_out>;
140 }; 140 };
141 }; 141 };
142 }; 142 };
143 143
144 vmmcwl_fixed: fixedregulator-mmcwl { 144 vmmcwl_fixed: fixedregulator-mmcwl {
145 /* 145 /*
146 * WL_EN is not SDIO standard 146 * WL_EN is not SDIO standard compliant. It is an out of band
147 * signal and hard to be dealt 147 * signal and hard to be dealt with in a standard way by the
148 * SDIO core driver. 148 * SDIO core driver.
149 * So modelling the WL_EN line 149 * So modelling the WL_EN line as a regulator was a natural
150 * choice as the MMC core alre 150 * choice as the MMC core already deals with MMC supplies.
151 */ 151 */
152 compatible = "regulator-fixed" 152 compatible = "regulator-fixed";
153 regulator-name = "vmmcwl_fixed 153 regulator-name = "vmmcwl_fixed";
154 regulator-min-microvolt = <180 154 regulator-min-microvolt = <1800000>;
155 regulator-max-microvolt = <180 155 regulator-max-microvolt = <1800000>;
156 gpio = <&gpio4 8 GPIO_ACTIVE_H 156 gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
157 enable-active-high; 157 enable-active-high;
158 }; 158 };
159 }; 159 };
160 160
161 &am43xx_pinmux { 161 &am43xx_pinmux {
162 matrix_keypad_pins: matrix-keypad-pins 162 matrix_keypad_pins: matrix-keypad-pins {
163 pinctrl-single,pins = < 163 pinctrl-single,pins = <
164 AM4372_IOPAD(0xa4c, PI 164 AM4372_IOPAD(0xa4c, PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
165 AM4372_IOPAD(0xa50, PI 165 AM4372_IOPAD(0xa50, PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
166 AM4372_IOPAD(0xa54, PI 166 AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */
167 AM4372_IOPAD(0xa58, PI 167 AM4372_IOPAD(0xa58, PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */
168 >; 168 >;
169 }; 169 };
170 170
171 leds_pins: leds-pins { 171 leds_pins: leds-pins {
172 pinctrl-single,pins = < 172 pinctrl-single,pins = <
173 AM4372_IOPAD(0xa28, PI 173 AM4372_IOPAD(0xa28, PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */
174 AM4372_IOPAD(0xa2c, PI 174 AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */
175 AM4372_IOPAD(0xa30, PI 175 AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */
176 AM4372_IOPAD(0xa34, PI 176 AM4372_IOPAD(0xa34, PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */
177 >; 177 >;
178 }; 178 };
179 179
180 i2c0_pins: i2c0-pins { 180 i2c0_pins: i2c0-pins {
181 pinctrl-single,pins = < 181 pinctrl-single,pins = <
182 AM4372_IOPAD(0x988, PI 182 AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
183 AM4372_IOPAD(0x98c, PI 183 AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
184 >; 184 >;
185 }; 185 };
186 186
187 i2c1_pins: i2c1-pins { 187 i2c1_pins: i2c1-pins {
188 pinctrl-single,pins = < 188 pinctrl-single,pins = <
189 AM4372_IOPAD(0x95c, PI 189 AM4372_IOPAD(0x95c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
190 AM4372_IOPAD(0x958, PI 190 AM4372_IOPAD(0x958, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
191 >; 191 >;
192 }; 192 };
193 193
194 mmc1_pins: mmc1-pins { 194 mmc1_pins: mmc1-pins {
195 pinctrl-single,pins = < 195 pinctrl-single,pins = <
196 AM4372_IOPAD(0x8f0, PI 196 AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
197 AM4372_IOPAD(0x8f4, PI 197 AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
198 AM4372_IOPAD(0x8f8, PI 198 AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
199 AM4372_IOPAD(0x8fc, PI 199 AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
200 AM4372_IOPAD(0x900, PI 200 AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
201 AM4372_IOPAD(0x904, PI 201 AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
202 AM4372_IOPAD(0x960, PI 202 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
203 >; 203 >;
204 }; 204 };
205 205
206 ecap0_pins: backlight-pins { 206 ecap0_pins: backlight-pins {
207 pinctrl-single,pins = < 207 pinctrl-single,pins = <
208 AM4372_IOPAD(0x964, PI 208 AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
209 >; 209 >;
210 }; 210 };
211 211
212 edt_ft5306_ts_pins: edt-ft5306-ts-pins 212 edt_ft5306_ts_pins: edt-ft5306-ts-pins {
213 pinctrl-single,pins = < 213 pinctrl-single,pins = <
214 AM4372_IOPAD(0x874, PI 214 AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
215 AM4372_IOPAD(0x878, PI 215 AM4372_IOPAD(0x878, PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
216 >; 216 >;
217 }; 217 };
218 218
219 vpfe0_pins_default: vpfe0-default-pins 219 vpfe0_pins_default: vpfe0-default-pins {
220 pinctrl-single,pins = < 220 pinctrl-single,pins = <
221 AM4372_IOPAD(0x9b0, PI 221 AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
222 AM4372_IOPAD(0x9b4, PI 222 AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
223 AM4372_IOPAD(0x9b8, PI 223 AM4372_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/
224 AM4372_IOPAD(0x9bc, PI 224 AM4372_IOPAD(0x9bc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/
225 AM4372_IOPAD(0x9c0, PI 225 AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
226 AM4372_IOPAD(0x9c4, PI 226 AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
227 AM4372_IOPAD(0x9c8, PI 227 AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
228 AM4372_IOPAD(0xa08, PI 228 AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
229 AM4372_IOPAD(0xa0c, PI 229 AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
230 AM4372_IOPAD(0xa10, PI 230 AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
231 AM4372_IOPAD(0xa14, PI 231 AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
232 AM4372_IOPAD(0xa18, PI 232 AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
233 AM4372_IOPAD(0xa1c, PI 233 AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
234 AM4372_IOPAD(0xa20, PI 234 AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
235 AM4372_IOPAD(0xa24, PI 235 AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
236 >; 236 >;
237 }; 237 };
238 238
239 vpfe0_pins_sleep: vpfe0-sleep-pins { 239 vpfe0_pins_sleep: vpfe0-sleep-pins {
240 pinctrl-single,pins = < 240 pinctrl-single,pins = <
241 AM4372_IOPAD(0x9b0, DS 241 AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
242 AM4372_IOPAD(0x9b4, DS 242 AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
243 AM4372_IOPAD(0x9b8, DS 243 AM4372_IOPAD(0x9b8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
244 AM4372_IOPAD(0x9bc, DS 244 AM4372_IOPAD(0x9bc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
245 AM4372_IOPAD(0x9c0, DS 245 AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
246 AM4372_IOPAD(0x9c4, DS 246 AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
247 AM4372_IOPAD(0x9c8, DS 247 AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
248 AM4372_IOPAD(0xa08, DS 248 AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
249 AM4372_IOPAD(0xa0c, DS 249 AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
250 AM4372_IOPAD(0xa10, DS 250 AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
251 AM4372_IOPAD(0xa14, DS 251 AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
252 AM4372_IOPAD(0xa18, DS 252 AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
253 AM4372_IOPAD(0xa1c, DS 253 AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
254 AM4372_IOPAD(0xa20, DS 254 AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
255 AM4372_IOPAD(0xa24, DS 255 AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
256 >; 256 >;
257 }; 257 };
258 258
259 clkout1_pin: clkout1-pins { 259 clkout1_pin: clkout1-pins {
260 pinctrl-single,pins = < 260 pinctrl-single,pins = <
261 0x270 (PIN_OUTPUT_PULL 261 0x270 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR0/CLKOUT1 */
262 >; 262 >;
263 }; 263 };
264 264
265 cpsw_default: cpsw-default-pins { 265 cpsw_default: cpsw-default-pins {
266 pinctrl-single,pins = < 266 pinctrl-single,pins = <
267 /* Slave 1 */ 267 /* Slave 1 */
268 AM4372_IOPAD(0x92c, PI 268 AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
269 AM4372_IOPAD(0x914, PI 269 AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
270 AM4372_IOPAD(0x928, PI 270 AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
271 AM4372_IOPAD(0x924, PI 271 AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
272 AM4372_IOPAD(0x920, PI 272 AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
273 AM4372_IOPAD(0x91c, PI 273 AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
274 AM4372_IOPAD(0x930, PI 274 AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
275 AM4372_IOPAD(0x918, PI 275 AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
276 AM4372_IOPAD(0x940, PI 276 AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
277 AM4372_IOPAD(0x93c, PI 277 AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
278 AM4372_IOPAD(0x938, PI 278 AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
279 AM4372_IOPAD(0x934, PI 279 AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
280 280
281 /* Slave 2 */ 281 /* Slave 2 */
282 AM4372_IOPAD(0x858, PI 282 AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
283 AM4372_IOPAD(0x840, PI 283 AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
284 AM4372_IOPAD(0x854, PI 284 AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
285 AM4372_IOPAD(0x850, PI 285 AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
286 AM4372_IOPAD(0x84c, PI 286 AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
287 AM4372_IOPAD(0x848, PI 287 AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
288 AM4372_IOPAD(0x85c, PI 288 AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
289 AM4372_IOPAD(0x844, PI 289 AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
290 AM4372_IOPAD(0x86c, PI 290 AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
291 AM4372_IOPAD(0x868, PI 291 AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
292 AM4372_IOPAD(0x864, PI 292 AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
293 AM4372_IOPAD(0x860, PI 293 AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
294 >; 294 >;
295 }; 295 };
296 296
297 cpsw_sleep: cpsw-sleep-pins { 297 cpsw_sleep: cpsw-sleep-pins {
298 pinctrl-single,pins = < 298 pinctrl-single,pins = <
299 /* Slave 1 reset value 299 /* Slave 1 reset value */
300 AM4372_IOPAD(0x92c, PI 300 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
301 AM4372_IOPAD(0x914, PI 301 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
302 AM4372_IOPAD(0x928, PI 302 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
303 AM4372_IOPAD(0x924, PI 303 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
304 AM4372_IOPAD(0x920, PI 304 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
305 AM4372_IOPAD(0x91c, PI 305 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
306 AM4372_IOPAD(0x930, PI 306 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
307 AM4372_IOPAD(0x918, PI 307 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
308 AM4372_IOPAD(0x940, PI 308 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
309 AM4372_IOPAD(0x93c, PI 309 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
310 AM4372_IOPAD(0x938, PI 310 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
311 AM4372_IOPAD(0x934, PI 311 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
312 312
313 /* Slave 2 reset value 313 /* Slave 2 reset value */
314 AM4372_IOPAD(0x858, PI 314 AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
315 AM4372_IOPAD(0x840, PI 315 AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
316 AM4372_IOPAD(0x854, PI 316 AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
317 AM4372_IOPAD(0x850, PI 317 AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
318 AM4372_IOPAD(0x84c, PI 318 AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
319 AM4372_IOPAD(0x848, PI 319 AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
320 AM4372_IOPAD(0x85c, PI 320 AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
321 AM4372_IOPAD(0x844, PI 321 AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
322 AM4372_IOPAD(0x86c, PI 322 AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
323 AM4372_IOPAD(0x868, PI 323 AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
324 AM4372_IOPAD(0x864, PI 324 AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
325 AM4372_IOPAD(0x860, PI 325 AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
326 >; 326 >;
327 }; 327 };
328 328
329 davinci_mdio_default: davinci-mdio-def 329 davinci_mdio_default: davinci-mdio-default-pins {
330 pinctrl-single,pins = < 330 pinctrl-single,pins = <
331 /* MDIO */ 331 /* MDIO */
332 AM4372_IOPAD(0x948, PI 332 AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
333 AM4372_IOPAD(0x94c, PI 333 AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
334 >; 334 >;
335 }; 335 };
336 336
337 davinci_mdio_sleep: davinci-mdio-sleep 337 davinci_mdio_sleep: davinci-mdio-sleep-pins {
338 pinctrl-single,pins = < 338 pinctrl-single,pins = <
339 /* MDIO reset value */ 339 /* MDIO reset value */
340 AM4372_IOPAD(0x948, PI 340 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
341 AM4372_IOPAD(0x94c, PI 341 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
342 >; 342 >;
343 }; 343 };
344 344
345 dss_pins: dss-pins { 345 dss_pins: dss-pins {
346 pinctrl-single,pins = < 346 pinctrl-single,pins = <
347 AM4372_IOPAD(0x820, PI 347 AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
348 AM4372_IOPAD(0x824, PI 348 AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)
349 AM4372_IOPAD(0x828, PI 349 AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)
350 AM4372_IOPAD(0x82c, PI 350 AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)
351 AM4372_IOPAD(0x830, PI 351 AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)
352 AM4372_IOPAD(0x834, PI 352 AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)
353 AM4372_IOPAD(0x838, PI 353 AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)
354 AM4372_IOPAD(0x83c, PI 354 AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
355 AM4372_IOPAD(0x8a0, PI 355 AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */
356 AM4372_IOPAD(0x8a4, PI 356 AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)
357 AM4372_IOPAD(0x8a8, PI 357 AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)
358 AM4372_IOPAD(0x8ac, PI 358 AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)
359 AM4372_IOPAD(0x8b0, PI 359 AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)
360 AM4372_IOPAD(0x8b4, PI 360 AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)
361 AM4372_IOPAD(0x8b8, PI 361 AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)
362 AM4372_IOPAD(0x8bc, PI 362 AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)
363 AM4372_IOPAD(0x8c0, PI 363 AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)
364 AM4372_IOPAD(0x8c4, PI 364 AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)
365 AM4372_IOPAD(0x8c8, PI 365 AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)
366 AM4372_IOPAD(0x8cc, PI 366 AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)
367 AM4372_IOPAD(0x8d0, PI 367 AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)
368 AM4372_IOPAD(0x8d4, PI 368 AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)
369 AM4372_IOPAD(0x8d8, PI 369 AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)
370 AM4372_IOPAD(0x8dc, PI 370 AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */
371 AM4372_IOPAD(0x8e0, PI 371 AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
372 AM4372_IOPAD(0x8e4, PI 372 AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
373 AM4372_IOPAD(0x8e8, PI 373 AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */
374 AM4372_IOPAD(0x8ec, PI 374 AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */
375 375
376 >; 376 >;
377 }; 377 };
378 378
379 qspi_pins: qspi-pins { 379 qspi_pins: qspi-pins {
380 pinctrl-single,pins = < 380 pinctrl-single,pins = <
381 AM4372_IOPAD(0x87c, PI 381 AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */
382 AM4372_IOPAD(0x888, PI 382 AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
383 AM4372_IOPAD(0x890, PI 383 AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
384 AM4372_IOPAD(0x894, PI 384 AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
385 AM4372_IOPAD(0x898, PI 385 AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */
386 AM4372_IOPAD(0x89c, PI 386 AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
387 >; 387 >;
388 }; 388 };
389 389
390 mcasp1_pins: mcasp1-pins { 390 mcasp1_pins: mcasp1-pins {
391 pinctrl-single,pins = < 391 pinctrl-single,pins = <
392 AM4372_IOPAD(0x90c, PI 392 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
393 AM4372_IOPAD(0x910, PI 393 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
394 AM4372_IOPAD(0x908, PI 394 AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
395 AM4372_IOPAD(0x944, PI 395 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
396 >; 396 >;
397 }; 397 };
398 398
399 mcasp1_pins_sleep: mcasp1-sleep-pins { 399 mcasp1_pins_sleep: mcasp1-sleep-pins {
400 pinctrl-single,pins = < 400 pinctrl-single,pins = <
401 AM4372_IOPAD(0x90c, PI 401 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
402 AM4372_IOPAD(0x910, PI 402 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
403 AM4372_IOPAD(0x908, PI 403 AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
404 AM4372_IOPAD(0x944, PI 404 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
405 >; 405 >;
406 }; 406 };
407 407
408 lcd_pins: lcd-pins { 408 lcd_pins: lcd-pins {
409 pinctrl-single,pins = < 409 pinctrl-single,pins = <
410 AM4372_IOPAD(0x81c, PI 410 AM4372_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
411 >; 411 >;
412 }; 412 };
413 413
414 usb1_pins: usb1-pins { 414 usb1_pins: usb1-pins {
415 pinctrl-single,pins = < 415 pinctrl-single,pins = <
416 AM4372_IOPAD(0xac0, PI 416 AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
417 >; 417 >;
418 }; 418 };
419 419
420 usb2_pins: usb2-pins { 420 usb2_pins: usb2-pins {
421 pinctrl-single,pins = < 421 pinctrl-single,pins = <
422 AM4372_IOPAD(0xac4, PI 422 AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
423 >; 423 >;
424 }; 424 };
425 425
426 mmc3_pins_default: mmc3-default-pins { 426 mmc3_pins_default: mmc3-default-pins {
427 pinctrl-single,pins = < 427 pinctrl-single,pins = <
428 AM4372_IOPAD(0x9f0, PI 428 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD21) cam1_data2.mmc2_clk */
429 AM4372_IOPAD(0x9f4, PI 429 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE22) cam1_data3.mmc2_cmd */
430 AM4372_IOPAD(0x9f8, PI 430 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD22) cam1_data4.mmc2_dat0 */
431 AM4372_IOPAD(0x9fc, PI 431 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE23) cam1_data5.mmc2_dat1 */
432 AM4372_IOPAD(0xa00, PI 432 AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD23) cam1_data6.mmc2_dat2 */
433 AM4372_IOPAD(0xa04, PI 433 AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE24) cam1_data7.mmc2_dat3 */
434 >; 434 >;
435 }; 435 };
436 436
437 mmc3_pins_sleep: mmc3-sleep-pins { 437 mmc3_pins_sleep: mmc3-sleep-pins {
438 pinctrl-single,pins = < 438 pinctrl-single,pins = <
439 AM4372_IOPAD(0x9f0, PI 439 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD21) cam1_data2.mmc2_clk */
440 AM4372_IOPAD(0x9f4, PI 440 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE22) cam1_data3.mmc2_cmd */
441 AM4372_IOPAD(0x9f8, PI 441 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD22) cam1_data4.mmc2_dat0 */
442 AM4372_IOPAD(0x9fc, PI 442 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE23) cam1_data5.mmc2_dat1 */
443 AM4372_IOPAD(0xa00, PI 443 AM4372_IOPAD(0xa00, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD23) cam1_data6.mmc2_dat2 */
444 AM4372_IOPAD(0xa04, PI 444 AM4372_IOPAD(0xa04, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE24) cam1_data7.mmc2_dat3 */
445 >; 445 >;
446 }; 446 };
447 447
448 wlan_pins_default: wlan-default-pins { 448 wlan_pins_default: wlan-default-pins {
449 pinctrl-single,pins = < 449 pinctrl-single,pins = <
450 AM4372_IOPAD(0x9d0, PI 450 AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */
451 AM4372_IOPAD(0x9e4, PI 451 AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */
452 >; 452 >;
453 }; 453 };
454 454
455 wlan_pins_sleep: wlan-sleep-pins { 455 wlan_pins_sleep: wlan-sleep-pins {
456 pinctrl-single,pins = < 456 pinctrl-single,pins = <
457 AM4372_IOPAD(0x9d0, PI 457 AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */
458 AM4372_IOPAD(0x9e4, PI 458 AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */
459 >; 459 >;
460 }; 460 };
461 461
462 uart1_bt_pins_default: uart1-bt-defaul 462 uart1_bt_pins_default: uart1-bt-default-pins {
463 pinctrl-single,pins = < 463 pinctrl-single,pins = <
464 AM4372_IOPAD(0x980, PI 464 AM4372_IOPAD(0x980, PIN_INPUT | MUX_MODE0) /* uart1_rxd.uart1_rxd */
465 AM4372_IOPAD(0x984, PI 465 AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
466 AM4372_IOPAD(0x978, PI 466 AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
467 AM4372_IOPAD(0x97c, PI 467 AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
468 AM4372_IOPAD(0x9cc, PI 468 AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */
469 >; 469 >;
470 }; 470 };
471 471
472 uart1_bt_pins_sleep: uart1-bt-sleep-pi 472 uart1_bt_pins_sleep: uart1-bt-sleep-pins {
473 pinctrl-single,pins = < 473 pinctrl-single,pins = <
474 AM4372_IOPAD(0x980, PI 474 AM4372_IOPAD(0x980, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rxd.uart1_rxd */
475 AM4372_IOPAD(0x984, PI 475 AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_txd.uart1_txd */
476 AM4372_IOPAD(0x978, PI 476 AM4372_IOPAD(0x978, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */
477 AM4372_IOPAD(0x97c, PI 477 AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */
478 AM4372_IOPAD(0x9cc, PI 478 AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLUP | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */
479 >; 479 >;
480 }; 480 };
481 }; 481 };
482 482
483 &i2c0 { 483 &i2c0 {
484 status = "okay"; 484 status = "okay";
485 pinctrl-names = "default"; 485 pinctrl-names = "default";
486 pinctrl-0 = <&i2c0_pins>; 486 pinctrl-0 = <&i2c0_pins>;
487 clock-frequency = <100000>; 487 clock-frequency = <100000>;
488 488
489 tps@24 { 489 tps@24 {
490 compatible = "ti,tps65218"; 490 compatible = "ti,tps65218";
491 reg = <0x24>; 491 reg = <0x24>;
492 interrupts = <GIC_SPI 7 IRQ_TY 492 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
493 interrupt-controller; 493 interrupt-controller;
494 #interrupt-cells = <2>; 494 #interrupt-cells = <2>;
495 495
496 dcdc1: regulator-dcdc1 { 496 dcdc1: regulator-dcdc1 {
497 /* VDD_CORE limits min 497 /* VDD_CORE limits min of OPP50 and max of OPP100 */
498 regulator-name = "vdd_ 498 regulator-name = "vdd_core";
499 regulator-min-microvol 499 regulator-min-microvolt = <912000>;
500 regulator-max-microvol 500 regulator-max-microvolt = <1144000>;
501 regulator-boot-on; 501 regulator-boot-on;
502 regulator-always-on; 502 regulator-always-on;
503 }; 503 };
504 504
505 dcdc2: regulator-dcdc2 { 505 dcdc2: regulator-dcdc2 {
506 /* VDD_MPU limits min 506 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
507 regulator-name = "vdd_ 507 regulator-name = "vdd_mpu";
508 regulator-min-microvol 508 regulator-min-microvolt = <912000>;
509 regulator-max-microvol 509 regulator-max-microvolt = <1378000>;
510 regulator-boot-on; 510 regulator-boot-on;
511 regulator-always-on; 511 regulator-always-on;
512 }; 512 };
513 513
514 dcdc3: regulator-dcdc3 { 514 dcdc3: regulator-dcdc3 {
515 regulator-name = "vdds 515 regulator-name = "vdds_ddr";
516 regulator-boot-on; 516 regulator-boot-on;
517 regulator-always-on; 517 regulator-always-on;
518 regulator-state-mem { 518 regulator-state-mem {
519 regulator-on-i 519 regulator-on-in-suspend;
520 }; 520 };
521 regulator-state-disk { 521 regulator-state-disk {
522 regulator-off- 522 regulator-off-in-suspend;
523 }; 523 };
524 }; 524 };
525 525
526 dcdc4: regulator-dcdc4 { 526 dcdc4: regulator-dcdc4 {
527 regulator-name = "v3_3 527 regulator-name = "v3_3d";
528 regulator-min-microvol 528 regulator-min-microvolt = <3300000>;
529 regulator-max-microvol 529 regulator-max-microvolt = <3300000>;
530 regulator-boot-on; 530 regulator-boot-on;
531 regulator-always-on; 531 regulator-always-on;
532 }; 532 };
533 533
534 dcdc5: regulator-dcdc5 { 534 dcdc5: regulator-dcdc5 {
535 compatible = "ti,tps65 535 compatible = "ti,tps65218-dcdc5";
536 regulator-name = "v1_0 536 regulator-name = "v1_0bat";
537 regulator-min-microvol 537 regulator-min-microvolt = <1000000>;
538 regulator-max-microvol 538 regulator-max-microvolt = <1000000>;
539 regulator-boot-on; 539 regulator-boot-on;
540 regulator-always-on; 540 regulator-always-on;
541 regulator-state-mem { 541 regulator-state-mem {
542 regulator-on-i 542 regulator-on-in-suspend;
543 }; 543 };
544 }; 544 };
545 545
546 dcdc6: regulator-dcdc6 { 546 dcdc6: regulator-dcdc6 {
547 compatible = "ti,tps65 547 compatible = "ti,tps65218-dcdc6";
548 regulator-name = "v1_8 548 regulator-name = "v1_8bat";
549 regulator-min-microvol 549 regulator-min-microvolt = <1800000>;
550 regulator-max-microvol 550 regulator-max-microvolt = <1800000>;
551 regulator-boot-on; 551 regulator-boot-on;
552 regulator-always-on; 552 regulator-always-on;
553 regulator-state-mem { 553 regulator-state-mem {
554 regulator-on-i 554 regulator-on-in-suspend;
555 }; 555 };
556 }; 556 };
557 557
558 ldo1: regulator-ldo1 { 558 ldo1: regulator-ldo1 {
559 regulator-name = "v1_8 559 regulator-name = "v1_8d";
560 regulator-min-microvol 560 regulator-min-microvolt = <1800000>;
561 regulator-max-microvol 561 regulator-max-microvolt = <1800000>;
562 regulator-boot-on; 562 regulator-boot-on;
563 regulator-always-on; 563 regulator-always-on;
564 }; 564 };
565 565
566 power-button { 566 power-button {
567 compatible = "ti,tps65 567 compatible = "ti,tps65218-pwrbutton";
568 status = "okay"; 568 status = "okay";
569 interrupts = <3 IRQ_TY 569 interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
570 }; 570 };
571 }; 571 };
572 572
573 at24@50 { 573 at24@50 {
574 compatible = "atmel,24c256"; 574 compatible = "atmel,24c256";
575 pagesize = <64>; 575 pagesize = <64>;
576 reg = <0x50>; 576 reg = <0x50>;
577 }; 577 };
578 }; 578 };
579 579
580 &i2c1 { 580 &i2c1 {
581 status = "okay"; 581 status = "okay";
582 pinctrl-names = "default"; 582 pinctrl-names = "default";
583 pinctrl-0 = <&i2c1_pins>; 583 pinctrl-0 = <&i2c1_pins>;
584 clock-frequency = <400000>; 584 clock-frequency = <400000>;
585 585
586 ov2659@30 { 586 ov2659@30 {
587 compatible = "ovti,ov2659"; 587 compatible = "ovti,ov2659";
588 reg = <0x30>; 588 reg = <0x30>;
589 pinctrl-names = "default"; 589 pinctrl-names = "default";
590 pinctrl-0 = <&clkout1_pin>; 590 pinctrl-0 = <&clkout1_pin>;
591 591
592 clocks = <&clkout1_mux_ck>; 592 clocks = <&clkout1_mux_ck>;
593 clock-names = "xvclk"; 593 clock-names = "xvclk";
594 assigned-clocks = <&clkout1_mu 594 assigned-clocks = <&clkout1_mux_ck>;
595 assigned-clock-parents = <&clk 595 assigned-clock-parents = <&clkout1_osc_div_ck>;
596 596
597 port { 597 port {
598 ov2659_1: endpoint { 598 ov2659_1: endpoint {
599 remote-endpoin 599 remote-endpoint = <&vpfe0_ep>;
600 link-frequenci 600 link-frequencies = /bits/ 64 <70000000>;
601 }; 601 };
602 }; 602 };
603 }; 603 };
604 604
605 edt-ft5306@38 { 605 edt-ft5306@38 {
606 status = "okay"; 606 status = "okay";
607 compatible = "edt,edt-ft5306", 607 compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
608 pinctrl-names = "default"; 608 pinctrl-names = "default";
609 pinctrl-0 = <&edt_ft5306_ts_pi 609 pinctrl-0 = <&edt_ft5306_ts_pins>;
610 610
611 reg = <0x38>; 611 reg = <0x38>;
612 interrupt-parent = <&gpio0>; 612 interrupt-parent = <&gpio0>;
613 interrupts = <31 IRQ_TYPE_EDGE 613 interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
614 614
615 reset-gpios = <&gpio1 28 GPIO_ 615 reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
616 616
617 touchscreen-size-x = <480>; 617 touchscreen-size-x = <480>;
618 touchscreen-size-y = <272>; 618 touchscreen-size-y = <272>;
619 619
620 wakeup-source; 620 wakeup-source;
621 }; 621 };
622 622
623 tlv320aic3106: tlv320aic3106@1b { 623 tlv320aic3106: tlv320aic3106@1b {
624 #sound-dai-cells = <0>; 624 #sound-dai-cells = <0>;
625 compatible = "ti,tlv320aic3106 625 compatible = "ti,tlv320aic3106";
626 reg = <0x1b>; 626 reg = <0x1b>;
627 status = "okay"; 627 status = "okay";
628 628
629 /* Regulators */ 629 /* Regulators */
630 AVDD-supply = <&dcdc4>; 630 AVDD-supply = <&dcdc4>;
631 IOVDD-supply = <&dcdc4>; 631 IOVDD-supply = <&dcdc4>;
632 DRVDD-supply = <&dcdc4>; 632 DRVDD-supply = <&dcdc4>;
633 DVDD-supply = <&ldo1>; 633 DVDD-supply = <&ldo1>;
634 }; 634 };
635 635
636 lis331dlh@18 { 636 lis331dlh@18 {
637 compatible = "st,lis331dlh"; 637 compatible = "st,lis331dlh";
638 reg = <0x18>; 638 reg = <0x18>;
639 status = "okay"; 639 status = "okay";
640 640
641 Vdd-supply = <&dcdc4>; 641 Vdd-supply = <&dcdc4>;
642 Vdd_IO-supply = <&dcdc4>; 642 Vdd_IO-supply = <&dcdc4>;
643 interrupts-extended = <&gpio1 643 interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
644 }; 644 };
645 }; 645 };
646 646
647 &epwmss0 { 647 &epwmss0 {
648 status = "okay"; 648 status = "okay";
649 }; 649 };
650 650
651 &ecap0 { 651 &ecap0 {
652 status = "okay"; 652 status = "okay";
653 pinctrl-names = "default"; 653 pinctrl-names = "default";
654 pinctrl-0 = <&ecap0_pins>; 654 pinctrl-0 = <&ecap0_pins>;
655 }; 655 };
656 656
657 &gpio0 { 657 &gpio0 {
658 status = "okay"; 658 status = "okay";
659 }; 659 };
660 660
661 &gpio1 { 661 &gpio1 {
662 status = "okay"; 662 status = "okay";
663 }; 663 };
664 664
665 &gpio4 { 665 &gpio4 {
666 status = "okay"; 666 status = "okay";
667 }; 667 };
668 668
669 &gpio5 { 669 &gpio5 {
670 status = "okay"; 670 status = "okay";
671 }; 671 };
672 672
673 &mmc1 { 673 &mmc1 {
674 status = "okay"; 674 status = "okay";
675 pinctrl-names = "default"; 675 pinctrl-names = "default";
676 pinctrl-0 = <&mmc1_pins>; 676 pinctrl-0 = <&mmc1_pins>;
677 677
678 vmmc-supply = <&dcdc4>; 678 vmmc-supply = <&dcdc4>;
679 bus-width = <4>; 679 bus-width = <4>;
680 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 680 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
681 }; 681 };
682 682
683 &uart1 { 683 &uart1 {
684 status = "okay"; 684 status = "okay";
685 pinctrl-names = "default", "sleep"; 685 pinctrl-names = "default", "sleep";
686 pinctrl-0 = <&uart1_bt_pins_default>; 686 pinctrl-0 = <&uart1_bt_pins_default>;
687 pinctrl-1 = <&uart1_bt_pins_sleep>; 687 pinctrl-1 = <&uart1_bt_pins_sleep>;
688 }; 688 };
689 689
690 &mmc3 { 690 &mmc3 {
691 status = "okay"; 691 status = "okay";
692 /* 692 /*
693 * these are on the crossbar and are o 693 * these are on the crossbar and are outlined in the
694 * xbar-event-map element 694 * xbar-event-map element
695 */ 695 */
696 dmas = <&edma_xbar 30 0 1>, 696 dmas = <&edma_xbar 30 0 1>,
697 <&edma_xbar 31 0 2>; 697 <&edma_xbar 31 0 2>;
698 dma-names = "tx", "rx"; 698 dma-names = "tx", "rx";
699 vmmc-supply = <&vmmcwl_fixed>; 699 vmmc-supply = <&vmmcwl_fixed>;
700 bus-width = <4>; 700 bus-width = <4>;
701 pinctrl-names = "default", "sleep"; 701 pinctrl-names = "default", "sleep";
702 pinctrl-0 = <&mmc3_pins_default>; 702 pinctrl-0 = <&mmc3_pins_default>;
703 pinctrl-1 = <&mmc3_pins_sleep>; 703 pinctrl-1 = <&mmc3_pins_sleep>;
704 cap-power-off-card; 704 cap-power-off-card;
705 keep-power-in-suspend; 705 keep-power-in-suspend;
706 non-removable; 706 non-removable;
707 707
708 #address-cells = <1>; 708 #address-cells = <1>;
709 #size-cells = <0>; 709 #size-cells = <0>;
710 wlcore: wlcore@2 { 710 wlcore: wlcore@2 {
711 compatible = "ti,wl1835"; 711 compatible = "ti,wl1835";
712 pinctrl-names = "default", "sl 712 pinctrl-names = "default", "sleep";
713 pinctrl-0 = <&wlan_pins_defaul 713 pinctrl-0 = <&wlan_pins_default>;
714 pinctrl-1 = <&wlan_pins_sleep> 714 pinctrl-1 = <&wlan_pins_sleep>;
715 reg = <2>; 715 reg = <2>;
716 interrupt-parent = <&gpio4>; 716 interrupt-parent = <&gpio4>;
717 interrupts = <13 IRQ_TYPE_LEVE 717 interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
718 }; 718 };
719 }; 719 };
720 720
721 &usb2_phy1 { 721 &usb2_phy1 {
722 status = "okay"; 722 status = "okay";
723 }; 723 };
724 724
725 &usb1 { 725 &usb1 {
726 dr_mode = "otg"; 726 dr_mode = "otg";
727 status = "okay"; 727 status = "okay";
728 pinctrl-names = "default"; 728 pinctrl-names = "default";
729 pinctrl-0 = <&usb1_pins>; 729 pinctrl-0 = <&usb1_pins>;
730 }; 730 };
731 731
732 &usb2_phy2 { 732 &usb2_phy2 {
733 status = "okay"; 733 status = "okay";
734 }; 734 };
735 735
736 &usb2 { 736 &usb2 {
737 dr_mode = "host"; 737 dr_mode = "host";
738 status = "okay"; 738 status = "okay";
739 pinctrl-names = "default"; 739 pinctrl-names = "default";
740 pinctrl-0 = <&usb2_pins>; 740 pinctrl-0 = <&usb2_pins>;
741 }; 741 };
742 742
743 &qspi { 743 &qspi {
744 status = "okay"; 744 status = "okay";
745 pinctrl-names = "default"; 745 pinctrl-names = "default";
746 pinctrl-0 = <&qspi_pins>; 746 pinctrl-0 = <&qspi_pins>;
747 747
748 spi-max-frequency = <48000000>; 748 spi-max-frequency = <48000000>;
749 flash@0 { 749 flash@0 {
750 compatible = "mx66l51235l"; 750 compatible = "mx66l51235l";
751 spi-max-frequency = <48000000> 751 spi-max-frequency = <48000000>;
752 reg = <0>; 752 reg = <0>;
753 spi-cpol; 753 spi-cpol;
754 spi-cpha; 754 spi-cpha;
755 spi-tx-bus-width = <1>; 755 spi-tx-bus-width = <1>;
756 spi-rx-bus-width = <4>; 756 spi-rx-bus-width = <4>;
757 #address-cells = <1>; 757 #address-cells = <1>;
758 #size-cells = <1>; 758 #size-cells = <1>;
759 759
760 /* MTD partition table. 760 /* MTD partition table.
761 * The ROM checks the first 51 761 * The ROM checks the first 512KiB
762 * for a valid file to boot(XI 762 * for a valid file to boot(XIP).
763 */ 763 */
764 partition@0 { 764 partition@0 {
765 label = "QSPI.U_BOOT"; 765 label = "QSPI.U_BOOT";
766 reg = <0x00000000 0x00 766 reg = <0x00000000 0x00080000>;
767 }; 767 };
768 partition@1 { 768 partition@1 {
769 label = "QSPI.U_BOOT.b 769 label = "QSPI.U_BOOT.backup";
770 reg = <0x00080000 0x00 770 reg = <0x00080000 0x00080000>;
771 }; 771 };
772 partition@2 { 772 partition@2 {
773 label = "QSPI.U-BOOT-S 773 label = "QSPI.U-BOOT-SPL_OS";
774 reg = <0x00100000 0x00 774 reg = <0x00100000 0x00010000>;
775 }; 775 };
776 partition@3 { 776 partition@3 {
777 label = "QSPI.U_BOOT_E 777 label = "QSPI.U_BOOT_ENV";
778 reg = <0x00110000 0x00 778 reg = <0x00110000 0x00010000>;
779 }; 779 };
780 partition@4 { 780 partition@4 {
781 label = "QSPI.U-BOOT-E 781 label = "QSPI.U-BOOT-ENV.backup";
782 reg = <0x00120000 0x00 782 reg = <0x00120000 0x00010000>;
783 }; 783 };
784 partition@5 { 784 partition@5 {
785 label = "QSPI.KERNEL"; 785 label = "QSPI.KERNEL";
786 reg = <0x00130000 0x08 786 reg = <0x00130000 0x0800000>;
787 }; 787 };
788 partition@6 { 788 partition@6 {
789 label = "QSPI.FILESYST 789 label = "QSPI.FILESYSTEM";
790 reg = <0x00930000 0x36 790 reg = <0x00930000 0x36D0000>;
791 }; 791 };
792 }; 792 };
793 }; 793 };
794 794
795 &mac_sw { 795 &mac_sw {
796 pinctrl-names = "default", "sleep"; 796 pinctrl-names = "default", "sleep";
797 pinctrl-0 = <&cpsw_default>; 797 pinctrl-0 = <&cpsw_default>;
798 pinctrl-1 = <&cpsw_sleep>; 798 pinctrl-1 = <&cpsw_sleep>;
799 status = "okay"; 799 status = "okay";
800 }; 800 };
801 801
802 &davinci_mdio_sw { 802 &davinci_mdio_sw {
803 pinctrl-names = "default", "sleep"; 803 pinctrl-names = "default", "sleep";
804 pinctrl-0 = <&davinci_mdio_default>; 804 pinctrl-0 = <&davinci_mdio_default>;
805 pinctrl-1 = <&davinci_mdio_sleep>; 805 pinctrl-1 = <&davinci_mdio_sleep>;
806 806
807 ethphy0: ethernet-phy@4 { 807 ethphy0: ethernet-phy@4 {
808 reg = <4>; 808 reg = <4>;
809 }; 809 };
810 810
811 ethphy1: ethernet-phy@5 { 811 ethphy1: ethernet-phy@5 {
812 reg = <5>; 812 reg = <5>;
813 }; 813 };
814 }; 814 };
815 815
816 &cpsw_port1 { 816 &cpsw_port1 {
817 phy-handle = <ðphy0>; 817 phy-handle = <ðphy0>;
818 phy-mode = "rgmii-rxid"; 818 phy-mode = "rgmii-rxid";
819 ti,dual-emac-pvid = <1>; 819 ti,dual-emac-pvid = <1>;
820 }; 820 };
821 821
822 &cpsw_port2 { 822 &cpsw_port2 {
823 phy-handle = <ðphy1>; 823 phy-handle = <ðphy1>;
824 phy-mode = "rgmii-rxid"; 824 phy-mode = "rgmii-rxid";
825 ti,dual-emac-pvid = <2>; 825 ti,dual-emac-pvid = <2>;
826 }; 826 };
827 827
828 &elm { 828 &elm {
829 status = "okay"; 829 status = "okay";
830 }; 830 };
831 831
832 &mcasp1 { 832 &mcasp1 {
833 #sound-dai-cells = <0>; 833 #sound-dai-cells = <0>;
834 pinctrl-names = "default", "sleep"; 834 pinctrl-names = "default", "sleep";
835 pinctrl-0 = <&mcasp1_pins>; 835 pinctrl-0 = <&mcasp1_pins>;
836 pinctrl-1 = <&mcasp1_pins_sleep>; 836 pinctrl-1 = <&mcasp1_pins_sleep>;
837 837
838 status = "okay"; 838 status = "okay";
839 839
840 op-mode = <0>; 840 op-mode = <0>;
841 tdm-slots = <2>; 841 tdm-slots = <2>;
842 serial-dir = < 842 serial-dir = <
843 0 0 1 2 843 0 0 1 2
844 >; 844 >;
845 845
846 tx-num-evt = <1>; 846 tx-num-evt = <1>;
847 rx-num-evt = <1>; 847 rx-num-evt = <1>;
848 }; 848 };
849 849
850 &dss { 850 &dss {
851 status = "okay"; 851 status = "okay";
852 852
853 pinctrl-names = "default"; 853 pinctrl-names = "default";
854 pinctrl-0 = <&dss_pins>; 854 pinctrl-0 = <&dss_pins>;
855 855
856 port { 856 port {
857 dpi_out: endpoint@0 { 857 dpi_out: endpoint@0 {
858 remote-endpoint = <&lc 858 remote-endpoint = <&lcd_in>;
859 data-lines = <24>; 859 data-lines = <24>;
860 }; 860 };
861 }; 861 };
862 }; 862 };
863 863
864 &rtc { 864 &rtc {
865 clocks = <&clk_32k_rtc>, <&clk_32768_c 865 clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
866 clock-names = "ext-clk", "int-clk"; 866 clock-names = "ext-clk", "int-clk";
867 status = "okay"; 867 status = "okay";
868 }; 868 };
869 869
870 &wdt { 870 &wdt {
871 status = "okay"; 871 status = "okay";
872 }; 872 };
873 873
874 &cpu { 874 &cpu {
875 cpu0-supply = <&dcdc2>; 875 cpu0-supply = <&dcdc2>;
876 }; 876 };
877 877
878 &vpfe0 { 878 &vpfe0 {
879 status = "okay"; 879 status = "okay";
880 pinctrl-names = "default", "sleep"; 880 pinctrl-names = "default", "sleep";
881 pinctrl-0 = <&vpfe0_pins_default>; 881 pinctrl-0 = <&vpfe0_pins_default>;
882 pinctrl-1 = <&vpfe0_pins_sleep>; 882 pinctrl-1 = <&vpfe0_pins_sleep>;
883 883
884 /* Camera port */ 884 /* Camera port */
885 port { 885 port {
886 vpfe0_ep: endpoint { 886 vpfe0_ep: endpoint {
887 remote-endpoint = <&ov 887 remote-endpoint = <&ov2659_1>;
888 ti,am437x-vpfe-interfa 888 ti,am437x-vpfe-interface = <0>;
889 bus-width = <8>; 889 bus-width = <8>;
890 hsync-active = <0>; 890 hsync-active = <0>;
891 vsync-active = <0>; 891 vsync-active = <0>;
892 }; 892 };
893 }; 893 };
894 }; 894 };
895 895
896 &wkup_m3_ipc { 896 &wkup_m3_ipc {
897 firmware-name = "am43x-evm-scale-data. 897 firmware-name = "am43x-evm-scale-data.bin";
898 }; 898 };
899 899
900 &pruss1_mdio { 900 &pruss1_mdio {
901 status = "disabled"; 901 status = "disabled";
902 }; 902 };
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