1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * Copyright (C) 2017 Texas Instruments Incorp 3 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
4 */ 4 */
5 /dts-v1/; 5 /dts-v1/;
6 6
7 #include "dra76x.dtsi" 7 #include "dra76x.dtsi"
8 #include "dra7-evm-common.dtsi" 8 #include "dra7-evm-common.dtsi"
9 #include "dra76x-mmc-iodelay.dtsi" 9 #include "dra76x-mmc-iodelay.dtsi"
10 #include <dt-bindings/net/ti-dp83867.h> 10 #include <dt-bindings/net/ti-dp83867.h>
11 11
12 / { 12 / {
13 model = "TI DRA762 EVM"; 13 model = "TI DRA762 EVM";
14 compatible = "ti,dra76-evm", "ti,dra76 14 compatible = "ti,dra76-evm", "ti,dra762", "ti,dra7";
15 15
16 aliases { 16 aliases {
17 display0 = &hdmi0; 17 display0 = &hdmi0;
18 18
19 sound0 = &sound0; 19 sound0 = &sound0;
20 sound1 = &hdmi; 20 sound1 = &hdmi;
21 }; 21 };
22 22
23 memory@0 { 23 memory@0 {
24 device_type = "memory"; 24 device_type = "memory";
25 reg = <0x0 0x80000000 0x0 0x80 25 reg = <0x0 0x80000000 0x0 0x80000000>;
26 }; 26 };
27 27
28 reserved-memory { 28 reserved-memory {
29 #address-cells = <2>; 29 #address-cells = <2>;
30 #size-cells = <2>; 30 #size-cells = <2>;
31 ranges; 31 ranges;
32 32
33 ipu2_cma_pool: ipu2_cma@958000 33 ipu2_cma_pool: ipu2_cma@95800000 {
34 compatible = "shared-d 34 compatible = "shared-dma-pool";
35 reg = <0x0 0x95800000 35 reg = <0x0 0x95800000 0x0 0x3800000>;
36 reusable; 36 reusable;
37 status = "okay"; 37 status = "okay";
38 }; 38 };
39 39
40 dsp1_cma_pool: dsp1_cma@990000 40 dsp1_cma_pool: dsp1_cma@99000000 {
41 compatible = "shared-d 41 compatible = "shared-dma-pool";
42 reg = <0x0 0x99000000 42 reg = <0x0 0x99000000 0x0 0x4000000>;
43 reusable; 43 reusable;
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 46
47 ipu1_cma_pool: ipu1_cma@9d0000 47 ipu1_cma_pool: ipu1_cma@9d000000 {
48 compatible = "shared-d 48 compatible = "shared-dma-pool";
49 reg = <0x0 0x9d000000 49 reg = <0x0 0x9d000000 0x0 0x2000000>;
50 reusable; 50 reusable;
51 status = "okay"; 51 status = "okay";
52 }; 52 };
53 53
54 dsp2_cma_pool: dsp2_cma@9f0000 54 dsp2_cma_pool: dsp2_cma@9f000000 {
55 compatible = "shared-d 55 compatible = "shared-dma-pool";
56 reg = <0x0 0x9f000000 56 reg = <0x0 0x9f000000 0x0 0x800000>;
57 reusable; 57 reusable;
58 status = "okay"; 58 status = "okay";
59 }; 59 };
60 }; 60 };
61 61
62 vsys_12v0: fixedregulator-vsys12v0 { 62 vsys_12v0: fixedregulator-vsys12v0 {
63 /* main supply */ 63 /* main supply */
64 compatible = "regulator-fixed" 64 compatible = "regulator-fixed";
65 regulator-name = "vsys_12v0"; 65 regulator-name = "vsys_12v0";
66 regulator-min-microvolt = <120 66 regulator-min-microvolt = <12000000>;
67 regulator-max-microvolt = <120 67 regulator-max-microvolt = <12000000>;
68 regulator-always-on; 68 regulator-always-on;
69 regulator-boot-on; 69 regulator-boot-on;
70 }; 70 };
71 71
72 vsys_5v0: fixedregulator-vsys5v0 { 72 vsys_5v0: fixedregulator-vsys5v0 {
73 /* Output of Cntlr B of TPS433 73 /* Output of Cntlr B of TPS43351-Q1 on dra76-evm */
74 compatible = "regulator-fixed" 74 compatible = "regulator-fixed";
75 regulator-name = "vsys_5v0"; 75 regulator-name = "vsys_5v0";
76 regulator-min-microvolt = <500 76 regulator-min-microvolt = <5000000>;
77 regulator-max-microvolt = <500 77 regulator-max-microvolt = <5000000>;
78 vin-supply = <&vsys_12v0>; 78 vin-supply = <&vsys_12v0>;
79 regulator-always-on; 79 regulator-always-on;
80 regulator-boot-on; 80 regulator-boot-on;
81 }; 81 };
82 82
83 vio_3v6: fixedregulator-vio_3v6 { 83 vio_3v6: fixedregulator-vio_3v6 {
84 compatible = "regulator-fixed" 84 compatible = "regulator-fixed";
85 regulator-name = "vio_3v6"; 85 regulator-name = "vio_3v6";
86 regulator-min-microvolt = <360 86 regulator-min-microvolt = <3600000>;
87 regulator-max-microvolt = <360 87 regulator-max-microvolt = <3600000>;
88 vin-supply = <&vsys_5v0>; 88 vin-supply = <&vsys_5v0>;
89 regulator-always-on; 89 regulator-always-on;
90 regulator-boot-on; 90 regulator-boot-on;
91 }; 91 };
92 92
93 vsys_3v3: fixedregulator-vsys3v3 { 93 vsys_3v3: fixedregulator-vsys3v3 {
94 /* Output of Cntlr A of TPS433 94 /* Output of Cntlr A of TPS43351-Q1 on dra76-evm */
95 compatible = "regulator-fixed" 95 compatible = "regulator-fixed";
96 regulator-name = "vsys_3v3"; 96 regulator-name = "vsys_3v3";
97 regulator-min-microvolt = <330 97 regulator-min-microvolt = <3300000>;
98 regulator-max-microvolt = <330 98 regulator-max-microvolt = <3300000>;
99 vin-supply = <&vsys_12v0>; 99 vin-supply = <&vsys_12v0>;
100 regulator-always-on; 100 regulator-always-on;
101 regulator-boot-on; 101 regulator-boot-on;
102 }; 102 };
103 103
104 vio_3v3: fixedregulator-vio_3v3 { 104 vio_3v3: fixedregulator-vio_3v3 {
105 compatible = "regulator-fixed" 105 compatible = "regulator-fixed";
106 regulator-name = "vio_3v3"; 106 regulator-name = "vio_3v3";
107 regulator-min-microvolt = <330 107 regulator-min-microvolt = <3300000>;
108 regulator-max-microvolt = <330 108 regulator-max-microvolt = <3300000>;
109 vin-supply = <&vsys_3v3>; 109 vin-supply = <&vsys_3v3>;
110 regulator-always-on; 110 regulator-always-on;
111 regulator-boot-on; 111 regulator-boot-on;
112 }; 112 };
113 113
114 vio_3v3_sd: fixedregulator-sd { 114 vio_3v3_sd: fixedregulator-sd {
115 compatible = "regulator-fixed" 115 compatible = "regulator-fixed";
116 regulator-name = "vio_3v3_sd"; 116 regulator-name = "vio_3v3_sd";
117 regulator-min-microvolt = <330 117 regulator-min-microvolt = <3300000>;
118 regulator-max-microvolt = <330 118 regulator-max-microvolt = <3300000>;
119 vin-supply = <&vio_3v3>; 119 vin-supply = <&vio_3v3>;
120 enable-active-high; 120 enable-active-high;
121 gpio = <&gpio4 21 GPIO_ACTIVE_ 121 gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
122 }; 122 };
123 123
124 vio_1v8: fixedregulator-vio_1v8 { 124 vio_1v8: fixedregulator-vio_1v8 {
125 compatible = "regulator-fixed" 125 compatible = "regulator-fixed";
126 regulator-name = "vio_1v8"; 126 regulator-name = "vio_1v8";
127 regulator-min-microvolt = <180 127 regulator-min-microvolt = <1800000>;
128 regulator-max-microvolt = <180 128 regulator-max-microvolt = <1800000>;
129 vin-supply = <&smps5_reg>; 129 vin-supply = <&smps5_reg>;
130 }; 130 };
131 131
132 vmmcwl_fixed: fixedregulator-mmcwl { 132 vmmcwl_fixed: fixedregulator-mmcwl {
133 compatible = "regulator-fixed" 133 compatible = "regulator-fixed";
134 regulator-name = "vmmcwl_fixed 134 regulator-name = "vmmcwl_fixed";
135 regulator-min-microvolt = <180 135 regulator-min-microvolt = <1800000>;
136 regulator-max-microvolt = <180 136 regulator-max-microvolt = <1800000>;
137 gpio = <&gpio5 8 0>; /* gpi 137 gpio = <&gpio5 8 0>; /* gpio5_8 */
138 startup-delay-us = <70000>; 138 startup-delay-us = <70000>;
139 enable-active-high; 139 enable-active-high;
140 }; 140 };
141 141
142 vtt_fixed: fixedregulator-vtt { 142 vtt_fixed: fixedregulator-vtt {
143 compatible = "regulator-fixed" 143 compatible = "regulator-fixed";
144 regulator-name = "vtt_fixed"; 144 regulator-name = "vtt_fixed";
145 regulator-min-microvolt = <135 145 regulator-min-microvolt = <1350000>;
146 regulator-max-microvolt = <135 146 regulator-max-microvolt = <1350000>;
147 vin-supply = <&vsys_3v3>; 147 vin-supply = <&vsys_3v3>;
148 regulator-always-on; 148 regulator-always-on;
149 regulator-boot-on; 149 regulator-boot-on;
150 }; 150 };
151 151
152 aic_dvdd: fixedregulator-aic_dvdd { 152 aic_dvdd: fixedregulator-aic_dvdd {
153 /* TPS77018DBVT */ 153 /* TPS77018DBVT */
154 compatible = "regulator-fixed" 154 compatible = "regulator-fixed";
155 regulator-name = "aic_dvdd"; 155 regulator-name = "aic_dvdd";
156 vin-supply = <&vio_3v3>; 156 vin-supply = <&vio_3v3>;
157 regulator-min-microvolt = <180 157 regulator-min-microvolt = <1800000>;
158 regulator-max-microvolt = <180 158 regulator-max-microvolt = <1800000>;
159 }; 159 };
160 160
161 hdmi0: connector { 161 hdmi0: connector {
162 compatible = "hdmi-connector"; 162 compatible = "hdmi-connector";
163 label = "hdmi"; 163 label = "hdmi";
164 164
165 type = "a"; 165 type = "a";
166 166
167 port { 167 port {
168 hdmi_connector_in: end 168 hdmi_connector_in: endpoint {
169 remote-endpoin 169 remote-endpoint = <&tpd12s015_out>;
170 }; 170 };
171 }; 171 };
172 }; 172 };
173 173
174 tpd12s015: encoder { 174 tpd12s015: encoder {
175 compatible = "ti,tpd12s015"; 175 compatible = "ti,tpd12s015";
176 176
177 gpios = <&gpio7 30 GPIO_ACTIVE 177 gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>, /* gpio7_30, CT CP HPD */
178 <&gpio7 31 GPIO_ACTIVE 178 <&gpio7 31 GPIO_ACTIVE_HIGH>, /* gpio7_31, LS OE */
179 <&gpio7 12 GPIO_ACTIVE 179 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
180 180
181 ports { 181 ports {
182 #address-cells = <1>; 182 #address-cells = <1>;
183 #size-cells = <0>; 183 #size-cells = <0>;
184 184
185 port@0 { 185 port@0 {
186 reg = <0>; 186 reg = <0>;
187 187
188 tpd12s015_in: 188 tpd12s015_in: endpoint {
189 remote 189 remote-endpoint = <&hdmi_out>;
190 }; 190 };
191 }; 191 };
192 192
193 port@1 { 193 port@1 {
194 reg = <1>; 194 reg = <1>;
195 195
196 tpd12s015_out: 196 tpd12s015_out: endpoint {
197 remote 197 remote-endpoint = <&hdmi_connector_in>;
198 }; 198 };
199 }; 199 };
200 }; 200 };
201 }; 201 };
202 }; 202 };
203 203
204 &i2c1 { 204 &i2c1 {
205 status = "okay"; 205 status = "okay";
206 clock-frequency = <400000>; 206 clock-frequency = <400000>;
207 207
208 tps65917: tps65917@58 { 208 tps65917: tps65917@58 {
209 compatible = "ti,tps65917"; 209 compatible = "ti,tps65917";
210 reg = <0x58>; 210 reg = <0x58>;
211 ti,system-power-controller; 211 ti,system-power-controller;
212 ti,palmas-override-powerhold; 212 ti,palmas-override-powerhold;
213 interrupt-controller; 213 interrupt-controller;
214 #interrupt-cells = <2>; 214 #interrupt-cells = <2>;
215 215
216 tps65917_pmic { 216 tps65917_pmic {
217 compatible = "ti,tps65 217 compatible = "ti,tps65917-pmic";
218 218
219 smps12-in-supply = <&v 219 smps12-in-supply = <&vsys_3v3>;
220 smps3-in-supply = <&vs 220 smps3-in-supply = <&vsys_3v3>;
221 smps4-in-supply = <&vs 221 smps4-in-supply = <&vsys_3v3>;
222 smps5-in-supply = <&vs 222 smps5-in-supply = <&vsys_3v3>;
223 ldo1-in-supply = <&vsy 223 ldo1-in-supply = <&vsys_3v3>;
224 ldo2-in-supply = <&vsy 224 ldo2-in-supply = <&vsys_3v3>;
225 ldo3-in-supply = <&vsy 225 ldo3-in-supply = <&vsys_5v0>;
226 ldo4-in-supply = <&vsy 226 ldo4-in-supply = <&vsys_5v0>;
227 ldo5-in-supply = <&vsy 227 ldo5-in-supply = <&vsys_3v3>;
228 228
229 tps65917_regulators: r 229 tps65917_regulators: regulators {
230 smps12_reg: sm 230 smps12_reg: smps12 {
231 /* VDD 231 /* VDD_DSPEVE */
232 regula 232 regulator-name = "smps12";
233 regula 233 regulator-min-microvolt = <850000>;
234 regula 234 regulator-max-microvolt = <1250000>;
235 regula 235 regulator-always-on;
236 regula 236 regulator-boot-on;
237 }; 237 };
238 238
239 smps3_reg: smp 239 smps3_reg: smps3 {
240 /* VDD 240 /* VDD_CORE */
241 regula 241 regulator-name = "smps3";
242 regula 242 regulator-min-microvolt = <850000>;
243 regula 243 regulator-max-microvolt = <1250000>;
244 regula 244 regulator-boot-on;
245 regula 245 regulator-always-on;
246 }; 246 };
247 247
248 smps4_reg: smp 248 smps4_reg: smps4 {
249 /* VDD 249 /* VDD_IVA */
250 regula 250 regulator-name = "smps4";
251 regula 251 regulator-min-microvolt = <850000>;
252 regula 252 regulator-max-microvolt = <1250000>;
253 regula 253 regulator-always-on;
254 regula 254 regulator-boot-on;
255 }; 255 };
256 256
257 smps5_reg: smp 257 smps5_reg: smps5 {
258 /* VDD 258 /* VDDS1V8 */
259 regula 259 regulator-name = "smps5";
260 regula 260 regulator-min-microvolt = <1800000>;
261 regula 261 regulator-max-microvolt = <1800000>;
262 regula 262 regulator-boot-on;
263 regula 263 regulator-always-on;
264 }; 264 };
265 265
266 ldo1_reg: ldo1 266 ldo1_reg: ldo1 {
267 /* LDO 267 /* LDO1_OUT --> VDA_PHY1_1V8 */
268 regula 268 regulator-name = "ldo1";
269 regula 269 regulator-min-microvolt = <1800000>;
270 regula 270 regulator-max-microvolt = <1800000>;
271 regula 271 regulator-always-on;
272 regula 272 regulator-boot-on;
273 regula 273 regulator-allow-bypass;
274 }; 274 };
275 275
276 ldo2_reg: ldo2 276 ldo2_reg: ldo2 {
277 /* LDO 277 /* LDO2_OUT --> VDA_PHY2_1V8 */
278 regula 278 regulator-name = "ldo2";
279 regula 279 regulator-min-microvolt = <1800000>;
280 regula 280 regulator-max-microvolt = <1800000>;
281 regula 281 regulator-allow-bypass;
282 regula 282 regulator-always-on;
283 }; 283 };
284 284
285 ldo3_reg: ldo3 285 ldo3_reg: ldo3 {
286 /* VDA 286 /* VDA_USB_3V3 */
287 regula 287 regulator-name = "ldo3";
288 regula 288 regulator-min-microvolt = <3300000>;
289 regula 289 regulator-max-microvolt = <3300000>;
290 regula 290 regulator-boot-on;
291 regula 291 regulator-always-on;
292 }; 292 };
293 293
294 ldo5_reg: ldo5 294 ldo5_reg: ldo5 {
295 /* VDD 295 /* VDDA_1V8_PLL */
296 regula 296 regulator-name = "ldo5";
297 regula 297 regulator-min-microvolt = <1800000>;
298 regula 298 regulator-max-microvolt = <1800000>;
299 regula 299 regulator-always-on;
300 regula 300 regulator-boot-on;
301 }; 301 };
302 302
303 ldo4_reg: ldo4 303 ldo4_reg: ldo4 {
304 /* VDD 304 /* VDD_SDIO_DV */
305 regula 305 regulator-name = "ldo4";
306 regula 306 regulator-min-microvolt = <1800000>;
307 regula 307 regulator-max-microvolt = <3300000>;
308 regula 308 regulator-boot-on;
309 regula 309 regulator-always-on;
310 }; 310 };
311 }; 311 };
312 }; 312 };
313 313
314 tps65917_power_button { 314 tps65917_power_button {
315 compatible = "ti,palma 315 compatible = "ti,palmas-pwrbutton";
316 interrupt-parent = <&t 316 interrupt-parent = <&tps65917>;
317 interrupts = <1 IRQ_TY 317 interrupts = <1 IRQ_TYPE_NONE>;
318 wakeup-source; 318 wakeup-source;
319 ti,palmas-long-press-s 319 ti,palmas-long-press-seconds = <6>;
320 }; 320 };
321 }; 321 };
322 322
323 lp87565: lp87565@60 { 323 lp87565: lp87565@60 {
324 compatible = "ti,lp87565-q1"; 324 compatible = "ti,lp87565-q1";
325 reg = <0x60>; 325 reg = <0x60>;
326 326
327 buck10-in-supply =<&vsys_3v3>; 327 buck10-in-supply =<&vsys_3v3>;
328 buck23-in-supply =<&vsys_3v3>; 328 buck23-in-supply =<&vsys_3v3>;
329 329
330 regulators: regulators { 330 regulators: regulators {
331 buck10_reg: buck10 { 331 buck10_reg: buck10 {
332 /*VDD_MPU*/ 332 /*VDD_MPU*/
333 regulator-name 333 regulator-name = "buck10";
334 regulator-min- 334 regulator-min-microvolt = <850000>;
335 regulator-max- 335 regulator-max-microvolt = <1250000>;
336 regulator-alwa 336 regulator-always-on;
337 regulator-boot 337 regulator-boot-on;
338 }; 338 };
339 339
340 buck23_reg: buck23 { 340 buck23_reg: buck23 {
341 /* VDD_GPU*/ 341 /* VDD_GPU*/
342 regulator-name 342 regulator-name = "buck23";
343 regulator-min- 343 regulator-min-microvolt = <850000>;
344 regulator-max- 344 regulator-max-microvolt = <1250000>;
345 regulator-boot 345 regulator-boot-on;
346 regulator-alwa 346 regulator-always-on;
347 }; 347 };
348 }; 348 };
349 }; 349 };
350 350
351 pcf_lcd: pcf8757@20 { 351 pcf_lcd: pcf8757@20 {
352 compatible = "nxp,pcf8575"; 352 compatible = "nxp,pcf8575";
353 reg = <0x20>; 353 reg = <0x20>;
354 gpio-controller; 354 gpio-controller;
355 #gpio-cells = <2>; 355 #gpio-cells = <2>;
356 interrupt-controller; 356 interrupt-controller;
357 #interrupt-cells = <2>; 357 #interrupt-cells = <2>;
358 interrupt-parent = <&gpio1>; 358 interrupt-parent = <&gpio1>;
359 interrupts = <3 IRQ_TYPE_EDGE_ 359 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
360 }; 360 };
361 361
362 pcf_gpio_21: pcf8757@21 { 362 pcf_gpio_21: pcf8757@21 {
363 compatible = "nxp,pcf8575"; 363 compatible = "nxp,pcf8575";
364 reg = <0x21>; 364 reg = <0x21>;
365 gpio-controller; 365 gpio-controller;
366 #gpio-cells = <2>; 366 #gpio-cells = <2>;
367 interrupt-parent = <&gpio1>; 367 interrupt-parent = <&gpio1>;
368 interrupts = <3 IRQ_TYPE_EDGE_ 368 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
369 interrupt-controller; 369 interrupt-controller;
370 #interrupt-cells = <2>; 370 #interrupt-cells = <2>;
371 }; 371 };
372 372
373 pcf_hdmi: pcf8575@26 { 373 pcf_hdmi: pcf8575@26 {
374 compatible = "nxp,pcf8575"; 374 compatible = "nxp,pcf8575";
375 reg = <0x26>; 375 reg = <0x26>;
376 gpio-controller; 376 gpio-controller;
377 #gpio-cells = <2>; 377 #gpio-cells = <2>;
378 hdmi-audio-hog { 378 hdmi-audio-hog {
379 /* vin6_sel_s0: high: 379 /* vin6_sel_s0: high: VIN6, low: audio */
380 gpio-hog; 380 gpio-hog;
381 gpios = <1 GPIO_ACTIVE 381 gpios = <1 GPIO_ACTIVE_HIGH>;
382 output-low; 382 output-low;
383 line-name = "vin6_sel_ 383 line-name = "vin6_sel_s0";
384 }; 384 };
385 }; 385 };
386 386
387 tlv320aic3106: tlv320aic3106@19 { 387 tlv320aic3106: tlv320aic3106@19 {
388 #sound-dai-cells = <0>; 388 #sound-dai-cells = <0>;
389 compatible = "ti,tlv320aic3106 389 compatible = "ti,tlv320aic3106";
390 reg = <0x19>; 390 reg = <0x19>;
391 adc-settle-ms = <40>; 391 adc-settle-ms = <40>;
392 ai3x-micbias-vg = <1>; 392 ai3x-micbias-vg = <1>; /* 2.0V */
393 status = "okay"; 393 status = "okay";
394 394
395 /* Regulators */ 395 /* Regulators */
396 AVDD-supply = <&vio_3v3>; 396 AVDD-supply = <&vio_3v3>;
397 IOVDD-supply = <&vio_3v3>; 397 IOVDD-supply = <&vio_3v3>;
398 DRVDD-supply = <&vio_3v3>; 398 DRVDD-supply = <&vio_3v3>;
399 DVDD-supply = <&aic_dvdd>; 399 DVDD-supply = <&aic_dvdd>;
400 }; 400 };
401 }; 401 };
402 402
403 &cpu0 { 403 &cpu0 {
404 vdd-supply = <&buck10_reg>; 404 vdd-supply = <&buck10_reg>;
405 }; 405 };
406 406
407 &mmc1 { 407 &mmc1 {
408 status = "okay"; 408 status = "okay";
409 vmmc-supply = <&vio_3v3_sd>; 409 vmmc-supply = <&vio_3v3_sd>;
410 vqmmc-supply = <&ldo4_reg>; 410 vqmmc-supply = <&ldo4_reg>;
411 bus-width = <4>; 411 bus-width = <4>;
412 /* 412 /*
413 * SDCD signal is not being used here 413 * SDCD signal is not being used here - using the fact that GPIO mode
414 * is always hardwired. 414 * is always hardwired.
415 */ 415 */
416 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW> 416 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
417 pinctrl-names = "default", "hs"; 417 pinctrl-names = "default", "hs";
418 pinctrl-0 = <&mmc1_pins_default>; 418 pinctrl-0 = <&mmc1_pins_default>;
419 pinctrl-1 = <&mmc1_pins_hs>; 419 pinctrl-1 = <&mmc1_pins_hs>;
420 }; 420 };
421 421
422 &mmc2 { 422 &mmc2 {
423 status = "okay"; 423 status = "okay";
424 vmmc-supply = <&vio_1v8>; 424 vmmc-supply = <&vio_1v8>;
425 vqmmc-supply = <&vio_1v8>; 425 vqmmc-supply = <&vio_1v8>;
426 bus-width = <8>; 426 bus-width = <8>;
427 non-removable; 427 non-removable;
428 pinctrl-names = "default", "hs", "ddr_ 428 pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
429 pinctrl-0 = <&mmc2_pins_default>; 429 pinctrl-0 = <&mmc2_pins_default>;
430 pinctrl-1 = <&mmc2_pins_default>; 430 pinctrl-1 = <&mmc2_pins_default>;
431 pinctrl-2 = <&mmc2_pins_default>; 431 pinctrl-2 = <&mmc2_pins_default>;
432 pinctrl-3 = <&mmc2_pins_hs200 &mmc2_io 432 pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_conf>;
433 }; 433 };
434 434
435 &mmc4 { 435 &mmc4 {
436 status = "okay"; 436 status = "okay";
437 vmmc-supply = <&vio_3v6>; 437 vmmc-supply = <&vio_3v6>;
438 vqmmc-supply = <&vmmcwl_fixed>; 438 vqmmc-supply = <&vmmcwl_fixed>;
439 pinctrl-names = "default", "hs", "sdr1 439 pinctrl-names = "default", "hs", "sdr12", "sdr25";
440 pinctrl-0 = <&mmc4_pins_hs &mmc4_iodel 440 pinctrl-0 = <&mmc4_pins_hs &mmc4_iodelay_default_conf>;
441 pinctrl-1 = <&mmc4_pins_hs &mmc4_iodel 441 pinctrl-1 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>;
442 pinctrl-2 = <&mmc4_pins_hs &mmc4_iodel 442 pinctrl-2 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>;
443 pinctrl-3 = <&mmc4_pins_hs &mmc4_iodel 443 pinctrl-3 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>;
444 }; 444 };
445 445
446 /* No RTC on this device */ 446 /* No RTC on this device */
447 &rtc { 447 &rtc {
448 status = "disabled"; 448 status = "disabled";
449 }; 449 };
450 450
451 &mac_sw { 451 &mac_sw {
452 status = "okay"; 452 status = "okay";
453 }; 453 };
454 454
455 &cpsw_port1 { 455 &cpsw_port1 {
456 phy-handle = <&dp83867_0>; 456 phy-handle = <&dp83867_0>;
457 phy-mode = "rgmii-id"; 457 phy-mode = "rgmii-id";
458 ti,dual-emac-pvid = <1>; 458 ti,dual-emac-pvid = <1>;
459 }; 459 };
460 460
461 &cpsw_port2 { 461 &cpsw_port2 {
462 phy-handle = <&dp83867_1>; 462 phy-handle = <&dp83867_1>;
463 phy-mode = "rgmii-id"; 463 phy-mode = "rgmii-id";
464 ti,dual-emac-pvid = <2>; 464 ti,dual-emac-pvid = <2>;
465 }; 465 };
466 466
467 &davinci_mdio_sw { 467 &davinci_mdio_sw {
468 dp83867_0: ethernet-phy@2 { 468 dp83867_0: ethernet-phy@2 {
469 reg = <2>; 469 reg = <2>;
470 ti,rx-internal-delay = <DP8386 470 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
471 ti,tx-internal-delay = <DP8386 471 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
472 ti,fifo-depth = <DP83867_PHYCR 472 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
473 ti,min-output-impedance; 473 ti,min-output-impedance;
474 ti,dp83867-rxctrl-strap-quirk; 474 ti,dp83867-rxctrl-strap-quirk;
475 }; 475 };
476 476
477 dp83867_1: ethernet-phy@3 { 477 dp83867_1: ethernet-phy@3 {
478 reg = <3>; 478 reg = <3>;
479 ti,rx-internal-delay = <DP8386 479 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
480 ti,tx-internal-delay = <DP8386 480 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
481 ti,fifo-depth = <DP83867_PHYCR 481 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
482 ti,min-output-impedance; 482 ti,min-output-impedance;
483 ti,dp83867-rxctrl-strap-quirk; 483 ti,dp83867-rxctrl-strap-quirk;
484 }; 484 };
485 }; 485 };
486 486
487 &usb2_phy1 { 487 &usb2_phy1 {
488 phy-supply = <&ldo3_reg>; 488 phy-supply = <&ldo3_reg>;
489 }; 489 };
490 490
491 &usb2_phy2 { 491 &usb2_phy2 {
492 phy-supply = <&ldo3_reg>; 492 phy-supply = <&ldo3_reg>;
493 }; 493 };
494 494
495 &dss { 495 &dss {
496 status = "okay"; 496 status = "okay";
497 vdda_video-supply = <&ldo5_reg>; 497 vdda_video-supply = <&ldo5_reg>;
498 }; 498 };
499 499
500 &hdmi { 500 &hdmi {
501 status = "okay"; 501 status = "okay";
502 502
503 vdda-supply = <&ldo1_reg>; 503 vdda-supply = <&ldo1_reg>;
504 504
505 port { 505 port {
506 hdmi_out: endpoint { 506 hdmi_out: endpoint {
507 remote-endpoint = <&tp 507 remote-endpoint = <&tpd12s015_in>;
508 }; 508 };
509 }; 509 };
510 }; 510 };
511 511
512 &qspi { 512 &qspi {
513 spi-max-frequency = <96000000>; 513 spi-max-frequency = <96000000>;
514 flash@0 { 514 flash@0 {
515 spi-max-frequency = <96000000> 515 spi-max-frequency = <96000000>;
516 }; 516 };
517 }; 517 };
518 518
519 &pcie2_phy { 519 &pcie2_phy {
520 status = "okay"; 520 status = "okay";
521 }; 521 };
522 522
523 &pcie1_rc { 523 &pcie1_rc {
524 num-lanes = <2>; 524 num-lanes = <2>;
525 phys = <&pcie1_phy>, <&pcie2_phy>; 525 phys = <&pcie1_phy>, <&pcie2_phy>;
526 phy-names = "pcie-phy0", "pcie-phy1"; 526 phy-names = "pcie-phy0", "pcie-phy1";
527 }; 527 };
528 528
529 &pcie1_ep { 529 &pcie1_ep {
530 num-lanes = <2>; 530 num-lanes = <2>;
531 phys = <&pcie1_phy>, <&pcie2_phy>; 531 phys = <&pcie1_phy>, <&pcie2_phy>;
532 phy-names = "pcie-phy0", "pcie-phy1"; 532 phy-names = "pcie-phy0", "pcie-phy1";
533 }; 533 };
534 534
535 &extcon_usb1 { 535 &extcon_usb1 {
536 vbus-gpios = <&pcf_lcd 14 GPIO_ACTIVE_ 536 vbus-gpios = <&pcf_lcd 14 GPIO_ACTIVE_HIGH>;
537 }; 537 };
538 538
539 &extcon_usb2 { 539 &extcon_usb2 {
540 vbus-gpios = <&pcf_lcd 15 GPIO_ACTIVE_ 540 vbus-gpios = <&pcf_lcd 15 GPIO_ACTIVE_HIGH>;
541 }; 541 };
542 542
543 &m_can0 { 543 &m_can0 {
544 can-transceiver { 544 can-transceiver {
545 max-bitrate = <5000000>; 545 max-bitrate = <5000000>;
546 }; 546 };
547 }; 547 };
548 548
549 &ipu2 { 549 &ipu2 {
550 status = "okay"; 550 status = "okay";
551 memory-region = <&ipu2_cma_pool>; 551 memory-region = <&ipu2_cma_pool>;
552 }; 552 };
553 553
554 &ipu1 { 554 &ipu1 {
555 status = "okay"; 555 status = "okay";
556 memory-region = <&ipu1_cma_pool>; 556 memory-region = <&ipu1_cma_pool>;
557 }; 557 };
558 558
559 &dsp1 { 559 &dsp1 {
560 status = "okay"; 560 status = "okay";
561 memory-region = <&dsp1_cma_pool>; 561 memory-region = <&dsp1_cma_pool>;
562 }; 562 };
563 563
564 &dsp2 { 564 &dsp2 {
565 status = "okay"; 565 status = "okay";
566 memory-region = <&dsp2_cma_pool>; 566 memory-region = <&dsp2_cma_pool>;
567 }; 567 };
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