1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * Common Device Tree Source for IGEPv2 3 * Common Device Tree Source for IGEPv2
4 * 4 *
5 * Copyright (C) 2014 Javier Martinez Canillas< 5 * Copyright (C) 2014 Javier Martinez Canillas <javier@dowhile0.org>
6 * Copyright (C) 2014 Enric Balletbo i Serra <e 6 * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com>
7 */ 7 */
8 8
9 #include "omap3-igep.dtsi" 9 #include "omap3-igep.dtsi"
10 #include "omap-gpmc-smsc9221.dtsi" 10 #include "omap-gpmc-smsc9221.dtsi"
11 11
12 / { 12 / {
13 13
14 leds { 14 leds {
15 pinctrl-names = "default"; 15 pinctrl-names = "default";
16 pinctrl-0 = <&leds_pins>; 16 pinctrl-0 = <&leds_pins>;
17 compatible = "gpio-leds"; 17 compatible = "gpio-leds";
18 18
19 boot { 19 boot {
20 label = "omap3:green: 20 label = "omap3:green:boot";
21 gpios = <&gpio1 26 GP 21 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
22 default-state = "on"; 22 default-state = "on";
23 }; 23 };
24 24
25 user0 { 25 user0 {
26 label = "omap3:red:us 26 label = "omap3:red:user0";
27 gpios = <&gpio1 27 GP 27 gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
28 default-state = "off" 28 default-state = "off";
29 }; 29 };
30 30
31 user1 { 31 user1 {
32 label = "omap3:red:us 32 label = "omap3:red:user1";
33 gpios = <&gpio1 28 GP 33 gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
34 default-state = "off" 34 default-state = "off";
35 }; 35 };
36 36
37 user2 { 37 user2 {
38 label = "omap3:green:u 38 label = "omap3:green:user1";
39 gpios = <&twl_gpio 19 39 gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>;
40 }; 40 };
41 }; 41 };
42 42
43 /* HS USB Port 1 Power */ 43 /* HS USB Port 1 Power */
44 hsusb1_power: hsusb1_power_reg { 44 hsusb1_power: hsusb1_power_reg {
45 compatible = "regulator-fixed" 45 compatible = "regulator-fixed";
46 regulator-name = "hsusb1_vbus" 46 regulator-name = "hsusb1_vbus";
47 regulator-min-microvolt = <330 47 regulator-min-microvolt = <3300000>;
48 regulator-max-microvolt = <330 48 regulator-max-microvolt = <3300000>;
49 gpio = <&twl_gpio 18 GPIO_ACTI 49 gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */
50 startup-delay-us = <70000>; 50 startup-delay-us = <70000>;
51 }; 51 };
52 52
53 /* HS USB Host PHY on PORT 1 */ 53 /* HS USB Host PHY on PORT 1 */
54 hsusb1_phy: hsusb1_phy { 54 hsusb1_phy: hsusb1_phy {
55 compatible = "usb-nop-xceiv"; 55 compatible = "usb-nop-xceiv";
56 reset-gpios = <&gpio1 24 GPIO_ 56 reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */
57 vcc-supply = <&hsusb1_power>; 57 vcc-supply = <&hsusb1_power>;
58 #phy-cells = <0>; 58 #phy-cells = <0>;
59 }; 59 };
60 60
61 tfp410: encoder { 61 tfp410: encoder {
62 compatible = "ti,tfp410"; 62 compatible = "ti,tfp410";
63 powerdown-gpios = <&gpio6 10 G 63 powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
64 64
65 ports { 65 ports {
66 #address-cells = <1>; 66 #address-cells = <1>;
67 #size-cells = <0>; 67 #size-cells = <0>;
68 68
69 port@0 { 69 port@0 {
70 reg = <0>; 70 reg = <0>;
71 71
72 tfp410_in: end 72 tfp410_in: endpoint {
73 remote 73 remote-endpoint = <&dpi_out>;
74 }; 74 };
75 }; 75 };
76 76
77 port@1 { 77 port@1 {
78 reg = <1>; 78 reg = <1>;
79 79
80 tfp410_out: en 80 tfp410_out: endpoint {
81 remote 81 remote-endpoint = <&dvi_connector_in>;
82 }; 82 };
83 }; 83 };
84 }; 84 };
85 }; 85 };
86 86
87 dvi0: connector { 87 dvi0: connector {
88 compatible = "dvi-connector"; 88 compatible = "dvi-connector";
89 label = "dvi"; 89 label = "dvi";
90 90
91 digital; 91 digital;
92 92
93 ddc-i2c-bus = <&i2c3>; 93 ddc-i2c-bus = <&i2c3>;
94 94
95 port { 95 port {
96 dvi_connector_in: endp 96 dvi_connector_in: endpoint {
97 remote-endpoin 97 remote-endpoint = <&tfp410_out>;
98 }; 98 };
99 }; 99 };
100 }; 100 };
101 }; 101 };
102 102
103 &omap3_pmx_core { 103 &omap3_pmx_core {
104 pinctrl-names = "default"; 104 pinctrl-names = "default";
105 pinctrl-0 = < 105 pinctrl-0 = <
106 &tfp410_pins 106 &tfp410_pins
107 &dss_dpi_pins 107 &dss_dpi_pins
108 >; 108 >;
109 109
110 tfp410_pins: tfp410-pins { 110 tfp410_pins: tfp410-pins {
111 pinctrl-single,pins = < 111 pinctrl-single,pins = <
112 OMAP3_CORE1_IOPAD(0x21 112 OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
113 >; 113 >;
114 }; 114 };
115 115
116 dss_dpi_pins: dss-dpi-pins { 116 dss_dpi_pins: dss-dpi-pins {
117 pinctrl-single,pins = < 117 pinctrl-single,pins = <
118 OMAP3_CORE1_IOPAD(0x20 118 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
119 OMAP3_CORE1_IOPAD(0x20 119 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
120 OMAP3_CORE1_IOPAD(0x20 120 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
121 OMAP3_CORE1_IOPAD(0x20 121 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
122 OMAP3_CORE1_IOPAD(0x20 122 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
123 OMAP3_CORE1_IOPAD(0x20 123 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
124 OMAP3_CORE1_IOPAD(0x20 124 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
125 OMAP3_CORE1_IOPAD(0x20 125 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
126 OMAP3_CORE1_IOPAD(0x20 126 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
127 OMAP3_CORE1_IOPAD(0x20 127 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
128 OMAP3_CORE1_IOPAD(0x20 128 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
129 OMAP3_CORE1_IOPAD(0x20 129 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
130 OMAP3_CORE1_IOPAD(0x20 130 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
131 OMAP3_CORE1_IOPAD(0x20 131 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
132 OMAP3_CORE1_IOPAD(0x20 132 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
133 OMAP3_CORE1_IOPAD(0x20 133 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
134 OMAP3_CORE1_IOPAD(0x20 134 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
135 OMAP3_CORE1_IOPAD(0x20 135 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
136 OMAP3_CORE1_IOPAD(0x20 136 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
137 OMAP3_CORE1_IOPAD(0x20 137 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
138 OMAP3_CORE1_IOPAD(0x20 138 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
139 OMAP3_CORE1_IOPAD(0x20 139 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
140 OMAP3_CORE1_IOPAD(0x21 140 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
141 OMAP3_CORE1_IOPAD(0x21 141 OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
142 OMAP3_CORE1_IOPAD(0x21 142 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
143 OMAP3_CORE1_IOPAD(0x21 143 OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
144 OMAP3_CORE1_IOPAD(0x21 144 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
145 OMAP3_CORE1_IOPAD(0x21 145 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
146 >; 146 >;
147 }; 147 };
148 148
149 uart2_pins: uart2-pins { 149 uart2_pins: uart2-pins {
150 pinctrl-single,pins = < 150 pinctrl-single,pins = <
151 OMAP3_CORE1_IOPAD(0x21 151 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
152 OMAP3_CORE1_IOPAD(0x21 152 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
153 OMAP3_CORE1_IOPAD(0x21 153 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
154 OMAP3_CORE1_IOPAD(0x21 154 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
155 >; 155 >;
156 }; 156 };
157 157
158 smsc9221_pins: smsc9221-pins { 158 smsc9221_pins: smsc9221-pins {
159 pinctrl-single,pins = < 159 pinctrl-single,pins = <
160 OMAP3_CORE1_IOPAD(0x21 160 OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
161 >; 161 >;
162 }; 162 };
163 }; 163 };
164 164
165 &omap3_pmx_core2 { 165 &omap3_pmx_core2 {
166 pinctrl-names = "default"; 166 pinctrl-names = "default";
167 pinctrl-0 = < 167 pinctrl-0 = <
168 &hsusbb1_pins 168 &hsusbb1_pins
169 >; 169 >;
170 170
171 hsusbb1_pins: hsusbb1-pins { 171 hsusbb1_pins: hsusbb1-pins {
172 pinctrl-single,pins = < 172 pinctrl-single,pins = <
173 OMAP3630_CORE2_IOPAD(0 173 OMAP3630_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
174 OMAP3630_CORE2_IOPAD(0 174 OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
175 OMAP3630_CORE2_IOPAD(0 175 OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */
176 OMAP3630_CORE2_IOPAD(0 176 OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */
177 OMAP3630_CORE2_IOPAD(0 177 OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */
178 OMAP3630_CORE2_IOPAD(0 178 OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */
179 OMAP3630_CORE2_IOPAD(0 179 OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */
180 OMAP3630_CORE2_IOPAD(0 180 OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */
181 OMAP3630_CORE2_IOPAD(0 181 OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */
182 OMAP3630_CORE2_IOPAD(0 182 OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */
183 OMAP3630_CORE2_IOPAD(0 183 OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */
184 OMAP3630_CORE2_IOPAD(0 184 OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */
185 >; 185 >;
186 }; 186 };
187 187
188 leds_pins: leds-pins { 188 leds_pins: leds-pins {
189 pinctrl-single,pins = < 189 pinctrl-single,pins = <
190 OMAP3630_CORE2_IOPAD(0 190 OMAP3630_CORE2_IOPAD(0x25f4, PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */
191 OMAP3630_CORE2_IOPAD(0 191 OMAP3630_CORE2_IOPAD(0x25f6, PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */
192 OMAP3630_CORE2_IOPAD(0 192 OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */
193 >; 193 >;
194 }; 194 };
195 195
196 mmc1_wp_pins: mmc1-cd-pins { 196 mmc1_wp_pins: mmc1-cd-pins {
197 pinctrl-single,pins = < 197 pinctrl-single,pins = <
198 OMAP3630_CORE2_IOPAD(0 198 OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT | MUX_MODE4) /* etk_d15.gpio_29 */
199 >; 199 >;
200 }; 200 };
201 }; 201 };
202 202
203 &i2c3 { 203 &i2c3 {
204 clock-frequency = <100000>; 204 clock-frequency = <100000>;
205 205
206 /* 206 /*
207 * Display monitor features are burnt 207 * Display monitor features are burnt in the EEPROM
208 * as EDID data. 208 * as EDID data.
209 */ 209 */
210 eeprom@50 { 210 eeprom@50 {
211 compatible = "ti,eeprom"; 211 compatible = "ti,eeprom";
212 reg = <0x50>; 212 reg = <0x50>;
213 }; 213 };
214 }; 214 };
215 215
216 &gpmc { 216 &gpmc {
217 ranges = <0 0 0x30000000 0x01000000>, 217 ranges = <0 0 0x30000000 0x01000000>, /* CS0: 16MB for NAND */
218 <5 0 0x2c000000 0x01000000>; 218 <5 0 0x2c000000 0x01000000>; /* CS5: 16MB for ethernet */
219 219
220 ethernet@gpmc { 220 ethernet@gpmc {
221 pinctrl-names = "default"; 221 pinctrl-names = "default";
222 pinctrl-0 = <&smsc9221_pins>; 222 pinctrl-0 = <&smsc9221_pins>;
223 reg = <5 0 0xff>; 223 reg = <5 0 0xff>;
224 interrupt-parent = <&gpio6>; 224 interrupt-parent = <&gpio6>;
225 interrupts = <16 IRQ_TYPE_LEVE 225 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
226 }; 226 };
227 }; 227 };
228 228
229 &uart2 { 229 &uart2 {
230 pinctrl-names = "default"; 230 pinctrl-names = "default";
231 pinctrl-0 = <&uart2_pins>; 231 pinctrl-0 = <&uart2_pins>;
232 }; 232 };
233 233
234 &usbhshost { 234 &usbhshost {
235 port1-mode = "ehci-phy"; 235 port1-mode = "ehci-phy";
236 }; 236 };
237 237
238 &usbhsehci { 238 &usbhsehci {
239 phys = <&hsusb1_phy>; 239 phys = <&hsusb1_phy>;
240 }; 240 };
241 241
242 &vpll2 { 242 &vpll2 {
243 /* Needed for DSS */ 243 /* Needed for DSS */
244 regulator-name = "vdds_dsi"; 244 regulator-name = "vdds_dsi";
245 }; 245 };
246 246
247 &dss { 247 &dss {
248 status = "okay"; 248 status = "okay";
249 249
250 port { 250 port {
251 dpi_out: endpoint { 251 dpi_out: endpoint {
252 remote-endpoint = <&tf 252 remote-endpoint = <&tfp410_in>;
253 data-lines = <24>; 253 data-lines = <24>;
254 }; 254 };
255 }; 255 };
256 }; 256 };
257 257
258 &mmc1 { 258 &mmc1 {
259 pinctrl-0 = <&mmc1_pins &mmc1_wp_pins> 259 pinctrl-0 = <&mmc1_pins &mmc1_wp_pins>;
260 wp-gpios = <&gpio1 29 GPIO_ACTIVE_LOW> 260 wp-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; /* gpio_29 */
261 }; 261 };
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